1 /* linux/drivers/serial/samsuing.c
3 * Driver core for Samsung SoC onboard UARTs.
5 * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics
6 * http://armlinux.simtec.co.uk/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 /* Hote on 2410 error handling
15 * The s3c2410 manual has a love/hate affair with the contents of the
16 * UERSTAT register in the UART blocks, and keeps marking some of the
17 * error bits as reserved. Having checked with the s3c2410x01,
18 * it copes with BREAKs properly, so I am happy to ignore the RESERVED
19 * feature from the latter versions of the manual.
21 * If it becomes aparrent that latter versions of the 2410 remove these
22 * bits, then action will have to be taken to differentiate the versions
23 * and change the policy on BREAK
28 #if defined(CONFIG_SERIAL_SAMSUNG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
32 #include <linux/module.h>
33 #include <linux/ioport.h>
35 #include <linux/platform_device.h>
36 #include <linux/init.h>
37 #include <linux/sysrq.h>
38 #include <linux/console.h>
39 #include <linux/tty.h>
40 #include <linux/tty_flip.h>
41 #include <linux/serial_core.h>
42 #include <linux/serial.h>
43 #include <linux/delay.h>
44 #include <linux/clk.h>
45 #include <linux/cpufreq.h>
49 #include <mach/hardware.h>
52 #include <plat/regs-serial.h>
56 /* UART name and device definitions */
58 #define S3C24XX_SERIAL_NAME "ttySAC"
59 #define S3C24XX_SERIAL_MAJOR 204
60 #define S3C24XX_SERIAL_MINOR 64
62 /* we can support 3 uarts, but not always use them */
64 #if defined(CONFIG_CPU_S3C2400) || defined(CONFIG_CPU_S3C24A0)
70 /* port irq numbers */
72 #define TX_IRQ(port) ((port)->irq + 1)
73 #define RX_IRQ(port) ((port)->irq)
75 /* macros to change one thing to another */
77 #define tx_enabled(port) ((port)->unused[0])
78 #define rx_enabled(port) ((port)->unused[1])
80 /* flag to ignore all characters comming in */
81 #define RXSTAT_DUMMY_READ (0x10000000)
83 static inline struct s3c24xx_uart_port *to_ourport(struct uart_port *port)
85 return container_of(port, struct s3c24xx_uart_port, port);
88 /* translate a port to the device name */
90 static inline const char *s3c24xx_serial_portname(struct uart_port *port)
92 return to_platform_device(port->dev)->name;
95 static int s3c24xx_serial_txempty_nofifo(struct uart_port *port)
97 return (rd_regl(port, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE);
100 static void s3c24xx_serial_rx_enable(struct uart_port *port)
103 unsigned int ucon, ufcon;
106 spin_lock_irqsave(&port->lock, flags);
108 while (--count && !s3c24xx_serial_txempty_nofifo(port))
111 ufcon = rd_regl(port, S3C2410_UFCON);
112 ufcon |= S3C2410_UFCON_RESETRX;
113 wr_regl(port, S3C2410_UFCON, ufcon);
115 ucon = rd_regl(port, S3C2410_UCON);
116 ucon |= S3C2410_UCON_RXIRQMODE;
117 wr_regl(port, S3C2410_UCON, ucon);
119 rx_enabled(port) = 1;
120 spin_unlock_irqrestore(&port->lock, flags);
123 static void s3c24xx_serial_rx_disable(struct uart_port *port)
128 spin_lock_irqsave(&port->lock, flags);
130 ucon = rd_regl(port, S3C2410_UCON);
131 ucon &= ~S3C2410_UCON_RXIRQMODE;
132 wr_regl(port, S3C2410_UCON, ucon);
134 rx_enabled(port) = 0;
135 spin_unlock_irqrestore(&port->lock, flags);
138 static void s3c24xx_serial_stop_tx(struct uart_port *port)
140 if (tx_enabled(port)) {
141 disable_irq(TX_IRQ(port));
142 tx_enabled(port) = 0;
143 if (port->flags & UPF_CONS_FLOW)
144 s3c24xx_serial_rx_enable(port);
148 static void s3c24xx_serial_start_tx(struct uart_port *port)
150 if (!tx_enabled(port)) {
151 if (port->flags & UPF_CONS_FLOW)
152 s3c24xx_serial_rx_disable(port);
154 enable_irq(TX_IRQ(port));
155 tx_enabled(port) = 1;
160 static void s3c24xx_serial_stop_rx(struct uart_port *port)
162 if (rx_enabled(port)) {
163 dbg("s3c24xx_serial_stop_rx: port=%p\n", port);
164 disable_irq(RX_IRQ(port));
165 rx_enabled(port) = 0;
169 static void s3c24xx_serial_enable_ms(struct uart_port *port)
173 static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *port)
175 return to_ourport(port)->info;
178 static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port)
180 if (port->dev == NULL)
183 return (struct s3c2410_uartcfg *)port->dev->platform_data;
186 static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport,
187 unsigned long ufstat)
189 struct s3c24xx_uart_info *info = ourport->info;
191 if (ufstat & info->rx_fifofull)
192 return info->fifosize;
194 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift;
198 /* ? - where has parity gone?? */
199 #define S3C2410_UERSTAT_PARITY (0x1000)
202 s3c24xx_serial_rx_chars(int irq, void *dev_id)
204 struct s3c24xx_uart_port *ourport = dev_id;
205 struct uart_port *port = &ourport->port;
206 struct tty_struct *tty = port->info->port.tty;
207 unsigned int ufcon, ch, flag, ufstat, uerstat;
210 while (max_count-- > 0) {
211 ufcon = rd_regl(port, S3C2410_UFCON);
212 ufstat = rd_regl(port, S3C2410_UFSTAT);
214 if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0)
217 uerstat = rd_regl(port, S3C2410_UERSTAT);
218 ch = rd_regb(port, S3C2410_URXH);
220 if (port->flags & UPF_CONS_FLOW) {
221 int txe = s3c24xx_serial_txempty_nofifo(port);
223 if (rx_enabled(port)) {
225 rx_enabled(port) = 0;
230 ufcon |= S3C2410_UFCON_RESETRX;
231 wr_regl(port, S3C2410_UFCON, ufcon);
232 rx_enabled(port) = 1;
239 /* insert the character into the buffer */
244 if (unlikely(uerstat & S3C2410_UERSTAT_ANY)) {
245 dbg("rxerr: port ch=0x%02x, rxs=0x%08x\n",
248 /* check for break */
249 if (uerstat & S3C2410_UERSTAT_BREAK) {
252 if (uart_handle_break(port))
256 if (uerstat & S3C2410_UERSTAT_FRAME)
257 port->icount.frame++;
258 if (uerstat & S3C2410_UERSTAT_OVERRUN)
259 port->icount.overrun++;
261 uerstat &= port->read_status_mask;
263 if (uerstat & S3C2410_UERSTAT_BREAK)
265 else if (uerstat & S3C2410_UERSTAT_PARITY)
267 else if (uerstat & (S3C2410_UERSTAT_FRAME |
268 S3C2410_UERSTAT_OVERRUN))
272 if (uart_handle_sysrq_char(port, ch))
275 uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN,
281 tty_flip_buffer_push(tty);
287 static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id)
289 struct s3c24xx_uart_port *ourport = id;
290 struct uart_port *port = &ourport->port;
291 struct circ_buf *xmit = &port->info->xmit;
295 wr_regb(port, S3C2410_UTXH, port->x_char);
301 /* if there isnt anything more to transmit, or the uart is now
302 * stopped, disable the uart and exit
305 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
306 s3c24xx_serial_stop_tx(port);
310 /* try and drain the buffer... */
312 while (!uart_circ_empty(xmit) && count-- > 0) {
313 if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull)
316 wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]);
317 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
321 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
322 uart_write_wakeup(port);
324 if (uart_circ_empty(xmit))
325 s3c24xx_serial_stop_tx(port);
331 static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port)
333 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
334 unsigned long ufstat = rd_regl(port, S3C2410_UFSTAT);
335 unsigned long ufcon = rd_regl(port, S3C2410_UFCON);
337 if (ufcon & S3C2410_UFCON_FIFOMODE) {
338 if ((ufstat & info->tx_fifomask) != 0 ||
339 (ufstat & info->tx_fifofull))
345 return s3c24xx_serial_txempty_nofifo(port);
348 /* no modem control lines */
349 static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port)
351 unsigned int umstat = rd_regb(port, S3C2410_UMSTAT);
353 if (umstat & S3C2410_UMSTAT_CTS)
354 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
356 return TIOCM_CAR | TIOCM_DSR;
359 static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
361 /* todo - possibly remove AFC and do manual CTS */
364 static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state)
369 spin_lock_irqsave(&port->lock, flags);
371 ucon = rd_regl(port, S3C2410_UCON);
374 ucon |= S3C2410_UCON_SBREAK;
376 ucon &= ~S3C2410_UCON_SBREAK;
378 wr_regl(port, S3C2410_UCON, ucon);
380 spin_unlock_irqrestore(&port->lock, flags);
383 static void s3c24xx_serial_shutdown(struct uart_port *port)
385 struct s3c24xx_uart_port *ourport = to_ourport(port);
387 if (ourport->tx_claimed) {
388 free_irq(TX_IRQ(port), ourport);
389 tx_enabled(port) = 0;
390 ourport->tx_claimed = 0;
393 if (ourport->rx_claimed) {
394 free_irq(RX_IRQ(port), ourport);
395 ourport->rx_claimed = 0;
396 rx_enabled(port) = 0;
401 static int s3c24xx_serial_startup(struct uart_port *port)
403 struct s3c24xx_uart_port *ourport = to_ourport(port);
406 dbg("s3c24xx_serial_startup: port=%p (%08lx,%p)\n",
407 port->mapbase, port->membase);
409 rx_enabled(port) = 1;
411 ret = request_irq(RX_IRQ(port),
412 s3c24xx_serial_rx_chars, 0,
413 s3c24xx_serial_portname(port), ourport);
416 printk(KERN_ERR "cannot get irq %d\n", RX_IRQ(port));
420 ourport->rx_claimed = 1;
422 dbg("requesting tx irq...\n");
424 tx_enabled(port) = 1;
426 ret = request_irq(TX_IRQ(port),
427 s3c24xx_serial_tx_chars, 0,
428 s3c24xx_serial_portname(port), ourport);
431 printk(KERN_ERR "cannot get irq %d\n", TX_IRQ(port));
435 ourport->tx_claimed = 1;
437 dbg("s3c24xx_serial_startup ok\n");
439 /* the port reset code should have done the correct
440 * register setup for the port controls */
445 s3c24xx_serial_shutdown(port);
449 /* power power management control */
451 static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
454 struct s3c24xx_uart_port *ourport = to_ourport(port);
456 ourport->pm_level = level;
460 if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL)
461 clk_disable(ourport->baudclk);
463 clk_disable(ourport->clk);
467 clk_enable(ourport->clk);
469 if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL)
470 clk_enable(ourport->baudclk);
474 printk(KERN_ERR "s3c24xx_serial: unknown pm %d\n", level);
478 /* baud rate calculation
480 * The UARTs on the S3C2410/S3C2440 can take their clocks from a number
481 * of different sources, including the peripheral clock ("pclk") and an
482 * external clock ("uclk"). The S3C2440 also adds the core clock ("fclk")
483 * with a programmable extra divisor.
485 * The following code goes through the clock sources, and calculates the
486 * baud clocks (and the resultant actual baud rates) and then tries to
487 * pick the closest one and select that.
494 static struct s3c24xx_uart_clksrc tmp_clksrc = {
502 s3c24xx_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
504 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
506 return (info->get_clksrc)(port, c);
510 s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
512 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
514 return (info->set_clksrc)(port, c);
518 struct s3c24xx_uart_clksrc *clksrc;
524 static int s3c24xx_serial_calcbaud(struct baud_calc *calc,
525 struct uart_port *port,
526 struct s3c24xx_uart_clksrc *clksrc,
531 calc->src = clk_get(port->dev, clksrc->name);
532 if (calc->src == NULL || IS_ERR(calc->src))
535 rate = clk_get_rate(calc->src);
536 rate /= clksrc->divisor;
538 calc->clksrc = clksrc;
539 calc->quot = (rate + (8 * baud)) / (16 * baud);
540 calc->calc = (rate / (calc->quot * 16));
546 static unsigned int s3c24xx_serial_getclk(struct uart_port *port,
547 struct s3c24xx_uart_clksrc **clksrc,
551 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port);
552 struct s3c24xx_uart_clksrc *clkp;
553 struct baud_calc res[MAX_CLKS];
554 struct baud_calc *resptr, *best, *sptr;
560 if (cfg->clocks_size < 2) {
561 if (cfg->clocks_size == 0)
564 /* check to see if we're sourcing fclk, and if so we're
565 * going to have to update the clock source
568 if (strcmp(clkp->name, "fclk") == 0) {
569 struct s3c24xx_uart_clksrc src;
571 s3c24xx_serial_getsource(port, &src);
573 /* check that the port already using fclk, and if
574 * not, then re-select fclk
577 if (strcmp(src.name, clkp->name) == 0) {
578 s3c24xx_serial_setsource(port, clkp);
579 s3c24xx_serial_getsource(port, &src);
582 clkp->divisor = src.divisor;
585 s3c24xx_serial_calcbaud(res, port, clkp, baud);
591 for (i = 0; i < cfg->clocks_size; i++, clkp++) {
592 if (s3c24xx_serial_calcbaud(resptr, port, clkp, baud))
597 /* ok, we now need to select the best clock we found */
600 unsigned int deviation = (1<<30)|((1<<30)-1);
603 for (sptr = res; sptr < resptr; sptr++) {
604 calc_deviation = baud - sptr->calc;
605 if (calc_deviation < 0)
606 calc_deviation = -calc_deviation;
608 if (calc_deviation < deviation) {
610 deviation = calc_deviation;
615 /* store results to pass back */
617 *clksrc = best->clksrc;
623 static void s3c24xx_serial_set_termios(struct uart_port *port,
624 struct ktermios *termios,
625 struct ktermios *old)
627 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port);
628 struct s3c24xx_uart_port *ourport = to_ourport(port);
629 struct s3c24xx_uart_clksrc *clksrc = NULL;
630 struct clk *clk = NULL;
632 unsigned int baud, quot;
637 * We don't support modem control lines.
639 termios->c_cflag &= ~(HUPCL | CMSPAR);
640 termios->c_cflag |= CLOCAL;
643 * Ask the core to calculate the divisor for us.
646 baud = uart_get_baud_rate(port, termios, old, 0, 115200*8);
648 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
649 quot = port->custom_divisor;
651 quot = s3c24xx_serial_getclk(port, &clksrc, &clk, baud);
653 /* check to see if we need to change clock source */
655 if (ourport->clksrc != clksrc || ourport->baudclk != clk) {
656 s3c24xx_serial_setsource(port, clksrc);
658 if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
659 clk_disable(ourport->baudclk);
660 ourport->baudclk = NULL;
665 ourport->clksrc = clksrc;
666 ourport->baudclk = clk;
667 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
670 switch (termios->c_cflag & CSIZE) {
672 dbg("config: 5bits/char\n");
673 ulcon = S3C2410_LCON_CS5;
676 dbg("config: 6bits/char\n");
677 ulcon = S3C2410_LCON_CS6;
680 dbg("config: 7bits/char\n");
681 ulcon = S3C2410_LCON_CS7;
685 dbg("config: 8bits/char\n");
686 ulcon = S3C2410_LCON_CS8;
690 /* preserve original lcon IR settings */
691 ulcon |= (cfg->ulcon & S3C2410_LCON_IRM);
693 if (termios->c_cflag & CSTOPB)
694 ulcon |= S3C2410_LCON_STOPB;
696 umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0;
698 if (termios->c_cflag & PARENB) {
699 if (termios->c_cflag & PARODD)
700 ulcon |= S3C2410_LCON_PODD;
702 ulcon |= S3C2410_LCON_PEVEN;
704 ulcon |= S3C2410_LCON_PNONE;
707 spin_lock_irqsave(&port->lock, flags);
709 dbg("setting ulcon to %08x, brddiv to %d\n", ulcon, quot);
711 wr_regl(port, S3C2410_ULCON, ulcon);
712 wr_regl(port, S3C2410_UBRDIV, quot);
713 wr_regl(port, S3C2410_UMCON, umcon);
715 dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n",
716 rd_regl(port, S3C2410_ULCON),
717 rd_regl(port, S3C2410_UCON),
718 rd_regl(port, S3C2410_UFCON));
721 * Update the per-port timeout.
723 uart_update_timeout(port, termios->c_cflag, baud);
726 * Which character status flags are we interested in?
728 port->read_status_mask = S3C2410_UERSTAT_OVERRUN;
729 if (termios->c_iflag & INPCK)
730 port->read_status_mask |= S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_PARITY;
733 * Which character status flags should we ignore?
735 port->ignore_status_mask = 0;
736 if (termios->c_iflag & IGNPAR)
737 port->ignore_status_mask |= S3C2410_UERSTAT_OVERRUN;
738 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
739 port->ignore_status_mask |= S3C2410_UERSTAT_FRAME;
742 * Ignore all characters if CREAD is not set.
744 if ((termios->c_cflag & CREAD) == 0)
745 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
747 spin_unlock_irqrestore(&port->lock, flags);
750 static const char *s3c24xx_serial_type(struct uart_port *port)
752 switch (port->type) {
766 #define MAP_SIZE (0x100)
768 static void s3c24xx_serial_release_port(struct uart_port *port)
770 release_mem_region(port->mapbase, MAP_SIZE);
773 static int s3c24xx_serial_request_port(struct uart_port *port)
775 const char *name = s3c24xx_serial_portname(port);
776 return request_mem_region(port->mapbase, MAP_SIZE, name) ? 0 : -EBUSY;
779 static void s3c24xx_serial_config_port(struct uart_port *port, int flags)
781 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
783 if (flags & UART_CONFIG_TYPE &&
784 s3c24xx_serial_request_port(port) == 0)
785 port->type = info->type;
789 * verify the new serial_struct (for TIOCSSERIAL).
792 s3c24xx_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
794 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
796 if (ser->type != PORT_UNKNOWN && ser->type != info->type)
803 #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
805 static struct console s3c24xx_serial_console;
807 #define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console
809 #define S3C24XX_SERIAL_CONSOLE NULL
812 static struct uart_ops s3c24xx_serial_ops = {
813 .pm = s3c24xx_serial_pm,
814 .tx_empty = s3c24xx_serial_tx_empty,
815 .get_mctrl = s3c24xx_serial_get_mctrl,
816 .set_mctrl = s3c24xx_serial_set_mctrl,
817 .stop_tx = s3c24xx_serial_stop_tx,
818 .start_tx = s3c24xx_serial_start_tx,
819 .stop_rx = s3c24xx_serial_stop_rx,
820 .enable_ms = s3c24xx_serial_enable_ms,
821 .break_ctl = s3c24xx_serial_break_ctl,
822 .startup = s3c24xx_serial_startup,
823 .shutdown = s3c24xx_serial_shutdown,
824 .set_termios = s3c24xx_serial_set_termios,
825 .type = s3c24xx_serial_type,
826 .release_port = s3c24xx_serial_release_port,
827 .request_port = s3c24xx_serial_request_port,
828 .config_port = s3c24xx_serial_config_port,
829 .verify_port = s3c24xx_serial_verify_port,
833 static struct uart_driver s3c24xx_uart_drv = {
834 .owner = THIS_MODULE,
835 .dev_name = "s3c2410_serial",
837 .cons = S3C24XX_SERIAL_CONSOLE,
838 .driver_name = S3C24XX_SERIAL_NAME,
839 .major = S3C24XX_SERIAL_MAJOR,
840 .minor = S3C24XX_SERIAL_MINOR,
843 static struct s3c24xx_uart_port s3c24xx_serial_ports[NR_PORTS] = {
846 .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[0].port.lock),
848 .irq = IRQ_S3CUART_RX0,
851 .ops = &s3c24xx_serial_ops,
852 .flags = UPF_BOOT_AUTOCONF,
858 .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[1].port.lock),
860 .irq = IRQ_S3CUART_RX1,
863 .ops = &s3c24xx_serial_ops,
864 .flags = UPF_BOOT_AUTOCONF,
872 .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[2].port.lock),
874 .irq = IRQ_S3CUART_RX2,
877 .ops = &s3c24xx_serial_ops,
878 .flags = UPF_BOOT_AUTOCONF,
885 /* s3c24xx_serial_resetport
887 * wrapper to call the specific reset for this port (reset the fifos
891 static inline int s3c24xx_serial_resetport(struct uart_port *port,
892 struct s3c2410_uartcfg *cfg)
894 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
896 return (info->reset_port)(port, cfg);
900 #ifdef CONFIG_CPU_FREQ
902 static int s3c24xx_serial_cpufreq_transition(struct notifier_block *nb,
903 unsigned long val, void *data)
905 struct s3c24xx_uart_port *port;
906 struct uart_port *uport;
908 port = container_of(nb, struct s3c24xx_uart_port, freq_transition);
911 /* check to see if port is enabled */
913 if (port->pm_level != 0)
916 /* try and work out if the baudrate is changing, we can detect
917 * a change in rate, but we do not have support for detecting
918 * a disturbance in the clock-rate over the change.
921 if (IS_ERR(port->clk))
924 if (port->baudclk_rate == clk_get_rate(port->clk))
927 if (val == CPUFREQ_PRECHANGE) {
928 /* we should really shut the port down whilst the
929 * frequency change is in progress. */
931 } else if (val == CPUFREQ_POSTCHANGE) {
932 struct ktermios *termios;
933 struct tty_struct *tty;
935 if (uport->info == NULL) {
936 printk(KERN_WARNING "%s: info NULL\n", __func__);
940 tty = uport->info->port.tty;
943 printk(KERN_WARNING "%s: tty is NULL\n", __func__);
947 termios = tty->termios;
949 if (termios == NULL) {
950 printk(KERN_WARNING "%s: no termios?\n", __func__);
954 s3c24xx_serial_set_termios(uport, termios, NULL);
961 static inline int s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port)
963 port->freq_transition.notifier_call = s3c24xx_serial_cpufreq_transition;
965 return cpufreq_register_notifier(&port->freq_transition,
966 CPUFREQ_TRANSITION_NOTIFIER);
969 static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port)
971 cpufreq_unregister_notifier(&port->freq_transition,
972 CPUFREQ_TRANSITION_NOTIFIER);
976 static inline int s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port)
981 static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port)
986 /* s3c24xx_serial_init_port
988 * initialise a single serial port from the platform device given
991 static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
992 struct s3c24xx_uart_info *info,
993 struct platform_device *platdev)
995 struct uart_port *port = &ourport->port;
996 struct s3c2410_uartcfg *cfg;
997 struct resource *res;
1000 dbg("s3c24xx_serial_init_port: port=%p, platdev=%p\n", port, platdev);
1002 if (platdev == NULL)
1005 cfg = s3c24xx_dev_to_cfg(&platdev->dev);
1007 if (port->mapbase != 0)
1010 if (cfg->hwport > 3)
1013 /* setup info for port */
1014 port->dev = &platdev->dev;
1015 ourport->info = info;
1017 /* copy the info in from provided structure */
1018 ourport->port.fifosize = info->fifosize;
1020 dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport);
1024 if (cfg->uart_flags & UPF_CONS_FLOW) {
1025 dbg("s3c24xx_serial_init_port: enabling flow control\n");
1026 port->flags |= UPF_CONS_FLOW;
1029 /* sort our the physical and virtual addresses for each UART */
1031 res = platform_get_resource(platdev, IORESOURCE_MEM, 0);
1033 printk(KERN_ERR "failed to find memory resource for uart\n");
1037 dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
1039 port->mapbase = res->start;
1040 port->membase = S3C_VA_UART + res->start - (S3C_PA_UART & 0xfff00000);
1041 ret = platform_get_irq(platdev, 0);
1047 ourport->clk = clk_get(&platdev->dev, "uart");
1049 dbg("port: map=%08x, mem=%08x, irq=%d, clock=%ld\n",
1050 port->mapbase, port->membase, port->irq, port->uartclk);
1052 /* reset the fifos (and setup the uart) */
1053 s3c24xx_serial_resetport(port, cfg);
1057 static ssize_t s3c24xx_serial_show_clksrc(struct device *dev,
1058 struct device_attribute *attr,
1061 struct uart_port *port = s3c24xx_dev_to_port(dev);
1062 struct s3c24xx_uart_port *ourport = to_ourport(port);
1064 return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->clksrc->name);
1067 static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL);
1069 /* Device driver serial port probe */
1071 static int probe_index;
1073 int s3c24xx_serial_probe(struct platform_device *dev,
1074 struct s3c24xx_uart_info *info)
1076 struct s3c24xx_uart_port *ourport;
1079 dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index);
1081 ourport = &s3c24xx_serial_ports[probe_index];
1084 dbg("%s: initialising port %p...\n", __func__, ourport);
1086 ret = s3c24xx_serial_init_port(ourport, info, dev);
1090 dbg("%s: adding port\n", __func__);
1091 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
1092 platform_set_drvdata(dev, &ourport->port);
1094 ret = device_create_file(&dev->dev, &dev_attr_clock_source);
1096 printk(KERN_ERR "%s: failed to add clksrc attr.\n", __func__);
1098 ret = s3c24xx_serial_cpufreq_register(ourport);
1100 dev_err(&dev->dev, "failed to add cpufreq notifier\n");
1108 EXPORT_SYMBOL_GPL(s3c24xx_serial_probe);
1110 int s3c24xx_serial_remove(struct platform_device *dev)
1112 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
1115 s3c24xx_serial_cpufreq_deregister(to_ourport(port));
1116 device_remove_file(&dev->dev, &dev_attr_clock_source);
1117 uart_remove_one_port(&s3c24xx_uart_drv, port);
1123 EXPORT_SYMBOL_GPL(s3c24xx_serial_remove);
1125 /* UART power management code */
1129 static int s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state)
1131 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
1134 uart_suspend_port(&s3c24xx_uart_drv, port);
1139 static int s3c24xx_serial_resume(struct platform_device *dev)
1141 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
1142 struct s3c24xx_uart_port *ourport = to_ourport(port);
1145 clk_enable(ourport->clk);
1146 s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port));
1147 clk_disable(ourport->clk);
1149 uart_resume_port(&s3c24xx_uart_drv, port);
1156 int s3c24xx_serial_init(struct platform_driver *drv,
1157 struct s3c24xx_uart_info *info)
1159 dbg("s3c24xx_serial_init(%p,%p)\n", drv, info);
1162 drv->suspend = s3c24xx_serial_suspend;
1163 drv->resume = s3c24xx_serial_resume;
1166 return platform_driver_register(drv);
1169 EXPORT_SYMBOL_GPL(s3c24xx_serial_init);
1171 /* module initialisation code */
1173 static int __init s3c24xx_serial_modinit(void)
1177 ret = uart_register_driver(&s3c24xx_uart_drv);
1179 printk(KERN_ERR "failed to register UART driver\n");
1186 static void __exit s3c24xx_serial_modexit(void)
1188 uart_unregister_driver(&s3c24xx_uart_drv);
1191 module_init(s3c24xx_serial_modinit);
1192 module_exit(s3c24xx_serial_modexit);
1196 #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
1198 static struct uart_port *cons_uart;
1201 s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon)
1203 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
1204 unsigned long ufstat, utrstat;
1206 if (ufcon & S3C2410_UFCON_FIFOMODE) {
1207 /* fifo mode - check ammount of data in fifo registers... */
1209 ufstat = rd_regl(port, S3C2410_UFSTAT);
1210 return (ufstat & info->tx_fifofull) ? 0 : 1;
1213 /* in non-fifo mode, we go and use the tx buffer empty */
1215 utrstat = rd_regl(port, S3C2410_UTRSTAT);
1216 return (utrstat & S3C2410_UTRSTAT_TXE) ? 1 : 0;
1220 s3c24xx_serial_console_putchar(struct uart_port *port, int ch)
1222 unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON);
1223 while (!s3c24xx_serial_console_txrdy(port, ufcon))
1225 wr_regb(cons_uart, S3C2410_UTXH, ch);
1229 s3c24xx_serial_console_write(struct console *co, const char *s,
1232 uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar);
1236 s3c24xx_serial_get_options(struct uart_port *port, int *baud,
1237 int *parity, int *bits)
1239 struct s3c24xx_uart_clksrc clksrc;
1243 unsigned int ubrdiv;
1246 ulcon = rd_regl(port, S3C2410_ULCON);
1247 ucon = rd_regl(port, S3C2410_UCON);
1248 ubrdiv = rd_regl(port, S3C2410_UBRDIV);
1250 dbg("s3c24xx_serial_get_options: port=%p\n"
1251 "registers: ulcon=%08x, ucon=%08x, ubdriv=%08x\n",
1252 port, ulcon, ucon, ubrdiv);
1254 if ((ucon & 0xf) != 0) {
1255 /* consider the serial port configured if the tx/rx mode set */
1257 switch (ulcon & S3C2410_LCON_CSMASK) {
1258 case S3C2410_LCON_CS5:
1261 case S3C2410_LCON_CS6:
1264 case S3C2410_LCON_CS7:
1268 case S3C2410_LCON_CS8:
1273 switch (ulcon & S3C2410_LCON_PMASK) {
1274 case S3C2410_LCON_PEVEN:
1278 case S3C2410_LCON_PODD:
1282 case S3C2410_LCON_PNONE:
1287 /* now calculate the baud rate */
1289 s3c24xx_serial_getsource(port, &clksrc);
1291 clk = clk_get(port->dev, clksrc.name);
1292 if (!IS_ERR(clk) && clk != NULL)
1293 rate = clk_get_rate(clk) / clksrc.divisor;
1298 *baud = rate / (16 * (ubrdiv + 1));
1299 dbg("calculated baud %d\n", *baud);
1304 /* s3c24xx_serial_init_ports
1306 * initialise the serial ports from the machine provided initialisation
1310 static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info)
1312 struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
1313 struct platform_device **platdev_ptr;
1316 dbg("s3c24xx_serial_init_ports: initialising ports...\n");
1318 platdev_ptr = s3c24xx_uart_devs;
1320 for (i = 0; i < NR_PORTS; i++, ptr++, platdev_ptr++) {
1321 s3c24xx_serial_init_port(ptr, info, *platdev_ptr);
1328 s3c24xx_serial_console_setup(struct console *co, char *options)
1330 struct uart_port *port;
1336 dbg("s3c24xx_serial_console_setup: co=%p (%d), %s\n",
1337 co, co->index, options);
1339 /* is this a valid port */
1341 if (co->index == -1 || co->index >= NR_PORTS)
1344 port = &s3c24xx_serial_ports[co->index].port;
1346 /* is the port configured? */
1348 if (port->mapbase == 0x0) {
1350 port = &s3c24xx_serial_ports[co->index].port;
1355 dbg("s3c24xx_serial_console_setup: port=%p (%d)\n", port, co->index);
1358 * Check whether an invalid uart number has been specified, and
1359 * if so, search for the first available port that does have
1363 uart_parse_options(options, &baud, &parity, &bits, &flow);
1365 s3c24xx_serial_get_options(port, &baud, &parity, &bits);
1367 dbg("s3c24xx_serial_console_setup: baud %d\n", baud);
1369 return uart_set_options(port, co, baud, parity, bits, flow);
1372 /* s3c24xx_serial_initconsole
1374 * initialise the console from one of the uart drivers
1377 static struct console s3c24xx_serial_console = {
1378 .name = S3C24XX_SERIAL_NAME,
1379 .device = uart_console_device,
1380 .flags = CON_PRINTBUFFER,
1382 .write = s3c24xx_serial_console_write,
1383 .setup = s3c24xx_serial_console_setup
1386 int s3c24xx_serial_initconsole(struct platform_driver *drv,
1387 struct s3c24xx_uart_info *info)
1390 struct platform_device *dev = s3c24xx_uart_devs[0];
1392 dbg("s3c24xx_serial_initconsole\n");
1394 /* select driver based on the cpu */
1397 printk(KERN_ERR "s3c24xx: no devices for console init\n");
1401 if (strcmp(dev->name, drv->driver.name) != 0)
1404 s3c24xx_serial_console.data = &s3c24xx_uart_drv;
1405 s3c24xx_serial_init_ports(info);
1407 register_console(&s3c24xx_serial_console);
1411 #endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */
1413 MODULE_DESCRIPTION("Samsung SoC Serial port driver");
1414 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1415 MODULE_LICENSE("GPL v2");