1 /* linux/drivers/serial/samsuing.c
3 * Driver core for Samsung SoC onboard UARTs.
5 * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics
6 * http://armlinux.simtec.co.uk/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 /* Hote on 2410 error handling
15 * The s3c2410 manual has a love/hate affair with the contents of the
16 * UERSTAT register in the UART blocks, and keeps marking some of the
17 * error bits as reserved. Having checked with the s3c2410x01,
18 * it copes with BREAKs properly, so I am happy to ignore the RESERVED
19 * feature from the latter versions of the manual.
21 * If it becomes aparrent that latter versions of the 2410 remove these
22 * bits, then action will have to be taken to differentiate the versions
23 * and change the policy on BREAK
28 #if defined(CONFIG_SERIAL_SAMSUNG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
32 #include <linux/module.h>
33 #include <linux/ioport.h>
35 #include <linux/platform_device.h>
36 #include <linux/init.h>
37 #include <linux/sysrq.h>
38 #include <linux/console.h>
39 #include <linux/tty.h>
40 #include <linux/tty_flip.h>
41 #include <linux/serial_core.h>
42 #include <linux/serial.h>
43 #include <linux/delay.h>
44 #include <linux/clk.h>
45 #include <linux/cpufreq.h>
49 #include <mach/hardware.h>
52 #include <plat/regs-serial.h>
56 /* UART name and device definitions */
58 #define S3C24XX_SERIAL_NAME "ttySAC"
59 #define S3C24XX_SERIAL_MAJOR 204
60 #define S3C24XX_SERIAL_MINOR 64
62 /* we can support 3 uarts, but not always use them */
64 #if defined(CONFIG_CPU_S3C2400) || defined(CONFIG_CPU_S3C24A0)
70 /* macros to change one thing to another */
72 #define tx_enabled(port) ((port)->unused[0])
73 #define rx_enabled(port) ((port)->unused[1])
75 /* flag to ignore all characters comming in */
76 #define RXSTAT_DUMMY_READ (0x10000000)
78 static inline struct s3c24xx_uart_port *to_ourport(struct uart_port *port)
80 return container_of(port, struct s3c24xx_uart_port, port);
83 /* translate a port to the device name */
85 static inline const char *s3c24xx_serial_portname(struct uart_port *port)
87 return to_platform_device(port->dev)->name;
90 static int s3c24xx_serial_txempty_nofifo(struct uart_port *port)
92 return (rd_regl(port, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE);
95 static void s3c24xx_serial_rx_enable(struct uart_port *port)
98 unsigned int ucon, ufcon;
101 spin_lock_irqsave(&port->lock, flags);
103 while (--count && !s3c24xx_serial_txempty_nofifo(port))
106 ufcon = rd_regl(port, S3C2410_UFCON);
107 ufcon |= S3C2410_UFCON_RESETRX;
108 wr_regl(port, S3C2410_UFCON, ufcon);
110 ucon = rd_regl(port, S3C2410_UCON);
111 ucon |= S3C2410_UCON_RXIRQMODE;
112 wr_regl(port, S3C2410_UCON, ucon);
114 rx_enabled(port) = 1;
115 spin_unlock_irqrestore(&port->lock, flags);
118 static void s3c24xx_serial_rx_disable(struct uart_port *port)
123 spin_lock_irqsave(&port->lock, flags);
125 ucon = rd_regl(port, S3C2410_UCON);
126 ucon &= ~S3C2410_UCON_RXIRQMODE;
127 wr_regl(port, S3C2410_UCON, ucon);
129 rx_enabled(port) = 0;
130 spin_unlock_irqrestore(&port->lock, flags);
133 static void s3c24xx_serial_stop_tx(struct uart_port *port)
135 struct s3c24xx_uart_port *ourport = to_ourport(port);
137 if (tx_enabled(port)) {
138 disable_irq(ourport->tx_irq);
139 tx_enabled(port) = 0;
140 if (port->flags & UPF_CONS_FLOW)
141 s3c24xx_serial_rx_enable(port);
145 static void s3c24xx_serial_start_tx(struct uart_port *port)
147 struct s3c24xx_uart_port *ourport = to_ourport(port);
149 if (!tx_enabled(port)) {
150 if (port->flags & UPF_CONS_FLOW)
151 s3c24xx_serial_rx_disable(port);
153 enable_irq(ourport->tx_irq);
154 tx_enabled(port) = 1;
159 static void s3c24xx_serial_stop_rx(struct uart_port *port)
161 struct s3c24xx_uart_port *ourport = to_ourport(port);
163 if (rx_enabled(port)) {
164 dbg("s3c24xx_serial_stop_rx: port=%p\n", port);
165 disable_irq(ourport->rx_irq);
166 rx_enabled(port) = 0;
170 static void s3c24xx_serial_enable_ms(struct uart_port *port)
174 static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *port)
176 return to_ourport(port)->info;
179 static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port)
181 if (port->dev == NULL)
184 return (struct s3c2410_uartcfg *)port->dev->platform_data;
187 static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport,
188 unsigned long ufstat)
190 struct s3c24xx_uart_info *info = ourport->info;
192 if (ufstat & info->rx_fifofull)
193 return info->fifosize;
195 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift;
199 /* ? - where has parity gone?? */
200 #define S3C2410_UERSTAT_PARITY (0x1000)
203 s3c24xx_serial_rx_chars(int irq, void *dev_id)
205 struct s3c24xx_uart_port *ourport = dev_id;
206 struct uart_port *port = &ourport->port;
207 struct tty_struct *tty = port->info->port.tty;
208 unsigned int ufcon, ch, flag, ufstat, uerstat;
211 while (max_count-- > 0) {
212 ufcon = rd_regl(port, S3C2410_UFCON);
213 ufstat = rd_regl(port, S3C2410_UFSTAT);
215 if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0)
218 uerstat = rd_regl(port, S3C2410_UERSTAT);
219 ch = rd_regb(port, S3C2410_URXH);
221 if (port->flags & UPF_CONS_FLOW) {
222 int txe = s3c24xx_serial_txempty_nofifo(port);
224 if (rx_enabled(port)) {
226 rx_enabled(port) = 0;
231 ufcon |= S3C2410_UFCON_RESETRX;
232 wr_regl(port, S3C2410_UFCON, ufcon);
233 rx_enabled(port) = 1;
240 /* insert the character into the buffer */
245 if (unlikely(uerstat & S3C2410_UERSTAT_ANY)) {
246 dbg("rxerr: port ch=0x%02x, rxs=0x%08x\n",
249 /* check for break */
250 if (uerstat & S3C2410_UERSTAT_BREAK) {
253 if (uart_handle_break(port))
257 if (uerstat & S3C2410_UERSTAT_FRAME)
258 port->icount.frame++;
259 if (uerstat & S3C2410_UERSTAT_OVERRUN)
260 port->icount.overrun++;
262 uerstat &= port->read_status_mask;
264 if (uerstat & S3C2410_UERSTAT_BREAK)
266 else if (uerstat & S3C2410_UERSTAT_PARITY)
268 else if (uerstat & (S3C2410_UERSTAT_FRAME |
269 S3C2410_UERSTAT_OVERRUN))
273 if (uart_handle_sysrq_char(port, ch))
276 uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN,
282 tty_flip_buffer_push(tty);
288 static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id)
290 struct s3c24xx_uart_port *ourport = id;
291 struct uart_port *port = &ourport->port;
292 struct circ_buf *xmit = &port->info->xmit;
296 wr_regb(port, S3C2410_UTXH, port->x_char);
302 /* if there isnt anything more to transmit, or the uart is now
303 * stopped, disable the uart and exit
306 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
307 s3c24xx_serial_stop_tx(port);
311 /* try and drain the buffer... */
313 while (!uart_circ_empty(xmit) && count-- > 0) {
314 if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull)
317 wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]);
318 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
322 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
323 uart_write_wakeup(port);
325 if (uart_circ_empty(xmit))
326 s3c24xx_serial_stop_tx(port);
332 static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port)
334 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
335 unsigned long ufstat = rd_regl(port, S3C2410_UFSTAT);
336 unsigned long ufcon = rd_regl(port, S3C2410_UFCON);
338 if (ufcon & S3C2410_UFCON_FIFOMODE) {
339 if ((ufstat & info->tx_fifomask) != 0 ||
340 (ufstat & info->tx_fifofull))
346 return s3c24xx_serial_txempty_nofifo(port);
349 /* no modem control lines */
350 static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port)
352 unsigned int umstat = rd_regb(port, S3C2410_UMSTAT);
354 if (umstat & S3C2410_UMSTAT_CTS)
355 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
357 return TIOCM_CAR | TIOCM_DSR;
360 static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
362 /* todo - possibly remove AFC and do manual CTS */
365 static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state)
370 spin_lock_irqsave(&port->lock, flags);
372 ucon = rd_regl(port, S3C2410_UCON);
375 ucon |= S3C2410_UCON_SBREAK;
377 ucon &= ~S3C2410_UCON_SBREAK;
379 wr_regl(port, S3C2410_UCON, ucon);
381 spin_unlock_irqrestore(&port->lock, flags);
384 static void s3c24xx_serial_shutdown(struct uart_port *port)
386 struct s3c24xx_uart_port *ourport = to_ourport(port);
388 if (ourport->tx_claimed) {
389 free_irq(ourport->tx_irq, ourport);
390 tx_enabled(port) = 0;
391 ourport->tx_claimed = 0;
394 if (ourport->rx_claimed) {
395 free_irq(ourport->rx_irq, ourport);
396 ourport->rx_claimed = 0;
397 rx_enabled(port) = 0;
402 static int s3c24xx_serial_startup(struct uart_port *port)
404 struct s3c24xx_uart_port *ourport = to_ourport(port);
407 dbg("s3c24xx_serial_startup: port=%p (%08lx,%p)\n",
408 port->mapbase, port->membase);
410 rx_enabled(port) = 1;
412 ret = request_irq(ourport->rx_irq, s3c24xx_serial_rx_chars, 0,
413 s3c24xx_serial_portname(port), ourport);
416 printk(KERN_ERR "cannot get irq %d\n", ourport->rx_irq);
420 ourport->rx_claimed = 1;
422 dbg("requesting tx irq...\n");
424 tx_enabled(port) = 1;
426 ret = request_irq(ourport->tx_irq, s3c24xx_serial_tx_chars, 0,
427 s3c24xx_serial_portname(port), ourport);
430 printk(KERN_ERR "cannot get irq %d\n", ourport->tx_irq);
434 ourport->tx_claimed = 1;
436 dbg("s3c24xx_serial_startup ok\n");
438 /* the port reset code should have done the correct
439 * register setup for the port controls */
444 s3c24xx_serial_shutdown(port);
448 /* power power management control */
450 static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
453 struct s3c24xx_uart_port *ourport = to_ourport(port);
455 ourport->pm_level = level;
459 if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL)
460 clk_disable(ourport->baudclk);
462 clk_disable(ourport->clk);
466 clk_enable(ourport->clk);
468 if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL)
469 clk_enable(ourport->baudclk);
473 printk(KERN_ERR "s3c24xx_serial: unknown pm %d\n", level);
477 /* baud rate calculation
479 * The UARTs on the S3C2410/S3C2440 can take their clocks from a number
480 * of different sources, including the peripheral clock ("pclk") and an
481 * external clock ("uclk"). The S3C2440 also adds the core clock ("fclk")
482 * with a programmable extra divisor.
484 * The following code goes through the clock sources, and calculates the
485 * baud clocks (and the resultant actual baud rates) and then tries to
486 * pick the closest one and select that.
493 static struct s3c24xx_uart_clksrc tmp_clksrc = {
501 s3c24xx_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
503 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
505 return (info->get_clksrc)(port, c);
509 s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
511 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
513 return (info->set_clksrc)(port, c);
517 struct s3c24xx_uart_clksrc *clksrc;
523 static int s3c24xx_serial_calcbaud(struct baud_calc *calc,
524 struct uart_port *port,
525 struct s3c24xx_uart_clksrc *clksrc,
530 calc->src = clk_get(port->dev, clksrc->name);
531 if (calc->src == NULL || IS_ERR(calc->src))
534 rate = clk_get_rate(calc->src);
535 rate /= clksrc->divisor;
537 calc->clksrc = clksrc;
538 calc->quot = (rate + (8 * baud)) / (16 * baud);
539 calc->calc = (rate / (calc->quot * 16));
545 static unsigned int s3c24xx_serial_getclk(struct uart_port *port,
546 struct s3c24xx_uart_clksrc **clksrc,
550 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port);
551 struct s3c24xx_uart_clksrc *clkp;
552 struct baud_calc res[MAX_CLKS];
553 struct baud_calc *resptr, *best, *sptr;
559 if (cfg->clocks_size < 2) {
560 if (cfg->clocks_size == 0)
563 /* check to see if we're sourcing fclk, and if so we're
564 * going to have to update the clock source
567 if (strcmp(clkp->name, "fclk") == 0) {
568 struct s3c24xx_uart_clksrc src;
570 s3c24xx_serial_getsource(port, &src);
572 /* check that the port already using fclk, and if
573 * not, then re-select fclk
576 if (strcmp(src.name, clkp->name) == 0) {
577 s3c24xx_serial_setsource(port, clkp);
578 s3c24xx_serial_getsource(port, &src);
581 clkp->divisor = src.divisor;
584 s3c24xx_serial_calcbaud(res, port, clkp, baud);
590 for (i = 0; i < cfg->clocks_size; i++, clkp++) {
591 if (s3c24xx_serial_calcbaud(resptr, port, clkp, baud))
596 /* ok, we now need to select the best clock we found */
599 unsigned int deviation = (1<<30)|((1<<30)-1);
602 for (sptr = res; sptr < resptr; sptr++) {
603 calc_deviation = baud - sptr->calc;
604 if (calc_deviation < 0)
605 calc_deviation = -calc_deviation;
607 if (calc_deviation < deviation) {
609 deviation = calc_deviation;
614 /* store results to pass back */
616 *clksrc = best->clksrc;
622 static void s3c24xx_serial_set_termios(struct uart_port *port,
623 struct ktermios *termios,
624 struct ktermios *old)
626 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port);
627 struct s3c24xx_uart_port *ourport = to_ourport(port);
628 struct s3c24xx_uart_clksrc *clksrc = NULL;
629 struct clk *clk = NULL;
631 unsigned int baud, quot;
636 * We don't support modem control lines.
638 termios->c_cflag &= ~(HUPCL | CMSPAR);
639 termios->c_cflag |= CLOCAL;
642 * Ask the core to calculate the divisor for us.
645 baud = uart_get_baud_rate(port, termios, old, 0, 115200*8);
647 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
648 quot = port->custom_divisor;
650 quot = s3c24xx_serial_getclk(port, &clksrc, &clk, baud);
652 /* check to see if we need to change clock source */
654 if (ourport->clksrc != clksrc || ourport->baudclk != clk) {
655 s3c24xx_serial_setsource(port, clksrc);
657 if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
658 clk_disable(ourport->baudclk);
659 ourport->baudclk = NULL;
664 ourport->clksrc = clksrc;
665 ourport->baudclk = clk;
666 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
669 switch (termios->c_cflag & CSIZE) {
671 dbg("config: 5bits/char\n");
672 ulcon = S3C2410_LCON_CS5;
675 dbg("config: 6bits/char\n");
676 ulcon = S3C2410_LCON_CS6;
679 dbg("config: 7bits/char\n");
680 ulcon = S3C2410_LCON_CS7;
684 dbg("config: 8bits/char\n");
685 ulcon = S3C2410_LCON_CS8;
689 /* preserve original lcon IR settings */
690 ulcon |= (cfg->ulcon & S3C2410_LCON_IRM);
692 if (termios->c_cflag & CSTOPB)
693 ulcon |= S3C2410_LCON_STOPB;
695 umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0;
697 if (termios->c_cflag & PARENB) {
698 if (termios->c_cflag & PARODD)
699 ulcon |= S3C2410_LCON_PODD;
701 ulcon |= S3C2410_LCON_PEVEN;
703 ulcon |= S3C2410_LCON_PNONE;
706 spin_lock_irqsave(&port->lock, flags);
708 dbg("setting ulcon to %08x, brddiv to %d\n", ulcon, quot);
710 wr_regl(port, S3C2410_ULCON, ulcon);
711 wr_regl(port, S3C2410_UBRDIV, quot);
712 wr_regl(port, S3C2410_UMCON, umcon);
714 dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n",
715 rd_regl(port, S3C2410_ULCON),
716 rd_regl(port, S3C2410_UCON),
717 rd_regl(port, S3C2410_UFCON));
720 * Update the per-port timeout.
722 uart_update_timeout(port, termios->c_cflag, baud);
725 * Which character status flags are we interested in?
727 port->read_status_mask = S3C2410_UERSTAT_OVERRUN;
728 if (termios->c_iflag & INPCK)
729 port->read_status_mask |= S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_PARITY;
732 * Which character status flags should we ignore?
734 port->ignore_status_mask = 0;
735 if (termios->c_iflag & IGNPAR)
736 port->ignore_status_mask |= S3C2410_UERSTAT_OVERRUN;
737 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
738 port->ignore_status_mask |= S3C2410_UERSTAT_FRAME;
741 * Ignore all characters if CREAD is not set.
743 if ((termios->c_cflag & CREAD) == 0)
744 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
746 spin_unlock_irqrestore(&port->lock, flags);
749 static const char *s3c24xx_serial_type(struct uart_port *port)
751 switch (port->type) {
765 #define MAP_SIZE (0x100)
767 static void s3c24xx_serial_release_port(struct uart_port *port)
769 release_mem_region(port->mapbase, MAP_SIZE);
772 static int s3c24xx_serial_request_port(struct uart_port *port)
774 const char *name = s3c24xx_serial_portname(port);
775 return request_mem_region(port->mapbase, MAP_SIZE, name) ? 0 : -EBUSY;
778 static void s3c24xx_serial_config_port(struct uart_port *port, int flags)
780 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
782 if (flags & UART_CONFIG_TYPE &&
783 s3c24xx_serial_request_port(port) == 0)
784 port->type = info->type;
788 * verify the new serial_struct (for TIOCSSERIAL).
791 s3c24xx_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
793 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
795 if (ser->type != PORT_UNKNOWN && ser->type != info->type)
802 #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
804 static struct console s3c24xx_serial_console;
806 #define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console
808 #define S3C24XX_SERIAL_CONSOLE NULL
811 static struct uart_ops s3c24xx_serial_ops = {
812 .pm = s3c24xx_serial_pm,
813 .tx_empty = s3c24xx_serial_tx_empty,
814 .get_mctrl = s3c24xx_serial_get_mctrl,
815 .set_mctrl = s3c24xx_serial_set_mctrl,
816 .stop_tx = s3c24xx_serial_stop_tx,
817 .start_tx = s3c24xx_serial_start_tx,
818 .stop_rx = s3c24xx_serial_stop_rx,
819 .enable_ms = s3c24xx_serial_enable_ms,
820 .break_ctl = s3c24xx_serial_break_ctl,
821 .startup = s3c24xx_serial_startup,
822 .shutdown = s3c24xx_serial_shutdown,
823 .set_termios = s3c24xx_serial_set_termios,
824 .type = s3c24xx_serial_type,
825 .release_port = s3c24xx_serial_release_port,
826 .request_port = s3c24xx_serial_request_port,
827 .config_port = s3c24xx_serial_config_port,
828 .verify_port = s3c24xx_serial_verify_port,
832 static struct uart_driver s3c24xx_uart_drv = {
833 .owner = THIS_MODULE,
834 .dev_name = "s3c2410_serial",
836 .cons = S3C24XX_SERIAL_CONSOLE,
837 .driver_name = S3C24XX_SERIAL_NAME,
838 .major = S3C24XX_SERIAL_MAJOR,
839 .minor = S3C24XX_SERIAL_MINOR,
842 static struct s3c24xx_uart_port s3c24xx_serial_ports[NR_PORTS] = {
845 .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[0].port.lock),
847 .irq = IRQ_S3CUART_RX0,
850 .ops = &s3c24xx_serial_ops,
851 .flags = UPF_BOOT_AUTOCONF,
857 .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[1].port.lock),
859 .irq = IRQ_S3CUART_RX1,
862 .ops = &s3c24xx_serial_ops,
863 .flags = UPF_BOOT_AUTOCONF,
871 .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[2].port.lock),
873 .irq = IRQ_S3CUART_RX2,
876 .ops = &s3c24xx_serial_ops,
877 .flags = UPF_BOOT_AUTOCONF,
884 /* s3c24xx_serial_resetport
886 * wrapper to call the specific reset for this port (reset the fifos
890 static inline int s3c24xx_serial_resetport(struct uart_port *port,
891 struct s3c2410_uartcfg *cfg)
893 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
895 return (info->reset_port)(port, cfg);
899 #ifdef CONFIG_CPU_FREQ
901 static int s3c24xx_serial_cpufreq_transition(struct notifier_block *nb,
902 unsigned long val, void *data)
904 struct s3c24xx_uart_port *port;
905 struct uart_port *uport;
907 port = container_of(nb, struct s3c24xx_uart_port, freq_transition);
910 /* check to see if port is enabled */
912 if (port->pm_level != 0)
915 /* try and work out if the baudrate is changing, we can detect
916 * a change in rate, but we do not have support for detecting
917 * a disturbance in the clock-rate over the change.
920 if (IS_ERR(port->clk))
923 if (port->baudclk_rate == clk_get_rate(port->clk))
926 if (val == CPUFREQ_PRECHANGE) {
927 /* we should really shut the port down whilst the
928 * frequency change is in progress. */
930 } else if (val == CPUFREQ_POSTCHANGE) {
931 struct ktermios *termios;
932 struct tty_struct *tty;
934 if (uport->info == NULL) {
935 printk(KERN_WARNING "%s: info NULL\n", __func__);
939 tty = uport->info->port.tty;
942 printk(KERN_WARNING "%s: tty is NULL\n", __func__);
946 termios = tty->termios;
948 if (termios == NULL) {
949 printk(KERN_WARNING "%s: no termios?\n", __func__);
953 s3c24xx_serial_set_termios(uport, termios, NULL);
960 static inline int s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port)
962 port->freq_transition.notifier_call = s3c24xx_serial_cpufreq_transition;
964 return cpufreq_register_notifier(&port->freq_transition,
965 CPUFREQ_TRANSITION_NOTIFIER);
968 static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port)
970 cpufreq_unregister_notifier(&port->freq_transition,
971 CPUFREQ_TRANSITION_NOTIFIER);
975 static inline int s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port)
980 static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port)
985 /* s3c24xx_serial_init_port
987 * initialise a single serial port from the platform device given
990 static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
991 struct s3c24xx_uart_info *info,
992 struct platform_device *platdev)
994 struct uart_port *port = &ourport->port;
995 struct s3c2410_uartcfg *cfg;
996 struct resource *res;
999 dbg("s3c24xx_serial_init_port: port=%p, platdev=%p\n", port, platdev);
1001 if (platdev == NULL)
1004 cfg = s3c24xx_dev_to_cfg(&platdev->dev);
1006 if (port->mapbase != 0)
1009 if (cfg->hwport > 3)
1012 /* setup info for port */
1013 port->dev = &platdev->dev;
1014 ourport->info = info;
1016 /* copy the info in from provided structure */
1017 ourport->port.fifosize = info->fifosize;
1019 dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport);
1023 if (cfg->uart_flags & UPF_CONS_FLOW) {
1024 dbg("s3c24xx_serial_init_port: enabling flow control\n");
1025 port->flags |= UPF_CONS_FLOW;
1028 /* sort our the physical and virtual addresses for each UART */
1030 res = platform_get_resource(platdev, IORESOURCE_MEM, 0);
1032 printk(KERN_ERR "failed to find memory resource for uart\n");
1036 dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
1038 port->mapbase = res->start;
1039 port->membase = S3C_VA_UART + res->start - (S3C_PA_UART & 0xfff00000);
1040 ret = platform_get_irq(platdev, 0);
1045 ourport->rx_irq = ret;
1046 ourport->tx_irq = ret + 1;
1049 ret = platform_get_irq(platdev, 1);
1051 ourport->tx_irq = ret;
1053 ourport->clk = clk_get(&platdev->dev, "uart");
1055 dbg("port: map=%08x, mem=%08x, irq=%d (%d,%d), clock=%ld\n",
1056 port->mapbase, port->membase, port->irq,
1057 ourport->rx_irq, ourport->tx_irq, port->uartclk);
1059 /* reset the fifos (and setup the uart) */
1060 s3c24xx_serial_resetport(port, cfg);
1064 static ssize_t s3c24xx_serial_show_clksrc(struct device *dev,
1065 struct device_attribute *attr,
1068 struct uart_port *port = s3c24xx_dev_to_port(dev);
1069 struct s3c24xx_uart_port *ourport = to_ourport(port);
1071 return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->clksrc->name);
1074 static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL);
1076 /* Device driver serial port probe */
1078 static int probe_index;
1080 int s3c24xx_serial_probe(struct platform_device *dev,
1081 struct s3c24xx_uart_info *info)
1083 struct s3c24xx_uart_port *ourport;
1086 dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index);
1088 ourport = &s3c24xx_serial_ports[probe_index];
1091 dbg("%s: initialising port %p...\n", __func__, ourport);
1093 ret = s3c24xx_serial_init_port(ourport, info, dev);
1097 dbg("%s: adding port\n", __func__);
1098 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
1099 platform_set_drvdata(dev, &ourport->port);
1101 ret = device_create_file(&dev->dev, &dev_attr_clock_source);
1103 printk(KERN_ERR "%s: failed to add clksrc attr.\n", __func__);
1105 ret = s3c24xx_serial_cpufreq_register(ourport);
1107 dev_err(&dev->dev, "failed to add cpufreq notifier\n");
1115 EXPORT_SYMBOL_GPL(s3c24xx_serial_probe);
1117 int s3c24xx_serial_remove(struct platform_device *dev)
1119 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
1122 s3c24xx_serial_cpufreq_deregister(to_ourport(port));
1123 device_remove_file(&dev->dev, &dev_attr_clock_source);
1124 uart_remove_one_port(&s3c24xx_uart_drv, port);
1130 EXPORT_SYMBOL_GPL(s3c24xx_serial_remove);
1132 /* UART power management code */
1136 static int s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state)
1138 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
1141 uart_suspend_port(&s3c24xx_uart_drv, port);
1146 static int s3c24xx_serial_resume(struct platform_device *dev)
1148 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
1149 struct s3c24xx_uart_port *ourport = to_ourport(port);
1152 clk_enable(ourport->clk);
1153 s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port));
1154 clk_disable(ourport->clk);
1156 uart_resume_port(&s3c24xx_uart_drv, port);
1163 int s3c24xx_serial_init(struct platform_driver *drv,
1164 struct s3c24xx_uart_info *info)
1166 dbg("s3c24xx_serial_init(%p,%p)\n", drv, info);
1169 drv->suspend = s3c24xx_serial_suspend;
1170 drv->resume = s3c24xx_serial_resume;
1173 return platform_driver_register(drv);
1176 EXPORT_SYMBOL_GPL(s3c24xx_serial_init);
1178 /* module initialisation code */
1180 static int __init s3c24xx_serial_modinit(void)
1184 ret = uart_register_driver(&s3c24xx_uart_drv);
1186 printk(KERN_ERR "failed to register UART driver\n");
1193 static void __exit s3c24xx_serial_modexit(void)
1195 uart_unregister_driver(&s3c24xx_uart_drv);
1198 module_init(s3c24xx_serial_modinit);
1199 module_exit(s3c24xx_serial_modexit);
1203 #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
1205 static struct uart_port *cons_uart;
1208 s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon)
1210 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
1211 unsigned long ufstat, utrstat;
1213 if (ufcon & S3C2410_UFCON_FIFOMODE) {
1214 /* fifo mode - check ammount of data in fifo registers... */
1216 ufstat = rd_regl(port, S3C2410_UFSTAT);
1217 return (ufstat & info->tx_fifofull) ? 0 : 1;
1220 /* in non-fifo mode, we go and use the tx buffer empty */
1222 utrstat = rd_regl(port, S3C2410_UTRSTAT);
1223 return (utrstat & S3C2410_UTRSTAT_TXE) ? 1 : 0;
1227 s3c24xx_serial_console_putchar(struct uart_port *port, int ch)
1229 unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON);
1230 while (!s3c24xx_serial_console_txrdy(port, ufcon))
1232 wr_regb(cons_uart, S3C2410_UTXH, ch);
1236 s3c24xx_serial_console_write(struct console *co, const char *s,
1239 uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar);
1243 s3c24xx_serial_get_options(struct uart_port *port, int *baud,
1244 int *parity, int *bits)
1246 struct s3c24xx_uart_clksrc clksrc;
1250 unsigned int ubrdiv;
1253 ulcon = rd_regl(port, S3C2410_ULCON);
1254 ucon = rd_regl(port, S3C2410_UCON);
1255 ubrdiv = rd_regl(port, S3C2410_UBRDIV);
1257 dbg("s3c24xx_serial_get_options: port=%p\n"
1258 "registers: ulcon=%08x, ucon=%08x, ubdriv=%08x\n",
1259 port, ulcon, ucon, ubrdiv);
1261 if ((ucon & 0xf) != 0) {
1262 /* consider the serial port configured if the tx/rx mode set */
1264 switch (ulcon & S3C2410_LCON_CSMASK) {
1265 case S3C2410_LCON_CS5:
1268 case S3C2410_LCON_CS6:
1271 case S3C2410_LCON_CS7:
1275 case S3C2410_LCON_CS8:
1280 switch (ulcon & S3C2410_LCON_PMASK) {
1281 case S3C2410_LCON_PEVEN:
1285 case S3C2410_LCON_PODD:
1289 case S3C2410_LCON_PNONE:
1294 /* now calculate the baud rate */
1296 s3c24xx_serial_getsource(port, &clksrc);
1298 clk = clk_get(port->dev, clksrc.name);
1299 if (!IS_ERR(clk) && clk != NULL)
1300 rate = clk_get_rate(clk) / clksrc.divisor;
1305 *baud = rate / (16 * (ubrdiv + 1));
1306 dbg("calculated baud %d\n", *baud);
1311 /* s3c24xx_serial_init_ports
1313 * initialise the serial ports from the machine provided initialisation
1317 static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info)
1319 struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
1320 struct platform_device **platdev_ptr;
1323 dbg("s3c24xx_serial_init_ports: initialising ports...\n");
1325 platdev_ptr = s3c24xx_uart_devs;
1327 for (i = 0; i < NR_PORTS; i++, ptr++, platdev_ptr++) {
1328 s3c24xx_serial_init_port(ptr, info, *platdev_ptr);
1335 s3c24xx_serial_console_setup(struct console *co, char *options)
1337 struct uart_port *port;
1343 dbg("s3c24xx_serial_console_setup: co=%p (%d), %s\n",
1344 co, co->index, options);
1346 /* is this a valid port */
1348 if (co->index == -1 || co->index >= NR_PORTS)
1351 port = &s3c24xx_serial_ports[co->index].port;
1353 /* is the port configured? */
1355 if (port->mapbase == 0x0) {
1357 port = &s3c24xx_serial_ports[co->index].port;
1362 dbg("s3c24xx_serial_console_setup: port=%p (%d)\n", port, co->index);
1365 * Check whether an invalid uart number has been specified, and
1366 * if so, search for the first available port that does have
1370 uart_parse_options(options, &baud, &parity, &bits, &flow);
1372 s3c24xx_serial_get_options(port, &baud, &parity, &bits);
1374 dbg("s3c24xx_serial_console_setup: baud %d\n", baud);
1376 return uart_set_options(port, co, baud, parity, bits, flow);
1379 /* s3c24xx_serial_initconsole
1381 * initialise the console from one of the uart drivers
1384 static struct console s3c24xx_serial_console = {
1385 .name = S3C24XX_SERIAL_NAME,
1386 .device = uart_console_device,
1387 .flags = CON_PRINTBUFFER,
1389 .write = s3c24xx_serial_console_write,
1390 .setup = s3c24xx_serial_console_setup
1393 int s3c24xx_serial_initconsole(struct platform_driver *drv,
1394 struct s3c24xx_uart_info *info)
1397 struct platform_device *dev = s3c24xx_uart_devs[0];
1399 dbg("s3c24xx_serial_initconsole\n");
1401 /* select driver based on the cpu */
1404 printk(KERN_ERR "s3c24xx: no devices for console init\n");
1408 if (strcmp(dev->name, drv->driver.name) != 0)
1411 s3c24xx_serial_console.data = &s3c24xx_uart_drv;
1412 s3c24xx_serial_init_ports(info);
1414 register_console(&s3c24xx_serial_console);
1418 #endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */
1420 MODULE_DESCRIPTION("Samsung SoC Serial port driver");
1421 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1422 MODULE_LICENSE("GPL v2");