2 * drivers/serial/serial_txx9.c
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
20 * 0.30 Initial revision. (Renamed from serial_txx927.c)
21 * 0.31 Use save_flags instead of local_irq_save.
23 * 0.33 Switch TXX9_TTY_NAME by CONFIG_SERIAL_TXX9_STDSERIAL.
24 * Support TIOCSERGETLSR.
25 * 0.34 Support slow baudrate.
26 * 0.40 Merge codes from mainstream kernel (2.4.22).
27 * 0.41 Fix console checking in rs_shutdown_port().
28 * Disable flow-control in serial_console_write().
29 * 0.42 Fix minor compiler warning.
30 * 1.00 Kernel 2.6. Converted to new serial core (based on 8250.c).
31 * 1.01 Set fifosize to make tx_empry called properly.
32 * Use standard uart_get_divisor.
33 * 1.02 Cleanup. (import 8250.c changes)
34 * 1.03 Fix low-latency mode. (import 8250.c changes)
35 * 1.04 Remove usage of deprecated functions, cleanup.
37 #include <linux/config.h>
39 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
43 #include <linux/module.h>
44 #include <linux/ioport.h>
45 #include <linux/init.h>
46 #include <linux/console.h>
47 #include <linux/sysrq.h>
48 #include <linux/delay.h>
49 #include <linux/device.h>
50 #include <linux/pci.h>
51 #include <linux/tty.h>
52 #include <linux/tty_flip.h>
53 #include <linux/serial_core.h>
54 #include <linux/serial.h>
59 static char *serial_version = "1.04";
60 static char *serial_name = "TX39/49 Serial driver";
62 #define PASS_LIMIT 256
64 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
65 /* "ttyS" is used for standard serial driver */
66 #define TXX9_TTY_NAME "ttyTX"
67 #define TXX9_TTY_DEVFS_NAME "tttx/"
68 #define TXX9_TTY_MINOR_START (64 + 64) /* ttyTX0(128), ttyTX1(129) */
70 /* acts like standard serial driver */
71 #define TXX9_TTY_NAME "ttyS"
72 #define TXX9_TTY_DEVFS_NAME "tts/"
73 #define TXX9_TTY_MINOR_START 64
75 #define TXX9_TTY_MAJOR TTY_MAJOR
78 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
79 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
82 /* support for Toshiba TC86C001 SIO */
83 #define ENABLE_SERIAL_TXX9_PCI
87 * Number of serial ports
89 #ifdef ENABLE_SERIAL_TXX9_PCI
90 #define NR_PCI_BOARDS 4
91 #define UART_NR (4 + NR_PCI_BOARDS)
96 struct uart_txx9_port {
97 struct uart_port port;
100 * We provide a per-port pm hook.
102 void (*pm)(struct uart_port *port,
103 unsigned int state, unsigned int old);
106 #define TXX9_REGION_SIZE 0x24
108 /* TXX9 Serial Registers */
109 #define TXX9_SILCR 0x00
110 #define TXX9_SIDICR 0x04
111 #define TXX9_SIDISR 0x08
112 #define TXX9_SICISR 0x0c
113 #define TXX9_SIFCR 0x10
114 #define TXX9_SIFLCR 0x14
115 #define TXX9_SIBGR 0x18
116 #define TXX9_SITFIFO 0x1c
117 #define TXX9_SIRFIFO 0x20
119 /* SILCR : Line Control */
120 #define TXX9_SILCR_SCS_MASK 0x00000060
121 #define TXX9_SILCR_SCS_IMCLK 0x00000000
122 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
123 #define TXX9_SILCR_SCS_SCLK 0x00000040
124 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
125 #define TXX9_SILCR_UEPS 0x00000010
126 #define TXX9_SILCR_UPEN 0x00000008
127 #define TXX9_SILCR_USBL_MASK 0x00000004
128 #define TXX9_SILCR_USBL_1BIT 0x00000000
129 #define TXX9_SILCR_USBL_2BIT 0x00000004
130 #define TXX9_SILCR_UMODE_MASK 0x00000003
131 #define TXX9_SILCR_UMODE_8BIT 0x00000000
132 #define TXX9_SILCR_UMODE_7BIT 0x00000001
134 /* SIDICR : DMA/Int. Control */
135 #define TXX9_SIDICR_TDE 0x00008000
136 #define TXX9_SIDICR_RDE 0x00004000
137 #define TXX9_SIDICR_TIE 0x00002000
138 #define TXX9_SIDICR_RIE 0x00001000
139 #define TXX9_SIDICR_SPIE 0x00000800
140 #define TXX9_SIDICR_CTSAC 0x00000600
141 #define TXX9_SIDICR_STIE_MASK 0x0000003f
142 #define TXX9_SIDICR_STIE_OERS 0x00000020
143 #define TXX9_SIDICR_STIE_CTSS 0x00000010
144 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
145 #define TXX9_SIDICR_STIE_TRDY 0x00000004
146 #define TXX9_SIDICR_STIE_TXALS 0x00000002
147 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
149 /* SIDISR : DMA/Int. Status */
150 #define TXX9_SIDISR_UBRK 0x00008000
151 #define TXX9_SIDISR_UVALID 0x00004000
152 #define TXX9_SIDISR_UFER 0x00002000
153 #define TXX9_SIDISR_UPER 0x00001000
154 #define TXX9_SIDISR_UOER 0x00000800
155 #define TXX9_SIDISR_ERI 0x00000400
156 #define TXX9_SIDISR_TOUT 0x00000200
157 #define TXX9_SIDISR_TDIS 0x00000100
158 #define TXX9_SIDISR_RDIS 0x00000080
159 #define TXX9_SIDISR_STIS 0x00000040
160 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
162 /* SICISR : Change Int. Status */
163 #define TXX9_SICISR_OERS 0x00000020
164 #define TXX9_SICISR_CTSS 0x00000010
165 #define TXX9_SICISR_RBRKD 0x00000008
166 #define TXX9_SICISR_TRDY 0x00000004
167 #define TXX9_SICISR_TXALS 0x00000002
168 #define TXX9_SICISR_UBRKD 0x00000001
170 /* SIFCR : FIFO Control */
171 #define TXX9_SIFCR_SWRST 0x00008000
172 #define TXX9_SIFCR_RDIL_MASK 0x00000180
173 #define TXX9_SIFCR_RDIL_1 0x00000000
174 #define TXX9_SIFCR_RDIL_4 0x00000080
175 #define TXX9_SIFCR_RDIL_8 0x00000100
176 #define TXX9_SIFCR_RDIL_12 0x00000180
177 #define TXX9_SIFCR_RDIL_MAX 0x00000180
178 #define TXX9_SIFCR_TDIL_MASK 0x00000018
179 #define TXX9_SIFCR_TDIL_MASK 0x00000018
180 #define TXX9_SIFCR_TDIL_1 0x00000000
181 #define TXX9_SIFCR_TDIL_4 0x00000001
182 #define TXX9_SIFCR_TDIL_8 0x00000010
183 #define TXX9_SIFCR_TDIL_MAX 0x00000010
184 #define TXX9_SIFCR_TFRST 0x00000004
185 #define TXX9_SIFCR_RFRST 0x00000002
186 #define TXX9_SIFCR_FRSTE 0x00000001
187 #define TXX9_SIO_TX_FIFO 8
188 #define TXX9_SIO_RX_FIFO 16
190 /* SIFLCR : Flow Control */
191 #define TXX9_SIFLCR_RCS 0x00001000
192 #define TXX9_SIFLCR_TES 0x00000800
193 #define TXX9_SIFLCR_RTSSC 0x00000200
194 #define TXX9_SIFLCR_RSDE 0x00000100
195 #define TXX9_SIFLCR_TSDE 0x00000080
196 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
197 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
198 #define TXX9_SIFLCR_TBRK 0x00000001
200 /* SIBGR : Baudrate Control */
201 #define TXX9_SIBGR_BCLK_MASK 0x00000300
202 #define TXX9_SIBGR_BCLK_T0 0x00000000
203 #define TXX9_SIBGR_BCLK_T2 0x00000100
204 #define TXX9_SIBGR_BCLK_T4 0x00000200
205 #define TXX9_SIBGR_BCLK_T6 0x00000300
206 #define TXX9_SIBGR_BRD_MASK 0x000000ff
208 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
210 switch (up->port.iotype) {
212 return *(volatile u32 *)(up->port.membase + offset);
214 return inl(up->port.iobase + offset);
219 sio_out(struct uart_txx9_port *up, int offset, int value)
221 switch (up->port.iotype) {
223 *(volatile u32 *)(up->port.membase + offset) = value;
226 outl(value, up->port.iobase + offset);
232 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
234 sio_out(up, offset, sio_in(up, offset) & ~value);
237 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
239 sio_out(up, offset, sio_in(up, offset) | value);
243 sio_quot_set(struct uart_txx9_port *up, int quot)
247 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
248 else if (quot < (256 << 2))
249 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
250 else if (quot < (256 << 4))
251 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
252 else if (quot < (256 << 6))
253 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
255 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
258 static void serial_txx9_stop_tx(struct uart_port *port)
260 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
263 spin_lock_irqsave(&up->port.lock, flags);
264 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
265 spin_unlock_irqrestore(&up->port.lock, flags);
268 static void serial_txx9_start_tx(struct uart_port *port)
270 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
273 spin_lock_irqsave(&up->port.lock, flags);
274 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
275 spin_unlock_irqrestore(&up->port.lock, flags);
278 static void serial_txx9_stop_rx(struct uart_port *port)
280 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
283 spin_lock_irqsave(&up->port.lock, flags);
284 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
286 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
288 spin_unlock_irqrestore(&up->port.lock, flags);
291 static void serial_txx9_enable_ms(struct uart_port *port)
293 /* TXX9-SIO can not control DTR... */
297 receive_chars(struct uart_txx9_port *up, unsigned int *status, struct pt_regs *regs)
299 struct tty_struct *tty = up->port.info->tty;
301 unsigned int disr = *status;
306 ch = sio_in(up, TXX9_SIRFIFO);
308 up->port.icount.rx++;
310 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
311 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
313 * For statistics only
315 if (disr & TXX9_SIDISR_UBRK) {
316 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
317 up->port.icount.brk++;
319 * We do the SysRQ and SAK checking
320 * here because otherwise the break
321 * may get masked by ignore_status_mask
322 * or read_status_mask.
324 if (uart_handle_break(&up->port))
326 } else if (disr & TXX9_SIDISR_UPER)
327 up->port.icount.parity++;
328 else if (disr & TXX9_SIDISR_UFER)
329 up->port.icount.frame++;
330 if (disr & TXX9_SIDISR_UOER)
331 up->port.icount.overrun++;
334 * Mask off conditions which should be ingored.
336 disr &= up->port.read_status_mask;
338 if (disr & TXX9_SIDISR_UBRK) {
340 } else if (disr & TXX9_SIDISR_UPER)
342 else if (disr & TXX9_SIDISR_UFER)
345 if (uart_handle_sysrq_char(&up->port, ch, regs))
348 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
351 disr = sio_in(up, TXX9_SIDISR);
352 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
353 spin_unlock(&up->port.lock);
354 tty_flip_buffer_push(tty);
355 spin_lock(&up->port.lock);
359 static inline void transmit_chars(struct uart_txx9_port *up)
361 struct circ_buf *xmit = &up->port.info->xmit;
364 if (up->port.x_char) {
365 sio_out(up, TXX9_SITFIFO, up->port.x_char);
366 up->port.icount.tx++;
370 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
371 serial_txx9_stop_tx(&up->port);
375 count = TXX9_SIO_TX_FIFO;
377 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
378 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
379 up->port.icount.tx++;
380 if (uart_circ_empty(xmit))
382 } while (--count > 0);
384 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
385 uart_write_wakeup(&up->port);
387 if (uart_circ_empty(xmit))
388 serial_txx9_stop_tx(&up->port);
391 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id, struct pt_regs *regs)
393 int pass_counter = 0;
394 struct uart_txx9_port *up = dev_id;
398 spin_lock(&up->port.lock);
399 status = sio_in(up, TXX9_SIDISR);
400 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
401 status &= ~TXX9_SIDISR_TDIS;
402 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
403 TXX9_SIDISR_TOUT))) {
404 spin_unlock(&up->port.lock);
408 if (status & TXX9_SIDISR_RDIS)
409 receive_chars(up, &status, regs);
410 if (status & TXX9_SIDISR_TDIS)
412 /* Clear TX/RX Int. Status */
413 sio_mask(up, TXX9_SIDISR,
414 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
416 spin_unlock(&up->port.lock);
418 if (pass_counter++ > PASS_LIMIT)
422 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
425 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
427 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
431 spin_lock_irqsave(&up->port.lock, flags);
432 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
433 spin_unlock_irqrestore(&up->port.lock, flags);
438 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
440 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
443 ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS)
444 | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS);
449 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
451 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
454 spin_lock_irqsave(&up->port.lock, flags);
455 if (mctrl & TIOCM_RTS)
456 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
458 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
459 spin_unlock_irqrestore(&up->port.lock, flags);
462 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
464 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
467 spin_lock_irqsave(&up->port.lock, flags);
468 if (break_state == -1)
469 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
471 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
472 spin_unlock_irqrestore(&up->port.lock, flags);
475 static int serial_txx9_startup(struct uart_port *port)
477 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
482 * Clear the FIFO buffers and disable them.
483 * (they will be reeanbled in set_termios())
485 sio_set(up, TXX9_SIFCR,
486 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
488 sio_mask(up, TXX9_SIFCR,
489 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
490 sio_out(up, TXX9_SIDICR, 0);
493 * Clear the interrupt registers.
495 sio_out(up, TXX9_SIDISR, 0);
497 retval = request_irq(up->port.irq, serial_txx9_interrupt,
498 SA_SHIRQ, "serial_txx9", up);
503 * Now, initialize the UART
505 spin_lock_irqsave(&up->port.lock, flags);
506 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
507 spin_unlock_irqrestore(&up->port.lock, flags);
510 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
513 * Finally, enable interrupts.
515 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
520 static void serial_txx9_shutdown(struct uart_port *port)
522 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
526 * Disable interrupts from this port
528 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
530 spin_lock_irqsave(&up->port.lock, flags);
531 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
532 spin_unlock_irqrestore(&up->port.lock, flags);
535 * Disable break condition
537 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
539 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
540 if (up->port.cons && up->port.line == up->port.cons->index) {
541 free_irq(up->port.irq, up);
546 sio_set(up, TXX9_SIFCR,
547 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
549 sio_mask(up, TXX9_SIFCR,
550 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
553 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
555 free_irq(up->port.irq, up);
559 serial_txx9_set_termios(struct uart_port *port, struct termios *termios,
562 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
563 unsigned int cval, fcr = 0;
565 unsigned int baud, quot;
567 cval = sio_in(up, TXX9_SILCR);
568 /* byte size and parity */
569 cval &= ~TXX9_SILCR_UMODE_MASK;
570 switch (termios->c_cflag & CSIZE) {
572 cval |= TXX9_SILCR_UMODE_7BIT;
575 case CS5: /* not supported */
576 case CS6: /* not supported */
578 cval |= TXX9_SILCR_UMODE_8BIT;
582 cval &= ~TXX9_SILCR_USBL_MASK;
583 if (termios->c_cflag & CSTOPB)
584 cval |= TXX9_SILCR_USBL_2BIT;
586 cval |= TXX9_SILCR_USBL_1BIT;
587 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
588 if (termios->c_cflag & PARENB)
589 cval |= TXX9_SILCR_UPEN;
590 if (!(termios->c_cflag & PARODD))
591 cval |= TXX9_SILCR_UEPS;
594 * Ask the core to calculate the divisor for us.
596 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
597 quot = uart_get_divisor(port, baud);
600 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
601 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
604 * Ok, we're now changing the port state. Do it with
605 * interrupts disabled.
607 spin_lock_irqsave(&up->port.lock, flags);
610 * Update the per-port timeout.
612 uart_update_timeout(port, termios->c_cflag, baud);
614 up->port.read_status_mask = TXX9_SIDISR_UOER |
615 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
616 if (termios->c_iflag & INPCK)
617 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
618 if (termios->c_iflag & (BRKINT | PARMRK))
619 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
622 * Characteres to ignore
624 up->port.ignore_status_mask = 0;
625 if (termios->c_iflag & IGNPAR)
626 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
627 if (termios->c_iflag & IGNBRK) {
628 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
630 * If we're ignoring parity and break indicators,
631 * ignore overruns too (for real raw support).
633 if (termios->c_iflag & IGNPAR)
634 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
638 * ignore all characters if CREAD is not set
640 if ((termios->c_cflag & CREAD) == 0)
641 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
643 /* CTS flow control flag */
644 if ((termios->c_cflag & CRTSCTS) &&
645 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
646 sio_set(up, TXX9_SIFLCR,
647 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
649 sio_mask(up, TXX9_SIFLCR,
650 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
653 sio_out(up, TXX9_SILCR, cval);
654 sio_quot_set(up, quot);
655 sio_out(up, TXX9_SIFCR, fcr);
657 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
658 spin_unlock_irqrestore(&up->port.lock, flags);
662 serial_txx9_pm(struct uart_port *port, unsigned int state,
663 unsigned int oldstate)
665 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
667 up->pm(port, state, oldstate);
670 static int serial_txx9_request_resource(struct uart_txx9_port *up)
672 unsigned int size = TXX9_REGION_SIZE;
675 switch (up->port.iotype) {
677 if (!up->port.mapbase)
680 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
685 if (up->port.flags & UPF_IOREMAP) {
686 up->port.membase = ioremap(up->port.mapbase, size);
687 if (!up->port.membase) {
688 release_mem_region(up->port.mapbase, size);
695 if (!request_region(up->port.iobase, size, "serial_txx9"))
702 static void serial_txx9_release_resource(struct uart_txx9_port *up)
704 unsigned int size = TXX9_REGION_SIZE;
706 switch (up->port.iotype) {
708 if (!up->port.mapbase)
711 if (up->port.flags & UPF_IOREMAP) {
712 iounmap(up->port.membase);
713 up->port.membase = NULL;
716 release_mem_region(up->port.mapbase, size);
720 release_region(up->port.iobase, size);
725 static void serial_txx9_release_port(struct uart_port *port)
727 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
728 serial_txx9_release_resource(up);
731 static int serial_txx9_request_port(struct uart_port *port)
733 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
734 return serial_txx9_request_resource(up);
737 static void serial_txx9_config_port(struct uart_port *port, int uflags)
739 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
744 * Find the region that we can probe for. This in turn
745 * tells us whether we can probe for the type of port.
747 ret = serial_txx9_request_resource(up);
750 port->type = PORT_TXX9;
751 up->port.fifosize = TXX9_SIO_TX_FIFO;
753 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
754 if (up->port.line == up->port.cons->index)
757 spin_lock_irqsave(&up->port.lock, flags);
761 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
762 #ifdef CONFIG_CPU_TX49XX
763 /* TX4925 BUG WORKAROUND. Accessing SIOC register
764 * immediately after soft reset causes bus error. */
768 while (sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST)
770 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
771 sio_set(up, TXX9_SIFCR,
772 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
773 /* initial settings */
774 sio_out(up, TXX9_SILCR,
775 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
776 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
777 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
778 sio_quot_set(up, uart_get_divisor(port, 9600));
779 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
780 spin_unlock_irqrestore(&up->port.lock, flags);
784 serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
787 ser->baud_base < 9600 || ser->type != PORT_TXX9)
793 serial_txx9_type(struct uart_port *port)
798 static struct uart_ops serial_txx9_pops = {
799 .tx_empty = serial_txx9_tx_empty,
800 .set_mctrl = serial_txx9_set_mctrl,
801 .get_mctrl = serial_txx9_get_mctrl,
802 .stop_tx = serial_txx9_stop_tx,
803 .start_tx = serial_txx9_start_tx,
804 .stop_rx = serial_txx9_stop_rx,
805 .enable_ms = serial_txx9_enable_ms,
806 .break_ctl = serial_txx9_break_ctl,
807 .startup = serial_txx9_startup,
808 .shutdown = serial_txx9_shutdown,
809 .set_termios = serial_txx9_set_termios,
810 .pm = serial_txx9_pm,
811 .type = serial_txx9_type,
812 .release_port = serial_txx9_release_port,
813 .request_port = serial_txx9_request_port,
814 .config_port = serial_txx9_config_port,
815 .verify_port = serial_txx9_verify_port,
818 static struct uart_txx9_port serial_txx9_ports[UART_NR];
820 static void __init serial_txx9_register_ports(struct uart_driver *drv)
824 for (i = 0; i < UART_NR; i++) {
825 struct uart_txx9_port *up = &serial_txx9_ports[i];
828 up->port.ops = &serial_txx9_pops;
829 uart_add_one_port(drv, &up->port);
833 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
836 * Wait for transmitter & holding register to empty
838 static inline void wait_for_xmitr(struct uart_txx9_port *up)
840 unsigned int tmout = 10000;
842 /* Wait up to 10ms for the character(s) to be sent. */
844 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
847 /* Wait up to 1s for flow control if necessary */
848 if (up->port.flags & UPF_CONS_FLOW) {
851 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
857 * Print a string to the serial port trying not to disturb
858 * any possible real use of the port...
860 * The console_lock must be held when we get here.
863 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
865 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
866 unsigned int ier, flcr;
870 * First save the UER then disable the interrupts
872 ier = sio_in(up, TXX9_SIDICR);
873 sio_out(up, TXX9_SIDICR, 0);
875 * Disable flow-control if enabled (and unnecessary)
877 flcr = sio_in(up, TXX9_SIFLCR);
878 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
879 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
882 * Now, do each character
884 for (i = 0; i < count; i++, s++) {
888 * Send the character out.
889 * If a LF, also do CR...
891 sio_out(up, TXX9_SITFIFO, *s);
894 sio_out(up, TXX9_SITFIFO, 13);
899 * Finally, wait for transmitter to become empty
900 * and restore the IER
903 sio_out(up, TXX9_SIFLCR, flcr);
904 sio_out(up, TXX9_SIDICR, ier);
907 static int serial_txx9_console_setup(struct console *co, char *options)
909 struct uart_port *port;
910 struct uart_txx9_port *up;
917 * Check whether an invalid uart number has been specified, and
918 * if so, search for the first available port that does have
921 if (co->index >= UART_NR)
923 up = &serial_txx9_ports[co->index];
931 spin_lock_init(&port->lock);
934 * Disable UART interrupts, set DTR and RTS high
937 sio_out(up, TXX9_SIDICR, 0);
938 /* initial settings */
939 sio_out(up, TXX9_SILCR,
940 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
941 ((port->flags & UPF_TXX9_USE_SCLK) ?
942 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
943 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
946 uart_parse_options(options, &baud, &parity, &bits, &flow);
948 return uart_set_options(port, co, baud, parity, bits, flow);
951 static struct uart_driver serial_txx9_reg;
952 static struct console serial_txx9_console = {
953 .name = TXX9_TTY_NAME,
954 .write = serial_txx9_console_write,
955 .device = uart_console_device,
956 .setup = serial_txx9_console_setup,
957 .flags = CON_PRINTBUFFER,
959 .data = &serial_txx9_reg,
962 static int __init serial_txx9_console_init(void)
964 register_console(&serial_txx9_console);
967 console_initcall(serial_txx9_console_init);
969 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
971 #define SERIAL_TXX9_CONSOLE NULL
974 static struct uart_driver serial_txx9_reg = {
975 .owner = THIS_MODULE,
976 .driver_name = "serial_txx9",
977 .devfs_name = TXX9_TTY_DEVFS_NAME,
978 .dev_name = TXX9_TTY_NAME,
979 .major = TXX9_TTY_MAJOR,
980 .minor = TXX9_TTY_MINOR_START,
982 .cons = SERIAL_TXX9_CONSOLE,
985 int __init early_serial_txx9_setup(struct uart_port *port)
987 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
990 serial_txx9_ports[port->line].port = *port;
991 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
992 serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
996 #ifdef ENABLE_SERIAL_TXX9_PCI
998 * serial_txx9_suspend_port - suspend one serial port
999 * @line: serial line number
1000 * @level: the level of port suspension, as per uart_suspend_port
1002 * Suspend one serial port.
1004 static void serial_txx9_suspend_port(int line)
1006 uart_suspend_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
1010 * serial_txx9_resume_port - resume one serial port
1011 * @line: serial line number
1012 * @level: the level of port resumption, as per uart_resume_port
1014 * Resume one serial port.
1016 static void serial_txx9_resume_port(int line)
1018 uart_resume_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
1021 static DECLARE_MUTEX(serial_txx9_sem);
1024 * serial_txx9_register_port - register a serial port
1025 * @port: serial port template
1027 * Configure the serial port specified by the request.
1029 * The port is then probed and if necessary the IRQ is autodetected
1030 * If this fails an error is returned.
1032 * On success the port is ready to use and the line number is returned.
1034 static int __devinit serial_txx9_register_port(struct uart_port *port)
1037 struct uart_txx9_port *uart;
1040 down(&serial_txx9_sem);
1041 for (i = 0; i < UART_NR; i++) {
1042 uart = &serial_txx9_ports[i];
1043 if (uart->port.type == PORT_UNKNOWN)
1047 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1048 uart->port.iobase = port->iobase;
1049 uart->port.membase = port->membase;
1050 uart->port.irq = port->irq;
1051 uart->port.uartclk = port->uartclk;
1052 uart->port.iotype = port->iotype;
1053 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
1054 uart->port.mapbase = port->mapbase;
1056 uart->port.dev = port->dev;
1057 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1059 ret = uart->port.line;
1061 up(&serial_txx9_sem);
1066 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1067 * @line: serial line number
1069 * Remove one serial port. This may not be called from interrupt
1070 * context. We hand the port back to the our control.
1072 static void __devexit serial_txx9_unregister_port(int line)
1074 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1076 down(&serial_txx9_sem);
1077 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1078 uart->port.flags = 0;
1079 uart->port.type = PORT_UNKNOWN;
1080 uart->port.iobase = 0;
1081 uart->port.mapbase = 0;
1082 uart->port.membase = 0;
1083 uart->port.dev = NULL;
1084 uart_add_one_port(&serial_txx9_reg, &uart->port);
1085 up(&serial_txx9_sem);
1089 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1090 * to the arrangement of serial ports on a PCI card.
1092 static int __devinit
1093 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1095 struct uart_port port;
1099 rc = pci_enable_device(dev);
1103 memset(&port, 0, sizeof(port));
1104 port.ops = &serial_txx9_pops;
1105 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1106 port.uartclk = 66670000;
1107 port.irq = dev->irq;
1108 port.iotype = UPIO_PORT;
1109 port.iobase = pci_resource_start(dev, 1);
1110 port.dev = &dev->dev;
1111 line = serial_txx9_register_port(&port);
1113 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1115 pci_set_drvdata(dev, (void *)(long)line);
1120 static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1122 int line = (int)(long)pci_get_drvdata(dev);
1124 pci_set_drvdata(dev, NULL);
1127 serial_txx9_unregister_port(line);
1128 pci_disable_device(dev);
1132 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1134 int line = (int)(long)pci_get_drvdata(dev);
1137 serial_txx9_suspend_port(line);
1138 pci_save_state(dev);
1139 pci_set_power_state(dev, pci_choose_state(dev, state));
1143 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1145 int line = (int)(long)pci_get_drvdata(dev);
1147 pci_set_power_state(dev, PCI_D0);
1148 pci_restore_state(dev);
1151 pci_enable_device(dev);
1152 serial_txx9_resume_port(line);
1157 static struct pci_device_id serial_txx9_pci_tbl[] = {
1158 { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC,
1159 PCI_ANY_ID, PCI_ANY_ID,
1164 static struct pci_driver serial_txx9_pci_driver = {
1165 .name = "serial_txx9",
1166 .probe = pciserial_txx9_init_one,
1167 .remove = __devexit_p(pciserial_txx9_remove_one),
1168 .suspend = pciserial_txx9_suspend_one,
1169 .resume = pciserial_txx9_resume_one,
1170 .id_table = serial_txx9_pci_tbl,
1173 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1174 #endif /* ENABLE_SERIAL_TXX9_PCI */
1176 static int __init serial_txx9_init(void)
1180 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1182 ret = uart_register_driver(&serial_txx9_reg);
1184 serial_txx9_register_ports(&serial_txx9_reg);
1186 #ifdef ENABLE_SERIAL_TXX9_PCI
1187 ret = pci_register_driver(&serial_txx9_pci_driver);
1193 static void __exit serial_txx9_exit(void)
1197 #ifdef ENABLE_SERIAL_TXX9_PCI
1198 pci_unregister_driver(&serial_txx9_pci_driver);
1200 for (i = 0; i < UART_NR; i++)
1201 uart_remove_one_port(&serial_txx9_reg, &serial_txx9_ports[i].port);
1203 uart_unregister_driver(&serial_txx9_reg);
1206 module_init(serial_txx9_init);
1207 module_exit(serial_txx9_exit);
1209 MODULE_LICENSE("GPL");
1210 MODULE_DESCRIPTION("TX39/49 serial driver");
1212 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);