2 * Pinmuxed GPIO support for SuperH.
4 * Copyright (C) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 #include <linux/errno.h>
11 #include <linux/kernel.h>
12 #include <linux/list.h>
13 #include <linux/module.h>
14 #include <linux/clk.h>
15 #include <linux/err.h>
17 #include <linux/irq.h>
18 #include <linux/bitops.h>
19 #include <linux/gpio.h>
21 static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
23 if (enum_id < r->begin)
32 static unsigned long gpio_read_raw_reg(unsigned long reg,
33 unsigned long reg_width)
37 return __raw_readb(reg);
39 return __raw_readw(reg);
41 return __raw_readl(reg);
48 static void gpio_write_raw_reg(unsigned long reg,
49 unsigned long reg_width,
54 __raw_writeb(data, reg);
57 __raw_writew(data, reg);
60 __raw_writel(data, reg);
67 static void gpio_write_bit(struct pinmux_data_reg *dr,
68 unsigned long in_pos, unsigned long value)
72 pos = dr->reg_width - (in_pos + 1);
74 pr_debug("write_bit addr = %lx, value = %d, pos = %ld, "
76 dr->reg, !!value, pos, dr->reg_width);
79 set_bit(pos, &dr->reg_shadow);
81 clear_bit(pos, &dr->reg_shadow);
83 gpio_write_raw_reg(dr->reg, dr->reg_width, dr->reg_shadow);
86 static int gpio_read_reg(unsigned long reg, unsigned long reg_width,
87 unsigned long field_width, unsigned long in_pos)
89 unsigned long data, mask, pos;
92 mask = (1 << field_width) - 1;
93 pos = reg_width - ((in_pos + 1) * field_width);
95 pr_debug("read_reg: addr = %lx, pos = %ld, "
96 "r_width = %ld, f_width = %ld\n",
97 reg, pos, reg_width, field_width);
99 data = gpio_read_raw_reg(reg, reg_width);
100 return (data >> pos) & mask;
103 static void gpio_write_reg(unsigned long reg, unsigned long reg_width,
104 unsigned long field_width, unsigned long in_pos,
107 unsigned long mask, pos;
109 mask = (1 << field_width) - 1;
110 pos = reg_width - ((in_pos + 1) * field_width);
112 pr_debug("write_reg addr = %lx, value = %ld, pos = %ld, "
113 "r_width = %ld, f_width = %ld\n",
114 reg, value, pos, reg_width, field_width);
116 mask = ~(mask << pos);
117 value = value << pos;
121 __raw_writeb((__raw_readb(reg) & mask) | value, reg);
124 __raw_writew((__raw_readw(reg) & mask) | value, reg);
127 __raw_writel((__raw_readl(reg) & mask) | value, reg);
132 static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
134 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
135 struct pinmux_data_reg *data_reg;
138 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
143 data_reg = gpioc->data_regs + k;
145 if (!data_reg->reg_width)
148 for (n = 0; n < data_reg->reg_width; n++) {
149 if (data_reg->enum_ids[n] == gpiop->enum_id) {
150 gpiop->flags &= ~PINMUX_FLAG_DREG;
151 gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
152 gpiop->flags &= ~PINMUX_FLAG_DBIT;
153 gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
165 static void setup_data_regs(struct pinmux_info *gpioc)
167 struct pinmux_data_reg *drp;
170 for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
171 setup_data_reg(gpioc, k);
175 drp = gpioc->data_regs + k;
180 drp->reg_shadow = gpio_read_raw_reg(drp->reg, drp->reg_width);
185 static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
186 struct pinmux_data_reg **drp, int *bitp)
188 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
191 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
194 k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
195 n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
196 *drp = gpioc->data_regs + k;
201 static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
202 struct pinmux_cfg_reg **crp, int *indexp,
203 unsigned long **cntp)
205 struct pinmux_cfg_reg *config_reg;
206 unsigned long r_width, f_width;
211 config_reg = gpioc->cfg_regs + k;
213 r_width = config_reg->reg_width;
214 f_width = config_reg->field_width;
218 for (n = 0; n < (r_width / f_width) * 1 << f_width; n++) {
219 if (config_reg->enum_ids[n] == enum_id) {
222 *cntp = &config_reg->cnt[n / (1 << f_width)];
232 static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
233 int pos, pinmux_enum_t *enum_idp)
235 pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
236 pinmux_enum_t *data = gpioc->gpio_data;
239 if (!enum_in_range(enum_id, &gpioc->data)) {
240 if (!enum_in_range(enum_id, &gpioc->mark)) {
241 pr_err("non data/mark enum_id for gpio %d\n", gpio);
247 *enum_idp = data[pos + 1];
251 for (k = 0; k < gpioc->gpio_data_size; k++) {
252 if (data[k] == enum_id) {
253 *enum_idp = data[k + 1];
258 pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
262 static void write_config_reg(struct pinmux_info *gpioc,
263 struct pinmux_cfg_reg *crp,
266 unsigned long ncomb, pos, value;
268 ncomb = 1 << crp->field_width;
270 value = index % ncomb;
272 gpio_write_reg(crp->reg, crp->reg_width, crp->field_width, pos, value);
275 static int check_config_reg(struct pinmux_info *gpioc,
276 struct pinmux_cfg_reg *crp,
279 unsigned long ncomb, pos, value;
281 ncomb = 1 << crp->field_width;
283 value = index % ncomb;
285 if (gpio_read_reg(crp->reg, crp->reg_width,
286 crp->field_width, pos) == value)
292 enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
294 static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
295 int pinmux_type, int cfg_mode)
297 struct pinmux_cfg_reg *cr = NULL;
298 pinmux_enum_t enum_id;
299 struct pinmux_range *range;
300 int in_range, pos, index;
303 switch (pinmux_type) {
305 case PINMUX_TYPE_FUNCTION:
309 case PINMUX_TYPE_OUTPUT:
310 range = &gpioc->output;
313 case PINMUX_TYPE_INPUT:
314 range = &gpioc->input;
317 case PINMUX_TYPE_INPUT_PULLUP:
318 range = &gpioc->input_pu;
321 case PINMUX_TYPE_INPUT_PULLDOWN:
322 range = &gpioc->input_pd;
333 pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
340 /* first check if this is a function enum */
341 in_range = enum_in_range(enum_id, &gpioc->function);
343 /* not a function enum */
346 * other range exists, so this pin is
347 * a regular GPIO pin that now is being
348 * bound to a specific direction.
350 * for this case we only allow function enums
351 * and the enums that match the other range.
353 in_range = enum_in_range(enum_id, range);
356 * special case pass through for fixed
357 * input-only or output-only pins without
358 * function enum register association.
360 if (in_range && enum_id == range->force)
364 * no other range exists, so this pin
365 * must then be of the function type.
367 * allow function type pins to select
368 * any combination of function/in/out
369 * in their MARK lists.
378 if (get_config_reg(gpioc, enum_id, &cr, &index, &cntp) != 0)
382 case GPIO_CFG_DRYRUN:
383 if (!*cntp || !check_config_reg(gpioc, cr, index))
388 write_config_reg(gpioc, cr, index);
403 static DEFINE_SPINLOCK(gpio_lock);
405 static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
407 return container_of(chip, struct pinmux_info, chip);
410 static int sh_gpio_request(struct gpio_chip *chip, unsigned offset)
412 struct pinmux_info *gpioc = chip_to_pinmux(chip);
413 struct pinmux_data_reg *dummy;
415 int i, ret, pinmux_type;
422 spin_lock_irqsave(&gpio_lock, flags);
424 if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
427 /* setup pin function here if no data is associated with pin */
429 if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
430 pinmux_type = PINMUX_TYPE_FUNCTION;
432 pinmux_type = PINMUX_TYPE_GPIO;
434 if (pinmux_type == PINMUX_TYPE_FUNCTION) {
435 if (pinmux_config_gpio(gpioc, offset,
437 GPIO_CFG_DRYRUN) != 0)
440 if (pinmux_config_gpio(gpioc, offset,
446 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
447 gpioc->gpios[offset].flags |= pinmux_type;
451 spin_unlock_irqrestore(&gpio_lock, flags);
456 static void sh_gpio_free(struct gpio_chip *chip, unsigned offset)
458 struct pinmux_info *gpioc = chip_to_pinmux(chip);
465 spin_lock_irqsave(&gpio_lock, flags);
467 pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
468 pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
469 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
470 gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
472 spin_unlock_irqrestore(&gpio_lock, flags);
475 static int pinmux_direction(struct pinmux_info *gpioc,
476 unsigned gpio, int new_pinmux_type)
484 pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
486 switch (pinmux_type) {
487 case PINMUX_TYPE_GPIO:
489 case PINMUX_TYPE_OUTPUT:
490 case PINMUX_TYPE_INPUT:
491 case PINMUX_TYPE_INPUT_PULLUP:
492 case PINMUX_TYPE_INPUT_PULLDOWN:
493 pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
499 if (pinmux_config_gpio(gpioc, gpio,
501 GPIO_CFG_DRYRUN) != 0)
504 if (pinmux_config_gpio(gpioc, gpio,
509 gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
510 gpioc->gpios[gpio].flags |= new_pinmux_type;
517 static int sh_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
519 struct pinmux_info *gpioc = chip_to_pinmux(chip);
523 spin_lock_irqsave(&gpio_lock, flags);
524 ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
525 spin_unlock_irqrestore(&gpio_lock, flags);
530 static void sh_gpio_set_value(struct pinmux_info *gpioc,
531 unsigned gpio, int value)
533 struct pinmux_data_reg *dr = NULL;
536 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
539 gpio_write_bit(dr, bit, value);
542 static int sh_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
545 struct pinmux_info *gpioc = chip_to_pinmux(chip);
549 sh_gpio_set_value(gpioc, offset, value);
550 spin_lock_irqsave(&gpio_lock, flags);
551 ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
552 spin_unlock_irqrestore(&gpio_lock, flags);
557 static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
559 struct pinmux_data_reg *dr = NULL;
562 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) {
567 return gpio_read_reg(dr->reg, dr->reg_width, 1, bit);
570 static int sh_gpio_get(struct gpio_chip *chip, unsigned offset)
572 return sh_gpio_get_value(chip_to_pinmux(chip), offset);
575 static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
577 sh_gpio_set_value(chip_to_pinmux(chip), offset, value);
580 int register_pinmux(struct pinmux_info *pip)
582 struct gpio_chip *chip = &pip->chip;
584 pr_info("sh pinmux: %s handling gpio %d -> %d\n",
585 pip->name, pip->first_gpio, pip->last_gpio);
587 setup_data_regs(pip);
589 chip->request = sh_gpio_request;
590 chip->free = sh_gpio_free;
591 chip->direction_input = sh_gpio_direction_input;
592 chip->get = sh_gpio_get;
593 chip->direction_output = sh_gpio_direction_output;
594 chip->set = sh_gpio_set;
596 WARN_ON(pip->first_gpio != 0); /* needs testing */
598 chip->label = pip->name;
599 chip->owner = THIS_MODULE;
600 chip->base = pip->first_gpio;
601 chip->ngpio = (pip->last_gpio - pip->first_gpio) + 1;
603 return gpiochip_add(chip);