2 * Broadcom BCM63xx SPI controller support
4 * Copyright (C) 2009-2012 Florian Fainelli <florian@openwrt.org>
5 * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the
19 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/clk.h>
26 #include <linux/module.h>
27 #include <linux/platform_device.h>
28 #include <linux/delay.h>
29 #include <linux/interrupt.h>
30 #include <linux/spi/spi.h>
31 #include <linux/completion.h>
32 #include <linux/err.h>
33 #include <linux/workqueue.h>
34 #include <linux/pm_runtime.h>
36 #include <bcm63xx_dev_spi.h>
38 #define PFX KBUILD_MODNAME
39 #define DRV_VER "0.1.2"
42 struct completion done;
52 const unsigned char *tx_ptr;
53 unsigned char *rx_ptr;
57 const u8 __iomem *rx_io;
62 struct platform_device *pdev;
65 static inline u8 bcm_spi_readb(struct bcm63xx_spi *bs,
68 return bcm_readb(bs->regs + bcm63xx_spireg(offset));
71 static inline u16 bcm_spi_readw(struct bcm63xx_spi *bs,
74 return bcm_readw(bs->regs + bcm63xx_spireg(offset));
77 static inline void bcm_spi_writeb(struct bcm63xx_spi *bs,
78 u8 value, unsigned int offset)
80 bcm_writeb(value, bs->regs + bcm63xx_spireg(offset));
83 static inline void bcm_spi_writew(struct bcm63xx_spi *bs,
84 u16 value, unsigned int offset)
86 bcm_writew(value, bs->regs + bcm63xx_spireg(offset));
89 static const unsigned bcm63xx_spi_freq_table[SPI_CLK_MASK][2] = {
90 { 20000000, SPI_CLK_20MHZ },
91 { 12500000, SPI_CLK_12_50MHZ },
92 { 6250000, SPI_CLK_6_250MHZ },
93 { 3125000, SPI_CLK_3_125MHZ },
94 { 1563000, SPI_CLK_1_563MHZ },
95 { 781000, SPI_CLK_0_781MHZ },
96 { 391000, SPI_CLK_0_391MHZ }
99 static int bcm63xx_spi_check_transfer(struct spi_device *spi,
100 struct spi_transfer *t)
104 bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word;
105 if (bits_per_word != 8) {
106 dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
107 __func__, bits_per_word);
111 if (spi->chip_select > spi->master->num_chipselect) {
112 dev_err(&spi->dev, "%s, unsupported slave %d\n",
113 __func__, spi->chip_select);
120 static void bcm63xx_spi_setup_transfer(struct spi_device *spi,
121 struct spi_transfer *t)
123 struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
128 hz = (t) ? t->speed_hz : spi->max_speed_hz;
130 /* Find the closest clock configuration */
131 for (i = 0; i < SPI_CLK_MASK; i++) {
132 if (hz <= bcm63xx_spi_freq_table[i][0]) {
133 clk_cfg = bcm63xx_spi_freq_table[i][1];
138 /* No matching configuration found, default to lowest */
139 if (i == SPI_CLK_MASK)
140 clk_cfg = SPI_CLK_0_391MHZ;
142 /* clear existing clock configuration bits of the register */
143 reg = bcm_spi_readb(bs, SPI_CLK_CFG);
144 reg &= ~SPI_CLK_MASK;
147 bcm_spi_writeb(bs, reg, SPI_CLK_CFG);
148 dev_dbg(&spi->dev, "Setting clock register to %02x (hz %d)\n",
152 /* the spi->mode bits understood by this driver: */
153 #define MODEBITS (SPI_CPOL | SPI_CPHA)
155 static int bcm63xx_spi_setup(struct spi_device *spi)
157 struct bcm63xx_spi *bs;
160 bs = spi_master_get_devdata(spi->master);
162 if (!spi->bits_per_word)
163 spi->bits_per_word = 8;
165 if (spi->mode & ~MODEBITS) {
166 dev_err(&spi->dev, "%s, unsupported mode bits %x\n",
167 __func__, spi->mode & ~MODEBITS);
171 ret = bcm63xx_spi_check_transfer(spi, NULL);
173 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
174 spi->mode & ~MODEBITS);
178 dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n",
179 __func__, spi->mode & MODEBITS, spi->bits_per_word, 0);
184 /* Fill the TX FIFO with as many bytes as possible */
185 static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs)
189 /* Fill the Tx FIFO with as many bytes as possible */
190 size = bs->remaining_bytes < bs->fifo_size ? bs->remaining_bytes :
192 memcpy_toio(bs->tx_io, bs->tx_ptr, size);
193 bs->remaining_bytes -= size;
196 static unsigned int bcm63xx_txrx_bufs(struct spi_device *spi,
197 struct spi_transfer *t)
199 struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
203 /* Disable the CMD_DONE interrupt */
204 bcm_spi_writeb(bs, 0, SPI_INT_MASK);
206 dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
207 t->tx_buf, t->rx_buf, t->len);
209 /* Transmitter is inhibited */
210 bs->tx_ptr = t->tx_buf;
211 bs->rx_ptr = t->rx_buf;
214 bs->remaining_bytes = t->len;
215 bcm63xx_spi_fill_tx_fifo(bs);
218 init_completion(&bs->done);
220 /* Fill in the Message control register */
221 msg_ctl = (t->len << SPI_BYTE_CNT_SHIFT);
223 if (t->rx_buf && t->tx_buf)
224 msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT);
226 msg_ctl |= (SPI_HD_R << SPI_MSG_TYPE_SHIFT);
228 msg_ctl |= (SPI_HD_W << SPI_MSG_TYPE_SHIFT);
230 bcm_spi_writew(bs, msg_ctl, SPI_MSG_CTL);
232 /* Issue the transfer */
233 cmd = SPI_CMD_START_IMMEDIATE;
234 cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
235 cmd |= (spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT);
236 bcm_spi_writew(bs, cmd, SPI_CMD);
238 /* Enable the CMD_DONE interrupt */
239 bcm_spi_writeb(bs, SPI_INTR_CMD_DONE, SPI_INT_MASK);
241 return t->len - bs->remaining_bytes;
244 static int bcm63xx_spi_prepare_transfer(struct spi_master *master)
246 struct bcm63xx_spi *bs = spi_master_get_devdata(master);
248 pm_runtime_get_sync(&bs->pdev->dev);
253 static int bcm63xx_spi_unprepare_transfer(struct spi_master *master)
255 struct bcm63xx_spi *bs = spi_master_get_devdata(master);
257 pm_runtime_put(&bs->pdev->dev);
262 static int bcm63xx_spi_transfer_one(struct spi_master *master,
263 struct spi_message *m)
265 struct bcm63xx_spi *bs = spi_master_get_devdata(master);
266 struct spi_transfer *t;
267 struct spi_device *spi = m->spi;
269 unsigned int timeout = 0;
271 list_for_each_entry(t, &m->transfers, transfer_list) {
272 unsigned int len = t->len;
275 status = bcm63xx_spi_check_transfer(spi, t);
279 /* configure adapter for a new transfer */
280 bcm63xx_spi_setup_transfer(spi, t);
284 len -= bcm63xx_txrx_bufs(spi, t);
286 timeout = wait_for_completion_timeout(&bs->done, HZ);
292 /* read out all data */
293 rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
295 /* Read out all the data */
297 memcpy_fromio(bs->rx_ptr, bs->rx_io, rx_tail);
300 m->actual_length += t->len;
304 spi_finalize_current_message(master);
309 /* This driver supports single master mode only. Hence
310 * CMD_DONE is the only interrupt we care about
312 static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id)
314 struct spi_master *master = (struct spi_master *)dev_id;
315 struct bcm63xx_spi *bs = spi_master_get_devdata(master);
318 /* Read interupts and clear them immediately */
319 intr = bcm_spi_readb(bs, SPI_INT_STATUS);
320 bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
321 bcm_spi_writeb(bs, 0, SPI_INT_MASK);
323 /* A transfer completed */
324 if (intr & SPI_INTR_CMD_DONE)
331 static int __devinit bcm63xx_spi_probe(struct platform_device *pdev)
334 struct device *dev = &pdev->dev;
335 struct bcm63xx_spi_pdata *pdata = pdev->dev.platform_data;
337 struct spi_master *master;
339 struct bcm63xx_spi *bs;
342 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
344 dev_err(dev, "no iomem\n");
349 irq = platform_get_irq(pdev, 0);
351 dev_err(dev, "no irq\n");
356 clk = clk_get(dev, "spi");
358 dev_err(dev, "no clock for device\n");
363 master = spi_alloc_master(dev, sizeof(*bs));
365 dev_err(dev, "out of memory\n");
370 bs = spi_master_get_devdata(master);
372 platform_set_drvdata(pdev, master);
375 if (!devm_request_mem_region(&pdev->dev, r->start,
376 resource_size(r), PFX)) {
377 dev_err(dev, "iomem request failed\n");
382 bs->regs = devm_ioremap_nocache(&pdev->dev, r->start,
385 dev_err(dev, "unable to ioremap regs\n");
392 bs->fifo_size = pdata->fifo_size;
394 ret = devm_request_irq(&pdev->dev, irq, bcm63xx_spi_interrupt, 0,
397 dev_err(dev, "unable to request irq\n");
401 master->bus_num = pdata->bus_num;
402 master->num_chipselect = pdata->num_chipselect;
403 master->setup = bcm63xx_spi_setup;
404 master->prepare_transfer_hardware = bcm63xx_spi_prepare_transfer;
405 master->unprepare_transfer_hardware = bcm63xx_spi_unprepare_transfer;
406 master->transfer_one_message = bcm63xx_spi_transfer_one;
407 bs->speed_hz = pdata->speed_hz;
408 bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));
409 bs->rx_io = (const u8 *)(bs->regs + bcm63xx_spireg(SPI_RX_DATA));
411 /* Initialize hardware */
413 bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
415 /* register and we are done */
416 ret = spi_register_master(master);
418 dev_err(dev, "spi register failed\n");
419 goto out_clk_disable;
422 dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d) v%s\n",
423 r->start, irq, bs->fifo_size, DRV_VER);
430 platform_set_drvdata(pdev, NULL);
431 spi_master_put(master);
438 static int __devexit bcm63xx_spi_remove(struct platform_device *pdev)
440 struct spi_master *master = platform_get_drvdata(pdev);
441 struct bcm63xx_spi *bs = spi_master_get_devdata(master);
443 spi_unregister_master(master);
445 /* reset spi block */
446 bcm_spi_writeb(bs, 0, SPI_INT_MASK);
449 clk_disable(bs->clk);
452 platform_set_drvdata(pdev, 0);
458 static int bcm63xx_spi_suspend(struct device *dev)
460 struct spi_master *master =
461 platform_get_drvdata(to_platform_device(dev));
462 struct bcm63xx_spi *bs = spi_master_get_devdata(master);
464 clk_disable(bs->clk);
469 static int bcm63xx_spi_resume(struct device *dev)
471 struct spi_master *master =
472 platform_get_drvdata(to_platform_device(dev));
473 struct bcm63xx_spi *bs = spi_master_get_devdata(master);
480 static const struct dev_pm_ops bcm63xx_spi_pm_ops = {
481 .suspend = bcm63xx_spi_suspend,
482 .resume = bcm63xx_spi_resume,
485 #define BCM63XX_SPI_PM_OPS (&bcm63xx_spi_pm_ops)
487 #define BCM63XX_SPI_PM_OPS NULL
490 static struct platform_driver bcm63xx_spi_driver = {
492 .name = "bcm63xx-spi",
493 .owner = THIS_MODULE,
494 .pm = BCM63XX_SPI_PM_OPS,
496 .probe = bcm63xx_spi_probe,
497 .remove = __devexit_p(bcm63xx_spi_remove),
500 module_platform_driver(bcm63xx_spi_driver);
502 MODULE_ALIAS("platform:bcm63xx_spi");
503 MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
504 MODULE_AUTHOR("Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>");
505 MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver");
506 MODULE_LICENSE("GPL");