6 #define OCTEON_SPI_MAX_BYTES 9
7 #define OCTEON_SPI_MAX_CLOCK_HZ 16000000
9 struct octeon_spi_regs {
17 void __iomem *register_base;
21 struct octeon_spi_regs regs;
25 #define OCTEON_SPI_CFG(x) (x->regs.config)
26 #define OCTEON_SPI_STS(x) (x->regs.status)
27 #define OCTEON_SPI_TX(x) (x->regs.tx)
28 #define OCTEON_SPI_DAT0(x) (x->regs.data)
30 int octeon_spi_transfer_one_message(struct spi_master *master,
31 struct spi_message *msg);
33 /* MPI register descriptions */
35 #define CVMX_MPI_CFG (CVMX_ADD_IO_SEG(0x0001070000001000ull))
36 #define CVMX_MPI_DATX(offset) (CVMX_ADD_IO_SEG(0x0001070000001080ull) + ((offset) & 15) * 8)
37 #define CVMX_MPI_STS (CVMX_ADD_IO_SEG(0x0001070000001008ull))
38 #define CVMX_MPI_TX (CVMX_ADD_IO_SEG(0x0001070000001010ull))
42 struct cvmx_mpi_cfg_s {
43 #ifdef __BIG_ENDIAN_BITFIELD
44 uint64_t reserved_29_63:35;
78 uint64_t reserved_29_63:35;
81 struct cvmx_mpi_cfg_cn30xx {
82 #ifdef __BIG_ENDIAN_BITFIELD
83 uint64_t reserved_29_63:35;
85 uint64_t reserved_12_15:4;
109 uint64_t reserved_12_15:4;
111 uint64_t reserved_29_63:35;
114 struct cvmx_mpi_cfg_cn31xx {
115 #ifdef __BIG_ENDIAN_BITFIELD
116 uint64_t reserved_29_63:35;
118 uint64_t reserved_11_15:5;
140 uint64_t reserved_11_15:5;
142 uint64_t reserved_29_63:35;
145 struct cvmx_mpi_cfg_cn30xx cn50xx;
146 struct cvmx_mpi_cfg_cn61xx {
147 #ifdef __BIG_ENDIAN_BITFIELD
148 uint64_t reserved_29_63:35;
150 uint64_t reserved_14_15:2;
157 uint64_t reserved_6_6:1;
171 uint64_t reserved_6_6:1;
178 uint64_t reserved_14_15:2;
180 uint64_t reserved_29_63:35;
183 struct cvmx_mpi_cfg_cn66xx {
184 #ifdef __BIG_ENDIAN_BITFIELD
185 uint64_t reserved_29_63:35;
189 uint64_t reserved_12_13:2;
194 uint64_t reserved_6_6:1;
208 uint64_t reserved_6_6:1;
213 uint64_t reserved_12_13:2;
217 uint64_t reserved_29_63:35;
220 struct cvmx_mpi_cfg_cn61xx cnf71xx;
223 union cvmx_mpi_datx {
225 struct cvmx_mpi_datx_s {
226 #ifdef __BIG_ENDIAN_BITFIELD
227 uint64_t reserved_8_63:56;
231 uint64_t reserved_8_63:56;
234 struct cvmx_mpi_datx_s cn30xx;
235 struct cvmx_mpi_datx_s cn31xx;
236 struct cvmx_mpi_datx_s cn50xx;
237 struct cvmx_mpi_datx_s cn61xx;
238 struct cvmx_mpi_datx_s cn66xx;
239 struct cvmx_mpi_datx_s cnf71xx;
244 struct cvmx_mpi_sts_s {
245 #ifdef __BIG_ENDIAN_BITFIELD
246 uint64_t reserved_13_63:51;
248 uint64_t reserved_1_7:7;
252 uint64_t reserved_1_7:7;
254 uint64_t reserved_13_63:51;
257 struct cvmx_mpi_sts_s cn30xx;
258 struct cvmx_mpi_sts_s cn31xx;
259 struct cvmx_mpi_sts_s cn50xx;
260 struct cvmx_mpi_sts_s cn61xx;
261 struct cvmx_mpi_sts_s cn66xx;
262 struct cvmx_mpi_sts_s cnf71xx;
267 struct cvmx_mpi_tx_s {
268 #ifdef __BIG_ENDIAN_BITFIELD
269 uint64_t reserved_22_63:42;
271 uint64_t reserved_17_19:3;
273 uint64_t reserved_13_15:3;
275 uint64_t reserved_5_7:3;
279 uint64_t reserved_5_7:3;
281 uint64_t reserved_13_15:3;
283 uint64_t reserved_17_19:3;
285 uint64_t reserved_22_63:42;
288 struct cvmx_mpi_tx_cn30xx {
289 #ifdef __BIG_ENDIAN_BITFIELD
290 uint64_t reserved_17_63:47;
292 uint64_t reserved_13_15:3;
294 uint64_t reserved_5_7:3;
298 uint64_t reserved_5_7:3;
300 uint64_t reserved_13_15:3;
302 uint64_t reserved_17_63:47;
305 struct cvmx_mpi_tx_cn30xx cn31xx;
306 struct cvmx_mpi_tx_cn30xx cn50xx;
307 struct cvmx_mpi_tx_cn61xx {
308 #ifdef __BIG_ENDIAN_BITFIELD
309 uint64_t reserved_21_63:43;
311 uint64_t reserved_17_19:3;
313 uint64_t reserved_13_15:3;
315 uint64_t reserved_5_7:3;
319 uint64_t reserved_5_7:3;
321 uint64_t reserved_13_15:3;
323 uint64_t reserved_17_19:3;
325 uint64_t reserved_21_63:43;
328 struct cvmx_mpi_tx_s cn66xx;
329 struct cvmx_mpi_tx_cn61xx cnf71xx;
332 #endif /* __SPI_CAVIUM_H */