2 * Freescale SPI controller driver cpm functions.
4 * Maintainer: Kumar Gala
6 * Copyright (C) 2006 Polycom, Inc.
7 * Copyright 2010 Freescale Semiconductor, Inc.
9 * CPM SPI and QE buffer descriptors mode support:
10 * Copyright (c) 2009 MontaVista Software, Inc.
11 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
18 #include <linux/types.h>
19 #include <linux/kernel.h>
20 #include <linux/spi/spi.h>
21 #include <linux/fsl_devices.h>
22 #include <linux/dma-mapping.h>
26 #include "spi-fsl-lib.h"
27 #include "spi-fsl-cpm.h"
28 #include "spi-fsl-spi.h"
30 /* CPM1 and CPM2 are mutually exclusive. */
33 #define CPM_SPI_CMD mk_cr_cmd(CPM_CR_CH_SPI, 0)
36 #define CPM_SPI_CMD mk_cr_cmd(CPM_CR_SPI_PAGE, CPM_CR_SPI_SBLOCK, 0, 0)
39 #define SPIE_TXB 0x00000200 /* Last char is written to tx fifo */
40 #define SPIE_RXB 0x00000100 /* Last char is written to rx buf */
42 /* SPCOM register values */
43 #define SPCOM_STR (1 << 23) /* Start transmit */
45 #define SPI_PRAM_SIZE 0x100
46 #define SPI_MRBLR ((unsigned int)PAGE_SIZE)
48 static void *fsl_dummy_rx;
49 static DEFINE_MUTEX(fsl_dummy_rx_lock);
50 static int fsl_dummy_rx_refcnt;
52 void fsl_spi_cpm_reinit_txrx(struct mpc8xxx_spi *mspi)
54 if (mspi->flags & SPI_QE) {
55 qe_issue_cmd(QE_INIT_TX_RX, mspi->subblock,
56 QE_CR_PROTOCOL_UNSPECIFIED, 0);
58 cpm_command(CPM_SPI_CMD, CPM_CR_INIT_TRX);
59 if (mspi->flags & SPI_CPM1) {
60 out_be16(&mspi->pram->rbptr,
61 in_be16(&mspi->pram->rbase));
62 out_be16(&mspi->pram->tbptr,
63 in_be16(&mspi->pram->tbase));
68 static void fsl_spi_cpm_bufs_start(struct mpc8xxx_spi *mspi)
70 struct cpm_buf_desc __iomem *tx_bd = mspi->tx_bd;
71 struct cpm_buf_desc __iomem *rx_bd = mspi->rx_bd;
72 unsigned int xfer_len = min(mspi->count, SPI_MRBLR);
73 unsigned int xfer_ofs;
74 struct fsl_spi_reg *reg_base = mspi->reg_base;
76 xfer_ofs = mspi->xfer_in_progress->len - mspi->count;
78 if (mspi->rx_dma == mspi->dma_dummy_rx)
79 out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma);
81 out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma + xfer_ofs);
82 out_be16(&rx_bd->cbd_datlen, 0);
83 out_be16(&rx_bd->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT | BD_SC_WRAP);
85 if (mspi->tx_dma == mspi->dma_dummy_tx)
86 out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma);
88 out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma + xfer_ofs);
89 out_be16(&tx_bd->cbd_datlen, xfer_len);
90 out_be16(&tx_bd->cbd_sc, BD_SC_READY | BD_SC_INTRPT | BD_SC_WRAP |
94 mpc8xxx_spi_write_reg(®_base->command, SPCOM_STR);
97 int fsl_spi_cpm_bufs(struct mpc8xxx_spi *mspi,
98 struct spi_transfer *t, bool is_dma_mapped)
100 struct device *dev = mspi->dev;
101 struct fsl_spi_reg *reg_base = mspi->reg_base;
104 mspi->map_tx_dma = 0;
105 mspi->map_rx_dma = 0;
107 mspi->map_tx_dma = 1;
108 mspi->map_rx_dma = 1;
112 mspi->tx_dma = mspi->dma_dummy_tx;
113 mspi->map_tx_dma = 0;
117 mspi->rx_dma = mspi->dma_dummy_rx;
118 mspi->map_rx_dma = 0;
121 if (mspi->map_tx_dma) {
122 void *nonconst_tx = (void *)mspi->tx; /* shut up gcc */
124 mspi->tx_dma = dma_map_single(dev, nonconst_tx, t->len,
126 if (dma_mapping_error(dev, mspi->tx_dma)) {
127 dev_err(dev, "unable to map tx dma\n");
130 } else if (t->tx_buf) {
131 mspi->tx_dma = t->tx_dma;
134 if (mspi->map_rx_dma) {
135 mspi->rx_dma = dma_map_single(dev, mspi->rx, t->len,
137 if (dma_mapping_error(dev, mspi->rx_dma)) {
138 dev_err(dev, "unable to map rx dma\n");
141 } else if (t->rx_buf) {
142 mspi->rx_dma = t->rx_dma;
146 mpc8xxx_spi_write_reg(®_base->mask, SPIE_RXB);
148 mspi->xfer_in_progress = t;
149 mspi->count = t->len;
151 /* start CPM transfers */
152 fsl_spi_cpm_bufs_start(mspi);
157 if (mspi->map_tx_dma)
158 dma_unmap_single(dev, mspi->tx_dma, t->len, DMA_TO_DEVICE);
162 void fsl_spi_cpm_bufs_complete(struct mpc8xxx_spi *mspi)
164 struct device *dev = mspi->dev;
165 struct spi_transfer *t = mspi->xfer_in_progress;
167 if (mspi->map_tx_dma)
168 dma_unmap_single(dev, mspi->tx_dma, t->len, DMA_TO_DEVICE);
169 if (mspi->map_rx_dma)
170 dma_unmap_single(dev, mspi->rx_dma, t->len, DMA_FROM_DEVICE);
171 mspi->xfer_in_progress = NULL;
174 void fsl_spi_cpm_irq(struct mpc8xxx_spi *mspi, u32 events)
177 struct fsl_spi_reg *reg_base = mspi->reg_base;
179 dev_dbg(mspi->dev, "%s: bd datlen %d, count %d\n", __func__,
180 in_be16(&mspi->rx_bd->cbd_datlen), mspi->count);
182 len = in_be16(&mspi->rx_bd->cbd_datlen);
183 if (len > mspi->count) {
188 /* Clear the events */
189 mpc8xxx_spi_write_reg(®_base->event, events);
193 fsl_spi_cpm_bufs_start(mspi);
195 complete(&mspi->done);
198 static void *fsl_spi_alloc_dummy_rx(void)
200 mutex_lock(&fsl_dummy_rx_lock);
203 fsl_dummy_rx = kmalloc(SPI_MRBLR, GFP_KERNEL);
205 fsl_dummy_rx_refcnt++;
207 mutex_unlock(&fsl_dummy_rx_lock);
212 static void fsl_spi_free_dummy_rx(void)
214 mutex_lock(&fsl_dummy_rx_lock);
216 switch (fsl_dummy_rx_refcnt) {
225 fsl_dummy_rx_refcnt--;
229 mutex_unlock(&fsl_dummy_rx_lock);
232 static unsigned long fsl_spi_cpm_get_pram(struct mpc8xxx_spi *mspi)
234 struct device *dev = mspi->dev;
235 struct device_node *np = dev->of_node;
238 void __iomem *spi_base;
239 unsigned long pram_ofs = -ENOMEM;
241 /* Can't use of_address_to_resource(), QE muram isn't at 0. */
242 iprop = of_get_property(np, "reg", &size);
244 /* QE with a fixed pram location? */
245 if (mspi->flags & SPI_QE && iprop && size == sizeof(*iprop) * 4)
246 return cpm_muram_alloc_fixed(iprop[2], SPI_PRAM_SIZE);
248 /* QE but with a dynamic pram location? */
249 if (mspi->flags & SPI_QE) {
250 pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
251 qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, mspi->subblock,
252 QE_CR_PROTOCOL_UNSPECIFIED, pram_ofs);
256 spi_base = of_iomap(np, 1);
257 if (spi_base == NULL)
260 if (mspi->flags & SPI_CPM2) {
261 pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
262 out_be16(spi_base, pram_ofs);
264 struct spi_pram __iomem *pram = spi_base;
265 u16 rpbase = in_be16(&pram->rpbase);
267 /* Microcode relocation patch applied? */
271 pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
272 out_be16(spi_base, pram_ofs);
280 int fsl_spi_cpm_init(struct mpc8xxx_spi *mspi)
282 struct device *dev = mspi->dev;
283 struct device_node *np = dev->of_node;
286 unsigned long pram_ofs;
287 unsigned long bds_ofs;
289 if (!(mspi->flags & SPI_CPM_MODE))
292 if (!fsl_spi_alloc_dummy_rx())
295 if (mspi->flags & SPI_QE) {
296 iprop = of_get_property(np, "cell-index", &size);
297 if (iprop && size == sizeof(*iprop))
298 mspi->subblock = *iprop;
300 switch (mspi->subblock) {
302 dev_warn(dev, "cell-index unspecified, assuming SPI1");
305 mspi->subblock = QE_CR_SUBBLOCK_SPI1;
308 mspi->subblock = QE_CR_SUBBLOCK_SPI2;
313 pram_ofs = fsl_spi_cpm_get_pram(mspi);
314 if (IS_ERR_VALUE(pram_ofs)) {
315 dev_err(dev, "can't allocate spi parameter ram\n");
319 bds_ofs = cpm_muram_alloc(sizeof(*mspi->tx_bd) +
320 sizeof(*mspi->rx_bd), 8);
321 if (IS_ERR_VALUE(bds_ofs)) {
322 dev_err(dev, "can't allocate bds\n");
326 mspi->dma_dummy_tx = dma_map_single(dev, empty_zero_page, PAGE_SIZE,
328 if (dma_mapping_error(dev, mspi->dma_dummy_tx)) {
329 dev_err(dev, "unable to map dummy tx buffer\n");
333 mspi->dma_dummy_rx = dma_map_single(dev, fsl_dummy_rx, SPI_MRBLR,
335 if (dma_mapping_error(dev, mspi->dma_dummy_rx)) {
336 dev_err(dev, "unable to map dummy rx buffer\n");
340 mspi->pram = cpm_muram_addr(pram_ofs);
342 mspi->tx_bd = cpm_muram_addr(bds_ofs);
343 mspi->rx_bd = cpm_muram_addr(bds_ofs + sizeof(*mspi->tx_bd));
345 /* Initialize parameter ram. */
346 out_be16(&mspi->pram->tbase, cpm_muram_offset(mspi->tx_bd));
347 out_be16(&mspi->pram->rbase, cpm_muram_offset(mspi->rx_bd));
348 out_8(&mspi->pram->tfcr, CPMFCR_EB | CPMFCR_GBL);
349 out_8(&mspi->pram->rfcr, CPMFCR_EB | CPMFCR_GBL);
350 out_be16(&mspi->pram->mrblr, SPI_MRBLR);
351 out_be32(&mspi->pram->rstate, 0);
352 out_be32(&mspi->pram->rdp, 0);
353 out_be16(&mspi->pram->rbptr, 0);
354 out_be16(&mspi->pram->rbc, 0);
355 out_be32(&mspi->pram->rxtmp, 0);
356 out_be32(&mspi->pram->tstate, 0);
357 out_be32(&mspi->pram->tdp, 0);
358 out_be16(&mspi->pram->tbptr, 0);
359 out_be16(&mspi->pram->tbc, 0);
360 out_be32(&mspi->pram->txtmp, 0);
365 dma_unmap_single(dev, mspi->dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
367 cpm_muram_free(bds_ofs);
369 cpm_muram_free(pram_ofs);
371 fsl_spi_free_dummy_rx();
375 void fsl_spi_cpm_free(struct mpc8xxx_spi *mspi)
377 struct device *dev = mspi->dev;
379 if (!(mspi->flags & SPI_CPM_MODE))
382 dma_unmap_single(dev, mspi->dma_dummy_rx, SPI_MRBLR, DMA_FROM_DEVICE);
383 dma_unmap_single(dev, mspi->dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
384 cpm_muram_free(cpm_muram_offset(mspi->tx_bd));
385 cpm_muram_free(cpm_muram_offset(mspi->pram));
386 fsl_spi_free_dummy_rx();