2 * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
3 * Copyright (C) 2013, Intel Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
13 #include <linux/atomic.h>
14 #include <linux/dmaengine.h>
15 #include <linux/errno.h>
17 #include <linux/interrupt.h>
18 #include <linux/platform_device.h>
19 #include <linux/pxa2xx_ssp.h>
20 #include <linux/scatterlist.h>
21 #include <linux/sizes.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/pxa2xx_spi.h>
26 /* Driver model hookup */
27 struct platform_device *pdev;
30 struct ssp_device *ssp;
32 /* SPI framework hookup */
33 enum pxa_ssp_type ssp_type;
34 struct spi_master *master;
37 struct pxa2xx_spi_master *master_info;
39 /* SSP register addresses */
49 /* Message Transfer pump */
50 struct tasklet_struct pump_transfers;
52 /* DMA engine support */
53 struct dma_chan *rx_chan;
54 struct dma_chan *tx_chan;
55 struct sg_table rx_sgt;
56 struct sg_table tx_sgt;
62 /* Current message transfer state info */
63 struct spi_message *cur_msg;
64 struct spi_transfer *cur_transfer;
65 struct chip_data *cur_chip;
75 int (*write)(struct driver_data *drv_data);
76 int (*read)(struct driver_data *drv_data);
77 irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
78 void (*cs_control)(u32 command);
80 void __iomem *lpss_base;
91 u16 lpss_rx_threshold;
92 u16 lpss_tx_threshold;
99 int (*write)(struct driver_data *drv_data);
100 int (*read)(struct driver_data *drv_data);
101 void (*cs_control)(u32 command);
104 static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data,
107 return __raw_readl(drv_data->ioaddr + reg);
110 static inline void pxa2xx_spi_write(const struct driver_data *drv_data,
111 unsigned reg, u32 val)
113 __raw_writel(val, drv_data->ioaddr + reg);
116 #define START_STATE ((void *)0)
117 #define RUNNING_STATE ((void *)1)
118 #define DONE_STATE ((void *)2)
119 #define ERROR_STATE ((void *)-1)
121 #define IS_DMA_ALIGNED(x) IS_ALIGNED((unsigned long)(x), DMA_ALIGNMENT)
122 #define DMA_ALIGNMENT 8
124 static inline int pxa25x_ssp_comp(struct driver_data *drv_data)
126 switch (drv_data->ssp_type) {
129 case QUARK_X1000_SSP:
136 static inline void write_SSSR_CS(struct driver_data *drv_data, u32 val)
138 if (drv_data->ssp_type == CE4100_SSP ||
139 drv_data->ssp_type == QUARK_X1000_SSP)
140 val |= pxa2xx_spi_read(drv_data, SSSR) & SSSR_ALT_FRM_MASK;
142 pxa2xx_spi_write(drv_data, SSSR, val);
145 extern int pxa2xx_spi_flush(struct driver_data *drv_data);
146 extern void *pxa2xx_spi_next_transfer(struct driver_data *drv_data);
148 #define MAX_DMA_LEN SZ_64K
149 #define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TRAIL)
151 extern bool pxa2xx_spi_dma_is_possible(size_t len);
152 extern int pxa2xx_spi_map_dma_buffers(struct driver_data *drv_data);
153 extern irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data);
154 extern int pxa2xx_spi_dma_prepare(struct driver_data *drv_data, u32 dma_burst);
155 extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
156 extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
157 extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
158 extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
159 struct spi_device *spi,
164 #endif /* SPI_PXA2XX_H */