2 * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
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15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/workqueue.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/platform_device.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/spi_bitbang.h>
31 /*----------------------------------------------------------------------*/
34 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
35 * Use this for GPIO or shift-register level hardware APIs.
37 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
38 * to glue code. These bitbang setup() and cleanup() routines are always
39 * used, though maybe they're called from controller-aware code.
41 * chipselect() and friends may use use spi_device->controller_data and
42 * controller registers as appropriate.
45 * NOTE: SPI controller pins can often be used as GPIO pins instead,
46 * which means you could use a bitbang driver either to get hardware
47 * working quickly, or testing for differences that aren't speed related.
50 struct spi_bitbang_cs {
51 unsigned nsecs; /* (clock cycle time)/2 */
52 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
54 unsigned (*txrx_bufs)(struct spi_device *,
56 struct spi_device *spi,
59 unsigned, struct spi_transfer *);
62 static unsigned bitbang_txrx_8(
63 struct spi_device *spi,
64 u32 (*txrx_word)(struct spi_device *spi,
68 struct spi_transfer *t
70 unsigned bits = spi->bits_per_word;
71 unsigned count = t->len;
72 const u8 *tx = t->tx_buf;
75 while (likely(count > 0)) {
80 word = txrx_word(spi, ns, word, bits);
85 return t->len - count;
88 static unsigned bitbang_txrx_16(
89 struct spi_device *spi,
90 u32 (*txrx_word)(struct spi_device *spi,
94 struct spi_transfer *t
96 unsigned bits = spi->bits_per_word;
97 unsigned count = t->len;
98 const u16 *tx = t->tx_buf;
101 while (likely(count > 1)) {
106 word = txrx_word(spi, ns, word, bits);
111 return t->len - count;
114 static unsigned bitbang_txrx_32(
115 struct spi_device *spi,
116 u32 (*txrx_word)(struct spi_device *spi,
120 struct spi_transfer *t
122 unsigned bits = spi->bits_per_word;
123 unsigned count = t->len;
124 const u32 *tx = t->tx_buf;
127 while (likely(count > 3)) {
132 word = txrx_word(spi, ns, word, bits);
137 return t->len - count;
140 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
142 struct spi_bitbang_cs *cs = spi->controller_state;
147 bits_per_word = t->bits_per_word;
154 /* spi_transfer level calls that work per-word */
156 bits_per_word = spi->bits_per_word;
157 if (bits_per_word <= 8)
158 cs->txrx_bufs = bitbang_txrx_8;
159 else if (bits_per_word <= 16)
160 cs->txrx_bufs = bitbang_txrx_16;
161 else if (bits_per_word <= 32)
162 cs->txrx_bufs = bitbang_txrx_32;
166 /* nsecs = (clock period)/2 */
168 hz = spi->max_speed_hz;
170 cs->nsecs = (1000000000/2) / hz;
171 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
177 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
180 * spi_bitbang_setup - default setup for per-word I/O loops
182 int spi_bitbang_setup(struct spi_device *spi)
184 struct spi_bitbang_cs *cs = spi->controller_state;
185 struct spi_bitbang *bitbang;
189 bitbang = spi_master_get_devdata(spi->master);
192 cs = kzalloc(sizeof *cs, GFP_KERNEL);
195 spi->controller_state = cs;
198 /* per-word shift register access, in hardware or bitbanging */
199 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
203 retval = bitbang->setup_transfer(spi, NULL);
207 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
209 /* NOTE we _need_ to call chipselect() early, ideally with adapter
210 * setup, unless the hardware defaults cooperate to avoid confusion
211 * between normal (active low) and inverted chipselects.
214 /* deselect chip (low or high) */
215 spin_lock_irqsave(&bitbang->lock, flags);
216 if (!bitbang->busy) {
217 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
220 spin_unlock_irqrestore(&bitbang->lock, flags);
224 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
227 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
229 void spi_bitbang_cleanup(struct spi_device *spi)
231 kfree(spi->controller_state);
233 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
235 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
237 struct spi_bitbang_cs *cs = spi->controller_state;
238 unsigned nsecs = cs->nsecs;
240 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
243 /*----------------------------------------------------------------------*/
246 * SECOND PART ... simple transfer queue runner.
248 * This costs a task context per controller, running the queue by
249 * performing each transfer in sequence. Smarter hardware can queue
250 * several DMA transfers at once, and process several controller queues
251 * in parallel; this driver doesn't match such hardware very well.
253 * Drivers can provide word-at-a-time i/o primitives, or provide
254 * transfer-at-a-time ones to leverage dma or fifo hardware.
256 static void bitbang_work(struct work_struct *work)
258 struct spi_bitbang *bitbang =
259 container_of(work, struct spi_bitbang, work);
262 int (*setup_transfer)(struct spi_device *,
263 struct spi_transfer *);
265 setup_transfer = bitbang->setup_transfer;
267 spin_lock_irqsave(&bitbang->lock, flags);
269 while (!list_empty(&bitbang->queue)) {
270 struct spi_message *m;
271 struct spi_device *spi;
273 struct spi_transfer *t = NULL;
278 m = container_of(bitbang->queue.next, struct spi_message,
280 list_del_init(&m->queue);
281 spin_unlock_irqrestore(&bitbang->lock, flags);
283 /* FIXME this is made-up ... the correct value is known to
284 * word-at-a-time bitbang code, and presumably chipselect()
285 * should enforce these requirements too?
294 list_for_each_entry (t, &m->transfers, transfer_list) {
296 /* override speed or wordsize? */
297 if (t->speed_hz || t->bits_per_word)
300 /* init (-1) or override (1) transfer params */
302 if (!setup_transfer) {
303 status = -ENOPROTOOPT;
306 status = setup_transfer(spi, t);
311 /* set up default clock polarity, and activate chip;
312 * this implicitly updates clock and spi modes as
313 * previously recorded for this device via setup().
314 * (and also deselects any other chip that might be
318 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
321 cs_change = t->cs_change;
322 if (!t->tx_buf && !t->rx_buf && t->len) {
327 /* transfer data. the lower level code handles any
328 * new dma mappings it needs. our caller always gave
329 * us dma-safe buffers.
332 /* REVISIT dma API still needs a designated
333 * DMA_ADDR_INVALID; ~0 might be better.
335 if (!m->is_dma_mapped)
336 t->rx_dma = t->tx_dma = 0;
337 status = bitbang->txrx_bufs(spi, t);
340 m->actual_length += status;
341 if (status != t->len) {
342 /* always report some kind of error */
349 /* protocol tweaks before next transfer */
351 udelay(t->delay_usecs);
355 if (t->transfer_list.next == &m->transfers)
358 /* sometimes a short mid-message deselect of the chip
359 * may be needed to terminate a mode or command
362 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
367 m->complete(m->context);
369 /* restore speed and wordsize if it was overridden */
371 setup_transfer(spi, NULL);
374 /* normally deactivate chipselect ... unless no error and
375 * cs_change has hinted that the next message will probably
376 * be for this chip too.
378 if (!(status == 0 && cs_change)) {
380 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
384 spin_lock_irqsave(&bitbang->lock, flags);
387 spin_unlock_irqrestore(&bitbang->lock, flags);
391 * spi_bitbang_transfer - default submit to transfer queue
393 int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
395 struct spi_bitbang *bitbang;
399 m->actual_length = 0;
400 m->status = -EINPROGRESS;
402 bitbang = spi_master_get_devdata(spi->master);
404 spin_lock_irqsave(&bitbang->lock, flags);
405 if (!spi->max_speed_hz)
408 list_add_tail(&m->queue, &bitbang->queue);
409 queue_work(bitbang->workqueue, &bitbang->work);
411 spin_unlock_irqrestore(&bitbang->lock, flags);
415 EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
417 /*----------------------------------------------------------------------*/
420 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
421 * @bitbang: driver handle
423 * Caller should have zero-initialized all parts of the structure, and then
424 * provided callbacks for chip selection and I/O loops. If the master has
425 * a transfer method, its final step should call spi_bitbang_transfer; or,
426 * that's the default if the transfer routine is not initialized. It should
427 * also set up the bus number and number of chipselects.
429 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
430 * hardware that basically exposes a shift register) or per-spi_transfer
431 * (which takes better advantage of hardware like fifos or DMA engines).
433 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
434 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
435 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
436 * routine isn't initialized.
438 * This routine registers the spi_master, which will process requests in a
439 * dedicated task, keeping IRQs unblocked most of the time. To stop
440 * processing those requests, call spi_bitbang_stop().
442 int spi_bitbang_start(struct spi_bitbang *bitbang)
446 if (!bitbang->master || !bitbang->chipselect)
449 INIT_WORK(&bitbang->work, bitbang_work);
450 spin_lock_init(&bitbang->lock);
451 INIT_LIST_HEAD(&bitbang->queue);
453 if (!bitbang->master->mode_bits)
454 bitbang->master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
456 if (!bitbang->master->transfer)
457 bitbang->master->transfer = spi_bitbang_transfer;
458 if (!bitbang->txrx_bufs) {
459 bitbang->use_dma = 0;
460 bitbang->txrx_bufs = spi_bitbang_bufs;
461 if (!bitbang->master->setup) {
462 if (!bitbang->setup_transfer)
463 bitbang->setup_transfer =
464 spi_bitbang_setup_transfer;
465 bitbang->master->setup = spi_bitbang_setup;
466 bitbang->master->cleanup = spi_bitbang_cleanup;
468 } else if (!bitbang->master->setup)
471 /* this task is the only thing to touch the SPI bits */
473 bitbang->workqueue = create_singlethread_workqueue(
474 dev_name(bitbang->master->dev.parent));
475 if (bitbang->workqueue == NULL) {
480 /* driver may get busy before register() returns, especially
481 * if someone registered boardinfo for devices
483 status = spi_register_master(bitbang->master);
490 destroy_workqueue(bitbang->workqueue);
494 EXPORT_SYMBOL_GPL(spi_bitbang_start);
497 * spi_bitbang_stop - stops the task providing spi communication
499 int spi_bitbang_stop(struct spi_bitbang *bitbang)
501 spi_unregister_master(bitbang->master);
503 WARN_ON(!list_empty(&bitbang->queue));
505 destroy_workqueue(bitbang->workqueue);
509 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
511 MODULE_LICENSE("GPL");