2 * Freescale SPI/eSPI controller driver library.
4 * Maintainer: Kumar Gala
6 * Copyright (C) 2006 Polycom, Inc.
8 * CPM SPI and QE buffer descriptors mode support:
9 * Copyright (c) 2009 MontaVista Software, Inc.
10 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
12 * Copyright 2010 Freescale Semiconductor, Inc.
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
19 #include <linux/kernel.h>
20 #include <linux/interrupt.h>
21 #include <linux/fsl_devices.h>
22 #include <linux/dma-mapping.h>
24 #include <linux/of_platform.h>
25 #include <linux/of_spi.h>
26 #include <sysdev/fsl_soc.h>
28 #include "spi_fsl_lib.h"
30 #define MPC8XXX_SPI_RX_BUF(type) \
31 void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
33 type *rx = mpc8xxx_spi->rx; \
34 *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
35 mpc8xxx_spi->rx = rx; \
38 #define MPC8XXX_SPI_TX_BUF(type) \
39 u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
42 const type *tx = mpc8xxx_spi->tx; \
45 data = *tx++ << mpc8xxx_spi->tx_shift; \
46 mpc8xxx_spi->tx = tx; \
50 MPC8XXX_SPI_RX_BUF(u8)
51 MPC8XXX_SPI_RX_BUF(u16)
52 MPC8XXX_SPI_RX_BUF(u32)
53 MPC8XXX_SPI_TX_BUF(u8)
54 MPC8XXX_SPI_TX_BUF(u16)
55 MPC8XXX_SPI_TX_BUF(u32)
57 struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata)
59 return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
62 void mpc8xxx_spi_work(struct work_struct *work)
64 struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
67 spin_lock_irq(&mpc8xxx_spi->lock);
68 while (!list_empty(&mpc8xxx_spi->queue)) {
69 struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
70 struct spi_message, queue);
72 list_del_init(&m->queue);
73 spin_unlock_irq(&mpc8xxx_spi->lock);
75 if (mpc8xxx_spi->spi_do_one_msg)
76 mpc8xxx_spi->spi_do_one_msg(m);
78 spin_lock_irq(&mpc8xxx_spi->lock);
80 spin_unlock_irq(&mpc8xxx_spi->lock);
83 int mpc8xxx_spi_transfer(struct spi_device *spi,
84 struct spi_message *m)
86 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
90 m->status = -EINPROGRESS;
92 spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
93 list_add_tail(&m->queue, &mpc8xxx_spi->queue);
94 queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
95 spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);
100 void mpc8xxx_spi_cleanup(struct spi_device *spi)
102 kfree(spi->controller_state);
105 const char *mpc8xxx_spi_strmode(unsigned int flags)
107 if (flags & SPI_QE_CPU_MODE) {
109 } else if (flags & SPI_CPM_MODE) {
112 else if (flags & SPI_CPM2)
120 int mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
123 struct fsl_spi_platform_data *pdata = dev->platform_data;
124 struct spi_master *master;
125 struct mpc8xxx_spi *mpc8xxx_spi;
128 master = dev_get_drvdata(dev);
130 /* the spi->mode bits understood by this driver: */
131 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
132 | SPI_LSB_FIRST | SPI_LOOP;
134 master->transfer = mpc8xxx_spi_transfer;
135 master->cleanup = mpc8xxx_spi_cleanup;
136 master->dev.of_node = dev->of_node;
138 mpc8xxx_spi = spi_master_get_devdata(master);
139 mpc8xxx_spi->dev = dev;
140 mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
141 mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
142 mpc8xxx_spi->flags = pdata->flags;
143 mpc8xxx_spi->spibrg = pdata->sysclk;
144 mpc8xxx_spi->irq = irq;
146 mpc8xxx_spi->rx_shift = 0;
147 mpc8xxx_spi->tx_shift = 0;
149 init_completion(&mpc8xxx_spi->done);
151 master->bus_num = pdata->bus_num;
152 master->num_chipselect = pdata->max_chipselect;
154 spin_lock_init(&mpc8xxx_spi->lock);
155 init_completion(&mpc8xxx_spi->done);
156 INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
157 INIT_LIST_HEAD(&mpc8xxx_spi->queue);
159 mpc8xxx_spi->workqueue = create_singlethread_workqueue(
160 dev_name(master->dev.parent));
161 if (mpc8xxx_spi->workqueue == NULL) {
172 int __devexit mpc8xxx_spi_remove(struct device *dev)
174 struct mpc8xxx_spi *mpc8xxx_spi;
175 struct spi_master *master;
177 master = dev_get_drvdata(dev);
178 mpc8xxx_spi = spi_master_get_devdata(master);
180 flush_workqueue(mpc8xxx_spi->workqueue);
181 destroy_workqueue(mpc8xxx_spi->workqueue);
182 spi_unregister_master(master);
184 free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
186 if (mpc8xxx_spi->spi_remove)
187 mpc8xxx_spi->spi_remove(mpc8xxx_spi);
192 int __devinit of_mpc8xxx_spi_probe(struct platform_device *ofdev,
193 const struct of_device_id *ofid)
195 struct device *dev = &ofdev->dev;
196 struct device_node *np = ofdev->dev.of_node;
197 struct mpc8xxx_spi_probe_info *pinfo;
198 struct fsl_spi_platform_data *pdata;
202 pinfo = kzalloc(sizeof(*pinfo), GFP_KERNEL);
206 pdata = &pinfo->pdata;
207 dev->platform_data = pdata;
209 /* Allocate bus num dynamically. */
212 /* SPI controller is either clocked from QE or SoC clock. */
213 pdata->sysclk = get_brgfreq();
214 if (pdata->sysclk == -1) {
215 pdata->sysclk = fsl_get_sys_freq();
216 if (pdata->sysclk == -1) {
222 prop = of_get_property(np, "mode", NULL);
223 if (prop && !strcmp(prop, "cpu-qe"))
224 pdata->flags = SPI_QE_CPU_MODE;
225 else if (prop && !strcmp(prop, "qe"))
226 pdata->flags = SPI_CPM_MODE | SPI_QE;
227 else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
228 pdata->flags = SPI_CPM_MODE | SPI_CPM2;
229 else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
230 pdata->flags = SPI_CPM_MODE | SPI_CPM1;