1 /***********************************
3 ************************************/
7 #define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
10 typedef struct _LIST_ENTRY{
11 struct _LIST_ENTRY *next;
12 struct _LIST_ENTRY *prev;
13 } LIST_ENTRY, *PLIST_ENTRY;
15 typedef struct _BCM_LIST_ENTRY {
19 } BCM_LIST_ENTRY, *PBCM_LIST_ENTRY;
21 typedef enum _RCB_STATUS
25 } RCB_STATUS, *PRCB_STATUS;
32 // The network packet that this RCB is receiving
34 // Describes the length of the packet .
35 UINT ui_packet_length;
36 // Pointer to the first buffer in the packet (only one buffer for Rx)
40 } __attribute__((packed));
41 typedef struct _BCM_CB BCM_CB,*PBCM_CB;
43 typedef BCM_CB BCM_RCB, *PBCM_RCB;
44 typedef BCM_CB BCM_TCB, *PBCM_TCB;
52 }__attribute__((packed));
53 typedef struct _LEADER LEADER,*PLEADER;
59 }__attribute__((packed));
60 typedef struct _PACKETTOSEND PACKETTOSEND, *PPACKETTOSEND;
63 struct _CONTROL_PACKET
67 struct _CONTROL_PACKET* next;
68 }__attribute__((packed));
69 typedef struct _CONTROL_PACKET CONTROL_PACKET,*PCONTROL_PACKET;
76 }__attribute__((packed));
77 typedef struct link_request LINK_REQUEST, *PLINK_REQUEST;
80 //classification extension is added
81 typedef struct _ADD_CONNECTION
83 ULONG SrcIpAddressCount;
84 ULONG SrcIpAddress[MAX_CONNECTIONS];
85 ULONG SrcIpMask[MAX_CONNECTIONS];
87 ULONG DestIpAddressCount;
88 ULONG DestIpAddress[MAX_CONNECTIONS];
89 ULONG DestIpMask[MAX_CONNECTIONS];
99 } ADD_CONNECTION,*PADD_CONNECTION;
102 typedef struct _CLASSIFICATION_RULE
104 UCHAR ucIPSrcAddrLen;
105 UCHAR ucIPSrcAddr[32];
106 UCHAR ucIPDestAddrLen;
107 UCHAR ucIPDestAddr[32];
108 UCHAR ucSrcPortRangeLen;
109 UCHAR ucSrcPortRange[4];
110 UCHAR ucDestPortRangeLen;
111 UCHAR ucDestPortRange[4];
113 } CLASSIFICATION_RULE,*PCLASSIFICATION_RULE;
115 typedef struct _CLASSIFICATION_ONLY
123 UCHAR ucDestinationAddress[16];
124 } CLASSIFICATION_ONLY, *PCLASSIFICATION_ONLY;
127 #define MAX_IP_RANGE_LENGTH 4
128 #define MAX_PORT_RANGE 4
129 #define MAX_PROTOCOL_LENGTH 32
130 #define IPV6_ADDRESS_SIZEINBYTES 0x10
132 typedef union _U_IP_ADDRESS
136 ULONG ulIpv4Addr[MAX_IP_RANGE_LENGTH];//Source Ip Address Range
137 ULONG ulIpv4Mask[MAX_IP_RANGE_LENGTH];//Source Ip Mask Address Range
141 ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4];//Source Ip Address Range
142 ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4];//Source Ip Mask Address Range
147 UCHAR ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
148 UCHAR ucIpv4Mask[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
152 UCHAR ucIpv6Address[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
153 UCHAR ucIpv6Mask[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
158 typedef struct _S_HDR_SUPRESSION_CONTEXTINFO
161 UCHAR ucaHdrSupressionInBuf[MAX_PHS_LENGTHS]; //Intermediate buffer to accumulate pkt Header for PHS
162 UCHAR ucaHdrSupressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN]; //Intermediate buffer containing pkt Header after PHS
164 }S_HDR_SUPRESSION_CONTEXTINFO;
167 typedef struct _S_CLASSIFIER_RULE
171 B_UINT16 uiClassifierRuleIndex;
174 B_UINT8 u8ClassifierRulePriority; //This field detemines the Classifier Priority
175 U_IP_ADDRESS stSrcIpAddress;
176 UCHAR ucIPSourceAddressLength;//Ip Source Address Length
178 U_IP_ADDRESS stDestIpAddress;
179 UCHAR ucIPDestinationAddressLength;//Ip Destination Address Length
180 UCHAR ucIPTypeOfServiceLength;//Type of service Length
181 UCHAR ucTosLow;//Tos Low
182 UCHAR ucTosHigh;//Tos High
183 UCHAR ucTosMask;//Tos Mask
185 UCHAR ucProtocolLength;//protocol Length
186 UCHAR ucProtocol[MAX_PROTOCOL_LENGTH];//protocol Length
187 USHORT usSrcPortRangeLo[MAX_PORT_RANGE];
188 USHORT usSrcPortRangeHi[MAX_PORT_RANGE];
189 UCHAR ucSrcPortRangeLength;
191 USHORT usDestPortRangeLo[MAX_PORT_RANGE];
192 USHORT usDestPortRangeHi[MAX_PORT_RANGE];
193 UCHAR ucDestPortRangeLength;
195 BOOLEAN bProtocolValid;
197 BOOLEAN bDestIpValid;
200 //For IPv6 Addressing
202 BOOLEAN bIpv6Protocol;
205 UCHAR u8AssociatedPHSI;
207 //Classification fields for ETH CS
208 UCHAR ucEthCSSrcMACLen;
209 UCHAR au8EThCSSrcMAC[MAC_ADDRESS_SIZE];
210 UCHAR au8EThCSSrcMACMask[MAC_ADDRESS_SIZE];
211 UCHAR ucEthCSDestMACLen;
212 UCHAR au8EThCSDestMAC[MAC_ADDRESS_SIZE];
213 UCHAR au8EThCSDestMACMask[MAC_ADDRESS_SIZE];
214 UCHAR ucEtherTypeLen;
215 UCHAR au8EthCSEtherType[NUM_ETHERTYPE_BYTES];
216 UCHAR usUserPriority[2];
218 USHORT usValidityBitMap;
220 //typedef struct _S_CLASSIFIER_RULE S_CLASSIFIER_RULE;
222 typedef struct _S_FRAGMENTED_PACKET_INFO
225 ULONG ulSrcIpAddress;
226 USHORT usIpIdentification;
227 S_CLASSIFIER_RULE *pstMatchedClassifierEntry;
228 BOOLEAN bOutOfOrderFragment;
229 }S_FRAGMENTED_PACKET_INFO,*PS_FRAGMENTED_PACKET_INFO;
233 //classification extension Rule
237 // This field determines the priority of the SF Queues
238 B_UINT8 u8TrafficPriority;
242 BOOLEAN bActivateRequestSent;
244 B_UINT8 u8QueueType;//BE or rtPS
246 UINT uiMaxBucketSize;//maximum size of the bucket for the queue
247 UINT uiCurrentQueueDepthOnTarget;
248 UINT uiCurrentBytesOnHost;
249 UINT uiCurrentPacketsOnHost;
250 UINT uiDroppedCountBytes;
251 UINT uiDroppedCountPackets;
254 UINT uiCurrentDrainRate;
255 UINT uiThisPeriodSentBytes;
256 LARGE_INTEGER liDrainCalculated;
257 UINT uiCurrentTokenCount;
258 LARGE_INTEGER liLastUpdateTokenAt;
259 UINT uiMaxAllowedRate;
260 UINT NumOfPacketsSent;
263 S_MIBS_EXTSERVICEFLOW_PARAMETERS stMibsExtServiceFlowTable;
264 UINT uiCurrentRxRate;
265 UINT uiThisPeriodRxBytes;
275 struct sk_buff* FirstTxQueue;
276 struct sk_buff* LastTxQueue;
280 struct sk_buff* ControlHead;
281 struct sk_buff* ControlTail;
284 BOOLEAN bProtocolValid;
286 BOOLEAN bDestIpValid;
290 BOOLEAN bAdmittedSet;
291 BOOLEAN bAuthorizedSet;
292 BOOLEAN bClassifierPriority;
293 UCHAR ucServiceClassName[MAX_CLASS_NAME_LENGTH];
294 BOOLEAN bHeaderSuppressionEnabled;
295 spinlock_t SFQueueLock;
296 void *pstSFIndication;
297 struct timeval stLastUpdateTokenAt;
298 atomic_t uiPerSFTxResourceCount;
303 typedef struct _packet_info PacketInfo;
306 typedef struct _PER_TARANG_DATA
308 struct _PER_TARANG_DATA * next;
309 struct _MINI_ADAPTER * Adapter;
310 struct sk_buff* RxAppControlHead;
311 struct sk_buff* RxAppControlTail;
312 volatile INT AppCtrlQueueLen;
313 BOOLEAN MacTracingEnabled;
314 BOOLEAN bApplicationToExit;
315 S_MIBS_DROPPED_APP_CNTRL_MESSAGES stDroppedAppCntrlMsgs;
316 ULONG RxCntrlMsgBitMask;
317 } PER_TARANG_DATA, *PPER_TARANG_DATA;
321 typedef struct _TARGET_PARAMS
323 B_UINT32 m_u32CfgVersion;
325 // Scanning Related Params
326 B_UINT32 m_u32CenterFrequency;
327 B_UINT32 m_u32BandAScan;
328 B_UINT32 m_u32BandBScan;
329 B_UINT32 m_u32BandCScan;
332 B_UINT32 m_u32minGrantsize; // size of minimum grant is 0 or 6
333 B_UINT32 m_u32PHSEnable;
336 B_UINT32 m_u32HoEnable;
337 B_UINT32 m_u32HoReserved1;
338 B_UINT32 m_u32HoReserved2;
340 // Power Control Params
341 B_UINT32 m_u32MimoEnable;
342 B_UINT32 m_u32SecurityEnable;
344 * bit 1: 1 Idlemode enable;
345 * bit 2: 1 Sleepmode Enable
347 B_UINT32 m_u32PowerSavingModesEnable;
348 /* PowerSaving Mode Options:
349 bit 0 = 1: CPE mode - to keep pcmcia if alive;
350 bit 1 = 1: CINR reporing in Idlemode Msg
351 bit 2 = 1: Default PSC Enable in sleepmode*/
352 B_UINT32 m_u32PowerSavingModeOptions;
354 B_UINT32 m_u32ArqEnable;
356 // From Version #3, the HARQ section renamed as general
357 B_UINT32 m_u32HarqEnable;
358 // EEPROM Param Location
359 B_UINT32 m_u32EEPROMFlag;
360 /* BINARY TYPE - 4th MSByte:
361 * Interface Type - 3rd MSByte:
362 * Vendor Type - 2nd MSByte
365 B_UINT32 m_u32Customize;
366 B_UINT32 m_u32ConfigBW; /* In Hz */
367 B_UINT32 m_u32ShutDownTimer;
370 B_UINT32 m_u32RadioParameter;
371 B_UINT32 m_u32PhyParameter1;
372 B_UINT32 m_u32PhyParameter2;
373 B_UINT32 m_u32PhyParameter3;
375 /* in eval mode only;
376 * lower 16bits = basic cid for testing;
377 * then bit 16 is test cqich,
378 * bit 17 test init rang;
379 * bit 18 test periodic rang
380 * bit 19 is test harq ack/nack
382 B_UINT32 m_u32TestOptions;
384 B_UINT32 m_u32MaxMACDataperDLFrame;
385 B_UINT32 m_u32MaxMACDataperULFrame;
387 B_UINT32 m_u32Corr2MacFlags;
389 //adding driver params.
390 B_UINT32 HostDrvrConfig1;
391 B_UINT32 HostDrvrConfig2;
392 B_UINT32 HostDrvrConfig3;
393 B_UINT32 HostDrvrConfig4;
394 B_UINT32 HostDrvrConfig5;
395 B_UINT32 HostDrvrConfig6;
396 B_UINT32 m_u32SegmentedPUSCenable;
398 // BAMC enable - but 4.x does not support this feature
399 // This is added just to sync 4.x and 5.x CFGs
400 B_UINT32 m_u32BandAMCEnable;
401 } STARGETPARAMS, *PSTARGETPARAMS;
404 typedef struct _STTARGETDSXBUFFER
406 ULONG ulTargetDsxBuffer;
409 }STTARGETDSXBUFFER, *PSTTARGETDSXBUFFER;
411 typedef INT (*FP_FLASH_WRITE)(struct _MINI_ADAPTER*,UINT,PVOID);
413 typedef INT (*FP_FLASH_WRITE_STATUS)(struct _MINI_ADAPTER*,UINT,PVOID);
416 Driver adapter data structure
420 struct _MINI_ADAPTER *next;
423 atomic_t ApplicationRunning;
424 volatile INT CtrlQueueLen;
425 atomic_t AppCtrlQueueLen;
426 BOOLEAN AppCtrlQueueOverFlow;
427 atomic_t CurrentApplicationCount;
428 atomic_t RegisteredApplicationCount;
430 ULONG StatisticsPointer;
431 struct sk_buff *RxControlHead;
432 struct sk_buff *RxControlTail;
433 // spinlock_t RxControlQueuelock;
434 struct semaphore RxAppControlQueuelock;
435 struct semaphore fw_download_sema;
437 PPER_TARANG_DATA pTarangs;
438 spinlock_t control_queue_lock;
439 wait_queue_head_t process_read_wait_queue;
440 ULONG bcm_jiffies; /* Store Jiffies value */
442 // the pointer to the first packet we have queued in send
443 // deserialized miniport support variables
444 atomic_t TotalPacketCount;
447 // this to keep track of the Tx and Rx MailBox Registers.
448 atomic_t CurrNumFreeTxDesc;
449 // to keep track the no of byte recieved
450 atomic_t RxRollOverCount;
451 USHORT PrevNumRecvDescs;
452 USHORT CurrNumRecvDescs;
453 atomic_t GoodRxByteCount;
454 atomic_t GoodRxPktCount;
455 atomic_t BadRxByteCount;
456 atomic_t RxPacketDroppedCount;
457 atomic_t GoodTxByteCount;
458 atomic_t TxTotalPacketCount;
459 atomic_t TxDroppedPacketCount;
461 BOOLEAN TransferMode;
463 PacketInfo PackInfo[NO_OF_QUEUES];
464 S_CLASSIFIER_RULE astClassifierTable[MAX_CLASSIFIERS];
466 /*************** qos ******************/
470 ULONG rtPSBucketSize;
475 struct net_device *dev;
478 wait_queue_head_t tx_packet_wait_queue;
479 wait_queue_head_t process_rx_cntrlpkt;
480 atomic_t process_waiting;
481 BOOLEAN fw_download_done;
483 unsigned int ctrlpkt_present;
484 BOOLEAN packets_given_to_all;
485 char *txctlpacket[MAX_CNTRL_PKTS];
486 atomic_t cntrlpktCnt ;
487 atomic_t index_app_read_cntrlpkt;
488 atomic_t index_wr_txcntrlpkt;
489 atomic_t index_rd_txcntrlpkt;
491 struct semaphore rdmwrmsync;
493 STTARGETDSXBUFFER astTargetDsxBuffer[MAX_TARGET_DSX_BUFFERS];
494 ULONG ulFreeTargetBufferCnt;
495 ULONG ulCurrentTargetBuffer;
496 ULONG ulTotalTargetBuffersAvailable;
497 unsigned int timeout;
499 unsigned long chip_id;
500 unsigned int bFlashBoot;
501 // spinlock_t sleeper_lock;
502 atomic_t rdm_wrm_access;
503 atomic_t tx_rx_access;
504 wait_queue_head_t lowpower_mode_wait_queue;
505 atomic_t bAbortedByHost;
506 BOOLEAN bBinDownloaded;
507 BOOLEAN bCfgDownloaded;
508 USHORT usBestEffortQueueIndex;
509 BOOLEAN bSyncUpRequestSent;
510 // struct semaphore data_packet_queue_lock;
511 wait_queue_head_t ioctl_fw_dnld_wait_queue;
512 BOOLEAN waiting_to_fw_download_done;
513 pid_t fw_download_process_pid;
514 PSTARGETPARAMS pstargetparams;
515 BOOLEAN device_removed;
516 BOOLEAN DeviceAccess;
518 BOOLEAN bDDRInitDone;
519 ULONG ulPowerSaveMode;
520 BOOLEAN bIsAutoCorrectEnabled;
521 spinlock_t txtransmitlock;
522 B_UINT8 txtransmit_running;
523 /* Thread for control packet handling */
524 struct task_struct *control_packet_handler;
525 /* thread for transmitting packets. */
526 struct task_struct *transmit_packet_thread;
528 /* LED Related Structures */
529 LED_INFO_STRUCT LEDInfo;
531 /* Driver State for LED Blinking */
532 LedEventInfo_t DriverState;
533 /* Interface Specific */
534 PVOID pvInterfaceAdapter;
535 int (*bcm_file_download)( PVOID,
538 int (*bcm_file_readback_from_chip)( PVOID,
541 INT (*interface_rdm)(PVOID,
545 INT (*interface_wrm)(PVOID,
549 int (*interface_transmit)(PVOID, PVOID , UINT);
551 BOOLEAN bDregRequestSentInIdleMode;
552 BOOLEAN bTriedToWakeUpFromlowPowerMode;
554 BOOLEAN bWakeUpDevice;
555 unsigned int usIdleModePattern;
556 //BOOLEAN bTriedToWakeUpFromShutdown;
557 BOOLEAN bLinkDownRequested;
558 unsigned int check_for_hang;
560 PHS_DEVICE_EXTENSION stBCMPhsContext;
561 S_HDR_SUPRESSION_CONTEXTINFO stPhsTxContextInfo;
562 uint8_t ucaPHSPktRestoreBuf[2048];
567 UINT32 aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
568 UINT32 aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
569 S_FRAGMENTED_PACKET_INFO astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
574 UINT uiSectorSizeInCFG;
575 BOOLEAN bSectorSizeOverride;
576 BOOLEAN bStatusWrite;
578 UINT uiVendorExtnFlag;
579 //it will always represent choosed DSD at any point of time.
580 // Generally it is Active DSD but in case of NVM RD/WR it might be different.
581 UINT ulFlashCalStart;
582 ULONG ulFlashControlSectionStart;
583 ULONG ulFlashWriteSize;
585 FP_FLASH_WRITE fpFlashWrite;
586 FP_FLASH_WRITE_STATUS fpFlashWriteWithStatusCheck;
589 struct semaphore NVMRdmWrmLock;
591 struct device *pstCreatedClassDevice;
592 BOOLEAN bUsbClassDriverRegistered;
593 // BOOLEAN InterfaceUpStatus;
594 PFLASH2X_CS_INFO psFlash2xCSInfo;
595 PFLASH_CS_INFO psFlashCSInfo ;
596 PFLASH2X_VENDORSPECIFIC_INFO psFlash2xVendorInfo;
597 UINT uiFlashBaseAdd; //Flash start address
598 UINT uiActiveISOOffset; //Active ISO offset choosen before f/w download
599 FLASH2X_SECTION_VAL eActiveISO; //Active ISO section val
600 FLASH2X_SECTION_VAL eActiveDSD; //Active DSD val choosen before f/w download
601 UINT uiActiveDSDOffsetAtFwDld; //For accessing Active DSD choosen before f/w download
602 UINT uiFlashLayoutMajorVersion ;
603 UINT uiFlashLayoutMinorVersion;
604 BOOLEAN bAllDSDWriteAllow ;
605 BOOLEAN bSigCorrupted ;
606 //this should be set who so ever want to change the Headers. after Wrtie it should be reset immediately.
607 BOOLEAN bHeaderChangeAllowed ;
609 BOOLEAN bEndPointHalted;
610 //while bFlashRawRead will be true, Driver ignore map lay out and consider flash as of without any map.
611 BOOLEAN bFlashRawRead;
612 BOOLEAN bPreparingForLowPowerMode ;
614 UINT syscfgBefFwDld ;
615 BOOLEAN StopAllXaction ;
616 UINT32 liTimeSinceLastNetEntry; //Used to Support extended CAPI requirements from
617 struct semaphore LowPowerModeSync;
618 ULONG liDrainCalculated;
621 S_BCM_DEBUG_STATE stDebugState;
624 typedef struct _MINI_ADAPTER MINI_ADAPTER, *PMINI_ADAPTER;
626 #define GET_BCM_ADAPTER(net_dev) netdev_priv(net_dev)
628 typedef struct _DEVICE_EXTENSION
630 PMINI_ADAPTER pAdapt;
631 }DEVICE_EXTENSION,*PDEVICE_EXTENSION;
634 struct _ETH_HEADER_STRUC {
635 UCHAR au8DestinationAddress[6];
636 UCHAR au8SourceAddress[6];
638 }__attribute__((packed));
639 typedef struct _ETH_HEADER_STRUC ETH_HEADER_STRUC, *PETH_HEADER_STRUC;
642 typedef struct FirmwareInfo
644 void __user * pvMappedFirmwareAddress;
645 ULONG u32FirmwareLength;
646 ULONG u32StartingAddress;
647 }__attribute__((packed)) FIRMWARE_INFO, *PFIRMWARE_INFO;
649 // holds the value of net_device structure..
650 extern struct net_device *gblpnetdev;
651 typedef struct _cntl_pkt{
652 PMINI_ADAPTER Adapter;
655 typedef LINK_REQUEST CONTROL_MESSAGE;
657 typedef struct _DDR_SETTING
661 }DDR_SETTING, *PDDR_SETTING;
662 typedef DDR_SETTING DDR_SET_NODE, *PDDR_SET_NODE;
664 InitAdapter(PMINI_ADAPTER psAdapter);
666 // =====================================================================
667 // Beceem vendor request codes for EP0
668 // =====================================================================
670 #define BCM_REQUEST_READ 0x2
671 #define BCM_REQUEST_WRITE 0x1
672 #define EP2_MPS_REG 0x0F0110A0
675 #define EP2_CFG_REG 0x0F0110A8
676 #define EP2_CFG_INT 0x27
677 #define EP2_CFG_BULK 0x25
679 #define EP4_MPS_REG 0x0F0110F0
682 #define EP4_CFG_REG 0x0F0110F8
684 #define ISO_MPS_REG 0x0F0110C8
685 #define ISO_MPS 0x00000000
696 typedef enum eInterface_setting
698 DEFAULT_SETTING_0 = 0,
699 ALTERNATE_SETTING_1 = 1,
702 #endif //__ADAPTER_H__