2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 #include <linux/types.h>
17 #include <linux/netdevice.h>
21 #include <sdio.h> /* SDIO Device and Protocol Specs */
22 #include <sdioh.h> /* SDIO Host Controller Specification */
23 #include <bcmsdbus.h> /* bcmsdh to/from specific controller APIs */
24 #include <sdiovar.h> /* ioctl/iovars */
26 #include <linux/mmc/core.h>
27 #include <linux/mmc/sdio_func.h>
28 #include <linux/mmc/sdio_ids.h>
29 #include <linux/suspend.h>
31 #include <dngl_stats.h>
34 #include "bcmsdh_sdmmc.h"
36 extern int sdio_function_init(void);
37 extern void sdio_function_cleanup(void);
39 #if !defined(OOB_INTR_ONLY)
40 static void IRQHandler(struct sdio_func *func);
41 static void IRQHandlerF2(struct sdio_func *func);
42 #endif /* !defined(OOB_INTR_ONLY) */
43 static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr);
44 extern int sdio_reset_comm(struct mmc_card *card);
46 extern PBCMSDH_SDMMC_INSTANCE gInstance;
48 uint sd_sdmode = SDIOH_MODE_SD4; /* Use SD4 mode by default */
49 uint sd_f2_blocksize = 512; /* Default blocksize */
51 uint sd_power = 1; /* Default to SD Slot powered ON */
52 uint sd_clock = 1; /* Default to SD Clock turned ON */
53 uint sd_hiok = false; /* Don't use hi-speed mode by default */
54 uint sd_msglevel = 0x01;
55 DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait);
56 DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait);
57 DHD_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait);
58 DHD_PM_RESUME_WAIT_INIT(sdioh_request_buffer_wait);
60 #define DMA_ALIGN_MASK 0x03
62 int sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr,
63 int regsize, u32 *data);
65 void sdioh_sdio_set_host_pm_flags(int flag)
67 if (sdio_set_host_pm_flags(gInstance->func[1], flag))
68 printk(KERN_ERR "%s: Failed to set pm_flags 0x%08x\n",\
69 __func__, (unsigned int)flag);
72 static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd)
78 sd_trace(("%s\n", __func__));
80 /* Get the Card's common CIS address */
81 sd->com_cis_ptr = sdioh_sdmmc_get_cisaddr(sd, SDIOD_CCCR_CISPTR_0);
82 sd->func_cis_ptr[0] = sd->com_cis_ptr;
83 sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__,
86 /* Get the Card's function CIS (for each function) */
87 for (fbraddr = SDIOD_FBR_STARTADDR, func = 1;
88 func <= sd->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) {
89 sd->func_cis_ptr[func] =
90 sdioh_sdmmc_get_cisaddr(sd, SDIOD_FBR_CISPTR_0 + fbraddr);
91 sd_info(("%s: Function %d CIS Ptr = 0x%x\n", __func__, func,
92 sd->func_cis_ptr[func]));
95 sd->func_cis_ptr[0] = sd->com_cis_ptr;
96 sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__,
99 /* Enable Function 1 */
100 sdio_claim_host(gInstance->func[1]);
101 err_ret = sdio_enable_func(gInstance->func[1]);
102 sdio_release_host(gInstance->func[1]);
104 sd_err(("bcmsdh_sdmmc: Failed to enable F1 Err: 0x%08x",
112 * Public entry points & extern's
114 sdioh_info_t *sdioh_attach(void *bar0, uint irq)
119 sd_trace(("%s\n", __func__));
121 if (gInstance == NULL) {
122 sd_err(("%s: SDIO Device not present\n", __func__));
126 sd = kzalloc(sizeof(sdioh_info_t), GFP_ATOMIC);
128 sd_err(("sdioh_attach: out of memory\n"));
131 if (sdioh_sdmmc_osinit(sd) != 0) {
132 sd_err(("%s:sdioh_sdmmc_osinit() failed\n", __func__));
138 sd->use_client_ints = true;
139 sd->client_block_size[0] = 64;
143 /* Claim host controller */
144 sdio_claim_host(gInstance->func[1]);
146 sd->client_block_size[1] = 64;
147 err_ret = sdio_set_block_size(gInstance->func[1], 64);
149 sd_err(("bcmsdh_sdmmc: Failed to set F1 blocksize\n"));
151 /* Release host controller F1 */
152 sdio_release_host(gInstance->func[1]);
154 if (gInstance->func[2]) {
155 /* Claim host controller F2 */
156 sdio_claim_host(gInstance->func[2]);
158 sd->client_block_size[2] = sd_f2_blocksize;
160 sdio_set_block_size(gInstance->func[2], sd_f2_blocksize);
162 sd_err(("bcmsdh_sdmmc: Failed to set F2 blocksize "
163 "to %d\n", sd_f2_blocksize));
165 /* Release host controller F2 */
166 sdio_release_host(gInstance->func[2]);
169 sdioh_sdmmc_card_enablefuncs(sd);
171 sd_trace(("%s: Done\n", __func__));
175 extern SDIOH_API_RC sdioh_detach(sdioh_info_t *sd)
177 sd_trace(("%s\n", __func__));
181 /* Disable Function 2 */
182 sdio_claim_host(gInstance->func[2]);
183 sdio_disable_func(gInstance->func[2]);
184 sdio_release_host(gInstance->func[2]);
186 /* Disable Function 1 */
187 sdio_claim_host(gInstance->func[1]);
188 sdio_disable_func(gInstance->func[1]);
189 sdio_release_host(gInstance->func[1]);
192 sdioh_sdmmc_osfree(sd);
196 return SDIOH_API_RC_SUCCESS;
199 #if defined(OOB_INTR_ONLY) && defined(HW_OOB)
201 extern SDIOH_API_RC sdioh_enable_func_intr(void)
206 if (gInstance->func[0]) {
207 sdio_claim_host(gInstance->func[0]);
209 reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err);
211 sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n",
213 sdio_release_host(gInstance->func[0]);
214 return SDIOH_API_RC_FAIL;
217 /* Enable F1 and F2 interrupts, set master enable */
219 (INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN |
222 sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err);
223 sdio_release_host(gInstance->func[0]);
226 sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n",
228 return SDIOH_API_RC_FAIL;
232 return SDIOH_API_RC_SUCCESS;
235 extern SDIOH_API_RC sdioh_disable_func_intr(void)
240 if (gInstance->func[0]) {
241 sdio_claim_host(gInstance->func[0]);
242 reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err);
244 sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n",
246 sdio_release_host(gInstance->func[0]);
247 return SDIOH_API_RC_FAIL;
250 reg &= ~(INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN);
251 /* Disable master interrupt with the last function interrupt */
254 sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err);
256 sdio_release_host(gInstance->func[0]);
258 sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n",
260 return SDIOH_API_RC_FAIL;
263 return SDIOH_API_RC_SUCCESS;
265 #endif /* defined(OOB_INTR_ONLY) && defined(HW_OOB) */
267 /* Configure callback to client when we receive client interrupt */
269 sdioh_interrupt_register(sdioh_info_t *sd, sdioh_cb_fn_t fn, void *argh)
271 sd_trace(("%s: Entering\n", __func__));
273 sd_err(("%s: interrupt handler is NULL, not registering\n",
275 return SDIOH_API_RC_FAIL;
277 #if !defined(OOB_INTR_ONLY)
278 sd->intr_handler = fn;
279 sd->intr_handler_arg = argh;
280 sd->intr_handler_valid = true;
282 /* register and unmask irq */
283 if (gInstance->func[2]) {
284 sdio_claim_host(gInstance->func[2]);
285 sdio_claim_irq(gInstance->func[2], IRQHandlerF2);
286 sdio_release_host(gInstance->func[2]);
289 if (gInstance->func[1]) {
290 sdio_claim_host(gInstance->func[1]);
291 sdio_claim_irq(gInstance->func[1], IRQHandler);
292 sdio_release_host(gInstance->func[1]);
294 #elif defined(HW_OOB)
295 sdioh_enable_func_intr();
296 #endif /* defined(OOB_INTR_ONLY) */
297 return SDIOH_API_RC_SUCCESS;
300 extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *sd)
302 sd_trace(("%s: Entering\n", __func__));
304 #if !defined(OOB_INTR_ONLY)
305 if (gInstance->func[1]) {
306 /* register and unmask irq */
307 sdio_claim_host(gInstance->func[1]);
308 sdio_release_irq(gInstance->func[1]);
309 sdio_release_host(gInstance->func[1]);
312 if (gInstance->func[2]) {
313 /* Claim host controller F2 */
314 sdio_claim_host(gInstance->func[2]);
315 sdio_release_irq(gInstance->func[2]);
316 /* Release host controller F2 */
317 sdio_release_host(gInstance->func[2]);
320 sd->intr_handler_valid = false;
321 sd->intr_handler = NULL;
322 sd->intr_handler_arg = NULL;
323 #elif defined(HW_OOB)
324 sdioh_disable_func_intr();
325 #endif /* !defined(OOB_INTR_ONLY) */
326 return SDIOH_API_RC_SUCCESS;
329 extern SDIOH_API_RC sdioh_interrupt_query(sdioh_info_t *sd, bool *onoff)
331 sd_trace(("%s: Entering\n", __func__));
332 *onoff = sd->client_intr_enabled;
333 return SDIOH_API_RC_SUCCESS;
336 #if defined(DHD_DEBUG)
337 extern bool sdioh_interrupt_pending(sdioh_info_t *sd)
343 uint sdioh_query_iofnum(sdioh_info_t *sd)
345 return sd->num_funcs;
363 const bcm_iovar_t sdioh_iovars[] = {
364 {"sd_msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0},
365 {"sd_blocksize", IOV_BLOCKSIZE, 0, IOVT_UINT32, 0},/* ((fn << 16) |
367 {"sd_ints", IOV_USEINTS, 0, IOVT_BOOL, 0},
368 {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0},
369 {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
371 {"sd_power", IOV_POWER, 0, IOVT_UINT32, 0}
373 {"sd_clock", IOV_CLOCK, 0, IOVT_UINT32, 0}
375 {"sd_mode", IOV_SDMODE, 0, IOVT_UINT32, 100}
377 {"sd_highspeed", IOV_HISPEED, 0, IOVT_UINT32, 0}
379 {"sd_rxchain", IOV_RXCHAIN, 0, IOVT_BOOL, 0}
385 sdioh_iovar_op(sdioh_info_t *si, const char *name,
386 void *params, int plen, void *arg, int len, bool set)
388 const bcm_iovar_t *vi = NULL;
398 /* Get must have return space; Set does not take qualifiers */
399 ASSERT(set || (arg && len));
400 ASSERT(!set || (!params && !plen));
402 sd_trace(("%s: Enter (%s %s)\n", __func__, (set ? "set" : "get"),
405 vi = bcm_iovar_lookup(sdioh_iovars, name);
407 bcmerror = -ENOTSUPP;
411 bcmerror = bcm_iovar_lencheck(vi, arg, len, set);
415 /* Set up params so get and set can share the convenience variables */
416 if (params == NULL) {
421 if (vi->type == IOVT_VOID)
423 else if (vi->type == IOVT_BUFFER)
426 val_size = sizeof(int);
428 if (plen >= (int)sizeof(int_val))
429 memcpy(&int_val, params, sizeof(int_val));
431 bool_val = (int_val != 0) ? true : false;
433 actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
435 case IOV_GVAL(IOV_MSGLEVEL):
436 int_val = (s32) sd_msglevel;
437 memcpy(arg, &int_val, val_size);
440 case IOV_SVAL(IOV_MSGLEVEL):
441 sd_msglevel = int_val;
444 case IOV_GVAL(IOV_BLOCKSIZE):
445 if ((u32) int_val > si->num_funcs) {
449 int_val = (s32) si->client_block_size[int_val];
450 memcpy(arg, &int_val, val_size);
453 case IOV_SVAL(IOV_BLOCKSIZE):
455 uint func = ((u32) int_val >> 16);
456 uint blksize = (u16) int_val;
459 if (func > si->num_funcs) {
469 maxsize = BLOCK_SIZE_4318;
472 maxsize = BLOCK_SIZE_4328;
477 if (blksize > maxsize) {
485 si->client_block_size[func] = blksize;
490 case IOV_GVAL(IOV_RXCHAIN):
492 memcpy(arg, &int_val, val_size);
495 case IOV_GVAL(IOV_USEINTS):
496 int_val = (s32) si->use_client_ints;
497 memcpy(arg, &int_val, val_size);
500 case IOV_SVAL(IOV_USEINTS):
501 si->use_client_ints = (bool) int_val;
502 if (si->use_client_ints)
503 si->intmask |= CLIENT_INTR;
505 si->intmask &= ~CLIENT_INTR;
509 case IOV_GVAL(IOV_POWER):
510 int_val = (u32) sd_power;
511 memcpy(arg, &int_val, val_size);
514 case IOV_SVAL(IOV_POWER):
518 case IOV_GVAL(IOV_CLOCK):
519 int_val = (u32) sd_clock;
520 memcpy(arg, &int_val, val_size);
523 case IOV_SVAL(IOV_CLOCK):
527 case IOV_GVAL(IOV_SDMODE):
528 int_val = (u32) sd_sdmode;
529 memcpy(arg, &int_val, val_size);
532 case IOV_SVAL(IOV_SDMODE):
536 case IOV_GVAL(IOV_HISPEED):
537 int_val = (u32) sd_hiok;
538 memcpy(arg, &int_val, val_size);
541 case IOV_SVAL(IOV_HISPEED):
545 case IOV_GVAL(IOV_NUMINTS):
546 int_val = (s32) si->intrcount;
547 memcpy(arg, &int_val, val_size);
550 case IOV_GVAL(IOV_DEVREG):
552 sdreg_t *sd_ptr = (sdreg_t *) params;
556 (si, sd_ptr->func, sd_ptr->offset, &data)) {
562 memcpy(arg, &int_val, sizeof(int_val));
566 case IOV_SVAL(IOV_DEVREG):
568 sdreg_t *sd_ptr = (sdreg_t *) params;
569 u8 data = (u8) sd_ptr->value;
572 (si, sd_ptr->func, sd_ptr->offset, &data)) {
580 bcmerror = -ENOTSUPP;
588 #if defined(OOB_INTR_ONLY) && defined(HW_OOB)
590 SDIOH_API_RC sdioh_enable_hw_oob_intr(sdioh_info_t *sd, bool enable)
596 data = 3; /* enable hw oob interrupt */
598 data = 4; /* disable hw oob interrupt */
599 data |= 4; /* Active HIGH */
601 status = sdioh_request_byte(sd, SDIOH_WRITE, 0, 0xf2, &data);
604 #endif /* defined(OOB_INTR_ONLY) && defined(HW_OOB) */
607 sdioh_cfg_read(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data)
610 /* No lock needed since sdioh_request_byte does locking */
611 status = sdioh_request_byte(sd, SDIOH_READ, fnc_num, addr, data);
616 sdioh_cfg_write(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data)
618 /* No lock needed since sdioh_request_byte does locking */
620 status = sdioh_request_byte(sd, SDIOH_WRITE, fnc_num, addr, data);
624 static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr)
626 /* read 24 bits and return valid 17 bit addr */
628 u32 scratch, regdata;
629 u8 *ptr = (u8 *)&scratch;
630 for (i = 0; i < 3; i++) {
631 if ((sdioh_sdmmc_card_regread(sd, 0, regaddr, 1, ®data)) !=
633 sd_err(("%s: Can't read!\n", __func__));
635 *ptr++ = (u8) regdata;
639 /* Only the lower 17-bits are valid */
640 scratch = le32_to_cpu(scratch);
641 scratch &= 0x0001FFFF;
646 sdioh_cis_read(sdioh_info_t *sd, uint func, u8 *cisd, u32 length)
653 sd_trace(("%s: Func = %d\n", __func__, func));
655 if (!sd->func_cis_ptr[func]) {
656 memset(cis, 0, length);
657 sd_err(("%s: no func_cis_ptr[%d]\n", __func__, func));
658 return SDIOH_API_RC_FAIL;
661 sd_err(("%s: func_cis_ptr[%d]=0x%04x\n", __func__, func,
662 sd->func_cis_ptr[func]));
664 for (count = 0; count < length; count++) {
665 offset = sd->func_cis_ptr[func] + count;
666 if (sdioh_sdmmc_card_regread(sd, 0, offset, 1, &foo) < 0) {
667 sd_err(("%s: regread failed: Can't read CIS\n",
669 return SDIOH_API_RC_FAIL;
672 *cis = (u8) (foo & 0xff);
676 return SDIOH_API_RC_SUCCESS;
680 sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr,
685 sd_info(("%s: rw=%d, func=%d, addr=0x%05x\n", __func__, rw, func,
688 DHD_PM_RESUME_WAIT(sdioh_request_byte_wait);
689 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
690 if (rw) { /* CMD52 Write */
692 /* Can only directly write to some F0 registers.
696 if (regaddr == SDIOD_CCCR_IOEN) {
697 if (gInstance->func[2]) {
698 sdio_claim_host(gInstance->func[2]);
699 if (*byte & SDIO_FUNC_ENABLE_2) {
700 /* Enable Function 2 */
703 (gInstance->func[2]);
705 sd_err(("bcmsdh_sdmmc: enable F2 failed:%d",
708 /* Disable Function 2 */
711 (gInstance->func[2]);
713 sd_err(("bcmsdh_sdmmc: Disab F2 failed:%d",
716 sdio_release_host(gInstance->func[2]);
719 #if defined(MMC_SDIO_ABORT)
720 /* to allow abort command through F1 */
721 else if (regaddr == SDIOD_CCCR_IOABORT) {
722 sdio_claim_host(gInstance->func[func]);
724 * this sdio_f0_writeb() can be replaced
726 * depending upon MMC driver change.
727 * As of this time, this is temporaray one
729 sdio_writeb(gInstance->func[func], *byte,
731 sdio_release_host(gInstance->func[func]);
733 #endif /* MMC_SDIO_ABORT */
734 else if (regaddr < 0xF0) {
735 sd_err(("bcmsdh_sdmmc: F0 Wr:0x%02x: write "
736 "disallowed\n", regaddr));
738 /* Claim host controller, perform F0 write,
740 sdio_claim_host(gInstance->func[func]);
741 sdio_f0_writeb(gInstance->func[func], *byte,
743 sdio_release_host(gInstance->func[func]);
746 /* Claim host controller, perform Fn write,
748 sdio_claim_host(gInstance->func[func]);
749 sdio_writeb(gInstance->func[func], *byte, regaddr,
751 sdio_release_host(gInstance->func[func]);
753 } else { /* CMD52 Read */
754 /* Claim host controller, perform Fn read, and release */
755 sdio_claim_host(gInstance->func[func]);
759 sdio_f0_readb(gInstance->func[func], regaddr,
763 sdio_readb(gInstance->func[func], regaddr,
767 sdio_release_host(gInstance->func[func]);
771 sd_err(("bcmsdh_sdmmc: Failed to %s byte F%d:@0x%05x=%02x, "
772 "Err: %d\n", rw ? "Write" : "Read", func, regaddr,
775 return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
779 sdioh_request_word(sdioh_info_t *sd, uint cmd_type, uint rw, uint func,
780 uint addr, u32 *word, uint nbytes)
782 int err_ret = SDIOH_API_RC_FAIL;
785 sd_err(("%s: Only CMD52 allowed to F0.\n", __func__));
786 return SDIOH_API_RC_FAIL;
789 sd_info(("%s: cmd_type=%d, rw=%d, func=%d, addr=0x%05x, nbytes=%d\n",
790 __func__, cmd_type, rw, func, addr, nbytes));
792 DHD_PM_RESUME_WAIT(sdioh_request_word_wait);
793 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
794 /* Claim host controller */
795 sdio_claim_host(gInstance->func[func]);
797 if (rw) { /* CMD52 Write */
799 sdio_writel(gInstance->func[func], *word, addr,
801 } else if (nbytes == 2) {
802 sdio_writew(gInstance->func[func], (*word & 0xFFFF),
805 sd_err(("%s: Invalid nbytes: %d\n", __func__, nbytes));
807 } else { /* CMD52 Read */
810 sdio_readl(gInstance->func[func], addr, &err_ret);
811 } else if (nbytes == 2) {
813 sdio_readw(gInstance->func[func], addr,
816 sd_err(("%s: Invalid nbytes: %d\n", __func__, nbytes));
820 /* Release host controller */
821 sdio_release_host(gInstance->func[func]);
824 sd_err(("bcmsdh_sdmmc: Failed to %s word, Err: 0x%08x",
825 rw ? "Write" : "Read", err_ret));
828 return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
832 sdioh_request_packet(sdioh_info_t *sd, uint fix_inc, uint write, uint func,
833 uint addr, struct sk_buff *pkt)
835 bool fifo = (fix_inc == SDIOH_DATA_FIX);
839 struct sk_buff *pnext;
841 sd_trace(("%s: Enter\n", __func__));
844 DHD_PM_RESUME_WAIT(sdioh_request_packet_wait);
845 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
847 /* Claim host controller */
848 sdio_claim_host(gInstance->func[func]);
849 for (pnext = pkt; pnext; pnext = pnext->next) {
850 uint pkt_len = pnext->len;
852 pkt_len &= 0xFFFFFFFC;
854 #ifdef CONFIG_MMC_MSM7X00A
855 if ((pkt_len % 64) == 32) {
856 sd_trace(("%s: Rounding up TX packet +=32\n",
860 #endif /* CONFIG_MMC_MSM7X00A */
861 /* Make sure the packet is aligned properly.
862 * If it isn't, then this
863 * is the fault of sdioh_request_buffer() which
864 * is supposed to give
865 * us something we can work with.
867 ASSERT(((u32) (pkt->data) & DMA_ALIGN_MASK) == 0);
869 if ((write) && (!fifo)) {
870 err_ret = sdio_memcpy_toio(gInstance->func[func], addr,
871 ((u8 *) (pnext->data)),
874 err_ret = sdio_memcpy_toio(gInstance->func[func], addr,
875 ((u8 *) (pnext->data)),
878 err_ret = sdio_readsb(gInstance->func[func],
879 ((u8 *) (pnext->data)),
882 err_ret = sdio_memcpy_fromio(gInstance->func[func],
883 ((u8 *) (pnext->data)),
888 sd_err(("%s: %s FAILED %p[%d], addr=0x%05x, pkt_len=%d,"
889 "ERR=0x%08x\n", __func__,
890 (write) ? "TX" : "RX",
891 pnext, SGCount, addr, pkt_len, err_ret));
893 sd_trace(("%s: %s xfr'd %p[%d], addr=0x%05x, len=%d\n",
895 (write) ? "TX" : "RX",
896 pnext, SGCount, addr, pkt_len));
905 /* Release host controller */
906 sdio_release_host(gInstance->func[func]);
908 sd_trace(("%s: Exit\n", __func__));
909 return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
913 * This function takes a buffer or packet, and fixes everything up
914 * so that in the end, a DMA-able packet is created.
916 * A buffer does not have an associated packet pointer,
917 * and may or may not be aligned.
918 * A packet may consist of a single packet, or a packet chain.
919 * If it is a packet chain, then all the packets in the chain
920 * must be properly aligned.
922 * If the packet data is not aligned, then there may only be
923 * one packet, and in this case, it is copied to a new
928 sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
929 uint func, uint addr, uint reg_width, uint buflen_u,
930 u8 *buffer, struct sk_buff *pkt)
933 struct sk_buff *mypkt = NULL;
935 sd_trace(("%s: Enter\n", __func__));
937 DHD_PM_RESUME_WAIT(sdioh_request_buffer_wait);
938 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
939 /* Case 1: we don't have a packet. */
941 sd_data(("%s: Creating new %s Packet, len=%d\n",
942 __func__, write ? "TX" : "RX", buflen_u));
943 mypkt = bcm_pkt_buf_get_skb(buflen_u);
945 sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n",
946 __func__, buflen_u));
947 return SDIOH_API_RC_FAIL;
950 /* For a write, copy the buffer data into the packet. */
952 memcpy(mypkt->data, buffer, buflen_u);
955 sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt);
957 /* For a read, copy the packet data back to the buffer. */
959 memcpy(buffer, mypkt->data, buflen_u);
961 bcm_pkt_buf_free_skb(mypkt);
962 } else if (((u32) (pkt->data) & DMA_ALIGN_MASK) != 0) {
963 /* Case 2: We have a packet, but it is unaligned. */
965 /* In this case, we cannot have a chain. */
966 ASSERT(pkt->next == NULL);
968 sd_data(("%s: Creating aligned %s Packet, len=%d\n",
969 __func__, write ? "TX" : "RX", pkt->len));
970 mypkt = bcm_pkt_buf_get_skb(pkt->len);
972 sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n",
973 __func__, pkt->len));
974 return SDIOH_API_RC_FAIL;
977 /* For a write, copy the buffer data into the packet. */
979 memcpy(mypkt->data, pkt->data, pkt->len);
982 sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt);
984 /* For a read, copy the packet data back to the buffer. */
986 memcpy(pkt->data, mypkt->data, mypkt->len);
988 bcm_pkt_buf_free_skb(mypkt);
989 } else { /* case 3: We have a packet and
991 sd_data(("%s: Aligned %s Packet, direct DMA\n",
992 __func__, write ? "Tx" : "Rx"));
994 sdioh_request_packet(sd, fix_inc, write, func, addr, pkt);
1000 /* this function performs "abort" for both of host & device */
1001 extern int sdioh_abort(sdioh_info_t *sd, uint func)
1003 #if defined(MMC_SDIO_ABORT)
1004 char t_func = (char)func;
1005 #endif /* defined(MMC_SDIO_ABORT) */
1006 sd_trace(("%s: Enter\n", __func__));
1008 #if defined(MMC_SDIO_ABORT)
1009 /* issue abort cmd52 command through F1 */
1010 sdioh_request_byte(sd, SD_IO_OP_WRITE, SDIO_FUNC_0, SDIOD_CCCR_IOABORT,
1012 #endif /* defined(MMC_SDIO_ABORT) */
1014 sd_trace(("%s: Exit\n", __func__));
1015 return SDIOH_API_RC_SUCCESS;
1018 /* Reset and re-initialize the device */
1019 int sdioh_sdio_reset(sdioh_info_t *si)
1021 sd_trace(("%s: Enter\n", __func__));
1022 sd_trace(("%s: Exit\n", __func__));
1023 return SDIOH_API_RC_SUCCESS;
1026 /* Disable device interrupt */
1027 void sdioh_sdmmc_devintr_off(sdioh_info_t *sd)
1029 sd_trace(("%s: %d\n", __func__, sd->use_client_ints));
1030 sd->intmask &= ~CLIENT_INTR;
1033 /* Enable device interrupt */
1034 void sdioh_sdmmc_devintr_on(sdioh_info_t *sd)
1036 sd_trace(("%s: %d\n", __func__, sd->use_client_ints));
1037 sd->intmask |= CLIENT_INTR;
1040 /* Read client card reg */
1042 sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr,
1043 int regsize, u32 *data)
1046 if ((func == 0) || (regsize == 1)) {
1049 sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp);
1052 sd_data(("%s: byte read data=0x%02x\n", __func__, *data));
1054 sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, data,
1059 sd_data(("%s: word read data=0x%08x\n", __func__, *data));
1065 #if !defined(OOB_INTR_ONLY)
1066 /* bcmsdh_sdmmc interrupt handler */
1067 static void IRQHandler(struct sdio_func *func)
1071 sd_trace(("bcmsdh_sdmmc: ***IRQHandler\n"));
1075 sdio_release_host(gInstance->func[0]);
1077 if (sd->use_client_ints) {
1079 ASSERT(sd->intr_handler);
1080 ASSERT(sd->intr_handler_arg);
1081 (sd->intr_handler) (sd->intr_handler_arg);
1083 sd_err(("bcmsdh_sdmmc: ***IRQHandler\n"));
1085 sd_err(("%s: Not ready for intr: enabled %d, handler %p\n",
1086 __func__, sd->client_intr_enabled, sd->intr_handler));
1089 sdio_claim_host(gInstance->func[0]);
1092 /* bcmsdh_sdmmc interrupt handler for F2 (dummy handler) */
1093 static void IRQHandlerF2(struct sdio_func *func)
1097 sd_trace(("bcmsdh_sdmmc: ***IRQHandlerF2\n"));
1103 #endif /* !defined(OOB_INTR_ONLY) */
1106 /* Write client card reg */
1108 sdioh_sdmmc_card_regwrite(sdioh_info_t *sd, int func, u32 regaddr,
1109 int regsize, u32 data)
1112 if ((func == 0) || (regsize == 1)) {
1116 sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp);
1117 sd_data(("%s: byte write data=0x%02x\n", __func__, data));
1122 sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, &data,
1125 sd_data(("%s: word write data=0x%08x\n", __func__, data));
1130 #endif /* NOTUSED */
1132 int sdioh_start(sdioh_info_t *si, int stage)
1137 int sdioh_stop(sdioh_info_t *si)