2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 #include <linux/types.h>
17 #include <linux/netdevice.h>
21 #include <sdio.h> /* SDIO Device and Protocol Specs */
22 #include <sdioh.h> /* SDIO Host Controller Specification */
23 #include <bcmsdbus.h> /* bcmsdh to/from specific controller APIs */
24 #include <sdiovar.h> /* ioctl/iovars */
26 #include <linux/mmc/core.h>
27 #include <linux/mmc/sdio_func.h>
28 #include <linux/mmc/sdio_ids.h>
29 #include <linux/suspend.h>
31 #include <dngl_stats.h>
34 #include "bcmsdh_sdmmc.h"
36 extern int sdio_function_init(void);
37 extern void sdio_function_cleanup(void);
39 #if !defined(OOB_INTR_ONLY)
40 static void IRQHandler(struct sdio_func *func);
41 static void IRQHandlerF2(struct sdio_func *func);
42 #endif /* !defined(OOB_INTR_ONLY) */
43 static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr);
44 extern int sdio_reset_comm(struct mmc_card *card);
46 extern PBCMSDH_SDMMC_INSTANCE gInstance;
48 uint sd_sdmode = SDIOH_MODE_SD4; /* Use SD4 mode by default */
49 uint sd_f2_blocksize = 512; /* Default blocksize */
51 uint sd_divisor = 2; /* Default 48MHz/2 = 24MHz */
53 uint sd_power = 1; /* Default to SD Slot powered ON */
54 uint sd_clock = 1; /* Default to SD Clock turned ON */
55 uint sd_hiok = false; /* Don't use hi-speed mode by default */
56 uint sd_msglevel = 0x01;
57 DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait);
58 DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait);
59 DHD_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait);
60 DHD_PM_RESUME_WAIT_INIT(sdioh_request_buffer_wait);
62 #define DMA_ALIGN_MASK 0x03
64 int sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr,
65 int regsize, u32 *data);
67 void sdioh_sdio_set_host_pm_flags(int flag)
69 if (sdio_set_host_pm_flags(gInstance->func[1], flag))
70 printk(KERN_ERR "%s: Failed to set pm_flags 0x%08x\n",\
71 __func__, (unsigned int)flag);
74 static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd)
80 sd_trace(("%s\n", __func__));
82 /* Get the Card's common CIS address */
83 sd->com_cis_ptr = sdioh_sdmmc_get_cisaddr(sd, SDIOD_CCCR_CISPTR_0);
84 sd->func_cis_ptr[0] = sd->com_cis_ptr;
85 sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__,
88 /* Get the Card's function CIS (for each function) */
89 for (fbraddr = SDIOD_FBR_STARTADDR, func = 1;
90 func <= sd->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) {
91 sd->func_cis_ptr[func] =
92 sdioh_sdmmc_get_cisaddr(sd, SDIOD_FBR_CISPTR_0 + fbraddr);
93 sd_info(("%s: Function %d CIS Ptr = 0x%x\n", __func__, func,
94 sd->func_cis_ptr[func]));
97 sd->func_cis_ptr[0] = sd->com_cis_ptr;
98 sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__,
101 /* Enable Function 1 */
102 sdio_claim_host(gInstance->func[1]);
103 err_ret = sdio_enable_func(gInstance->func[1]);
104 sdio_release_host(gInstance->func[1]);
106 sd_err(("bcmsdh_sdmmc: Failed to enable F1 Err: 0x%08x",
114 * Public entry points & extern's
116 sdioh_info_t *sdioh_attach(void *bar0, uint irq)
121 sd_trace(("%s\n", __func__));
123 if (gInstance == NULL) {
124 sd_err(("%s: SDIO Device not present\n", __func__));
128 sd = kzalloc(sizeof(sdioh_info_t), GFP_ATOMIC);
130 sd_err(("sdioh_attach: out of memory\n"));
133 if (sdioh_sdmmc_osinit(sd) != 0) {
134 sd_err(("%s:sdioh_sdmmc_osinit() failed\n", __func__));
140 sd->use_client_ints = true;
141 sd->client_block_size[0] = 64;
145 /* Claim host controller */
146 sdio_claim_host(gInstance->func[1]);
148 sd->client_block_size[1] = 64;
149 err_ret = sdio_set_block_size(gInstance->func[1], 64);
151 sd_err(("bcmsdh_sdmmc: Failed to set F1 blocksize\n"));
153 /* Release host controller F1 */
154 sdio_release_host(gInstance->func[1]);
156 if (gInstance->func[2]) {
157 /* Claim host controller F2 */
158 sdio_claim_host(gInstance->func[2]);
160 sd->client_block_size[2] = sd_f2_blocksize;
162 sdio_set_block_size(gInstance->func[2], sd_f2_blocksize);
164 sd_err(("bcmsdh_sdmmc: Failed to set F2 blocksize "
165 "to %d\n", sd_f2_blocksize));
167 /* Release host controller F2 */
168 sdio_release_host(gInstance->func[2]);
171 sdioh_sdmmc_card_enablefuncs(sd);
173 sd_trace(("%s: Done\n", __func__));
177 extern SDIOH_API_RC sdioh_detach(sdioh_info_t *sd)
179 sd_trace(("%s\n", __func__));
183 /* Disable Function 2 */
184 sdio_claim_host(gInstance->func[2]);
185 sdio_disable_func(gInstance->func[2]);
186 sdio_release_host(gInstance->func[2]);
188 /* Disable Function 1 */
189 sdio_claim_host(gInstance->func[1]);
190 sdio_disable_func(gInstance->func[1]);
191 sdio_release_host(gInstance->func[1]);
194 sdioh_sdmmc_osfree(sd);
198 return SDIOH_API_RC_SUCCESS;
201 #if defined(OOB_INTR_ONLY) && defined(HW_OOB)
203 extern SDIOH_API_RC sdioh_enable_func_intr(void)
208 if (gInstance->func[0]) {
209 sdio_claim_host(gInstance->func[0]);
211 reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err);
213 sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n",
215 sdio_release_host(gInstance->func[0]);
216 return SDIOH_API_RC_FAIL;
219 /* Enable F1 and F2 interrupts, set master enable */
221 (INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN |
224 sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err);
225 sdio_release_host(gInstance->func[0]);
228 sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n",
230 return SDIOH_API_RC_FAIL;
234 return SDIOH_API_RC_SUCCESS;
237 extern SDIOH_API_RC sdioh_disable_func_intr(void)
242 if (gInstance->func[0]) {
243 sdio_claim_host(gInstance->func[0]);
244 reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err);
246 sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n",
248 sdio_release_host(gInstance->func[0]);
249 return SDIOH_API_RC_FAIL;
252 reg &= ~(INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN);
253 /* Disable master interrupt with the last function interrupt */
256 sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err);
258 sdio_release_host(gInstance->func[0]);
260 sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n",
262 return SDIOH_API_RC_FAIL;
265 return SDIOH_API_RC_SUCCESS;
267 #endif /* defined(OOB_INTR_ONLY) && defined(HW_OOB) */
269 /* Configure callback to client when we receive client interrupt */
271 sdioh_interrupt_register(sdioh_info_t *sd, sdioh_cb_fn_t fn, void *argh)
273 sd_trace(("%s: Entering\n", __func__));
275 sd_err(("%s: interrupt handler is NULL, not registering\n",
277 return SDIOH_API_RC_FAIL;
279 #if !defined(OOB_INTR_ONLY)
280 sd->intr_handler = fn;
281 sd->intr_handler_arg = argh;
282 sd->intr_handler_valid = true;
284 /* register and unmask irq */
285 if (gInstance->func[2]) {
286 sdio_claim_host(gInstance->func[2]);
287 sdio_claim_irq(gInstance->func[2], IRQHandlerF2);
288 sdio_release_host(gInstance->func[2]);
291 if (gInstance->func[1]) {
292 sdio_claim_host(gInstance->func[1]);
293 sdio_claim_irq(gInstance->func[1], IRQHandler);
294 sdio_release_host(gInstance->func[1]);
296 #elif defined(HW_OOB)
297 sdioh_enable_func_intr();
298 #endif /* defined(OOB_INTR_ONLY) */
299 return SDIOH_API_RC_SUCCESS;
302 extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *sd)
304 sd_trace(("%s: Entering\n", __func__));
306 #if !defined(OOB_INTR_ONLY)
307 if (gInstance->func[1]) {
308 /* register and unmask irq */
309 sdio_claim_host(gInstance->func[1]);
310 sdio_release_irq(gInstance->func[1]);
311 sdio_release_host(gInstance->func[1]);
314 if (gInstance->func[2]) {
315 /* Claim host controller F2 */
316 sdio_claim_host(gInstance->func[2]);
317 sdio_release_irq(gInstance->func[2]);
318 /* Release host controller F2 */
319 sdio_release_host(gInstance->func[2]);
322 sd->intr_handler_valid = false;
323 sd->intr_handler = NULL;
324 sd->intr_handler_arg = NULL;
325 #elif defined(HW_OOB)
326 sdioh_disable_func_intr();
327 #endif /* !defined(OOB_INTR_ONLY) */
328 return SDIOH_API_RC_SUCCESS;
331 extern SDIOH_API_RC sdioh_interrupt_query(sdioh_info_t *sd, bool *onoff)
333 sd_trace(("%s: Entering\n", __func__));
334 *onoff = sd->client_intr_enabled;
335 return SDIOH_API_RC_SUCCESS;
338 #if defined(DHD_DEBUG)
339 extern bool sdioh_interrupt_pending(sdioh_info_t *sd)
345 uint sdioh_query_iofnum(sdioh_info_t *sd)
347 return sd->num_funcs;
368 const bcm_iovar_t sdioh_iovars[] = {
369 {"sd_msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0},
370 {"sd_blocksize", IOV_BLOCKSIZE, 0, IOVT_UINT32, 0},/* ((fn << 16) |
372 {"sd_ints", IOV_USEINTS, 0, IOVT_BOOL, 0},
373 {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0},
374 {"sd_numlocalints", IOV_NUMLOCALINTS, 0, IOVT_UINT32, 0},
375 {"sd_hostreg", IOV_HOSTREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
377 {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
379 {"sd_divisor", IOV_DIVISOR, 0, IOVT_UINT32, 0}
381 {"sd_power", IOV_POWER, 0, IOVT_UINT32, 0}
383 {"sd_clock", IOV_CLOCK, 0, IOVT_UINT32, 0}
385 {"sd_mode", IOV_SDMODE, 0, IOVT_UINT32, 100}
387 {"sd_highspeed", IOV_HISPEED, 0, IOVT_UINT32, 0}
389 {"sd_rxchain", IOV_RXCHAIN, 0, IOVT_BOOL, 0}
395 sdioh_iovar_op(sdioh_info_t *si, const char *name,
396 void *params, int plen, void *arg, int len, bool set)
398 const bcm_iovar_t *vi = NULL;
408 /* Get must have return space; Set does not take qualifiers */
409 ASSERT(set || (arg && len));
410 ASSERT(!set || (!params && !plen));
412 sd_trace(("%s: Enter (%s %s)\n", __func__, (set ? "set" : "get"),
415 vi = bcm_iovar_lookup(sdioh_iovars, name);
417 bcmerror = -ENOTSUPP;
421 bcmerror = bcm_iovar_lencheck(vi, arg, len, set);
425 /* Set up params so get and set can share the convenience variables */
426 if (params == NULL) {
431 if (vi->type == IOVT_VOID)
433 else if (vi->type == IOVT_BUFFER)
436 val_size = sizeof(int);
438 if (plen >= (int)sizeof(int_val))
439 memcpy(&int_val, params, sizeof(int_val));
441 bool_val = (int_val != 0) ? true : false;
443 actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
445 case IOV_GVAL(IOV_MSGLEVEL):
446 int_val = (s32) sd_msglevel;
447 memcpy(arg, &int_val, val_size);
450 case IOV_SVAL(IOV_MSGLEVEL):
451 sd_msglevel = int_val;
454 case IOV_GVAL(IOV_BLOCKSIZE):
455 if ((u32) int_val > si->num_funcs) {
459 int_val = (s32) si->client_block_size[int_val];
460 memcpy(arg, &int_val, val_size);
463 case IOV_SVAL(IOV_BLOCKSIZE):
465 uint func = ((u32) int_val >> 16);
466 uint blksize = (u16) int_val;
469 if (func > si->num_funcs) {
479 maxsize = BLOCK_SIZE_4318;
482 maxsize = BLOCK_SIZE_4328;
487 if (blksize > maxsize) {
495 si->client_block_size[func] = blksize;
500 case IOV_GVAL(IOV_RXCHAIN):
502 memcpy(arg, &int_val, val_size);
505 case IOV_GVAL(IOV_USEINTS):
506 int_val = (s32) si->use_client_ints;
507 memcpy(arg, &int_val, val_size);
510 case IOV_SVAL(IOV_USEINTS):
511 si->use_client_ints = (bool) int_val;
512 if (si->use_client_ints)
513 si->intmask |= CLIENT_INTR;
515 si->intmask &= ~CLIENT_INTR;
519 case IOV_GVAL(IOV_DIVISOR):
520 int_val = (u32) sd_divisor;
521 memcpy(arg, &int_val, val_size);
524 case IOV_SVAL(IOV_DIVISOR):
525 sd_divisor = int_val;
528 case IOV_GVAL(IOV_POWER):
529 int_val = (u32) sd_power;
530 memcpy(arg, &int_val, val_size);
533 case IOV_SVAL(IOV_POWER):
537 case IOV_GVAL(IOV_CLOCK):
538 int_val = (u32) sd_clock;
539 memcpy(arg, &int_val, val_size);
542 case IOV_SVAL(IOV_CLOCK):
546 case IOV_GVAL(IOV_SDMODE):
547 int_val = (u32) sd_sdmode;
548 memcpy(arg, &int_val, val_size);
551 case IOV_SVAL(IOV_SDMODE):
555 case IOV_GVAL(IOV_HISPEED):
556 int_val = (u32) sd_hiok;
557 memcpy(arg, &int_val, val_size);
560 case IOV_SVAL(IOV_HISPEED):
564 case IOV_GVAL(IOV_NUMINTS):
565 int_val = (s32) si->intrcount;
566 memcpy(arg, &int_val, val_size);
569 case IOV_GVAL(IOV_NUMLOCALINTS):
571 memcpy(arg, &int_val, val_size);
574 case IOV_GVAL(IOV_HOSTREG):
576 sdreg_t *sd_ptr = (sdreg_t *) params;
578 if (sd_ptr->offset < SD_SysAddr
579 || sd_ptr->offset > SD_MaxCurCap) {
580 sd_err(("%s: bad offset 0x%x\n", __func__,
586 sd_trace(("%s: rreg%d at offset %d\n", __func__,
587 (sd_ptr->offset & 1) ? 8
588 : ((sd_ptr->offset & 2) ? 16 : 32),
590 if (sd_ptr->offset & 1)
591 int_val = 8; /* sdioh_sdmmc_rreg8(si,
593 else if (sd_ptr->offset & 2)
594 int_val = 16; /* sdioh_sdmmc_rreg16(si,
597 int_val = 32; /* sdioh_sdmmc_rreg(si,
600 memcpy(arg, &int_val, sizeof(int_val));
604 case IOV_SVAL(IOV_HOSTREG):
606 sdreg_t *sd_ptr = (sdreg_t *) params;
608 if (sd_ptr->offset < SD_SysAddr
609 || sd_ptr->offset > SD_MaxCurCap) {
610 sd_err(("%s: bad offset 0x%x\n", __func__,
616 sd_trace(("%s: wreg%d value 0x%08x at offset %d\n",
617 __func__, sd_ptr->value,
618 (sd_ptr->offset & 1) ? 8
619 : ((sd_ptr->offset & 2) ? 16 : 32),
624 case IOV_GVAL(IOV_DEVREG):
626 sdreg_t *sd_ptr = (sdreg_t *) params;
630 (si, sd_ptr->func, sd_ptr->offset, &data)) {
636 memcpy(arg, &int_val, sizeof(int_val));
640 case IOV_SVAL(IOV_DEVREG):
642 sdreg_t *sd_ptr = (sdreg_t *) params;
643 u8 data = (u8) sd_ptr->value;
646 (si, sd_ptr->func, sd_ptr->offset, &data)) {
654 bcmerror = -ENOTSUPP;
662 #if defined(OOB_INTR_ONLY) && defined(HW_OOB)
664 SDIOH_API_RC sdioh_enable_hw_oob_intr(sdioh_info_t *sd, bool enable)
670 data = 3; /* enable hw oob interrupt */
672 data = 4; /* disable hw oob interrupt */
673 data |= 4; /* Active HIGH */
675 status = sdioh_request_byte(sd, SDIOH_WRITE, 0, 0xf2, &data);
678 #endif /* defined(OOB_INTR_ONLY) && defined(HW_OOB) */
681 sdioh_cfg_read(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data)
684 /* No lock needed since sdioh_request_byte does locking */
685 status = sdioh_request_byte(sd, SDIOH_READ, fnc_num, addr, data);
690 sdioh_cfg_write(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data)
692 /* No lock needed since sdioh_request_byte does locking */
694 status = sdioh_request_byte(sd, SDIOH_WRITE, fnc_num, addr, data);
698 static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr)
700 /* read 24 bits and return valid 17 bit addr */
702 u32 scratch, regdata;
703 u8 *ptr = (u8 *)&scratch;
704 for (i = 0; i < 3; i++) {
705 if ((sdioh_sdmmc_card_regread(sd, 0, regaddr, 1, ®data)) !=
707 sd_err(("%s: Can't read!\n", __func__));
709 *ptr++ = (u8) regdata;
713 /* Only the lower 17-bits are valid */
714 scratch = le32_to_cpu(scratch);
715 scratch &= 0x0001FFFF;
720 sdioh_cis_read(sdioh_info_t *sd, uint func, u8 *cisd, u32 length)
727 sd_trace(("%s: Func = %d\n", __func__, func));
729 if (!sd->func_cis_ptr[func]) {
730 memset(cis, 0, length);
731 sd_err(("%s: no func_cis_ptr[%d]\n", __func__, func));
732 return SDIOH_API_RC_FAIL;
735 sd_err(("%s: func_cis_ptr[%d]=0x%04x\n", __func__, func,
736 sd->func_cis_ptr[func]));
738 for (count = 0; count < length; count++) {
739 offset = sd->func_cis_ptr[func] + count;
740 if (sdioh_sdmmc_card_regread(sd, 0, offset, 1, &foo) < 0) {
741 sd_err(("%s: regread failed: Can't read CIS\n",
743 return SDIOH_API_RC_FAIL;
746 *cis = (u8) (foo & 0xff);
750 return SDIOH_API_RC_SUCCESS;
754 sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr,
759 sd_info(("%s: rw=%d, func=%d, addr=0x%05x\n", __func__, rw, func,
762 DHD_PM_RESUME_WAIT(sdioh_request_byte_wait);
763 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
764 if (rw) { /* CMD52 Write */
766 /* Can only directly write to some F0 registers.
770 if (regaddr == SDIOD_CCCR_IOEN) {
771 if (gInstance->func[2]) {
772 sdio_claim_host(gInstance->func[2]);
773 if (*byte & SDIO_FUNC_ENABLE_2) {
774 /* Enable Function 2 */
777 (gInstance->func[2]);
779 sd_err(("bcmsdh_sdmmc: enable F2 failed:%d",
782 /* Disable Function 2 */
785 (gInstance->func[2]);
787 sd_err(("bcmsdh_sdmmc: Disab F2 failed:%d",
790 sdio_release_host(gInstance->func[2]);
793 #if defined(MMC_SDIO_ABORT)
794 /* to allow abort command through F1 */
795 else if (regaddr == SDIOD_CCCR_IOABORT) {
796 sdio_claim_host(gInstance->func[func]);
798 * this sdio_f0_writeb() can be replaced
800 * depending upon MMC driver change.
801 * As of this time, this is temporaray one
803 sdio_writeb(gInstance->func[func], *byte,
805 sdio_release_host(gInstance->func[func]);
807 #endif /* MMC_SDIO_ABORT */
808 else if (regaddr < 0xF0) {
809 sd_err(("bcmsdh_sdmmc: F0 Wr:0x%02x: write "
810 "disallowed\n", regaddr));
812 /* Claim host controller, perform F0 write,
814 sdio_claim_host(gInstance->func[func]);
815 sdio_f0_writeb(gInstance->func[func], *byte,
817 sdio_release_host(gInstance->func[func]);
820 /* Claim host controller, perform Fn write,
822 sdio_claim_host(gInstance->func[func]);
823 sdio_writeb(gInstance->func[func], *byte, regaddr,
825 sdio_release_host(gInstance->func[func]);
827 } else { /* CMD52 Read */
828 /* Claim host controller, perform Fn read, and release */
829 sdio_claim_host(gInstance->func[func]);
833 sdio_f0_readb(gInstance->func[func], regaddr,
837 sdio_readb(gInstance->func[func], regaddr,
841 sdio_release_host(gInstance->func[func]);
845 sd_err(("bcmsdh_sdmmc: Failed to %s byte F%d:@0x%05x=%02x, "
846 "Err: %d\n", rw ? "Write" : "Read", func, regaddr,
849 return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
853 sdioh_request_word(sdioh_info_t *sd, uint cmd_type, uint rw, uint func,
854 uint addr, u32 *word, uint nbytes)
856 int err_ret = SDIOH_API_RC_FAIL;
859 sd_err(("%s: Only CMD52 allowed to F0.\n", __func__));
860 return SDIOH_API_RC_FAIL;
863 sd_info(("%s: cmd_type=%d, rw=%d, func=%d, addr=0x%05x, nbytes=%d\n",
864 __func__, cmd_type, rw, func, addr, nbytes));
866 DHD_PM_RESUME_WAIT(sdioh_request_word_wait);
867 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
868 /* Claim host controller */
869 sdio_claim_host(gInstance->func[func]);
871 if (rw) { /* CMD52 Write */
873 sdio_writel(gInstance->func[func], *word, addr,
875 } else if (nbytes == 2) {
876 sdio_writew(gInstance->func[func], (*word & 0xFFFF),
879 sd_err(("%s: Invalid nbytes: %d\n", __func__, nbytes));
881 } else { /* CMD52 Read */
884 sdio_readl(gInstance->func[func], addr, &err_ret);
885 } else if (nbytes == 2) {
887 sdio_readw(gInstance->func[func], addr,
890 sd_err(("%s: Invalid nbytes: %d\n", __func__, nbytes));
894 /* Release host controller */
895 sdio_release_host(gInstance->func[func]);
898 sd_err(("bcmsdh_sdmmc: Failed to %s word, Err: 0x%08x",
899 rw ? "Write" : "Read", err_ret));
902 return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
906 sdioh_request_packet(sdioh_info_t *sd, uint fix_inc, uint write, uint func,
907 uint addr, struct sk_buff *pkt)
909 bool fifo = (fix_inc == SDIOH_DATA_FIX);
913 struct sk_buff *pnext;
915 sd_trace(("%s: Enter\n", __func__));
918 DHD_PM_RESUME_WAIT(sdioh_request_packet_wait);
919 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
921 /* Claim host controller */
922 sdio_claim_host(gInstance->func[func]);
923 for (pnext = pkt; pnext; pnext = pnext->next) {
924 uint pkt_len = pnext->len;
926 pkt_len &= 0xFFFFFFFC;
928 #ifdef CONFIG_MMC_MSM7X00A
929 if ((pkt_len % 64) == 32) {
930 sd_trace(("%s: Rounding up TX packet +=32\n",
934 #endif /* CONFIG_MMC_MSM7X00A */
935 /* Make sure the packet is aligned properly.
936 * If it isn't, then this
937 * is the fault of sdioh_request_buffer() which
938 * is supposed to give
939 * us something we can work with.
941 ASSERT(((u32) (pkt->data) & DMA_ALIGN_MASK) == 0);
943 if ((write) && (!fifo)) {
944 err_ret = sdio_memcpy_toio(gInstance->func[func], addr,
945 ((u8 *) (pnext->data)),
948 err_ret = sdio_memcpy_toio(gInstance->func[func], addr,
949 ((u8 *) (pnext->data)),
952 err_ret = sdio_readsb(gInstance->func[func],
953 ((u8 *) (pnext->data)),
956 err_ret = sdio_memcpy_fromio(gInstance->func[func],
957 ((u8 *) (pnext->data)),
962 sd_err(("%s: %s FAILED %p[%d], addr=0x%05x, pkt_len=%d,"
963 "ERR=0x%08x\n", __func__,
964 (write) ? "TX" : "RX",
965 pnext, SGCount, addr, pkt_len, err_ret));
967 sd_trace(("%s: %s xfr'd %p[%d], addr=0x%05x, len=%d\n",
969 (write) ? "TX" : "RX",
970 pnext, SGCount, addr, pkt_len));
979 /* Release host controller */
980 sdio_release_host(gInstance->func[func]);
982 sd_trace(("%s: Exit\n", __func__));
983 return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
987 * This function takes a buffer or packet, and fixes everything up
988 * so that in the end, a DMA-able packet is created.
990 * A buffer does not have an associated packet pointer,
991 * and may or may not be aligned.
992 * A packet may consist of a single packet, or a packet chain.
993 * If it is a packet chain, then all the packets in the chain
994 * must be properly aligned.
996 * If the packet data is not aligned, then there may only be
997 * one packet, and in this case, it is copied to a new
1002 sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
1003 uint func, uint addr, uint reg_width, uint buflen_u,
1004 u8 *buffer, struct sk_buff *pkt)
1006 SDIOH_API_RC Status;
1007 struct sk_buff *mypkt = NULL;
1009 sd_trace(("%s: Enter\n", __func__));
1011 DHD_PM_RESUME_WAIT(sdioh_request_buffer_wait);
1012 DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
1013 /* Case 1: we don't have a packet. */
1015 sd_data(("%s: Creating new %s Packet, len=%d\n",
1016 __func__, write ? "TX" : "RX", buflen_u));
1017 mypkt = bcm_pkt_buf_get_skb(buflen_u);
1019 sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n",
1020 __func__, buflen_u));
1021 return SDIOH_API_RC_FAIL;
1024 /* For a write, copy the buffer data into the packet. */
1026 memcpy(mypkt->data, buffer, buflen_u);
1029 sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt);
1031 /* For a read, copy the packet data back to the buffer. */
1033 memcpy(buffer, mypkt->data, buflen_u);
1035 bcm_pkt_buf_free_skb(mypkt);
1036 } else if (((u32) (pkt->data) & DMA_ALIGN_MASK) != 0) {
1037 /* Case 2: We have a packet, but it is unaligned. */
1039 /* In this case, we cannot have a chain. */
1040 ASSERT(pkt->next == NULL);
1042 sd_data(("%s: Creating aligned %s Packet, len=%d\n",
1043 __func__, write ? "TX" : "RX", pkt->len));
1044 mypkt = bcm_pkt_buf_get_skb(pkt->len);
1046 sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n",
1047 __func__, pkt->len));
1048 return SDIOH_API_RC_FAIL;
1051 /* For a write, copy the buffer data into the packet. */
1053 memcpy(mypkt->data, pkt->data, pkt->len);
1056 sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt);
1058 /* For a read, copy the packet data back to the buffer. */
1060 memcpy(pkt->data, mypkt->data, mypkt->len);
1062 bcm_pkt_buf_free_skb(mypkt);
1063 } else { /* case 3: We have a packet and
1065 sd_data(("%s: Aligned %s Packet, direct DMA\n",
1066 __func__, write ? "Tx" : "Rx"));
1068 sdioh_request_packet(sd, fix_inc, write, func, addr, pkt);
1074 /* this function performs "abort" for both of host & device */
1075 extern int sdioh_abort(sdioh_info_t *sd, uint func)
1077 #if defined(MMC_SDIO_ABORT)
1078 char t_func = (char)func;
1079 #endif /* defined(MMC_SDIO_ABORT) */
1080 sd_trace(("%s: Enter\n", __func__));
1082 #if defined(MMC_SDIO_ABORT)
1083 /* issue abort cmd52 command through F1 */
1084 sdioh_request_byte(sd, SD_IO_OP_WRITE, SDIO_FUNC_0, SDIOD_CCCR_IOABORT,
1086 #endif /* defined(MMC_SDIO_ABORT) */
1088 sd_trace(("%s: Exit\n", __func__));
1089 return SDIOH_API_RC_SUCCESS;
1092 /* Reset and re-initialize the device */
1093 int sdioh_sdio_reset(sdioh_info_t *si)
1095 sd_trace(("%s: Enter\n", __func__));
1096 sd_trace(("%s: Exit\n", __func__));
1097 return SDIOH_API_RC_SUCCESS;
1100 /* Disable device interrupt */
1101 void sdioh_sdmmc_devintr_off(sdioh_info_t *sd)
1103 sd_trace(("%s: %d\n", __func__, sd->use_client_ints));
1104 sd->intmask &= ~CLIENT_INTR;
1107 /* Enable device interrupt */
1108 void sdioh_sdmmc_devintr_on(sdioh_info_t *sd)
1110 sd_trace(("%s: %d\n", __func__, sd->use_client_ints));
1111 sd->intmask |= CLIENT_INTR;
1114 /* Read client card reg */
1116 sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr,
1117 int regsize, u32 *data)
1120 if ((func == 0) || (regsize == 1)) {
1123 sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp);
1126 sd_data(("%s: byte read data=0x%02x\n", __func__, *data));
1128 sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, data,
1133 sd_data(("%s: word read data=0x%08x\n", __func__, *data));
1139 #if !defined(OOB_INTR_ONLY)
1140 /* bcmsdh_sdmmc interrupt handler */
1141 static void IRQHandler(struct sdio_func *func)
1145 sd_trace(("bcmsdh_sdmmc: ***IRQHandler\n"));
1149 sdio_release_host(gInstance->func[0]);
1151 if (sd->use_client_ints) {
1153 ASSERT(sd->intr_handler);
1154 ASSERT(sd->intr_handler_arg);
1155 (sd->intr_handler) (sd->intr_handler_arg);
1157 sd_err(("bcmsdh_sdmmc: ***IRQHandler\n"));
1159 sd_err(("%s: Not ready for intr: enabled %d, handler %p\n",
1160 __func__, sd->client_intr_enabled, sd->intr_handler));
1163 sdio_claim_host(gInstance->func[0]);
1166 /* bcmsdh_sdmmc interrupt handler for F2 (dummy handler) */
1167 static void IRQHandlerF2(struct sdio_func *func)
1171 sd_trace(("bcmsdh_sdmmc: ***IRQHandlerF2\n"));
1177 #endif /* !defined(OOB_INTR_ONLY) */
1180 /* Write client card reg */
1182 sdioh_sdmmc_card_regwrite(sdioh_info_t *sd, int func, u32 regaddr,
1183 int regsize, u32 data)
1186 if ((func == 0) || (regsize == 1)) {
1190 sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp);
1191 sd_data(("%s: byte write data=0x%02x\n", __func__, data));
1196 sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, &data,
1199 sd_data(("%s: word write data=0x%08x\n", __func__, data));
1204 #endif /* NOTUSED */
1206 int sdioh_start(sdioh_info_t *si, int stage)
1211 int sdioh_stop(sdioh_info_t *si)