2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <asm/unaligned.h>
32 #include <brcmu_wifi.h>
33 #include <brcmu_utils.h>
34 #include <brcm_hw_ids.h>
36 #include "sdio_host.h"
40 /* ARM trap handling */
42 /* Trap types defined by ARM (see arminc.h) */
44 #if defined(__ARM_ARCH_4T__)
45 #define MAX_TRAP_TYPE (TR_FIQ + 1)
46 #elif defined(__ARM_ARCH_7M__)
47 #define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS)
48 #endif /* __ARM_ARCH_7M__ */
50 /* The trap structure is defined here as offsets for assembly */
56 #define TR_REG(n) (TR_REGS + (n) * 4)
57 #define TR_SP TR_REG(13)
58 #define TR_LR TR_REG(14)
59 #define TR_PC TR_REG(15)
61 #define TRAP_T_SIZE 80
86 #define CBUF_LEN (128)
89 u32 buf; /* Can't be pointer on (64-bit) hosts */
92 char *_buf_compat; /* Redundant pointer for backward compat. */
97 * When there is no UART (e.g. Quickturn),
98 * the host should write a complete
99 * input line directly into cbuf and then write
100 * the length into vcons_in.
101 * This may also be used when there is a real UART
102 * (at risk of conflicting with
103 * the real UART). vcons_out is currently unused.
108 /* Output (logging) buffer
109 * Console output is written to a ring buffer log_buf at index log_idx.
110 * The host may read the output when it sees log_idx advance.
111 * Output will be lost if the output wraps around faster than the host
116 /* Console input line buffer
117 * Characters are read one at a time into cbuf
118 * until <CR> is received, then
119 * the buffer is processed as a command line.
120 * Also used for virtual UART.
127 #include <chipcommon.h>
131 #include "dhd_proto.h"
135 #define TXQLEN 2048 /* bulk tx queue length */
136 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
137 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
140 #define TXRETRIES 2 /* # of retries for tx frames */
142 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
145 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
148 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
150 #define MEMBLOCK 2048 /* Block size used for downloading
152 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
153 biggest possible glom */
155 #ifndef BRCMF_FIRSTREAD
156 #define BRCMF_FIRSTREAD 32
159 #if !ISPOWEROF2(BRCMF_FIRSTREAD)
160 #error BRCMF_FIRSTREAD is not a power of 2!
163 /* SBSDIO_DEVICE_CTL */
165 /* 1: device will assert busy signal when receiving CMD53 */
166 #define SBSDIO_DEVCTL_SETBUSY 0x01
167 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
168 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
169 /* 1: mask all interrupts to host except the chipActive (rev 8) */
170 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
171 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
172 * sdio bus power cycle to clear (rev 9) */
173 #define SBSDIO_DEVCTL_PADS_ISO 0x08
174 /* Force SD->SB reset mapping (rev 11) */
175 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
176 /* Determined by CoreControl bit */
177 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
178 /* Force backplane reset */
179 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
180 /* Force no backplane reset */
181 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
183 /* SBSDIO_FUNC1_CHIPCLKCSR */
185 /* Force ALP request to backplane */
186 #define SBSDIO_FORCE_ALP 0x01
187 /* Force HT request to backplane */
188 #define SBSDIO_FORCE_HT 0x02
189 /* Force ILP request to backplane */
190 #define SBSDIO_FORCE_ILP 0x04
191 /* Make ALP ready (power up xtal) */
192 #define SBSDIO_ALP_AVAIL_REQ 0x08
193 /* Make HT ready (power up PLL) */
194 #define SBSDIO_HT_AVAIL_REQ 0x10
195 /* Squelch clock requests from HW */
196 #define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20
197 /* Status: ALP is ready */
198 #define SBSDIO_ALP_AVAIL 0x40
199 /* Status: HT is ready */
200 #define SBSDIO_HT_AVAIL 0x80
202 #define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
203 #define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
204 #define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
205 #define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
207 #define SBSDIO_CLKAV(regval, alponly) \
208 (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
210 /* direct(mapped) cis space */
212 /* MAPPED common CIS address */
213 #define SBSDIO_CIS_BASE_COMMON 0x1000
214 /* maximum bytes in one CIS */
215 #define SBSDIO_CIS_SIZE_LIMIT 0x200
216 /* cis offset addr is < 17 bits */
217 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
219 /* manfid tuple length, include tuple, link bytes */
220 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
223 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
224 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
225 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
226 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
227 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
228 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
229 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
230 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
231 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
232 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
233 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
234 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
235 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
236 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
237 #define I_PC (1 << 10) /* descriptor error */
238 #define I_PD (1 << 11) /* data error */
239 #define I_DE (1 << 12) /* Descriptor protocol Error */
240 #define I_RU (1 << 13) /* Receive descriptor Underflow */
241 #define I_RO (1 << 14) /* Receive fifo Overflow */
242 #define I_XU (1 << 15) /* Transmit fifo Underflow */
243 #define I_RI (1 << 16) /* Receive Interrupt */
244 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
245 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
246 #define I_XI (1 << 24) /* Transmit Interrupt */
247 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
248 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
249 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
250 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
251 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
252 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
253 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
254 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
255 #define I_DMA (I_RI | I_XI | I_ERRORS)
258 #define CC_CISRDY (1 << 0) /* CIS Ready */
259 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
260 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
261 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
262 #define CC_XMTDATAAVAIL_MODE (1 << 4)
263 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
266 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
267 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
268 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
269 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
272 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
274 /* Total length of frame header for dongle protocol */
275 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
277 #define SDPCM_RESERVE (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN)
279 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
283 * Software allocation of To SB Mailbox resources
286 /* tosbmailbox bits corresponding to intstatus bits */
287 #define SMB_NAK (1 << 0) /* Frame NAK */
288 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
289 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
290 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
292 /* tosbmailboxdata */
293 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
296 * Software allocation of To Host Mailbox resources
300 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
301 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
302 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
303 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
305 /* tohostmailboxdata */
306 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
307 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
308 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
309 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
311 #define HMB_DATA_FCDATA_MASK 0xff000000
312 #define HMB_DATA_FCDATA_SHIFT 24
314 #define HMB_DATA_VERSION_MASK 0x00ff0000
315 #define HMB_DATA_VERSION_SHIFT 16
318 * Software-defined protocol header
321 /* Current protocol version */
322 #define SDPCM_PROT_VERSION 4
324 /* SW frame header */
325 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
327 #define SDPCM_CHANNEL_MASK 0x00000f00
328 #define SDPCM_CHANNEL_SHIFT 8
329 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
331 #define SDPCM_NEXTLEN_OFFSET 2
333 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
334 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
335 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
336 #define SDPCM_DOFFSET_MASK 0xff000000
337 #define SDPCM_DOFFSET_SHIFT 24
338 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
339 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
340 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
341 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
343 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
345 /* logical channel numbers */
346 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
347 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
348 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
349 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
350 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
352 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
354 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
356 /* For TEST_CHANNEL packets, define another 4-byte header */
357 #define SDPCM_TEST_HDRLEN 4 /*
358 * Generally: Cmd(1), Ext(1), Len(2);
359 * Semantics of Ext byte depend on
360 * command. Len is current or requested
361 * frame length, not including test
362 * header; sent little-endian.
364 #define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext:pattern id. */
365 #define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext:pattern id. */
366 #define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext:pattern id. */
367 #define SDPCM_TEST_BURST 0x04 /*
368 * Receiver to send a burst.
369 * Ext is a frame count
371 #define SDPCM_TEST_SEND 0x05 /*
372 * Receiver sets send mode.
373 * Ext is boolean on/off
376 /* Handy macro for filling in datagen packets with a pattern */
377 #define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno))
380 * Shared structure between dongle and the host.
381 * The structure contains pointers to trap or assert information.
383 #define SDPCM_SHARED_VERSION 0x0002
384 #define SDPCM_SHARED_VERSION_MASK 0x00FF
385 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
386 #define SDPCM_SHARED_ASSERT 0x0200
387 #define SDPCM_SHARED_TRAP 0x0400
390 /* Space for header read, limit for data packets */
392 #define MAX_HDR_READ 32
394 #if !ISPOWEROF2(MAX_HDR_READ)
395 #error MAX_HDR_READ is not a power of 2!
398 #define MAX_RX_DATASZ 2048
400 /* Maximum milliseconds to wait for F2 to come up */
401 #define BRCMF_WAIT_F2RDY 3000
403 /* Bump up limit on waiting for HT to account for first startup;
404 * if the image is doing a CRC calculation before programming the PMU
405 * for HT availability, it could take a couple hundred ms more, so
406 * max out at a 1 second (1000000us).
408 #if (PMU_MAX_TRANSITION_DLY <= 1000000)
409 #undef PMU_MAX_TRANSITION_DLY
410 #define PMU_MAX_TRANSITION_DLY 1000000
413 /* Value for ChipClockCSR during initial setup */
414 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
415 SBSDIO_ALP_AVAIL_REQ)
417 /* Flags for SDH calls */
418 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
421 #define SBIM_IBE 0x20000 /* inbanderror */
422 #define SBIM_TO 0x40000 /* timeout */
423 #define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */
424 #define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */
429 #define SBTML_RESET 0x0001
431 #define SBTML_REJ_MASK 0x0006
433 #define SBTML_REJ 0x0002
434 /* temporary reject, for error recovery */
435 #define SBTML_TMPREJ 0x0004
437 /* Shift to locate the SI control flags in sbtml */
438 #define SBTML_SICF_SHIFT 16
441 #define SBTMH_SERR 0x0001 /* serror */
442 #define SBTMH_INT 0x0002 /* interrupt */
443 #define SBTMH_BUSY 0x0004 /* busy */
444 #define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */
446 /* Shift to locate the SI status flags in sbtmh */
447 #define SBTMH_SISF_SHIFT 16
450 #define SBIDL_INIT 0x80 /* initiator */
453 #define SBIDH_RC_MASK 0x000f /* revision code */
454 #define SBIDH_RCE_MASK 0x7000 /* revision code extension field */
455 #define SBIDH_RCE_SHIFT 8
456 #define SBCOREREV(sbidh) \
457 ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | \
458 ((sbidh) & SBIDH_RC_MASK))
459 #define SBIDH_CC_MASK 0x8ff0 /* core code */
460 #define SBIDH_CC_SHIFT 4
461 #define SBIDH_VC_MASK 0xffff0000 /* vendor code */
462 #define SBIDH_VC_SHIFT 16
465 * Conversion of 802.1D priority to precedence level
467 #define PRIO2PREC(prio) \
468 (((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? \
472 * Core reg address translation.
473 * Both macro's returns a 32 bits byte address on the backplane bus.
475 #define CORE_CC_REG(base, field) \
476 (base + offsetof(struct chipcregs, field))
477 #define CORE_BUS_REG(base, field) \
478 (base + offsetof(struct sdpcmd_regs, field))
479 #define CORE_SB(base, field) \
480 (base + SBCONFIGOFF + offsetof(struct sbconfig, field))
484 u32 corecontrol; /* 0x00, rev8 */
485 u32 corestatus; /* rev8 */
487 u32 biststatus; /* rev8 */
490 u16 pcmciamesportaladdr; /* 0x010, rev8 */
492 u16 pcmciamesportalmask; /* rev8 */
494 u16 pcmciawrframebc; /* rev8 */
496 u16 pcmciaunderflowtimer; /* rev8 */
500 u32 intstatus; /* 0x020, rev8 */
501 u32 hostintmask; /* rev8 */
502 u32 intmask; /* rev8 */
503 u32 sbintstatus; /* rev8 */
504 u32 sbintmask; /* rev8 */
505 u32 funcintmask; /* rev4 */
507 u32 tosbmailbox; /* 0x040, rev8 */
508 u32 tohostmailbox; /* rev8 */
509 u32 tosbmailboxdata; /* rev8 */
510 u32 tohostmailboxdata; /* rev8 */
512 /* synchronized access to registers in SDIO clock domain */
513 u32 sdioaccess; /* 0x050, rev8 */
516 /* PCMCIA frame control */
517 u8 pcmciaframectrl; /* 0x060, rev8 */
519 u8 pcmciawatermark; /* rev8 */
522 /* interrupt batching control */
523 u32 intrcvlazy; /* 0x100, rev8 */
527 u32 cmd52rd; /* 0x110, rev8 */
528 u32 cmd52wr; /* rev8 */
529 u32 cmd53rd; /* rev8 */
530 u32 cmd53wr; /* rev8 */
531 u32 abort; /* rev8 */
532 u32 datacrcerror; /* rev8 */
533 u32 rdoutofsync; /* rev8 */
534 u32 wroutofsync; /* rev8 */
535 u32 writebusy; /* rev8 */
536 u32 readwait; /* rev8 */
537 u32 readterm; /* rev8 */
538 u32 writeterm; /* rev8 */
540 u32 clockctlstatus; /* rev8 */
543 u32 PAD[128]; /* DMA engines */
545 /* SDIO/PCMCIA CIS region */
546 char cis[512]; /* 0x400-0x5ff, rev6 */
548 /* PCMCIA function control registers */
549 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
552 /* PCMCIA backplane access */
553 u16 backplanecsr; /* 0x76E, rev6 */
554 u16 backplaneaddr0; /* rev6 */
555 u16 backplaneaddr1; /* rev6 */
556 u16 backplaneaddr2; /* rev6 */
557 u16 backplaneaddr3; /* rev6 */
558 u16 backplanedata0; /* rev6 */
559 u16 backplanedata1; /* rev6 */
560 u16 backplanedata2; /* rev6 */
561 u16 backplanedata3; /* rev6 */
564 /* sprom "size" & "blank" info */
565 u16 spromstatus; /* 0x7BE, rev2 */
572 /* Device console log buffer state */
573 struct brcmf_console {
574 uint count; /* Poll interval msec counter */
575 uint log_addr; /* Log struct address (fixed) */
576 struct rte_log log; /* Log struct (host copy) */
577 uint bufsize; /* Size of log buffer */
578 u8 *buf; /* Log buffer (host copy) */
579 uint last; /* Last buffer read index */
583 struct sdpcm_shared {
587 u32 assert_file_addr;
589 u32 console_addr; /* Address of struct rte_console */
595 /* misc chip info needed by some of the routines */
602 u32 buscorebase; /* 32 bits backplane bus address */
611 /* Private data for SDIO bus interaction */
613 struct brcmf_pub *drvr;
615 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
616 struct chip_info *ci; /* Chip info struct */
617 char *vars; /* Variables (from CIS and/or other) */
618 uint varsz; /* Size of variables buffer */
620 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
621 u32 orig_ramsize; /* Size of RAM in SOCRAM (bytes) */
623 u32 bus; /* gSPI or SDIO bus */
624 u32 hostintmask; /* Copy of Host Interrupt Mask */
625 u32 intstatus; /* Intstatus bits (events) pending */
626 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
627 bool fcstate; /* State of dongle flow-control */
629 uint blocksize; /* Block size of SDIO transfers */
630 uint roundup; /* Max roundup limit */
632 struct pktq txq; /* Queue length used for flow-control */
633 u8 flowcontrol; /* per prio flow control bitmask */
634 u8 tx_seq; /* Transmit sequence number (next) */
635 u8 tx_max; /* Maximum transmit sequence allowed */
637 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
638 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
639 u16 nextlen; /* Next Read Len from last header */
640 u8 rx_seq; /* Receive sequence number (expected) */
641 bool rxskip; /* Skip receive (awaiting NAK ACK) */
643 struct sk_buff *glomd; /* Packet containing glomming descriptor */
644 struct sk_buff *glom; /* Packet chain for glommed superframe */
645 uint glomerr; /* Glom packet read errors */
647 u8 *rxbuf; /* Buffer for receiving control packets */
648 uint rxblen; /* Allocated length of rxbuf */
649 u8 *rxctl; /* Aligned pointer into rxbuf */
650 u8 *databuf; /* Buffer for receiving big glom packet */
651 u8 *dataptr; /* Aligned pointer into databuf */
652 uint rxlen; /* Length of valid data in buffer */
654 u8 sdpcm_ver; /* Bus protocol reported by dongle */
656 bool intr; /* Use interrupts */
657 bool poll; /* Use polling */
658 bool ipend; /* Device interrupt is pending */
659 uint intrcount; /* Count of device interrupt callbacks */
660 uint lastintrs; /* Count as of last watchdog timer */
661 uint spurious; /* Count of spurious interrupts */
662 uint pollrate; /* Ticks between device polls */
663 uint polltick; /* Tick counter */
664 uint pollcnt; /* Count of active polls */
667 struct brcmf_console console; /* Console output polling support */
668 uint console_addr; /* Console address from shared struct */
671 uint regfails; /* Count of R_REG failures */
673 uint clkstate; /* State of sd and backplane clock(s) */
674 bool activity; /* Activity flag for clock down */
675 s32 idletime; /* Control for activity timeout */
676 s32 idlecount; /* Activity timeout counter */
677 s32 idleclock; /* How to set bus driver when idle */
679 bool use_rxchain; /* If brcmf should use PKT chains */
680 bool sleeping; /* Is SDIO bus sleeping? */
681 bool rxflow_mode; /* Rx flow control mode */
682 bool rxflow; /* Is rx flow control on */
683 bool alp_only; /* Don't use HT clock (ALP only) */
684 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
688 /* external loopback */
692 /* pktgen configuration */
693 uint pktgen_freq; /* Ticks between bursts */
694 uint pktgen_count; /* Packets to send each burst */
695 uint pktgen_print; /* Bursts between count displays */
696 uint pktgen_total; /* Stop after this many */
697 uint pktgen_minlen; /* Minimum packet data len */
698 uint pktgen_maxlen; /* Maximum packet data len */
699 uint pktgen_mode; /* Configured mode: tx, rx, or echo */
700 uint pktgen_stop; /* Number of tx failures causing stop */
702 /* active pktgen fields */
703 uint pktgen_tick; /* Tick counter for bursts */
704 uint pktgen_ptick; /* Burst counter for printing */
705 uint pktgen_sent; /* Number of test packets generated */
706 uint pktgen_rcvd; /* Number of test packets received */
707 uint pktgen_fail; /* Number of failed send attempts */
708 u16 pktgen_len; /* Length of next packet to send */
711 /* Some additional counters */
712 uint tx_sderrs; /* Count of tx attempts with sd errors */
713 uint fcqueued; /* Tx packets that got queued */
714 uint rxrtx; /* Count of rtx requests (NAK to dongle) */
715 uint rx_toolong; /* Receive frames too long to receive */
716 uint rxc_errors; /* SDIO errors when reading control frames */
717 uint rx_hdrfail; /* SDIO errors on header reads */
718 uint rx_badhdr; /* Bad received headers (roosync?) */
719 uint rx_badseq; /* Mismatched rx sequence number */
720 uint fc_rcvd; /* Number of flow-control events received */
721 uint fc_xoff; /* Number which turned on flow-control */
722 uint fc_xon; /* Number which turned off flow-control */
723 uint rxglomfail; /* Failed deglom attempts */
724 uint rxglomframes; /* Number of glom frames (superframes) */
725 uint rxglompkts; /* Number of packets from glom frames */
726 uint f2rxhdrs; /* Number of header reads */
727 uint f2rxdata; /* Number of frame data reads */
728 uint f2txdata; /* Number of f2 frame writes */
729 uint f1regdata; /* Number of f1 register accesses */
733 bool ctrl_frame_stat;
736 wait_queue_head_t ctrl_wait;
737 wait_queue_head_t ioctl_resp_wait;
739 struct timer_list timer;
740 struct completion watchdog_wait;
741 struct task_struct *watchdog_tsk;
744 struct tasklet_struct tasklet;
745 struct task_struct *dpc_tsk;
746 struct completion dpc_wait;
749 struct semaphore sdsem;
753 const struct firmware *firmware;
760 u32 sbipsflag; /* initiator port ocp slave flag */
762 u32 sbtpsflag; /* target port ocp slave flag */
764 u32 sbtmerrloga; /* (sonics >= 2.3) */
766 u32 sbtmerrlog; /* (sonics >= 2.3) */
768 u32 sbadmatch3; /* address match3 */
770 u32 sbadmatch2; /* address match2 */
772 u32 sbadmatch1; /* address match1 */
774 u32 sbimstate; /* initiator agent state */
775 u32 sbintvec; /* interrupt mask */
776 u32 sbtmstatelow; /* target state */
777 u32 sbtmstatehigh; /* target state */
778 u32 sbbwa0; /* bandwidth allocation table0 */
780 u32 sbimconfiglow; /* initiator configuration */
781 u32 sbimconfighigh; /* initiator configuration */
782 u32 sbadmatch0; /* address match0 */
784 u32 sbtmconfiglow; /* target configuration */
785 u32 sbtmconfighigh; /* target configuration */
786 u32 sbbconfig; /* broadcast configuration */
788 u32 sbbstate; /* broadcast state */
790 u32 sbactcnfg; /* activate configuration */
792 u32 sbflagst; /* current sbflags */
794 u32 sbidlow; /* identification */
795 u32 sbidhigh; /* identification */
801 #define CLK_PENDING 2 /* Not used yet */
804 #define BRCMF_NOPMU(brcmf) (false)
807 static int qcount[NUMPRIO];
808 static int tx_packets[NUMPRIO];
811 /* Deferred transmit */
812 uint brcmf_deferred_tx = 1;
813 module_param(brcmf_deferred_tx, uint, 0);
815 /* Watchdog thread priority, -1 to use kernel timer */
816 int brcmf_watchdog_prio = 97;
817 module_param(brcmf_watchdog_prio, int, 0);
819 /* Watchdog interval */
820 uint brcmf_watchdog_ms = 10;
821 module_param(brcmf_watchdog_ms, uint, 0);
823 /* DPC thread priority, -1 to use tasklet */
824 int brcmf_dpc_prio = 98;
825 module_param(brcmf_dpc_prio, int, 0);
828 /* Console poll interval */
829 uint brcmf_console_ms;
830 module_param(brcmf_console_ms, uint, 0);
836 module_param(brcmf_txbound, uint, 0);
837 module_param(brcmf_rxbound, uint, 0);
840 int brcmf_idletime = 1;
841 module_param(brcmf_idletime, int, 0);
843 /* SDIO Drive Strength (in milliamps) */
844 uint brcmf_sdiod_drive_strength = 6;
845 module_param(brcmf_sdiod_drive_strength, uint, 0);
849 module_param(brcmf_poll, uint, 0);
852 uint brcmf_intr = true;
853 module_param(brcmf_intr, uint, 0);
855 /* IOCTL response timeout */
856 static int brcmf_ioctl_timeout_msec = IOCTL_RESP_TIMEOUT;
858 /* override the RAM size if possible */
859 #define DONGLE_MIN_MEMSIZE (128 * 1024)
860 int brcmf_dongle_memsize;
861 module_param(brcmf_dongle_memsize, int, 0);
863 static bool brcmf_alignctl;
867 static bool retrydata;
868 #define RETRYCHAN(chan) (((chan) == SDPCM_EVENT_CHANNEL) || retrydata)
870 static const uint watermark = 8;
871 static const uint firstread = BRCMF_FIRSTREAD;
873 /* Retry count for register access failures */
874 static const uint retry_limit = 2;
876 /* Force even SD lengths (some host controllers mess up on odd bytes) */
877 static bool forcealign;
881 #define PKTALIGN(_p, _len, _align) \
884 datalign = (unsigned long)((_p)->data); \
885 datalign = roundup(datalign, (_align)) - datalign; \
887 skb_pull((_p), datalign); \
888 __skb_trim((_p), (_len)); \
891 /* Limit on rounding up frames */
892 static const uint max_roundup = 512;
894 /* Try doing readahead */
895 static bool brcmf_readahead;
897 /* To check if there's window offered */
898 #define DATAOK(bus) \
899 (((u8)(bus->tx_max - bus->tx_seq) != 0) && \
900 (((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
903 * Reads a register in the SDIO hardware block. This block occupies a series of
904 * adresses on the 32 bit backplane bus.
907 r_sdreg32(struct brcmf_bus *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
911 *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
912 bus->ci->buscorebase + reg_offset, sizeof(u32));
913 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
914 (++(*retryvar) <= retry_limit));
916 bus->regfails += (*retryvar-1);
917 if (*retryvar > retry_limit) {
918 BRCMF_ERROR(("FAILED READ %Xh\n", reg_offset));
925 w_sdreg32(struct brcmf_bus *bus, u32 regval, u32 reg_offset, u32 *retryvar)
929 brcmf_sdcard_reg_write(bus->sdiodev,
930 bus->ci->buscorebase + reg_offset,
931 sizeof(u32), regval);
932 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
933 (++(*retryvar) <= retry_limit));
935 bus->regfails += (*retryvar-1);
936 if (*retryvar > retry_limit)
937 BRCMF_ERROR(("FAILED REGISTER WRITE"
938 " %Xh\n", reg_offset));
942 #define BRCMF_BUS SDIO_BUS
944 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
946 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
949 static void brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, void *pkt, uint seq);
950 static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus *bus, bool start);
954 static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub *drvr,
955 unsigned char *msg, uint msglen);
956 static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size);
957 static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus);
959 static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter);
961 static void brcmf_sdbrcm_release(struct brcmf_bus *bus);
962 static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus);
963 static bool brcmf_sdbrcm_chipmatch(u16 chipid);
964 static bool brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, u32 regsva);
965 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus);
966 static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus);
967 static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus);
969 static uint brcmf_process_nvram_vars(char *varbuf, uint len);
971 static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size);
972 static int brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn,
973 uint flags, u8 *buf, uint nbytes,
975 void (*complete)(void *handle, int status,
979 static bool brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus, void *card);
980 static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus);
982 static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus);
983 static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus);
986 brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_dev *sdiodev, u32 corebase);
988 static int brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs);
991 brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase);
993 static void brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus,
995 static void brcmf_sdbrcm_chip_detach(struct brcmf_bus *bus);
996 static void brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar);
997 static void brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus);
998 static void brcmf_sdbrcm_watchdog(unsigned long data);
999 static int brcmf_sdbrcm_watchdog_thread(void *data);
1000 static int brcmf_sdbrcm_dpc_thread(void *data);
1001 static void brcmf_sdbrcm_dpc_tasklet(unsigned long data);
1002 static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus *bus);
1003 static void brcmf_sdbrcm_sdlock(struct brcmf_bus *bus);
1004 static void brcmf_sdbrcm_sdunlock(struct brcmf_bus *bus);
1005 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus);
1006 static int brcmf_sdbrcm_ioctl_resp_wait(struct brcmf_bus *bus, uint *condition,
1008 static int brcmf_sdbrcm_ioctl_resp_wake(struct brcmf_bus *bus);
1010 /* Packet free applicable unconditionally for sdio and sdspi.
1011 * Conditional if bufpool was present for gspi bus.
1013 static void brcmf_sdbrcm_pktfree2(struct brcmf_bus *bus, struct sk_buff *pkt)
1015 if ((bus->bus != SPI_BUS) || bus->usebufpool)
1016 brcmu_pkt_buf_free_skb(pkt);
1019 static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size)
1021 s32 min_size = DONGLE_MIN_MEMSIZE;
1022 /* Restrict the memsize to user specified limit */
1023 BRCMF_ERROR(("user: Restrict the dongle ram size to %d, min %d\n",
1024 brcmf_dongle_memsize, min_size));
1025 if ((brcmf_dongle_memsize > min_size) &&
1026 (brcmf_dongle_memsize < (s32) bus->orig_ramsize))
1027 bus->ramsize = brcmf_dongle_memsize;
1030 static int brcmf_sdbrcm_set_siaddr_window(struct brcmf_bus *bus, u32 address)
1033 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1034 SBSDIO_FUNC1_SBADDRLOW,
1035 (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err);
1037 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1038 SBSDIO_FUNC1_SBADDRMID,
1039 (address >> 16) & SBSDIO_SBADDRMID_MASK, &err);
1041 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1042 SBSDIO_FUNC1_SBADDRHIGH,
1043 (address >> 24) & SBSDIO_SBADDRHIGH_MASK,
1048 /* Turn backplane clock on or off */
1049 static int brcmf_sdbrcm_htclk(struct brcmf_bus *bus, bool on, bool pendok)
1052 u8 clkctl, clkreq, devctl;
1053 unsigned long timeout;
1055 BRCMF_TRACE(("%s: Enter\n", __func__));
1060 /* Request HT Avail */
1062 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
1064 if ((bus->ci->chip == BCM4329_CHIP_ID)
1065 && (bus->ci->chiprev == 0))
1066 clkreq |= SBSDIO_FORCE_ALP;
1068 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1069 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
1071 BRCMF_ERROR(("%s: HT Avail request error: %d\n",
1076 if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID)
1077 && (bus->ci->buscorerev == 9))) {
1079 r_sdreg32(bus, &dummy,
1080 offsetof(struct sdpcmd_regs, clockctlstatus),
1084 /* Check current status */
1085 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1086 SBSDIO_FUNC1_CHIPCLKCSR, &err);
1088 BRCMF_ERROR(("%s: HT Avail read error: %d\n",
1093 /* Go to pending and await interrupt if appropriate */
1094 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
1095 /* Allow only clock-available interrupt */
1096 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
1098 SBSDIO_DEVICE_CTL, &err);
1100 BRCMF_ERROR(("%s: Devctl error setting CA:"
1101 " %d\n", __func__, err));
1105 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
1106 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1107 SBSDIO_DEVICE_CTL, devctl, &err);
1108 BRCMF_INFO(("CLKCTL: set PENDING\n"));
1109 bus->clkstate = CLK_PENDING;
1112 } else if (bus->clkstate == CLK_PENDING) {
1113 /* Cancel CA-only interrupt filter */
1115 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1116 SBSDIO_DEVICE_CTL, &err);
1117 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
1118 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1119 SBSDIO_DEVICE_CTL, devctl, &err);
1122 /* Otherwise, wait here (polling) for HT Avail */
1124 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
1125 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
1126 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev,
1128 SBSDIO_FUNC1_CHIPCLKCSR,
1130 if (time_after(jiffies, timeout))
1133 usleep_range(5000, 10000);
1136 BRCMF_ERROR(("%s: HT Avail request error: %d\n",
1140 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
1141 BRCMF_ERROR(("%s: HT Avail timeout (%d): "
1142 "clkctl 0x%02x\n", __func__,
1143 PMU_MAX_TRANSITION_DLY, clkctl));
1147 /* Mark clock available */
1148 bus->clkstate = CLK_AVAIL;
1149 BRCMF_INFO(("CLKCTL: turned ON\n"));
1152 if (bus->alp_only != true) {
1153 if (SBSDIO_ALPONLY(clkctl))
1154 BRCMF_ERROR(("%s: HT Clock should be on.\n",
1157 #endif /* defined (BCMDBG) */
1159 bus->activity = true;
1163 if (bus->clkstate == CLK_PENDING) {
1164 /* Cancel CA-only interrupt filter */
1165 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
1167 SBSDIO_DEVICE_CTL, &err);
1168 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
1169 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1170 SBSDIO_DEVICE_CTL, devctl, &err);
1173 bus->clkstate = CLK_SDONLY;
1174 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1175 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
1176 BRCMF_INFO(("CLKCTL: turned OFF\n"));
1178 BRCMF_ERROR(("%s: Failed access turning clock off:"
1179 " %d\n", __func__, err));
1186 /* Change idle/active SD state */
1187 static int brcmf_sdbrcm_sdclk(struct brcmf_bus *bus, bool on)
1189 BRCMF_TRACE(("%s: Enter\n", __func__));
1192 bus->clkstate = CLK_SDONLY;
1194 bus->clkstate = CLK_NONE;
1199 /* Transition SD and backplane clock readiness */
1200 static int brcmf_sdbrcm_clkctl(struct brcmf_bus *bus, uint target, bool pendok)
1203 uint oldstate = bus->clkstate;
1206 BRCMF_TRACE(("%s: Enter\n", __func__));
1208 /* Early exit if we're already there */
1209 if (bus->clkstate == target) {
1210 if (target == CLK_AVAIL) {
1211 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
1212 bus->activity = true;
1219 /* Make sure SD clock is available */
1220 if (bus->clkstate == CLK_NONE)
1221 brcmf_sdbrcm_sdclk(bus, true);
1222 /* Now request HT Avail on the backplane */
1223 brcmf_sdbrcm_htclk(bus, true, pendok);
1224 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
1225 bus->activity = true;
1229 /* Remove HT request, or bring up SD clock */
1230 if (bus->clkstate == CLK_NONE)
1231 brcmf_sdbrcm_sdclk(bus, true);
1232 else if (bus->clkstate == CLK_AVAIL)
1233 brcmf_sdbrcm_htclk(bus, false, false);
1235 BRCMF_ERROR(("brcmf_sdbrcm_clkctl: request for %d -> %d"
1236 "\n", bus->clkstate, target));
1237 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
1241 /* Make sure to remove HT request */
1242 if (bus->clkstate == CLK_AVAIL)
1243 brcmf_sdbrcm_htclk(bus, false, false);
1244 /* Now remove the SD clock */
1245 brcmf_sdbrcm_sdclk(bus, false);
1246 brcmf_sdbrcm_wd_timer(bus, 0);
1250 BRCMF_INFO(("brcmf_sdbrcm_clkctl: %d -> %d\n",
1251 oldstate, bus->clkstate));
1257 int brcmf_sdbrcm_bussleep(struct brcmf_bus *bus, bool sleep)
1261 BRCMF_INFO(("brcmf_sdbrcm_bussleep: request %s (currently %s)\n",
1262 (sleep ? "SLEEP" : "WAKE"),
1263 (bus->sleeping ? "SLEEP" : "WAKE")));
1265 /* Done if we're already in the requested state */
1266 if (sleep == bus->sleeping)
1269 /* Going to sleep: set the alarm and turn off the lights... */
1271 /* Don't sleep if something is pending */
1272 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
1275 /* Make sure the controller has the bus up */
1276 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1278 /* Tell device to start using OOB wakeup */
1279 w_sdreg32(bus, SMB_USE_OOB,
1280 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1281 if (retries > retry_limit)
1282 BRCMF_ERROR(("CANNOT SIGNAL CHIP, "
1283 "WILL NOT WAKE UP!!\n"));
1285 /* Turn off our contribution to the HT clock request */
1286 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
1288 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1289 SBSDIO_FUNC1_CHIPCLKCSR,
1290 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
1292 /* Isolate the bus */
1293 if (bus->ci->chip != BCM4329_CHIP_ID) {
1294 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1296 SBSDIO_DEVCTL_PADS_ISO, NULL);
1300 bus->sleeping = true;
1303 /* Waking up: bus power up is ok, set local state */
1305 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1306 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
1308 /* Force pad isolation off if possible
1309 (in case power never toggled) */
1310 if ((bus->ci->buscoretype == PCMCIA_CORE_ID)
1311 && (bus->ci->buscorerev >= 10))
1312 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1313 SBSDIO_DEVICE_CTL, 0, NULL);
1315 /* Make sure the controller has the bus up */
1316 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1318 /* Send misc interrupt to indicate OOB not needed */
1319 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
1321 if (retries <= retry_limit)
1322 w_sdreg32(bus, SMB_DEV_INT,
1323 offsetof(struct sdpcmd_regs, tosbmailbox),
1326 if (retries > retry_limit)
1327 BRCMF_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"));
1329 /* Make sure we have SD bus access */
1330 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
1333 bus->sleeping = false;
1339 #define BUS_WAKE(bus) \
1341 if ((bus)->sleeping) \
1342 brcmf_sdbrcm_bussleep((bus), false); \
1345 /* Writes a HW/SW header into the packet and sends it. */
1346 /* Assumes: (a) header space already there, (b) caller holds lock */
1347 static int brcmf_sdbrcm_txpkt(struct brcmf_bus *bus, struct sk_buff *pkt,
1348 uint chan, bool free_pkt)
1355 struct sk_buff *new;
1358 BRCMF_TRACE(("%s: Enter\n", __func__));
1360 if (bus->drvr->dongle_reset) {
1365 frame = (u8 *) (pkt->data);
1367 /* Add alignment padding, allocate new packet if needed */
1368 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1370 if (skb_headroom(pkt) < pad) {
1371 BRCMF_INFO(("%s: insufficient headroom %d for %d pad\n",
1372 __func__, skb_headroom(pkt), pad));
1373 bus->drvr->tx_realloc++;
1374 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
1376 BRCMF_ERROR(("%s: couldn't allocate new "
1377 "%d-byte packet\n", __func__,
1378 pkt->len + BRCMF_SDALIGN));
1383 PKTALIGN(new, pkt->len, BRCMF_SDALIGN);
1384 memcpy(new->data, pkt->data, pkt->len);
1386 brcmu_pkt_buf_free_skb(pkt);
1387 /* free the pkt if canned one is not used */
1390 frame = (u8 *) (pkt->data);
1391 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
1395 frame = (u8 *) (pkt->data);
1396 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
1397 memset(frame, 0, pad + SDPCM_HDRLEN);
1400 /* precondition: pad < BRCMF_SDALIGN */
1402 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1403 len = (u16) (pkt->len);
1404 *(u16 *) frame = cpu_to_le16(len);
1405 *(((u16 *) frame) + 1) = cpu_to_le16(~len);
1407 /* Software tag: channel, sequence number, data offset */
1409 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1411 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1413 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1414 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1417 tx_packets[pkt->priority]++;
1418 if (BRCMF_BYTES_ON() &&
1419 (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
1420 (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
1421 printk(KERN_DEBUG "Tx Frame:\n");
1422 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
1423 } else if (BRCMF_HDRS_ON()) {
1424 printk(KERN_DEBUG "TxHdr:\n");
1425 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1426 frame, min_t(u16, len, 16));
1430 /* Raise len to next SDIO block to eliminate tail command */
1431 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1432 u16 pad = bus->blocksize - (len % bus->blocksize);
1433 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1435 } else if (len % BRCMF_SDALIGN) {
1436 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1439 /* Some controllers have trouble with odd bytes -- round to even */
1440 if (forcealign && (len & (ALIGNMENT - 1)))
1441 len = roundup(len, ALIGNMENT);
1444 ret = brcmf_sdbrcm_send_buf(bus,
1445 brcmf_sdcard_cur_sbwad(bus->sdiodev),
1446 SDIO_FUNC_2, F2SYNC, frame, len, pkt, NULL, NULL);
1450 /* On failure, abort the command
1451 and terminate the frame */
1452 BRCMF_INFO(("%s: sdio error %d, abort command and "
1453 "terminate frame.\n", __func__, ret));
1456 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1457 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1458 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
1462 for (i = 0; i < 3; i++) {
1464 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
1466 SBSDIO_FUNC1_WFRAMEBCHI,
1468 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
1470 SBSDIO_FUNC1_WFRAMEBCLO,
1472 bus->f1regdata += 2;
1473 if ((hi == 0) && (lo == 0))
1479 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1481 } while ((ret < 0) && retrydata && retries++ < TXRETRIES);
1484 /* restore pkt buffer pointer before calling tx complete routine */
1485 skb_pull(pkt, SDPCM_HDRLEN + pad);
1486 brcmf_sdbrcm_sdunlock(bus);
1487 brcmf_txcomplete(bus->drvr, pkt, ret != 0);
1488 brcmf_sdbrcm_sdlock(bus);
1491 brcmu_pkt_buf_free_skb(pkt);
1496 int brcmf_sdbrcm_bus_txdata(struct brcmf_bus *bus, struct sk_buff *pkt)
1501 BRCMF_TRACE(("%s: Enter\n", __func__));
1506 /* Push the test header if doing loopback */
1507 if (bus->ext_loop) {
1509 skb_push(pkt, SDPCM_TEST_HDRLEN);
1511 *data++ = SDPCM_TEST_ECHOREQ;
1512 *data++ = (u8) bus->loopid++;
1513 *data++ = (datalen >> 0);
1514 *data++ = (datalen >> 8);
1515 datalen += SDPCM_TEST_HDRLEN;
1519 /* Add space for the header */
1520 skb_push(pkt, SDPCM_HDRLEN);
1521 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
1523 prec = PRIO2PREC((pkt->priority & PRIOMASK));
1525 /* Check for existing queue, current flow-control,
1526 pending event, or pending clock */
1527 if (brcmf_deferred_tx || bus->fcstate || pktq_len(&bus->txq)
1528 || bus->dpc_sched || (!DATAOK(bus))
1529 || (bus->flowcontrol & NBITVAL(prec))
1530 || (bus->clkstate != CLK_AVAIL)) {
1531 BRCMF_TRACE(("%s: deferring pktq len %d\n", __func__,
1532 pktq_len(&bus->txq)));
1535 /* Priority based enq */
1536 spin_lock_bh(&bus->txqlock);
1537 if (brcmf_c_prec_enq(bus->drvr, &bus->txq, pkt, prec) ==
1539 skb_pull(pkt, SDPCM_HDRLEN);
1540 brcmf_txcomplete(bus->drvr, pkt, false);
1541 brcmu_pkt_buf_free_skb(pkt);
1542 BRCMF_ERROR(("%s: out of bus->txq !!!\n", __func__));
1547 spin_unlock_bh(&bus->txqlock);
1549 if (pktq_len(&bus->txq) >= TXHI)
1550 brcmf_txflowcontrol(bus->drvr, 0, ON);
1553 if (pktq_plen(&bus->txq, prec) > qcount[prec])
1554 qcount[prec] = pktq_plen(&bus->txq, prec);
1556 /* Schedule DPC if needed to send queued packet(s) */
1557 if (brcmf_deferred_tx && !bus->dpc_sched) {
1558 bus->dpc_sched = true;
1559 brcmf_sdbrcm_sched_dpc(bus);
1562 /* Lock: we're about to use shared data/code (and SDIO) */
1563 brcmf_sdbrcm_sdlock(bus);
1565 /* Otherwise, send it now */
1567 /* Make sure back plane ht clk is on, no pending allowed */
1568 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
1571 BRCMF_TRACE(("%s: calling txpkt\n", __func__));
1572 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1574 ret = brcmf_sdbrcm_txpkt(bus, pkt,
1575 (bus->ext_loop ? SDPCM_TEST_CHANNEL :
1576 SDPCM_DATA_CHANNEL), true);
1579 bus->drvr->tx_errors++;
1581 bus->drvr->dstats.tx_bytes += datalen;
1583 if (bus->idletime == BRCMF_IDLE_IMMEDIATE &&
1585 bus->activity = false;
1586 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
1589 brcmf_sdbrcm_sdunlock(bus);
1595 static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes)
1597 struct sk_buff *pkt;
1600 int ret = 0, prec_out;
1605 struct brcmf_pub *drvr = bus->drvr;
1607 BRCMF_TRACE(("%s: Enter\n", __func__));
1609 tx_prec_map = ~bus->flowcontrol;
1611 /* Send frames until the limit or some other event */
1612 for (cnt = 0; (cnt < maxframes) && DATAOK(bus); cnt++) {
1613 spin_lock_bh(&bus->txqlock);
1614 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1616 spin_unlock_bh(&bus->txqlock);
1619 spin_unlock_bh(&bus->txqlock);
1620 datalen = pkt->len - SDPCM_HDRLEN;
1623 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1625 ret = brcmf_sdbrcm_txpkt(bus, pkt,
1626 (bus->ext_loop ? SDPCM_TEST_CHANNEL :
1627 SDPCM_DATA_CHANNEL), true);
1630 bus->drvr->tx_errors++;
1632 bus->drvr->dstats.tx_bytes += datalen;
1634 /* In poll mode, need to check for other events */
1635 if (!bus->intr && cnt) {
1636 /* Check device status, signal pending interrupt */
1637 r_sdreg32(bus, &intstatus,
1638 offsetof(struct sdpcmd_regs, intstatus),
1641 if (brcmf_sdcard_regfail(bus->sdiodev))
1643 if (intstatus & bus->hostintmask)
1648 /* Deflow-control stack if needed */
1649 if (drvr->up && (drvr->busstate == BRCMF_BUS_DATA) &&
1650 drvr->txoff && (pktq_len(&bus->txq) < TXLOW))
1651 brcmf_txflowcontrol(drvr, 0, OFF);
1657 brcmf_sdbrcm_bus_txctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
1667 BRCMF_TRACE(("%s: Enter\n", __func__));
1669 if (bus->drvr->dongle_reset)
1672 /* Back the pointer to make a room for bus header */
1673 frame = msg - SDPCM_HDRLEN;
1674 len = (msglen += SDPCM_HDRLEN);
1676 /* Add alignment padding (optional for ctl frames) */
1677 if (brcmf_alignctl) {
1678 doff = ((unsigned long)frame % BRCMF_SDALIGN);
1683 memset(frame, 0, doff + SDPCM_HDRLEN);
1685 /* precondition: doff < BRCMF_SDALIGN */
1687 doff += SDPCM_HDRLEN;
1689 /* Round send length to next SDIO block */
1690 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1691 u16 pad = bus->blocksize - (len % bus->blocksize);
1692 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1694 } else if (len % BRCMF_SDALIGN) {
1695 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1698 /* Satisfy length-alignment requirements */
1699 if (forcealign && (len & (ALIGNMENT - 1)))
1700 len = roundup(len, ALIGNMENT);
1702 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
1704 /* Need to lock here to protect txseq and SDIO tx calls */
1705 brcmf_sdbrcm_sdlock(bus);
1709 /* Make sure backplane clock is on */
1710 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1712 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1713 *(u16 *) frame = cpu_to_le16((u16) msglen);
1714 *(((u16 *) frame) + 1) = cpu_to_le16(~msglen);
1716 /* Software tag: channel, sequence number, data offset */
1718 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
1720 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
1721 SDPCM_DOFFSET_MASK);
1722 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1723 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1726 BRCMF_INFO(("%s: No bus credit bus->tx_max %d,"
1727 " bus->tx_seq %d\n", __func__,
1728 bus->tx_max, bus->tx_seq));
1729 bus->ctrl_frame_stat = true;
1731 bus->ctrl_frame_buf = frame;
1732 bus->ctrl_frame_len = len;
1734 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
1736 if (bus->ctrl_frame_stat == false) {
1737 BRCMF_INFO(("%s: ctrl_frame_stat == false\n",
1741 BRCMF_INFO(("%s: ctrl_frame_stat == true\n", __func__));
1748 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
1749 printk(KERN_DEBUG "Tx Frame:\n");
1750 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1752 } else if (BRCMF_HDRS_ON()) {
1753 printk(KERN_DEBUG "TxHdr:\n");
1754 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1755 frame, min_t(u16, len, 16));
1760 bus->ctrl_frame_stat = false;
1761 ret = brcmf_sdbrcm_send_buf(bus,
1762 brcmf_sdcard_cur_sbwad(bus->sdiodev),
1764 F2SYNC, frame, len, NULL, NULL, NULL);
1767 /* On failure, abort the command and
1768 terminate the frame */
1769 BRCMF_INFO(("%s: sdio error %d, abort command "
1770 "and terminate frame.\n",
1774 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1776 brcmf_sdcard_cfg_write(bus->sdiodev,
1778 SBSDIO_FUNC1_FRAMECTRL,
1782 for (i = 0; i < 3; i++) {
1784 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
1786 SBSDIO_FUNC1_WFRAMEBCHI,
1788 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
1790 SBSDIO_FUNC1_WFRAMEBCLO,
1792 bus->f1regdata += 2;
1793 if ((hi == 0) && (lo == 0))
1800 (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1802 } while ((ret < 0) && retries++ < TXRETRIES);
1805 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
1806 bus->activity = false;
1807 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
1810 brcmf_sdbrcm_sdunlock(bus);
1813 bus->drvr->tx_ctlerrs++;
1815 bus->drvr->tx_ctlpkts++;
1817 return ret ? -EIO : 0;
1821 brcmf_sdbrcm_bus_rxctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
1827 BRCMF_TRACE(("%s: Enter\n", __func__));
1829 if (bus->drvr->dongle_reset)
1832 /* Wait until control frame is available */
1833 timeleft = brcmf_sdbrcm_ioctl_resp_wait(bus, &bus->rxlen, &pending);
1835 brcmf_sdbrcm_sdlock(bus);
1837 memcpy(msg, bus->rxctl, min(msglen, rxlen));
1839 brcmf_sdbrcm_sdunlock(bus);
1842 BRCMF_CTL(("%s: resumed on rxctl frame, got %d expected %d\n",
1843 __func__, rxlen, msglen));
1844 } else if (timeleft == 0) {
1845 BRCMF_ERROR(("%s: resumed on timeout\n", __func__));
1847 brcmf_sdbrcm_sdlock(bus);
1848 brcmf_sdbrcm_checkdied(bus, NULL, 0);
1849 brcmf_sdbrcm_sdunlock(bus);
1851 } else if (pending == true) {
1852 BRCMF_CTL(("%s: cancelled\n", __func__));
1853 return -ERESTARTSYS;
1855 BRCMF_CTL(("%s: resumed for unknown reason?\n", __func__));
1857 brcmf_sdbrcm_sdlock(bus);
1858 brcmf_sdbrcm_checkdied(bus, NULL, 0);
1859 brcmf_sdbrcm_sdunlock(bus);
1864 bus->drvr->rx_ctlpkts++;
1866 bus->drvr->rx_ctlerrs++;
1868 return rxlen ? (int)rxlen : -ETIMEDOUT;
1911 const struct brcmu_iovar brcmf_sdio_iovars[] = {
1912 {"intr", IOV_INTR, 0, IOVT_BOOL, 0},
1913 {"sleep", IOV_SLEEP, 0, IOVT_BOOL, 0},
1914 {"pollrate", IOV_POLLRATE, 0, IOVT_UINT32, 0},
1915 {"idletime", IOV_IDLETIME, 0, IOVT_INT32, 0},
1916 {"idleclock", IOV_IDLECLOCK, 0, IOVT_INT32, 0},
1917 {"sd1idle", IOV_SD1IDLE, 0, IOVT_BOOL, 0},
1918 {"membytes", IOV_MEMBYTES, 0, IOVT_BUFFER, 2 * sizeof(int)},
1919 {"memsize", IOV_MEMSIZE, 0, IOVT_UINT32, 0},
1920 {"download", IOV_DOWNLOAD, 0, IOVT_BOOL, 0},
1921 {"vars", IOV_VARS, 0, IOVT_BUFFER, 0},
1922 {"sdiod_drive", IOV_SDIOD_DRIVE, 0, IOVT_UINT32, 0},
1923 {"readahead", IOV_READAHEAD, 0, IOVT_BOOL, 0},
1924 {"sdrxchain", IOV_SDRXCHAIN, 0, IOVT_BOOL, 0},
1925 {"alignctl", IOV_ALIGNCTL, 0, IOVT_BOOL, 0},
1926 {"sdalign", IOV_SDALIGN, 0, IOVT_BOOL, 0},
1927 {"devreset", IOV_DEVRESET, 0, IOVT_BOOL, 0},
1928 {"wdtick", IOV_WDTICK, 0, IOVT_UINT32, 0},
1929 {"ioctl_timeout", IOV_IOCTLTIMEOUT, 0, IOVT_UINT32, 0},
1931 {"cons", IOV_CONS, 0, IOVT_BUFFER, 0}
1933 {"dconpoll", IOV_DCONSOLE_POLL, 0, IOVT_UINT32, 0}
1935 {"sdreg", IOV_SDREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
1937 {"sbreg", IOV_SBREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
1939 {"sd_cis", IOV_SDCIS, 0, IOVT_BUFFER, BRCMF_IOCTL_MAXLEN}
1941 {"forcealign", IOV_FORCEEVEN, 0, IOVT_BOOL, 0}
1943 {"txbound", IOV_TXBOUND, 0, IOVT_UINT32, 0}
1945 {"rxbound", IOV_RXBOUND, 0, IOVT_UINT32, 0}
1947 {"txminmax", IOV_TXMINMAX, 0, IOVT_UINT32, 0}
1949 {"cpu", IOV_CPU, 0, IOVT_BOOL, 0}
1951 {"checkdied", IOV_CHECKDIED, 0, IOVT_BUFFER, 0}
1955 {"extloop", IOV_EXTLOOP, 0, IOVT_BOOL, 0}
1957 {"pktgen", IOV_PKTGEN, 0, IOVT_BUFFER, sizeof(struct brcmf_pktgen)}
1965 brcmf_dump_pct(struct brcmu_strbuf *strbuf, char *desc, uint num, uint div)
1970 brcmu_bprintf(strbuf, "%s N/A", desc);
1973 q2 = (100 * (num - (q1 * div))) / div;
1974 brcmu_bprintf(strbuf, "%s %d.%02d", desc, q1, q2);
1978 void brcmf_sdbrcm_bus_dump(struct brcmf_pub *drvr, struct brcmu_strbuf *strbuf)
1980 struct brcmf_bus *bus = drvr->bus;
1982 brcmu_bprintf(strbuf, "Bus SDIO structure:\n");
1983 brcmu_bprintf(strbuf,
1984 "hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n",
1985 bus->hostintmask, bus->intstatus, bus->sdpcm_ver);
1986 brcmu_bprintf(strbuf,
1987 "fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n",
1988 bus->fcstate, pktq_len(&bus->txq), bus->tx_seq, bus->tx_max,
1989 bus->rxskip, bus->rxlen, bus->rx_seq);
1990 brcmu_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n",
1991 bus->intr, bus->intrcount, bus->lastintrs, bus->spurious);
1992 brcmu_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n",
1993 bus->pollrate, bus->pollcnt, bus->regfails);
1995 brcmu_bprintf(strbuf, "\nAdditional counters:\n");
1996 brcmu_bprintf(strbuf,
1997 "tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n",
1998 bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong,
2000 brcmu_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n",
2001 bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq);
2002 brcmu_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n",
2003 bus->fc_rcvd, bus->fc_xoff, bus->fc_xon);
2004 brcmu_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n",
2005 bus->rxglomfail, bus->rxglomframes, bus->rxglompkts);
2006 brcmu_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs"
2008 (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs,
2009 bus->f2rxdata, bus->f2txdata, bus->f1regdata);
2011 brcmf_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->drvr->rx_packets,
2012 (bus->f2rxhdrs + bus->f2rxdata));
2013 brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->rx_packets,
2015 brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->rx_packets,
2016 (bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata));
2017 brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->rx_packets,
2019 brcmu_bprintf(strbuf, "\n");
2021 brcmf_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts),
2022 bus->drvr->rx_packets);
2023 brcmf_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts,
2025 brcmu_bprintf(strbuf, "\n");
2027 brcmf_dump_pct(strbuf, "Tx: pkts/f2wr", bus->drvr->tx_packets,
2029 brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->tx_packets,
2031 brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->tx_packets,
2032 (bus->f2txdata + bus->f1regdata));
2033 brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->tx_packets,
2035 brcmu_bprintf(strbuf, "\n");
2037 brcmf_dump_pct(strbuf, "Total: pkts/f2rw",
2038 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2039 (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata));
2040 brcmf_dump_pct(strbuf, ", pkts/f1sd",
2041 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2043 brcmf_dump_pct(strbuf, ", pkts/sd",
2044 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2045 (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata +
2047 brcmf_dump_pct(strbuf, ", pkts/int",
2048 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2050 brcmu_bprintf(strbuf, "\n\n");
2054 if (bus->pktgen_count) {
2055 brcmu_bprintf(strbuf, "pktgen config and count:\n");
2056 brcmu_bprintf(strbuf,
2057 "freq %d count %d print %d total %d min %d len %d\n",
2058 bus->pktgen_freq, bus->pktgen_count,
2059 bus->pktgen_print, bus->pktgen_total,
2060 bus->pktgen_minlen, bus->pktgen_maxlen);
2061 brcmu_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n",
2062 bus->pktgen_sent, bus->pktgen_rcvd,
2067 brcmu_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n",
2068 bus->dpc_sched, " not ");
2069 brcmu_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize,
2072 brcmu_bprintf(strbuf,
2073 "clkstate %d activity %d idletime %d idlecount %d sleeping %d\n",
2074 bus->clkstate, bus->activity, bus->idletime, bus->idlecount,
2078 void brcmf_bus_clearcounts(struct brcmf_pub *drvr)
2080 struct brcmf_bus *bus = (struct brcmf_bus *) drvr->bus;
2082 bus->intrcount = bus->lastintrs = bus->spurious = bus->regfails = 0;
2083 bus->rxrtx = bus->rx_toolong = bus->rxc_errors = 0;
2084 bus->rx_hdrfail = bus->rx_badhdr = bus->rx_badseq = 0;
2085 bus->tx_sderrs = bus->fc_rcvd = bus->fc_xoff = bus->fc_xon = 0;
2086 bus->rxglomfail = bus->rxglomframes = bus->rxglompkts = 0;
2087 bus->f2rxhdrs = bus->f2rxdata = bus->f2txdata = bus->f1regdata = 0;
2091 static int brcmf_sdbrcm_pktgen_get(struct brcmf_bus *bus, u8 *arg)
2093 struct brcmf_pktgen pktgen;
2095 pktgen.version = BRCMF_PKTGEN_VERSION;
2096 pktgen.freq = bus->pktgen_freq;
2097 pktgen.count = bus->pktgen_count;
2098 pktgen.print = bus->pktgen_print;
2099 pktgen.total = bus->pktgen_total;
2100 pktgen.minlen = bus->pktgen_minlen;
2101 pktgen.maxlen = bus->pktgen_maxlen;
2102 pktgen.numsent = bus->pktgen_sent;
2103 pktgen.numrcvd = bus->pktgen_rcvd;
2104 pktgen.numfail = bus->pktgen_fail;
2105 pktgen.mode = bus->pktgen_mode;
2106 pktgen.stop = bus->pktgen_stop;
2108 memcpy(arg, &pktgen, sizeof(pktgen));
2113 static int brcmf_sdbrcm_pktgen_set(struct brcmf_bus *bus, u8 *arg)
2115 struct brcmf_pktgen pktgen;
2116 uint oldcnt, oldmode;
2118 memcpy(&pktgen, arg, sizeof(pktgen));
2119 if (pktgen.version != BRCMF_PKTGEN_VERSION)
2122 oldcnt = bus->pktgen_count;
2123 oldmode = bus->pktgen_mode;
2125 bus->pktgen_freq = pktgen.freq;
2126 bus->pktgen_count = pktgen.count;
2127 bus->pktgen_print = pktgen.print;
2128 bus->pktgen_total = pktgen.total;
2129 bus->pktgen_minlen = pktgen.minlen;
2130 bus->pktgen_maxlen = pktgen.maxlen;
2131 bus->pktgen_mode = pktgen.mode;
2132 bus->pktgen_stop = pktgen.stop;
2134 bus->pktgen_tick = bus->pktgen_ptick = 0;
2135 bus->pktgen_len = max(bus->pktgen_len, bus->pktgen_minlen);
2136 bus->pktgen_len = min(bus->pktgen_len, bus->pktgen_maxlen);
2138 /* Clear counts for a new pktgen (mode change, or was stopped) */
2139 if (bus->pktgen_count && (!oldcnt || oldmode != bus->pktgen_mode))
2140 bus->pktgen_sent = bus->pktgen_rcvd = bus->pktgen_fail = 0;
2147 brcmf_sdbrcm_membytes(struct brcmf_bus *bus, bool write, u32 address, u8 *data,
2154 /* Determine initial transfer parameters */
2155 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2156 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2157 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2161 /* Set the backplane window to include the start address */
2162 bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
2164 BRCMF_ERROR(("%s: window change failed\n", __func__));
2168 /* Do the transfer(s) */
2170 BRCMF_INFO(("%s: %s %d bytes at offset 0x%08x in window"
2171 " 0x%08x\n", __func__, (write ? "write" : "read"),
2172 dsize, sdaddr, (address & SBSDIO_SBWINDOW_MASK)));
2173 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2174 sdaddr, data, dsize);
2176 BRCMF_ERROR(("%s: membytes transfer failed\n",
2181 /* Adjust for next transfer (if any) */
2186 bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
2188 BRCMF_ERROR(("%s: window change failed\n",
2193 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2198 /* Return the window to backplane enumeration space for core access */
2199 if (brcmf_sdbrcm_set_siaddr_window(bus,
2200 brcmf_sdcard_cur_sbwad(
2202 BRCMF_ERROR(("%s: FAILED to set window back to 0x%x\n",
2203 __func__, brcmf_sdcard_cur_sbwad(bus->sdiodev)));
2210 brcmf_sdbrcm_readshared(struct brcmf_bus *bus, struct sdpcm_shared *sh)
2215 /* Read last word in memory to determine address of
2216 sdpcm_shared structure */
2217 rv = brcmf_sdbrcm_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr,
2222 addr = le32_to_cpu(addr);
2224 BRCMF_INFO(("sdpcm_shared address 0x%08X\n", addr));
2227 * Check if addr is valid.
2228 * NVRAM length at the end of memory should have been overwritten.
2230 if (addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff)) {
2231 BRCMF_ERROR(("%s: address (0x%08x) of sdpcm_shared invalid\n",
2236 /* Read rte_shared structure */
2237 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *) sh,
2238 sizeof(struct sdpcm_shared));
2243 sh->flags = le32_to_cpu(sh->flags);
2244 sh->trap_addr = le32_to_cpu(sh->trap_addr);
2245 sh->assert_exp_addr = le32_to_cpu(sh->assert_exp_addr);
2246 sh->assert_file_addr = le32_to_cpu(sh->assert_file_addr);
2247 sh->assert_line = le32_to_cpu(sh->assert_line);
2248 sh->console_addr = le32_to_cpu(sh->console_addr);
2249 sh->msgtrace_addr = le32_to_cpu(sh->msgtrace_addr);
2251 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2252 BRCMF_ERROR(("%s: sdpcm_shared version %d in brcmf "
2253 "is different than sdpcm_shared version %d in dongle\n",
2254 __func__, SDPCM_SHARED_VERSION,
2255 sh->flags & SDPCM_SHARED_VERSION_MASK));
2262 static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size)
2266 char *mbuffer = NULL;
2267 uint maxstrlen = 256;
2269 struct brcmf_trap tr;
2270 struct sdpcm_shared sdpcm_shared;
2271 struct brcmu_strbuf strbuf;
2273 BRCMF_TRACE(("%s: Enter\n", __func__));
2277 * Called after a rx ctrl timeout. "data" is NULL.
2278 * allocate memory to trace the trap or assert.
2281 mbuffer = data = kmalloc(msize, GFP_ATOMIC);
2282 if (mbuffer == NULL) {
2283 BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__,
2290 str = kmalloc(maxstrlen, GFP_ATOMIC);
2292 BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__, maxstrlen));
2297 bcmerror = brcmf_sdbrcm_readshared(bus, &sdpcm_shared);
2301 brcmu_binit(&strbuf, data, size);
2303 brcmu_bprintf(&strbuf,
2304 "msgtrace address : 0x%08X\nconsole address : 0x%08X\n",
2305 sdpcm_shared.msgtrace_addr, sdpcm_shared.console_addr);
2307 if ((sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2308 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2309 * (Avoids conflict with real asserts for programmatic
2310 * parsing of output.)
2312 brcmu_bprintf(&strbuf, "Assrt not built in dongle\n");
2314 if ((sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) ==
2316 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2317 * (Avoids conflict with real asserts for programmatic
2318 * parsing of output.)
2320 brcmu_bprintf(&strbuf, "No trap%s in dongle",
2321 (sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT)
2324 if (sdpcm_shared.flags & SDPCM_SHARED_ASSERT) {
2325 /* Download assert */
2326 brcmu_bprintf(&strbuf, "Dongle assert");
2327 if (sdpcm_shared.assert_exp_addr != 0) {
2329 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2330 sdpcm_shared.assert_exp_addr,
2331 (u8 *) str, maxstrlen);
2335 str[maxstrlen - 1] = '\0';
2336 brcmu_bprintf(&strbuf, " expr \"%s\"", str);
2339 if (sdpcm_shared.assert_file_addr != 0) {
2341 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2342 sdpcm_shared.assert_file_addr,
2343 (u8 *) str, maxstrlen);
2347 str[maxstrlen - 1] = '\0';
2348 brcmu_bprintf(&strbuf, " file \"%s\"", str);
2351 brcmu_bprintf(&strbuf, " line %d ",
2352 sdpcm_shared.assert_line);
2355 if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
2356 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2357 sdpcm_shared.trap_addr, (u8 *)&tr,
2358 sizeof(struct brcmf_trap));
2362 brcmu_bprintf(&strbuf,
2363 "Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x,"
2364 "lp 0x%x, rpc 0x%x Trap offset 0x%x, "
2365 "r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n",
2366 tr.type, tr.epc, tr.cpsr, tr.spsr, tr.r13,
2367 tr.r14, tr.pc, sdpcm_shared.trap_addr,
2368 tr.r0, tr.r1, tr.r2, tr.r3, tr.r4, tr.r5,
2373 if (sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP))
2374 BRCMF_ERROR(("%s: %s\n", __func__, strbuf.origbuf));
2377 if (sdpcm_shared.flags & SDPCM_SHARED_TRAP)
2378 /* Mem dump to a file on device */
2379 brcmf_sdbrcm_mem_dump(bus);
2390 static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus)
2393 int size; /* Full mem size */
2394 int start = 0; /* Start address */
2395 int read_size = 0; /* Read size of each iteration */
2396 u8 *buf = NULL, *databuf = NULL;
2398 /* Get full mem size */
2399 size = bus->ramsize;
2400 buf = kmalloc(size, GFP_ATOMIC);
2402 BRCMF_ERROR(("%s: Out of memory (%d bytes)\n", __func__, size));
2406 /* Read mem content */
2407 printk(KERN_DEBUG "Dump dongle memory");
2410 read_size = min(MEMBLOCK, size);
2411 ret = brcmf_sdbrcm_membytes(bus, false, start, databuf,
2414 BRCMF_ERROR(("%s: Error membytes %d\n", __func__, ret));
2420 /* Decrement size and increment start address */
2423 databuf += read_size;
2425 printk(KERN_DEBUG "Done\n");
2427 /* free buf before return !!! */
2428 if (brcmf_write_to_file(bus->drvr, buf, bus->ramsize)) {
2429 BRCMF_ERROR(("%s: Error writing to files\n", __func__));
2433 /* buf free handled in brcmf_write_to_file, not here */
2437 #define CONSOLE_LINE_MAX 192
2439 static int brcmf_sdbrcm_readconsole(struct brcmf_bus *bus)
2441 struct brcmf_console *c = &bus->console;
2442 u8 line[CONSOLE_LINE_MAX], ch;
2446 /* Don't do anything until FWREADY updates console address */
2447 if (bus->console_addr == 0)
2450 /* Read console log struct */
2451 addr = bus->console_addr + offsetof(struct rte_console, log);
2452 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log,
2457 /* Allocate console buffer (one time only) */
2458 if (c->buf == NULL) {
2459 c->bufsize = le32_to_cpu(c->log.buf_size);
2460 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2465 idx = le32_to_cpu(c->log.idx);
2467 /* Protect against corrupt value */
2468 if (idx > c->bufsize)
2471 /* Skip reading the console buffer if the index pointer
2476 /* Read the console buffer */
2477 addr = le32_to_cpu(c->log.buf);
2478 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2482 while (c->last != idx) {
2483 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2484 if (c->last == idx) {
2485 /* This would output a partial line.
2487 * the buffer pointer and output this
2488 * line next time around.
2493 c->last = c->bufsize - n;
2496 ch = c->buf[c->last];
2497 c->last = (c->last + 1) % c->bufsize;
2504 if (line[n - 1] == '\r')
2507 printk(KERN_DEBUG "CONSOLE: %s\n", line);
2516 int brcmf_sdbrcm_downloadvars(struct brcmf_bus *bus, void *arg, int len)
2520 BRCMF_TRACE(("%s: Enter\n", __func__));
2522 /* Basic sanity checks */
2523 if (bus->drvr->up) {
2524 bcmerror = -EISCONN;
2528 bcmerror = -EOVERFLOW;
2532 /* Free the old ones and replace with passed variables */
2535 bus->vars = kmalloc(len, GFP_ATOMIC);
2536 bus->varsz = bus->vars ? len : 0;
2537 if (bus->vars == NULL) {
2542 /* Copy the passed variables, which should include the
2543 terminating double-null */
2544 memcpy(bus->vars, arg, bus->varsz);
2549 static int brcmf_sdbrcm_doiovar(struct brcmf_bus *bus,
2550 const struct brcmu_iovar *vi, u32 actionid,
2551 const char *name, void *params, int plen,
2552 void *arg, int len, int val_size)
2558 BRCMF_TRACE(("%s: Enter, action %d name %s params %p plen %d arg %p "
2559 "len %d val_size %d\n", __func__, actionid, name, params,
2560 plen, arg, len, val_size));
2562 bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
2566 if (plen >= (int)sizeof(int_val))
2567 memcpy(&int_val, params, sizeof(int_val));
2569 bool_val = (int_val != 0) ? true : false;
2571 /* Some ioctls use the bus */
2572 brcmf_sdbrcm_sdlock(bus);
2574 /* Check if dongle is in reset. If so, only allow DEVRESET iovars */
2575 if (bus->drvr->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) ||
2576 actionid == IOV_GVAL(IOV_DEVRESET))) {
2581 /* Handle sleep stuff before any clock mucking */
2582 if (vi->varid == IOV_SLEEP) {
2583 if (IOV_ISSET(actionid)) {
2584 bcmerror = brcmf_sdbrcm_bussleep(bus, bool_val);
2586 int_val = (s32) bus->sleeping;
2587 memcpy(arg, &int_val, val_size);
2592 /* Request clock to allow SDIO accesses */
2593 if (!bus->drvr->dongle_reset) {
2595 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2599 case IOV_GVAL(IOV_INTR):
2600 int_val = (s32) bus->intr;
2601 memcpy(arg, &int_val, val_size);
2604 case IOV_SVAL(IOV_INTR):
2605 bus->intr = bool_val;
2608 case IOV_GVAL(IOV_POLLRATE):
2609 int_val = (s32) bus->pollrate;
2610 memcpy(arg, &int_val, val_size);
2613 case IOV_SVAL(IOV_POLLRATE):
2614 bus->pollrate = (uint) int_val;
2615 bus->poll = (bus->pollrate != 0);
2618 case IOV_GVAL(IOV_IDLETIME):
2619 int_val = bus->idletime;
2620 memcpy(arg, &int_val, val_size);
2623 case IOV_SVAL(IOV_IDLETIME):
2624 if ((int_val < 0) && (int_val != BRCMF_IDLE_IMMEDIATE))
2627 bus->idletime = int_val;
2630 case IOV_GVAL(IOV_IDLECLOCK):
2631 int_val = (s32) bus->idleclock;
2632 memcpy(arg, &int_val, val_size);
2635 case IOV_SVAL(IOV_IDLECLOCK):
2636 bus->idleclock = int_val;
2639 case IOV_GVAL(IOV_SD1IDLE):
2640 int_val = (s32) sd1idle;
2641 memcpy(arg, &int_val, val_size);
2644 case IOV_SVAL(IOV_SD1IDLE):
2648 case IOV_SVAL(IOV_MEMBYTES):
2649 case IOV_GVAL(IOV_MEMBYTES):
2655 bool set = (actionid == IOV_SVAL(IOV_MEMBYTES));
2657 address = (u32) int_val;
2658 memcpy(&int_val, (char *)params + sizeof(int_val),
2660 size = (uint) int_val;
2662 /* Do some validation */
2663 dsize = set ? plen - (2 * sizeof(int)) : len;
2665 BRCMF_ERROR(("%s: error on %s membytes, addr "
2666 "0x%08x size %d dsize %d\n",
2667 __func__, (set ? "set" : "get"),
2668 address, size, dsize));
2673 BRCMF_INFO(("%s: Request to %s %d bytes at address "
2674 "0x%08x\n", __func__,
2675 (set ? "write" : "read"), size, address));
2677 /* If we know about SOCRAM, check for a fit */
2678 if ((bus->orig_ramsize) &&
2679 ((address > bus->orig_ramsize)
2680 || (address + size > bus->orig_ramsize))) {
2681 BRCMF_ERROR(("%s: ramsize 0x%08x doesn't have"
2682 " %d bytes at 0x%08x\n", __func__,
2683 bus->orig_ramsize, size, address));
2688 /* Generate the actual data pointer */
2690 set ? (u8 *) params +
2691 2 * sizeof(int) : (u8 *) arg;
2693 /* Call to do the transfer */
2694 bcmerror = brcmf_sdbrcm_membytes(bus, set, address,
2700 case IOV_GVAL(IOV_MEMSIZE):
2701 int_val = (s32) bus->ramsize;
2702 memcpy(arg, &int_val, val_size);
2705 case IOV_GVAL(IOV_SDIOD_DRIVE):
2706 int_val = (s32) brcmf_sdiod_drive_strength;
2707 memcpy(arg, &int_val, val_size);
2710 case IOV_SVAL(IOV_SDIOD_DRIVE):
2711 brcmf_sdiod_drive_strength = int_val;
2712 brcmf_sdbrcm_sdiod_drive_strength_init(bus,
2713 brcmf_sdiod_drive_strength);
2716 case IOV_SVAL(IOV_DOWNLOAD):
2717 bcmerror = brcmf_sdbrcm_download_state(bus, bool_val);
2720 case IOV_SVAL(IOV_VARS):
2721 bcmerror = brcmf_sdbrcm_downloadvars(bus, arg, len);
2724 case IOV_GVAL(IOV_READAHEAD):
2725 int_val = (s32) brcmf_readahead;
2726 memcpy(arg, &int_val, val_size);
2729 case IOV_SVAL(IOV_READAHEAD):
2730 if (bool_val && !brcmf_readahead)
2732 brcmf_readahead = bool_val;
2735 case IOV_GVAL(IOV_SDRXCHAIN):
2736 int_val = (s32) bus->use_rxchain;
2737 memcpy(arg, &int_val, val_size);
2740 case IOV_SVAL(IOV_SDRXCHAIN):
2741 if (bool_val && !bus->sd_rxchain)
2742 bcmerror = -ENOTSUPP;
2744 bus->use_rxchain = bool_val;
2746 case IOV_GVAL(IOV_ALIGNCTL):
2747 int_val = (s32) brcmf_alignctl;
2748 memcpy(arg, &int_val, val_size);
2751 case IOV_SVAL(IOV_ALIGNCTL):
2752 brcmf_alignctl = bool_val;
2755 case IOV_GVAL(IOV_SDALIGN):
2756 int_val = BRCMF_SDALIGN;
2757 memcpy(arg, &int_val, val_size);
2761 case IOV_GVAL(IOV_VARS):
2762 if (bus->varsz < (uint) len)
2763 memcpy(arg, bus->vars, bus->varsz);
2765 bcmerror = -EOVERFLOW;
2770 case IOV_GVAL(IOV_DCONSOLE_POLL):
2771 int_val = (s32) brcmf_console_ms;
2772 memcpy(arg, &int_val, val_size);
2775 case IOV_SVAL(IOV_DCONSOLE_POLL):
2776 brcmf_console_ms = (uint) int_val;
2779 case IOV_SVAL(IOV_CONS):
2781 bcmerror = brcmf_sdbrcm_bus_console_in(bus->drvr,
2785 case IOV_GVAL(IOV_SDREG):
2787 struct brcmf_sdreg *sd_ptr;
2790 sd_ptr = (struct brcmf_sdreg *) params;
2792 addr = bus->ci->buscorebase + sd_ptr->offset;
2793 size = sd_ptr->func;
2794 int_val = (s32) brcmf_sdcard_reg_read(bus->sdiodev,
2796 if (brcmf_sdcard_regfail(bus->sdiodev))
2798 memcpy(arg, &int_val, sizeof(s32));
2802 case IOV_SVAL(IOV_SDREG):
2804 struct brcmf_sdreg *sd_ptr;
2807 sd_ptr = (struct brcmf_sdreg *) params;
2809 addr = bus->ci->buscorebase + sd_ptr->offset;
2810 size = sd_ptr->func;
2811 brcmf_sdcard_reg_write(bus->sdiodev, addr, size,
2813 if (brcmf_sdcard_regfail(bus->sdiodev))
2818 /* Same as above, but offset is not backplane
2820 case IOV_GVAL(IOV_SBREG):
2822 struct brcmf_sdreg sdreg;
2825 memcpy(&sdreg, params, sizeof(sdreg));
2827 addr = SI_ENUM_BASE + sdreg.offset;
2829 int_val = (s32) brcmf_sdcard_reg_read(bus->sdiodev,
2831 if (brcmf_sdcard_regfail(bus->sdiodev))
2833 memcpy(arg, &int_val, sizeof(s32));
2837 case IOV_SVAL(IOV_SBREG):
2839 struct brcmf_sdreg sdreg;
2842 memcpy(&sdreg, params, sizeof(sdreg));
2844 addr = SI_ENUM_BASE + sdreg.offset;
2846 brcmf_sdcard_reg_write(bus->sdiodev, addr, size,
2848 if (brcmf_sdcard_regfail(bus->sdiodev))
2853 case IOV_GVAL(IOV_SDCIS):
2857 strcat(arg, "\nFunc 0\n");
2858 brcmf_sdcard_cis_read(bus->sdiodev, 0x10,
2859 (u8 *) arg + strlen(arg),
2860 SBSDIO_CIS_SIZE_LIMIT);
2861 strcat(arg, "\nFunc 1\n");
2862 brcmf_sdcard_cis_read(bus->sdiodev, 0x11,
2863 (u8 *) arg + strlen(arg),
2864 SBSDIO_CIS_SIZE_LIMIT);
2865 strcat(arg, "\nFunc 2\n");
2866 brcmf_sdcard_cis_read(bus->sdiodev, 0x12,
2867 (u8 *) arg + strlen(arg),
2868 SBSDIO_CIS_SIZE_LIMIT);
2872 case IOV_GVAL(IOV_FORCEEVEN):
2873 int_val = (s32) forcealign;
2874 memcpy(arg, &int_val, val_size);
2877 case IOV_SVAL(IOV_FORCEEVEN):
2878 forcealign = bool_val;
2881 case IOV_GVAL(IOV_TXBOUND):
2882 int_val = (s32) brcmf_txbound;
2883 memcpy(arg, &int_val, val_size);
2886 case IOV_SVAL(IOV_TXBOUND):
2887 brcmf_txbound = (uint) int_val;
2890 case IOV_GVAL(IOV_RXBOUND):
2891 int_val = (s32) brcmf_rxbound;
2892 memcpy(arg, &int_val, val_size);
2895 case IOV_SVAL(IOV_RXBOUND):
2896 brcmf_rxbound = (uint) int_val;
2899 case IOV_GVAL(IOV_TXMINMAX):
2900 int_val = (s32) brcmf_txminmax;
2901 memcpy(arg, &int_val, val_size);
2904 case IOV_SVAL(IOV_TXMINMAX):
2905 brcmf_txminmax = (uint) int_val;
2910 case IOV_GVAL(IOV_EXTLOOP):
2911 int_val = (s32) bus->ext_loop;
2912 memcpy(arg, &int_val, val_size);
2915 case IOV_SVAL(IOV_EXTLOOP):
2916 bus->ext_loop = bool_val;
2919 case IOV_GVAL(IOV_PKTGEN):
2920 bcmerror = brcmf_sdbrcm_pktgen_get(bus, arg);
2923 case IOV_SVAL(IOV_PKTGEN):
2924 bcmerror = brcmf_sdbrcm_pktgen_set(bus, arg);
2928 case IOV_SVAL(IOV_DEVRESET):
2929 BRCMF_TRACE(("%s: Called set IOV_DEVRESET=%d dongle_reset=%d "
2931 __func__, bool_val, bus->drvr->dongle_reset,
2932 bus->drvr->busstate));
2934 brcmf_bus_devreset(bus->drvr, (u8) bool_val);
2938 case IOV_GVAL(IOV_DEVRESET):
2939 BRCMF_TRACE(("%s: Called get IOV_DEVRESET\n", __func__));
2941 /* Get its status */
2942 int_val = (bool) bus->drvr->dongle_reset;
2943 memcpy(arg, &int_val, val_size);
2947 case IOV_GVAL(IOV_WDTICK):
2948 int_val = (s32) brcmf_watchdog_ms;
2949 memcpy(arg, &int_val, val_size);
2952 case IOV_SVAL(IOV_WDTICK):
2953 if (!bus->drvr->up) {
2954 bcmerror = -ENOLINK;
2957 brcmf_sdbrcm_wd_timer(bus, (uint) int_val);
2960 case IOV_GVAL(IOV_IOCTLTIMEOUT):{
2961 int_val = brcmf_ioctl_timeout_msec;
2962 memcpy(arg, &int_val, sizeof(int_val));
2966 case IOV_SVAL(IOV_IOCTLTIMEOUT):{
2970 brcmf_ioctl_timeout_msec = int_val;
2975 bcmerror = -ENOTSUPP;
2980 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2981 bus->activity = false;
2982 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2985 brcmf_sdbrcm_sdunlock(bus);
2987 if (actionid == IOV_SVAL(IOV_DEVRESET) && bool_val == false)
2988 brcmf_c_preinit_ioctls(bus->drvr);
2993 static int brcmf_sdbrcm_write_vars(struct brcmf_bus *bus)
3001 char *nvram_ularray;
3004 /* Even if there are no vars are to be written, we still
3005 need to set the ramsize. */
3006 varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
3007 varaddr = (bus->ramsize - 4) - varsize;
3010 vbuffer = kzalloc(varsize, GFP_ATOMIC);
3014 memcpy(vbuffer, bus->vars, bus->varsz);
3016 /* Write the vars list */
3018 brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
3020 /* Verify NVRAM bytes */
3021 BRCMF_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize));
3022 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
3026 /* Upload image to verify downloaded contents. */
3027 memset(nvram_ularray, 0xaa, varsize);
3029 /* Read the vars list to temp buffer for comparison */
3031 brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
3034 BRCMF_ERROR(("%s: error %d on reading %d nvram bytes"
3035 " at 0x%08x\n", __func__, bcmerror,
3038 /* Compare the org NVRAM with the one read from RAM */
3039 if (memcmp(vbuffer, nvram_ularray, varsize))
3040 BRCMF_ERROR(("%s: Downloaded NVRAM image is "
3041 "corrupted.\n", __func__));
3043 BRCMF_ERROR(("%s: Download/Upload/Compare of"
3044 " NVRAM ok.\n", __func__));
3046 kfree(nvram_ularray);
3052 /* adjust to the user specified RAM */
3053 BRCMF_INFO(("Physical memory size: %d, usable memory size: %d\n",
3054 bus->orig_ramsize, bus->ramsize));
3055 BRCMF_INFO(("Vars are at %d, orig varsize is %d\n", varaddr, varsize));
3056 varsize = ((bus->orig_ramsize - 4) - varaddr);
3059 * Determine the length token:
3060 * Varsize, converted to words, in lower 16-bits, checksum
3066 varsizew = varsize / 4;
3067 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3068 varsizew = cpu_to_le32(varsizew);
3071 BRCMF_INFO(("New varsize is %d, length token=0x%08x\n", varsize,
3074 /* Write the length token to the last word */
3075 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->orig_ramsize - 4),
3076 (u8 *)&varsizew, 4);
3081 static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
3087 /* To enter download state, disable ARM and reset SOCRAM.
3088 * To exit download state, simply reset ARM (default is RAM boot).
3091 bus->alp_only = true;
3093 brcmf_sdbrcm_chip_disablecore(bus->sdiodev,
3094 bus->ci->armcorebase);
3096 brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->ramcorebase);
3098 /* Clear the top bit of memory */
3101 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3105 regdata = brcmf_sdcard_reg_read(bus->sdiodev,
3106 CORE_SB(bus->ci->ramcorebase, sbtmstatelow), 4);
3107 regdata &= (SBTML_RESET | SBTML_REJ_MASK |
3108 (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
3109 if ((SICF_CLOCK_EN << SBTML_SICF_SHIFT) != regdata) {
3110 BRCMF_ERROR(("%s: SOCRAM core is down after reset?\n",
3116 bcmerror = brcmf_sdbrcm_write_vars(bus);
3118 BRCMF_ERROR(("%s: no vars written to RAM\n", __func__));
3122 w_sdreg32(bus, 0xFFFFFFFF,
3123 offsetof(struct sdpcmd_regs, intstatus), &retries);
3125 brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->armcorebase);
3127 /* Allow HT Clock now that the ARM is running. */
3128 bus->alp_only = false;
3130 bus->drvr->busstate = BRCMF_BUS_LOAD;
3137 brcmf_sdbrcm_bus_iovar_op(struct brcmf_pub *drvr, const char *name,
3138 void *params, int plen, void *arg, int len, bool set)
3140 struct brcmf_bus *bus = drvr->bus;
3141 const struct brcmu_iovar *vi = NULL;
3146 BRCMF_TRACE(("%s: Enter\n", __func__));
3148 if (name == NULL || len < 0)
3151 /* Set does not take qualifiers */
3152 if (set && (params || plen))
3155 /* Get must have return space;*/
3156 if (!set && !(arg && len))
3159 /* Look up var locally; if not found pass to host driver */
3160 vi = brcmu_iovar_lookup(brcmf_sdio_iovars, name);
3162 brcmf_sdbrcm_sdlock(bus);
3166 /* Turn on clock in case SD command needs backplane */
3167 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3169 bcmerror = brcmf_sdcard_iovar_op(bus->sdiodev, name, params,
3170 plen, arg, len, set);
3172 if (bus->idletime == BRCMF_IDLE_IMMEDIATE &&
3174 bus->activity = false;
3175 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
3178 brcmf_sdbrcm_sdunlock(bus);
3182 BRCMF_CTL(("%s: %s %s, len %d plen %d\n", __func__,
3183 name, (set ? "set" : "get"), len, plen));
3185 /* set up 'params' pointer in case this is a set command so that
3186 * the convenience int and bool code can be common to set and get
3188 if (params == NULL) {
3193 if (vi->type == IOVT_VOID)
3195 else if (vi->type == IOVT_BUFFER)
3198 /* all other types are integer sized */
3199 val_size = sizeof(int);
3201 actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
3202 bcmerror = brcmf_sdbrcm_doiovar(bus, vi, actionid, name, params, plen,
3203 arg, len, val_size);
3209 void brcmf_sdbrcm_bus_stop(struct brcmf_bus *bus, bool enforce_mutex)
3211 u32 local_hostintmask;
3216 BRCMF_TRACE(("%s: Enter\n", __func__));
3219 brcmf_sdbrcm_sdlock(bus);
3223 /* Enable clock for device interrupts */
3224 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3226 if (bus->watchdog_tsk) {
3227 send_sig(SIGTERM, bus->watchdog_tsk, 1);
3228 kthread_stop(bus->watchdog_tsk);
3229 bus->watchdog_tsk = NULL;
3233 send_sig(SIGTERM, bus->dpc_tsk, 1);
3234 kthread_stop(bus->dpc_tsk);
3235 bus->dpc_tsk = NULL;
3237 tasklet_kill(&bus->tasklet);
3239 /* Disable and clear interrupts at the chip level also */
3240 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
3241 local_hostintmask = bus->hostintmask;
3242 bus->hostintmask = 0;
3244 /* Change our idea of bus state */
3245 bus->drvr->busstate = BRCMF_BUS_DOWN;
3247 /* Force clocks on backplane to be sure F2 interrupt propagates */
3248 saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3249 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3251 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3252 SBSDIO_FUNC1_CHIPCLKCSR,
3253 (saveclk | SBSDIO_FORCE_HT), &err);
3256 BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n",
3259 /* Turn off the bus (F2), free any pending packets */
3260 BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__));
3261 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3262 SDIO_FUNC_ENABLE_1, NULL);
3264 /* Clear any pending interrupts now that F2 is disabled */
3265 w_sdreg32(bus, local_hostintmask,
3266 offsetof(struct sdpcmd_regs, intstatus), &retries);
3268 /* Turn off the backplane clock (only) */
3269 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3271 /* Clear the data packet queues */
3272 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
3274 /* Clear any held glomming stuff */
3276 brcmu_pkt_buf_free_skb(bus->glomd);
3279 brcmu_pkt_buf_free_skb(bus->glom);
3281 bus->glom = bus->glomd = NULL;
3283 /* Clear rx control and wake any waiters */
3285 brcmf_sdbrcm_ioctl_resp_wake(bus);
3287 /* Reset some F2 state stuff */
3288 bus->rxskip = false;
3289 bus->tx_seq = bus->rx_seq = 0;
3292 brcmf_sdbrcm_sdunlock(bus);
3295 int brcmf_sdbrcm_bus_init(struct brcmf_pub *drvr, bool enforce_mutex)
3297 struct brcmf_bus *bus = drvr->bus;
3298 unsigned long timeout;
3304 BRCMF_TRACE(("%s: Enter\n", __func__));
3306 /* try to download image and nvram to the dongle */
3307 if (drvr->busstate == BRCMF_BUS_DOWN) {
3308 if (!(brcmf_sdbrcm_download_firmware(bus, bus->sdiodev)))
3315 /* Start the watchdog timer */
3316 bus->drvr->tickcnt = 0;
3317 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
3320 brcmf_sdbrcm_sdlock(bus);
3322 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3323 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3324 if (bus->clkstate != CLK_AVAIL)
3327 /* Force clocks on backplane to be sure F2 interrupt propagates */
3329 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3330 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3332 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3333 SBSDIO_FUNC1_CHIPCLKCSR,
3334 (saveclk | SBSDIO_FORCE_HT), &err);
3337 BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n",
3342 /* Enable function 2 (frame transfers) */
3343 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3344 offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3345 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3347 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3350 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3352 while (enable != ready) {
3353 ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0,
3354 SDIO_CCCR_IORx, NULL);
3355 if (time_after(jiffies, timeout))
3357 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3358 /* prevent busy waiting if it takes too long */
3359 msleep_interruptible(20);
3362 BRCMF_INFO(("%s: enable 0x%02x, ready 0x%02x\n",
3363 __func__, enable, ready));
3365 /* If F2 successfully enabled, set core and enable interrupts */
3366 if (ready == enable) {
3367 /* Set up the interrupt mask and enable interrupts */
3368 bus->hostintmask = HOSTINTMASK;
3369 w_sdreg32(bus, bus->hostintmask,
3370 offsetof(struct sdpcmd_regs, hostintmask), &retries);
3372 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3373 SBSDIO_WATERMARK, (u8) watermark, &err);
3375 /* Set bus state according to enable result */
3376 drvr->busstate = BRCMF_BUS_DATA;
3380 /* Disable F2 again */
3381 enable = SDIO_FUNC_ENABLE_1;
3382 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
3383 SDIO_CCCR_IOEx, enable, NULL);
3386 /* Restore previous clock setting */
3387 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3388 SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3390 #if defined(OOB_INTR_ONLY)
3391 /* Host registration for OOB interrupt */
3392 if (brcmf_sdio_register_oob_intr(bus->dhd)) {
3393 brcmf_sdbrcm_wd_timer(bus, 0);
3394 BRCMF_ERROR(("%s Host failed to resgister for OOB\n",
3400 /* Enable oob at firmware */
3401 brcmf_sdbrcm_enable_oob_intr(bus, true);
3402 #endif /* defined(OOB_INTR_ONLY) */
3404 /* If we didn't come up, turn off backplane clock */
3405 if (drvr->busstate != BRCMF_BUS_DATA)
3406 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3410 brcmf_sdbrcm_sdunlock(bus);
3415 static void brcmf_sdbrcm_rxfail(struct brcmf_bus *bus, bool abort, bool rtx)
3422 BRCMF_ERROR(("%s: %sterminate frame%s\n", __func__,
3423 (abort ? "abort command, " : ""),
3424 (rtx ? ", send NAK" : "")));
3427 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
3429 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3430 SBSDIO_FUNC1_FRAMECTRL,
3434 /* Wait until the packet has been flushed (device/FIFO stable) */
3435 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
3436 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3437 SBSDIO_FUNC1_RFRAMEBCHI, NULL);
3438 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3439 SBSDIO_FUNC1_RFRAMEBCLO, NULL);
3440 bus->f1regdata += 2;
3442 if ((hi == 0) && (lo == 0))
3445 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
3446 BRCMF_ERROR(("%s: count growing: last 0x%04x now "
3448 __func__, lastrbc, ((hi << 8) + lo)));
3450 lastrbc = (hi << 8) + lo;
3454 BRCMF_ERROR(("%s: count never zeroed: last 0x%04x\n",
3455 __func__, lastrbc));
3457 BRCMF_INFO(("%s: flush took %d iterations\n", __func__,
3458 (0xffff - retries)));
3462 w_sdreg32(bus, SMB_NAK,
3463 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
3466 if (retries <= retry_limit)
3470 /* Clear partial in any case */
3473 /* If we can't reach the device, signal failure */
3474 if (err || brcmf_sdcard_regfail(bus->sdiodev))
3475 bus->drvr->busstate = BRCMF_BUS_DOWN;
3479 brcmf_sdbrcm_read_control(struct brcmf_bus *bus, u8 *hdr, uint len, uint doff)
3485 BRCMF_TRACE(("%s: Enter\n", __func__));
3487 /* Control data already received in aligned rxctl */
3488 if ((bus->bus == SPI_BUS) && (!bus->usebufpool))
3491 /* Set rxctl for frame (w/optional alignment) */
3492 bus->rxctl = bus->rxbuf;
3493 if (brcmf_alignctl) {
3494 bus->rxctl += firstread;
3495 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
3497 bus->rxctl += (BRCMF_SDALIGN - pad);
3498 bus->rxctl -= firstread;
3501 /* Copy the already-read portion over */
3502 memcpy(bus->rxctl, hdr, firstread);
3503 if (len <= firstread)
3506 /* Copy the full data pkt in gSPI case and process ioctl. */
3507 if (bus->bus == SPI_BUS) {
3508 memcpy(bus->rxctl, hdr, len);
3512 /* Raise rdlen to next SDIO block to avoid tail command */
3513 rdlen = len - firstread;
3514 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
3515 pad = bus->blocksize - (rdlen % bus->blocksize);
3516 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
3517 ((len + pad) < bus->drvr->maxctl))
3519 } else if (rdlen % BRCMF_SDALIGN) {
3520 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
3523 /* Satisfy length-alignment requirements */
3524 if (forcealign && (rdlen & (ALIGNMENT - 1)))
3525 rdlen = roundup(rdlen, ALIGNMENT);
3527 /* Drop if the read is too big or it exceeds our maximum */
3528 if ((rdlen + firstread) > bus->drvr->maxctl) {
3529 BRCMF_ERROR(("%s: %d-byte control read exceeds %d-byte"
3530 " buffer\n", __func__, rdlen, bus->drvr->maxctl));
3531 bus->drvr->rx_errors++;
3532 brcmf_sdbrcm_rxfail(bus, false, false);
3536 if ((len - doff) > bus->drvr->maxctl) {
3537 BRCMF_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds "
3539 __func__, len, (len - doff), bus->drvr->maxctl));
3540 bus->drvr->rx_errors++;
3542 brcmf_sdbrcm_rxfail(bus, false, false);
3546 /* Read remainder of frame body into the rxctl buffer */
3547 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
3548 brcmf_sdcard_cur_sbwad(bus->sdiodev),
3550 F2SYNC, (bus->rxctl + firstread), rdlen,
3554 /* Control frame failures need retransmission */
3556 BRCMF_ERROR(("%s: read %d control bytes failed: %d\n",
3557 __func__, rdlen, sdret));
3559 brcmf_sdbrcm_rxfail(bus, true, true);
3566 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
3567 printk(KERN_DEBUG "RxCtrl:\n");
3568 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
3572 /* Point to valid data and indicate its length */
3574 bus->rxlen = len - doff;
3577 /* Awake any waiters */
3578 brcmf_sdbrcm_ioctl_resp_wake(bus);
3581 static u8 brcmf_sdbrcm_rxglom(struct brcmf_bus *bus, u8 rxseq)
3587 struct sk_buff *pfirst, *plast, *pnext, *save_pfirst;
3590 u8 chan, seq, doff, sfdoff;
3594 bool usechain = bus->use_rxchain;
3596 /* If packets, issue read(s) and send up packet chain */
3597 /* Return sequence numbers consumed? */
3599 BRCMF_TRACE(("brcmf_sdbrcm_rxglom: start: glomd %p glom %p\n",
3600 bus->glomd, bus->glom));
3602 /* If there's a descriptor, generate the packet chain */
3604 pfirst = plast = pnext = NULL;
3605 dlen = (u16) (bus->glomd->len);
3606 dptr = bus->glomd->data;
3607 if (!dlen || (dlen & 1)) {
3608 BRCMF_ERROR(("%s: bad glomd len(%d),"
3609 " ignore descriptor\n",
3614 for (totlen = num = 0; dlen; num++) {
3615 /* Get (and move past) next length */
3616 sublen = get_unaligned_le16(dptr);
3617 dlen -= sizeof(u16);
3618 dptr += sizeof(u16);
3619 if ((sublen < SDPCM_HDRLEN) ||
3620 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
3621 BRCMF_ERROR(("%s: descriptor len %d bad: %d\n",
3622 __func__, num, sublen));
3626 if (sublen % BRCMF_SDALIGN) {
3627 BRCMF_ERROR(("%s: sublen %d not multiple of"
3628 " %d\n", __func__, sublen,
3634 /* For last frame, adjust read len so total
3635 is a block multiple */
3638 (roundup(totlen, bus->blocksize) - totlen);
3639 totlen = roundup(totlen, bus->blocksize);
3642 /* Allocate/chain packet for next subframe */
3643 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
3644 if (pnext == NULL) {
3645 BRCMF_ERROR(("%s: bcm_pkt_buf_get_skb failed, "
3646 "num %d len %d\n", __func__,
3651 pfirst = plast = pnext;
3653 plast->next = pnext;
3657 /* Adhere to start alignment requirements */
3658 PKTALIGN(pnext, sublen, BRCMF_SDALIGN);
3661 /* If all allocations succeeded, save packet chain
3664 BRCMF_GLOM(("%s: allocated %d-byte packet chain for %d "
3665 "subframes\n", __func__, totlen, num));
3666 if (BRCMF_GLOM_ON() && bus->nextlen) {
3667 if (totlen != bus->nextlen) {
3668 BRCMF_GLOM(("%s: glomdesc mismatch: "
3669 "nextlen %d glomdesc %d "
3670 "rxseq %d\n", __func__,
3676 pfirst = pnext = NULL;
3679 brcmu_pkt_buf_free_skb(pfirst);
3684 /* Done with descriptor packet */
3685 brcmu_pkt_buf_free_skb(bus->glomd);
3690 /* Ok -- either we just generated a packet chain,
3691 or had one from before */
3693 if (BRCMF_GLOM_ON()) {
3694 BRCMF_GLOM(("%s: try superframe read, packet chain:\n",
3696 for (pnext = bus->glom; pnext; pnext = pnext->next) {
3697 BRCMF_GLOM((" %p: %p len 0x%04x (%d)\n",
3698 pnext, (u8 *) (pnext->data),
3699 pnext->len, pnext->len));
3704 dlen = (u16) brcmu_pkttotlen(pfirst);
3706 /* Do an SDIO read for the superframe. Configurable iovar to
3707 * read directly into the chained packet, or allocate a large
3708 * packet and and copy into the chain.
3711 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
3712 brcmf_sdcard_cur_sbwad(bus->sdiodev),
3714 F2SYNC, (u8 *) pfirst->data, dlen,
3715 pfirst, NULL, NULL);
3716 } else if (bus->dataptr) {
3717 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
3718 brcmf_sdcard_cur_sbwad(bus->sdiodev),
3720 F2SYNC, bus->dataptr, dlen,
3722 sublen = (u16) brcmu_pktfrombuf(pfirst, 0, dlen,
3724 if (sublen != dlen) {
3725 BRCMF_ERROR(("%s: FAILED TO COPY, dlen %d "
3727 __func__, dlen, sublen));
3732 BRCMF_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, "
3733 "FORCE FAILURE\n", dlen));
3738 /* On failure, kill the superframe, allow a couple retries */
3740 BRCMF_ERROR(("%s: glom read of %d bytes failed: %d\n",
3741 __func__, dlen, errcode));
3742 bus->drvr->rx_errors++;
3744 if (bus->glomerr++ < 3) {
3745 brcmf_sdbrcm_rxfail(bus, true, true);
3748 brcmf_sdbrcm_rxfail(bus, true, false);
3749 brcmu_pkt_buf_free_skb(bus->glom);
3756 if (BRCMF_GLOM_ON()) {
3757 printk(KERN_DEBUG "SUPERFRAME:\n");
3758 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3759 pfirst->data, min_t(int, pfirst->len, 48));
3763 /* Validate the superframe header */
3764 dptr = (u8 *) (pfirst->data);
3765 sublen = get_unaligned_le16(dptr);
3766 check = get_unaligned_le16(dptr + sizeof(u16));
3768 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3769 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
3770 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
3771 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
3772 BRCMF_INFO(("%s: nextlen too large (%d) seq %d\n",
3773 __func__, bus->nextlen, seq));
3776 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3777 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3780 if ((u16)~(sublen ^ check)) {
3781 BRCMF_ERROR(("%s (superframe): HW hdr error: len/check "
3782 "0x%04x/0x%04x\n", __func__, sublen,
3785 } else if (roundup(sublen, bus->blocksize) != dlen) {
3786 BRCMF_ERROR(("%s (superframe): len 0x%04x, rounded "
3787 "0x%04x, expect 0x%04x\n",
3789 roundup(sublen, bus->blocksize), dlen));
3791 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
3792 SDPCM_GLOM_CHANNEL) {
3793 BRCMF_ERROR(("%s (superframe): bad channel %d\n",
3795 SDPCM_PACKET_CHANNEL(&dptr
3796 [SDPCM_FRAMETAG_LEN])));
3798 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
3799 BRCMF_ERROR(("%s (superframe): got 2nd descriptor?\n",
3802 } else if ((doff < SDPCM_HDRLEN) ||
3803 (doff > (pfirst->len - SDPCM_HDRLEN))) {
3804 BRCMF_ERROR(("%s (superframe): Bad data offset %d: "
3805 "HW %d pkt %d min %d\n",
3806 __func__, doff, sublen,
3807 pfirst->len, SDPCM_HDRLEN));
3811 /* Check sequence number of superframe SW header */
3813 BRCMF_INFO(("%s: (superframe) rx_seq %d, expected %d\n",
3814 __func__, seq, rxseq));
3819 /* Check window for sanity */
3820 if ((u8) (txmax - bus->tx_seq) > 0x40) {
3821 BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
3822 __func__, txmax, bus->tx_seq));
3823 txmax = bus->tx_seq + 2;
3825 bus->tx_max = txmax;
3827 /* Remove superframe header, remember offset */
3828 skb_pull(pfirst, doff);
3831 /* Validate all the subframe headers */
3832 for (num = 0, pnext = pfirst; pnext && !errcode;
3833 num++, pnext = pnext->next) {
3834 dptr = (u8 *) (pnext->data);
3835 dlen = (u16) (pnext->len);
3836 sublen = get_unaligned_le16(dptr);
3837 check = get_unaligned_le16(dptr + sizeof(u16));
3838 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3839 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3841 if (BRCMF_GLOM_ON()) {
3842 printk(KERN_DEBUG "subframe:\n");
3843 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3848 if ((u16)~(sublen ^ check)) {
3849 BRCMF_ERROR(("%s (subframe %d): HW hdr error: "
3850 "len/check 0x%04x/0x%04x\n",
3851 __func__, num, sublen, check));
3853 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
3854 BRCMF_ERROR(("%s (subframe %d): length mismatch"
3855 ": len 0x%04x, expect 0x%04x\n",
3856 __func__, num, sublen, dlen));
3858 } else if ((chan != SDPCM_DATA_CHANNEL) &&
3859 (chan != SDPCM_EVENT_CHANNEL)) {
3860 BRCMF_ERROR(("%s (subframe %d): bad channel"
3861 " %d\n", __func__, num, chan));
3863 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
3864 BRCMF_ERROR(("%s (subframe %d): Bad data offset"
3865 " %d: HW %d min %d\n",
3866 __func__, num, doff, sublen,
3873 /* Terminate frame on error, request
3875 if (bus->glomerr++ < 3) {
3876 /* Restore superframe header space */
3877 skb_push(pfirst, sfdoff);
3878 brcmf_sdbrcm_rxfail(bus, true, true);
3881 brcmf_sdbrcm_rxfail(bus, true, false);
3882 brcmu_pkt_buf_free_skb(bus->glom);
3890 /* Basic SD framing looks ok - process each packet (header) */
3891 save_pfirst = pfirst;
3895 for (num = 0; pfirst; rxseq++, pfirst = pnext) {
3896 pnext = pfirst->next;
3897 pfirst->next = NULL;
3899 dptr = (u8 *) (pfirst->data);
3900 sublen = get_unaligned_le16(dptr);
3901 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3902 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
3903 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3905 BRCMF_GLOM(("%s: Get subframe %d, %p(%p/%d), sublen %d "
3907 __func__, num, pfirst, pfirst->data,
3908 pfirst->len, sublen, chan, seq));
3910 /* precondition: chan == SDPCM_DATA_CHANNEL ||
3911 chan == SDPCM_EVENT_CHANNEL */
3914 BRCMF_GLOM(("%s: rx_seq %d, expected %d\n",
3915 __func__, seq, rxseq));
3920 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
3921 printk(KERN_DEBUG "Rx Subframe Data:\n");
3922 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3927 __skb_trim(pfirst, sublen);
3928 skb_pull(pfirst, doff);
3930 if (pfirst->len == 0) {
3931 brcmu_pkt_buf_free_skb(pfirst);
3933 plast->next = pnext;
3935 save_pfirst = pnext;
3938 } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx,
3940 BRCMF_ERROR(("%s: rx protocol error\n",
3942 bus->drvr->rx_errors++;
3943 brcmu_pkt_buf_free_skb(pfirst);
3945 plast->next = pnext;
3947 save_pfirst = pnext;
3952 /* this packet will go up, link back into
3953 chain and count it */
3954 pfirst->next = pnext;
3959 if (BRCMF_GLOM_ON()) {
3960 BRCMF_GLOM(("%s subframe %d to stack, %p"
3961 "(%p/%d) nxt/lnk %p/%p\n",
3962 __func__, num, pfirst, pfirst->data,
3963 pfirst->len, pfirst->next,
3965 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3967 min_t(int, pfirst->len, 32));
3972 brcmf_sdbrcm_sdunlock(bus);
3973 brcmf_rx_frame(bus->drvr, ifidx, save_pfirst, num);
3974 brcmf_sdbrcm_sdlock(bus);
3977 bus->rxglomframes++;
3978 bus->rxglompkts += num;
3983 /* Return true if there may be more frames to read */
3985 brcmf_sdbrcm_readframes(struct brcmf_bus *bus, uint maxframes, bool *finished)
3987 u16 len, check; /* Extracted hardware header fields */
3988 u8 chan, seq, doff; /* Extracted software header fields */
3989 u8 fcbits; /* Extracted fcbits from software header */
3991 struct sk_buff *pkt; /* Packet for event or data frames */
3992 u16 pad; /* Number of pad bytes to read */
3993 u16 rdlen; /* Total number of bytes to read */
3994 u8 rxseq; /* Next sequence number to expect */
3995 uint rxleft = 0; /* Remaining number of frames allowed */
3996 int sdret; /* Return code from calls */
3997 u8 txmax; /* Maximum tx sequence offered */
3998 bool len_consistent; /* Result of comparing readahead len and
4002 uint rxcount = 0; /* Total frames read */
4004 #if defined(BCMDBG) || defined(SDTEST)
4005 bool sdtest = false; /* To limit message spew from test mode */
4008 BRCMF_TRACE(("%s: Enter\n", __func__));
4011 /* Allow pktgen to override maxframes */
4012 if (bus->pktgen_count && (bus->pktgen_mode == BRCMF_PKTGEN_RECV)) {
4013 maxframes = bus->pktgen_count;
4018 /* Not finished unless we encounter no more frames indication */
4021 for (rxseq = bus->rx_seq, rxleft = maxframes;
4022 !bus->rxskip && rxleft && bus->drvr->busstate != BRCMF_BUS_DOWN;
4023 rxseq++, rxleft--) {
4025 /* Handle glomming separately */
4026 if (bus->glom || bus->glomd) {
4028 BRCMF_GLOM(("%s: calling rxglom: glomd %p, glom %p\n",
4029 __func__, bus->glomd, bus->glom));
4030 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
4031 BRCMF_GLOM(("%s: rxglom returned %d\n", __func__, cnt));
4033 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
4037 /* Try doing single read if we can */
4038 if (brcmf_readahead && bus->nextlen) {
4039 u16 nextlen = bus->nextlen;
4042 if (bus->bus == SPI_BUS) {
4043 rdlen = len = nextlen;
4045 rdlen = len = nextlen << 4;
4047 /* Pad read to blocksize for efficiency */
4048 if (bus->roundup && bus->blocksize
4049 && (rdlen > bus->blocksize)) {
4052 (rdlen % bus->blocksize);
4053 if ((pad <= bus->roundup)
4054 && (pad < bus->blocksize)
4055 && ((rdlen + pad + firstread) <
4058 } else if (rdlen % BRCMF_SDALIGN) {
4059 rdlen += BRCMF_SDALIGN -
4060 (rdlen % BRCMF_SDALIGN);
4064 /* We use bus->rxctl buffer in WinXP for initial
4065 * control pkt receives.
4066 * Later we use buffer-poll for data as well
4067 * as control packets.
4068 * This is required because dhd receives full
4069 * frame in gSPI unlike SDIO.
4070 * After the frame is received we have to
4071 * distinguish whether it is data
4072 * or non-data frame.
4074 /* Allocate a packet buffer */
4075 pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
4077 if (bus->bus == SPI_BUS) {
4078 bus->usebufpool = false;
4079 bus->rxctl = bus->rxbuf;
4080 if (brcmf_alignctl) {
4081 bus->rxctl += firstread;
4082 pad = ((unsigned long)bus->rxctl
4086 (BRCMF_SDALIGN - pad);
4087 bus->rxctl -= firstread;
4090 /* Read the entire frame */
4091 sdret = brcmf_sdcard_recv_buf(
4093 brcmf_sdcard_cur_sbwad(
4095 SDIO_FUNC_2, F2SYNC,
4100 /* Control frame failures need
4103 BRCMF_ERROR(("%s: read %d "
4108 /* dhd.rx_ctlerrs is higher */
4110 brcmf_sdbrcm_rxfail(bus, true,
4118 request rtx of events */
4119 BRCMF_ERROR(("%s (nextlen): "
4120 "brcmu_pkt_buf_get_skb "
4122 " len %d rdlen %d expected"
4123 " rxseq %d\n", __func__,
4124 len, rdlen, rxseq));
4128 if (bus->bus == SPI_BUS)
4129 bus->usebufpool = true;
4131 PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
4132 rxbuf = (u8 *) (pkt->data);
4133 /* Read the entire frame */
4134 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
4135 brcmf_sdcard_cur_sbwad(
4137 SDIO_FUNC_2, F2SYNC,
4143 BRCMF_ERROR(("%s (nextlen): read %d"
4144 " bytes failed: %d\n",
4145 __func__, rdlen, sdret));
4146 brcmu_pkt_buf_free_skb(pkt);
4147 bus->drvr->rx_errors++;
4148 /* Force retry w/normal header read.
4149 * Don't attempt NAK for
4152 brcmf_sdbrcm_rxfail(bus, true,
4160 /* Now check the header */
4161 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
4163 /* Extract hardware header fields */
4164 len = get_unaligned_le16(bus->rxhdr);
4165 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
4167 /* All zeros means readahead info was bad */
4168 if (!(len | check)) {
4169 BRCMF_INFO(("%s (nextlen): read zeros in HW "
4170 "header???\n", __func__));
4171 brcmf_sdbrcm_pktfree2(bus, pkt);
4175 /* Validate check bytes */
4176 if ((u16)~(len ^ check)) {
4177 BRCMF_ERROR(("%s (nextlen): HW hdr error:"
4178 " nextlen/len/check"
4179 " 0x%04x/0x%04x/0x%04x\n",
4180 __func__, nextlen, len, check));
4182 brcmf_sdbrcm_rxfail(bus, false, false);
4183 brcmf_sdbrcm_pktfree2(bus, pkt);
4187 /* Validate frame length */
4188 if (len < SDPCM_HDRLEN) {
4189 BRCMF_ERROR(("%s (nextlen): HW hdr length "
4190 "invalid: %d\n", __func__, len));
4191 brcmf_sdbrcm_pktfree2(bus, pkt);
4195 /* Check for consistency withreadahead info */
4196 len_consistent = (nextlen != (roundup(len, 16) >> 4));
4197 if (len_consistent) {
4198 /* Mismatch, force retry w/normal
4199 header (may be >4K) */
4200 BRCMF_ERROR(("%s (nextlen): mismatch, "
4201 "nextlen %d len %d rnd %d; "
4202 "expected rxseq %d\n",
4204 len, roundup(len, 16), rxseq));
4205 brcmf_sdbrcm_rxfail(bus, true,
4206 bus->bus != SPI_BUS);
4207 brcmf_sdbrcm_pktfree2(bus, pkt);
4211 /* Extract software header fields */
4212 chan = SDPCM_PACKET_CHANNEL(
4213 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4214 seq = SDPCM_PACKET_SEQUENCE(
4215 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4216 doff = SDPCM_DOFFSET_VALUE(
4217 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4218 txmax = SDPCM_WINDOW_VALUE(
4219 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4222 bus->rxhdr[SDPCM_FRAMETAG_LEN +
4223 SDPCM_NEXTLEN_OFFSET];
4224 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
4225 BRCMF_INFO(("%s (nextlen): got frame w/nextlen"
4226 " too large (%d), seq %d\n",
4227 __func__, bus->nextlen, seq));
4231 bus->drvr->rx_readahead_cnt++;
4233 /* Handle Flow Control */
4234 fcbits = SDPCM_FCMASK_VALUE(
4235 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4237 if (bus->flowcontrol != fcbits) {
4238 if (~bus->flowcontrol & fcbits)
4241 if (bus->flowcontrol & ~fcbits)
4245 bus->flowcontrol = fcbits;
4248 /* Check and update sequence number */
4250 BRCMF_INFO(("%s (nextlen): rx_seq %d, expected "
4251 "%d\n", __func__, seq, rxseq));
4256 /* Check window for sanity */
4257 if ((u8) (txmax - bus->tx_seq) > 0x40) {
4258 BRCMF_ERROR(("%s: got unlikely tx max %d with "
4260 __func__, txmax, bus->tx_seq));
4261 txmax = bus->tx_seq + 2;
4263 bus->tx_max = txmax;
4266 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
4267 printk(KERN_DEBUG "Rx Data:\n");
4268 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4270 } else if (BRCMF_HDRS_ON()) {
4271 printk(KERN_DEBUG "RxHdr:\n");
4272 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4273 bus->rxhdr, SDPCM_HDRLEN);
4277 if (chan == SDPCM_CONTROL_CHANNEL) {
4278 if (bus->bus == SPI_BUS) {
4279 brcmf_sdbrcm_read_control(bus, rxbuf,
4282 BRCMF_ERROR(("%s (nextlen): readahead"
4283 " on control packet %d?\n",
4285 /* Force retry w/normal header read */
4287 brcmf_sdbrcm_rxfail(bus, false, true);
4289 brcmf_sdbrcm_pktfree2(bus, pkt);
4293 if ((bus->bus == SPI_BUS) && !bus->usebufpool) {
4294 BRCMF_ERROR(("Received %d bytes on %d channel."
4295 " Running out of " "rx pktbuf's or"
4296 " not yet malloced.\n",
4301 /* Validate data offset */
4302 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
4303 BRCMF_ERROR(("%s (nextlen): bad data offset %d:"
4304 " HW len %d min %d\n", __func__,
4305 doff, len, SDPCM_HDRLEN));
4306 brcmf_sdbrcm_rxfail(bus, false, false);
4307 brcmf_sdbrcm_pktfree2(bus, pkt);
4311 /* All done with this one -- now deliver the packet */
4314 /* gSPI frames should not be handled in fractions */
4315 if (bus->bus == SPI_BUS)
4318 /* Read frame header (hardware and software) */
4319 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
4320 brcmf_sdcard_cur_sbwad(bus->sdiodev),
4321 SDIO_FUNC_2, F2SYNC, bus->rxhdr, firstread,
4326 BRCMF_ERROR(("%s: RXHEADER FAILED: %d\n", __func__,
4329 brcmf_sdbrcm_rxfail(bus, true, true);
4333 if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) {
4334 printk(KERN_DEBUG "RxHdr:\n");
4335 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4336 bus->rxhdr, SDPCM_HDRLEN);
4340 /* Extract hardware header fields */
4341 len = get_unaligned_le16(bus->rxhdr);
4342 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
4344 /* All zeros means no more frames */
4345 if (!(len | check)) {
4350 /* Validate check bytes */
4351 if ((u16) ~(len ^ check)) {
4352 BRCMF_ERROR(("%s: HW hdr err: len/check "
4353 "0x%04x/0x%04x\n", __func__, len, check));
4355 brcmf_sdbrcm_rxfail(bus, false, false);
4359 /* Validate frame length */
4360 if (len < SDPCM_HDRLEN) {
4361 BRCMF_ERROR(("%s: HW hdr length invalid: %d\n",
4366 /* Extract software header fields */
4367 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4368 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4369 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4370 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4372 /* Validate data offset */
4373 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
4374 BRCMF_ERROR(("%s: Bad data offset %d: HW len %d,"
4375 " min %d seq %d\n", __func__, doff,
4376 len, SDPCM_HDRLEN, seq));
4378 brcmf_sdbrcm_rxfail(bus, false, false);
4382 /* Save the readahead length if there is one */
4384 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
4385 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
4386 BRCMF_INFO(("%s (nextlen): got frame w/nextlen too"
4387 " large (%d), seq %d\n",
4388 __func__, bus->nextlen, seq));
4392 /* Handle Flow Control */
4393 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4395 if (bus->flowcontrol != fcbits) {
4396 if (~bus->flowcontrol & fcbits)
4399 if (bus->flowcontrol & ~fcbits)
4403 bus->flowcontrol = fcbits;
4406 /* Check and update sequence number */
4408 BRCMF_INFO(("%s: rx_seq %d, expected %d\n", __func__,
4414 /* Check window for sanity */
4415 if ((u8) (txmax - bus->tx_seq) > 0x40) {
4416 BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
4417 __func__, txmax, bus->tx_seq));
4418 txmax = bus->tx_seq + 2;
4420 bus->tx_max = txmax;
4422 /* Call a separate function for control frames */
4423 if (chan == SDPCM_CONTROL_CHANNEL) {
4424 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
4428 /* precondition: chan is either SDPCM_DATA_CHANNEL,
4429 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
4430 SDPCM_GLOM_CHANNEL */
4432 /* Length to read */
4433 rdlen = (len > firstread) ? (len - firstread) : 0;
4435 /* May pad read to blocksize for efficiency */
4436 if (bus->roundup && bus->blocksize &&
4437 (rdlen > bus->blocksize)) {
4438 pad = bus->blocksize - (rdlen % bus->blocksize);
4439 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
4440 ((rdlen + pad + firstread) < MAX_RX_DATASZ))
4442 } else if (rdlen % BRCMF_SDALIGN) {
4443 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
4446 /* Satisfy length-alignment requirements */
4447 if (forcealign && (rdlen & (ALIGNMENT - 1)))
4448 rdlen = roundup(rdlen, ALIGNMENT);
4450 if ((rdlen + firstread) > MAX_RX_DATASZ) {
4451 /* Too long -- skip this frame */
4452 BRCMF_ERROR(("%s: too long: len %d rdlen %d\n",
4453 __func__, len, rdlen));
4454 bus->drvr->rx_errors++;
4456 brcmf_sdbrcm_rxfail(bus, false, false);
4460 pkt = brcmu_pkt_buf_get_skb(rdlen + firstread + BRCMF_SDALIGN);
4462 /* Give up on data, request rtx of events */
4463 BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed:"
4464 " rdlen %d chan %d\n", __func__, rdlen,
4466 bus->drvr->rx_dropped++;
4467 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
4471 /* Leave room for what we already read, and align remainder */
4472 skb_pull(pkt, firstread);
4473 PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
4475 /* Read the remaining frame data */
4476 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
4477 brcmf_sdcard_cur_sbwad(bus->sdiodev),
4478 SDIO_FUNC_2, F2SYNC, ((u8 *) (pkt->data)),
4479 rdlen, pkt, NULL, NULL);
4483 BRCMF_ERROR(("%s: read %d %s bytes failed: %d\n",
4485 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
4486 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
4487 : "test")), sdret));
4488 brcmu_pkt_buf_free_skb(pkt);
4489 bus->drvr->rx_errors++;
4490 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
4494 /* Copy the already-read portion */
4495 skb_push(pkt, firstread);
4496 memcpy(pkt->data, bus->rxhdr, firstread);
4499 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
4500 printk(KERN_DEBUG "Rx Data:\n");
4501 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4507 /* Save superframe descriptor and allocate packet frame */
4508 if (chan == SDPCM_GLOM_CHANNEL) {
4509 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
4510 BRCMF_GLOM(("%s: glom descriptor, %d bytes:\n",
4513 if (BRCMF_GLOM_ON()) {
4514 printk(KERN_DEBUG "Glom Data:\n");
4515 print_hex_dump_bytes("",
4520 __skb_trim(pkt, len);
4521 skb_pull(pkt, SDPCM_HDRLEN);
4524 BRCMF_ERROR(("%s: glom superframe w/o "
4525 "descriptor!\n", __func__));
4526 brcmf_sdbrcm_rxfail(bus, false, false);
4531 /* Fill in packet len and prio, deliver upward */
4532 __skb_trim(pkt, len);
4533 skb_pull(pkt, doff);
4536 /* Test channel packets are processed separately */
4537 if (chan == SDPCM_TEST_CHANNEL) {
4538 brcmf_sdbrcm_checkdied(bus, pkt, seq);
4543 if (pkt->len == 0) {
4544 brcmu_pkt_buf_free_skb(pkt);
4546 } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pkt) != 0) {
4547 BRCMF_ERROR(("%s: rx protocol error\n", __func__));
4548 brcmu_pkt_buf_free_skb(pkt);
4549 bus->drvr->rx_errors++;
4553 /* Unlock during rx call */
4554 brcmf_sdbrcm_sdunlock(bus);
4555 brcmf_rx_frame(bus->drvr, ifidx, pkt, 1);
4556 brcmf_sdbrcm_sdlock(bus);
4558 rxcount = maxframes - rxleft;
4560 /* Message if we hit the limit */
4561 if (!rxleft && !sdtest)
4562 BRCMF_DATA(("%s: hit rx limit of %d frames\n", __func__,
4566 BRCMF_DATA(("%s: processed %d frames\n", __func__, rxcount));
4567 /* Back off rxseq if awaiting rtx, update rx_seq */
4570 bus->rx_seq = rxseq;
4575 static u32 brcmf_sdbrcm_hostmail(struct brcmf_bus *bus)
4582 BRCMF_TRACE(("%s: Enter\n", __func__));
4584 /* Read mailbox data and ack that we did so */
4585 r_sdreg32(bus, &hmb_data,
4586 offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
4588 if (retries <= retry_limit)
4589 w_sdreg32(bus, SMB_INT_ACK,
4590 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
4591 bus->f1regdata += 2;
4593 /* Dongle recomposed rx frames, accept them again */
4594 if (hmb_data & HMB_DATA_NAKHANDLED) {
4595 BRCMF_INFO(("Dongle reports NAK handled, expect rtx of %d\n",
4598 BRCMF_ERROR(("%s: unexpected NAKHANDLED!\n", __func__));
4600 bus->rxskip = false;
4601 intstatus |= I_HMB_FRAME_IND;
4605 * DEVREADY does not occur with gSPI.
4607 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
4609 (hmb_data & HMB_DATA_VERSION_MASK) >>
4610 HMB_DATA_VERSION_SHIFT;
4611 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
4612 BRCMF_ERROR(("Version mismatch, dongle reports %d, "
4614 bus->sdpcm_ver, SDPCM_PROT_VERSION));
4616 BRCMF_INFO(("Dongle ready, protocol version %d\n",
4621 * Flow Control has been moved into the RX headers and this out of band
4622 * method isn't used any more.
4623 * remaining backward compatible with older dongles.
4625 if (hmb_data & HMB_DATA_FC) {
4626 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
4627 HMB_DATA_FCDATA_SHIFT;
4629 if (fcbits & ~bus->flowcontrol)
4632 if (bus->flowcontrol & ~fcbits)
4636 bus->flowcontrol = fcbits;
4639 /* Shouldn't be any others */
4640 if (hmb_data & ~(HMB_DATA_DEVREADY |
4641 HMB_DATA_NAKHANDLED |
4644 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
4645 BRCMF_ERROR(("Unknown mailbox data content: 0x%02x\n",
4651 static bool brcmf_sdbrcm_dpc(struct brcmf_bus *bus)
4653 u32 intstatus, newstatus = 0;
4655 uint rxlimit = brcmf_rxbound; /* Rx frames to read before resched */
4656 uint txlimit = brcmf_txbound; /* Tx frames to send before resched */
4657 uint framecnt = 0; /* Temporary counter of tx/rx frames */
4658 bool rxdone = true; /* Flag for no more read data */
4659 bool resched = false; /* Flag indicating resched wanted */
4661 BRCMF_TRACE(("%s: Enter\n", __func__));
4663 /* Start with leftover status bits */
4664 intstatus = bus->intstatus;
4666 brcmf_sdbrcm_sdlock(bus);
4668 /* If waiting for HTAVAIL, check status */
4669 if (bus->clkstate == CLK_PENDING) {
4671 u8 clkctl, devctl = 0;
4674 /* Check for inconsistent device control */
4675 devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
4676 SBSDIO_DEVICE_CTL, &err);
4678 BRCMF_ERROR(("%s: error reading DEVCTL: %d\n",
4680 bus->drvr->busstate = BRCMF_BUS_DOWN;
4684 /* Read CSR, if clock on switch to AVAIL, else ignore */
4685 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
4686 SBSDIO_FUNC1_CHIPCLKCSR, &err);
4688 BRCMF_ERROR(("%s: error reading CSR: %d\n", __func__,
4690 bus->drvr->busstate = BRCMF_BUS_DOWN;
4693 BRCMF_INFO(("DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
4696 if (SBSDIO_HTAV(clkctl)) {
4697 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
4699 SBSDIO_DEVICE_CTL, &err);
4701 BRCMF_ERROR(("%s: error reading DEVCTL: %d\n",
4703 bus->drvr->busstate = BRCMF_BUS_DOWN;
4705 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
4706 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
4707 SBSDIO_DEVICE_CTL, devctl, &err);
4709 BRCMF_ERROR(("%s: error writing DEVCTL: %d\n",
4711 bus->drvr->busstate = BRCMF_BUS_DOWN;
4713 bus->clkstate = CLK_AVAIL;
4721 /* Make sure backplane clock is on */
4722 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
4723 if (bus->clkstate == CLK_PENDING)
4726 /* Pending interrupt indicates new device status */
4729 r_sdreg32(bus, &newstatus,
4730 offsetof(struct sdpcmd_regs, intstatus), &retries);
4732 if (brcmf_sdcard_regfail(bus->sdiodev))
4734 newstatus &= bus->hostintmask;
4735 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
4737 w_sdreg32(bus, newstatus,
4738 offsetof(struct sdpcmd_regs, intstatus),
4744 /* Merge new bits with previous */
4745 intstatus |= newstatus;
4748 /* Handle flow-control change: read new state in case our ack
4749 * crossed another change interrupt. If change still set, assume
4750 * FC ON for safety, let next loop through do the debounce.
4752 if (intstatus & I_HMB_FC_CHANGE) {
4753 intstatus &= ~I_HMB_FC_CHANGE;
4754 w_sdreg32(bus, I_HMB_FC_CHANGE,
4755 offsetof(struct sdpcmd_regs, intstatus), &retries);
4757 r_sdreg32(bus, &newstatus,
4758 offsetof(struct sdpcmd_regs, intstatus), &retries);
4759 bus->f1regdata += 2;
4761 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
4762 intstatus |= (newstatus & bus->hostintmask);
4765 /* Handle host mailbox indication */
4766 if (intstatus & I_HMB_HOST_INT) {
4767 intstatus &= ~I_HMB_HOST_INT;
4768 intstatus |= brcmf_sdbrcm_hostmail(bus);
4771 /* Generally don't ask for these, can get CRC errors... */
4772 if (intstatus & I_WR_OOSYNC) {
4773 BRCMF_ERROR(("Dongle reports WR_OOSYNC\n"));
4774 intstatus &= ~I_WR_OOSYNC;
4777 if (intstatus & I_RD_OOSYNC) {
4778 BRCMF_ERROR(("Dongle reports RD_OOSYNC\n"));
4779 intstatus &= ~I_RD_OOSYNC;
4782 if (intstatus & I_SBINT) {
4783 BRCMF_ERROR(("Dongle reports SBINT\n"));
4784 intstatus &= ~I_SBINT;
4787 /* Would be active due to wake-wlan in gSPI */
4788 if (intstatus & I_CHIPACTIVE) {
4789 BRCMF_INFO(("Dongle reports CHIPACTIVE\n"));
4790 intstatus &= ~I_CHIPACTIVE;
4793 /* Ignore frame indications if rxskip is set */
4795 intstatus &= ~I_HMB_FRAME_IND;
4797 /* On frame indication, read available frames */
4798 if (PKT_AVAILABLE()) {
4799 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
4800 if (rxdone || bus->rxskip)
4801 intstatus &= ~I_HMB_FRAME_IND;
4802 rxlimit -= min(framecnt, rxlimit);
4805 /* Keep still-pending events for next scheduling */
4806 bus->intstatus = intstatus;
4809 if (DATAOK(bus) && bus->ctrl_frame_stat &&
4810 (bus->clkstate == CLK_AVAIL)) {
4813 ret = brcmf_sdbrcm_send_buf(bus,
4814 brcmf_sdcard_cur_sbwad(bus->sdiodev),
4815 SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
4816 (u32) bus->ctrl_frame_len, NULL, NULL, NULL);
4819 /* On failure, abort the command and
4820 terminate the frame */
4821 BRCMF_INFO(("%s: sdio error %d, abort command and "
4822 "terminate frame.\n", __func__, ret));
4825 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
4827 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
4828 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
4832 for (i = 0; i < 3; i++) {
4834 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
4836 SBSDIO_FUNC1_WFRAMEBCHI,
4838 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
4840 SBSDIO_FUNC1_WFRAMEBCLO,
4842 bus->f1regdata += 2;
4843 if ((hi == 0) && (lo == 0))
4849 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
4851 BRCMF_INFO(("Return_dpc value is : %d\n", ret));
4852 bus->ctrl_frame_stat = false;
4853 brcmf_sdbrcm_wait_event_wakeup(bus);
4855 /* Send queued frames (limit 1 if rx may still be pending) */
4856 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
4857 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
4859 framecnt = rxdone ? txlimit : min(txlimit, brcmf_txminmax);
4860 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
4861 txlimit -= framecnt;
4864 /* Resched if events or tx frames are pending,
4865 else await next interrupt */
4866 /* On failed register access, all bets are off:
4867 no resched or interrupts */
4868 if ((bus->drvr->busstate == BRCMF_BUS_DOWN) ||
4869 brcmf_sdcard_regfail(bus->sdiodev)) {
4870 BRCMF_ERROR(("%s: failed backplane access over SDIO, halting "
4871 "operation %d\n", __func__,
4872 brcmf_sdcard_regfail(bus->sdiodev)));
4873 bus->drvr->busstate = BRCMF_BUS_DOWN;
4875 } else if (bus->clkstate == CLK_PENDING) {
4876 BRCMF_INFO(("%s: rescheduled due to CLK_PENDING awaiting "
4877 "I_CHIPACTIVE interrupt\n", __func__));
4879 } else if (bus->intstatus || bus->ipend ||
4880 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
4881 && DATAOK(bus)) || PKT_AVAILABLE()) {
4885 bus->dpc_sched = resched;
4887 /* If we're done for now, turn off clock request. */
4888 if ((bus->clkstate != CLK_PENDING)
4889 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
4890 bus->activity = false;
4891 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
4894 brcmf_sdbrcm_sdunlock(bus);
4899 void brcmf_sdbrcm_isr(void *arg)
4901 struct brcmf_bus *bus = (struct brcmf_bus *) arg;
4903 BRCMF_TRACE(("%s: Enter\n", __func__));
4906 BRCMF_ERROR(("%s : bus is null pointer , exit\n", __func__));
4910 if (bus->drvr->busstate == BRCMF_BUS_DOWN) {
4911 BRCMF_ERROR(("%s : bus is down. we have nothing to do\n",
4915 /* Count the interrupt call */
4919 /* Shouldn't get this interrupt if we're sleeping? */
4920 if (bus->sleeping) {
4921 BRCMF_ERROR(("INTERRUPT WHILE SLEEPING??\n"));
4925 /* Disable additional interrupts (is this needed now)? */
4927 BRCMF_ERROR(("brcmf_sdbrcm_isr() w/o interrupt configured!\n"));
4929 #if defined(SDIO_ISR_THREAD)
4930 BRCMF_TRACE(("Calling brcmf_sdbrcm_dpc() from %s\n", __func__));
4931 while (brcmf_sdbrcm_dpc(bus))
4934 bus->dpc_sched = true;
4935 brcmf_sdbrcm_sched_dpc(bus);
4941 static void brcmf_sdbrcm_pktgen_init(struct brcmf_bus *bus)
4943 /* Default to specified length, or full range */
4944 if (brcmf_pktgen_len) {
4945 bus->pktgen_maxlen = min(brcmf_pktgen_len,
4946 BRCMF_MAX_PKTGEN_LEN);
4947 bus->pktgen_minlen = bus->pktgen_maxlen;
4949 bus->pktgen_maxlen = BRCMF_MAX_PKTGEN_LEN;
4950 bus->pktgen_minlen = 0;
4952 bus->pktgen_len = (u16) bus->pktgen_minlen;
4954 /* Default to per-watchdog burst with 10s print time */
4955 bus->pktgen_freq = 1;
4956 bus->pktgen_print = 10000 / brcmf_watchdog_ms;
4957 bus->pktgen_count = (brcmf_pktgen * brcmf_watchdog_ms + 999) / 1000;
4959 /* Default to echo mode */
4960 bus->pktgen_mode = BRCMF_PKTGEN_ECHO;
4961 bus->pktgen_stop = 1;
4964 static void brcmf_sdbrcm_pktgen(struct brcmf_bus *bus)
4966 struct sk_buff *pkt;
4972 /* Display current count if appropriate */
4973 if (bus->pktgen_print && (++bus->pktgen_ptick >= bus->pktgen_print)) {
4974 bus->pktgen_ptick = 0;
4975 printk(KERN_DEBUG "%s: send attempts %d rcvd %d\n",
4976 __func__, bus->pktgen_sent, bus->pktgen_rcvd);
4979 /* For recv mode, just make sure dongle has started sending */
4980 if (bus->pktgen_mode == BRCMF_PKTGEN_RECV) {
4981 if (!bus->pktgen_rcvd)
4982 brcmf_sdbrcm_sdtest_set(bus, true);
4986 /* Otherwise, generate or request the specified number of packets */
4987 for (pktcount = 0; pktcount < bus->pktgen_count; pktcount++) {
4988 /* Stop if total has been reached */
4989 if (bus->pktgen_total
4990 && (bus->pktgen_sent >= bus->pktgen_total)) {
4991 bus->pktgen_count = 0;
4995 /* Allocate an appropriate-sized packet */
4996 len = bus->pktgen_len;
4997 pkt = brcmu_pkt_buf_get_skb(
4998 len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN,
5001 BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n",
5005 PKTALIGN(pkt, (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN),
5007 data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
5009 /* Write test header cmd and extra based on mode */
5010 switch (bus->pktgen_mode) {
5011 case BRCMF_PKTGEN_ECHO:
5012 *data++ = SDPCM_TEST_ECHOREQ;
5013 *data++ = (u8) bus->pktgen_sent;
5016 case BRCMF_PKTGEN_SEND:
5017 *data++ = SDPCM_TEST_DISCARD;
5018 *data++ = (u8) bus->pktgen_sent;
5021 case BRCMF_PKTGEN_RXBURST:
5022 *data++ = SDPCM_TEST_BURST;
5023 *data++ = (u8) bus->pktgen_count;
5027 BRCMF_ERROR(("Unrecognized pktgen mode %d\n",
5029 brcmu_pkt_buf_free_skb(pkt, true);
5030 bus->pktgen_count = 0;
5034 /* Write test header length field */
5035 *data++ = (len >> 0);
5036 *data++ = (len >> 8);
5038 /* Then fill in the remainder -- N/A for burst,
5040 for (fillbyte = 0; fillbyte < len; fillbyte++)
5042 SDPCM_TEST_FILL(fillbyte, (u8) bus->pktgen_sent);
5045 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
5046 data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
5047 printk(KERN_DEBUG "brcmf_sdbrcm_pktgen: Tx Data:\n");
5048 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, data,
5049 pkt->len - SDPCM_HDRLEN);
5054 if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) {
5056 if (bus->pktgen_stop
5057 && bus->pktgen_stop == bus->pktgen_fail)
5058 bus->pktgen_count = 0;
5062 /* Bump length if not fixed, wrap at max */
5063 if (++bus->pktgen_len > bus->pktgen_maxlen)
5064 bus->pktgen_len = (u16) bus->pktgen_minlen;
5066 /* Special case for burst mode: just send one request! */
5067 if (bus->pktgen_mode == BRCMF_PKTGEN_RXBURST)
5072 static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus *bus, bool start)
5074 struct sk_buff *pkt;
5077 /* Allocate the packet */
5078 pkt = brcmu_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN +
5079 BRCMF_SDALIGN, true);
5081 BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", __func__));
5084 PKTALIGN(pkt, (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), BRCMF_SDALIGN);
5085 data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
5087 /* Fill in the test header */
5088 *data++ = SDPCM_TEST_SEND;
5090 *data++ = (bus->pktgen_maxlen >> 0);
5091 *data++ = (bus->pktgen_maxlen >> 8);
5094 if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true))
5099 brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, struct sk_buff *pkt, uint seq)
5109 /* Check for min length */
5111 if (pktlen < SDPCM_TEST_HDRLEN) {
5112 BRCMF_ERROR(("brcmf_sdbrcm_checkdied: toss runt frame, pktlen "
5114 brcmu_pkt_buf_free_skb(pkt, false);
5118 /* Extract header fields */
5123 len += *data++ << 8;
5125 /* Check length for relevant commands */
5126 if (cmd == SDPCM_TEST_DISCARD || cmd == SDPCM_TEST_ECHOREQ
5127 || cmd == SDPCM_TEST_ECHORSP) {
5128 if (pktlen != len + SDPCM_TEST_HDRLEN) {
5129 BRCMF_ERROR(("brcmf_sdbrcm_checkdied: frame length "
5130 "mismatch, pktlen %d seq %d"
5131 " cmd %d extra %d len %d\n",
5132 pktlen, seq, cmd, extra, len));
5133 brcmu_pkt_buf_free_skb(pkt, false);
5138 /* Process as per command */
5140 case SDPCM_TEST_ECHOREQ:
5141 /* Rx->Tx turnaround ok (even on NDIS w/current
5143 *(u8 *) (pkt->data) = SDPCM_TEST_ECHORSP;
5144 if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true) == 0)
5148 brcmu_pkt_buf_free_skb(pkt, false);
5153 case SDPCM_TEST_ECHORSP:
5154 if (bus->ext_loop) {
5155 brcmu_pkt_buf_free_skb(pkt, false);
5160 for (offset = 0; offset < len; offset++, data++) {
5161 if (*data != SDPCM_TEST_FILL(offset, extra)) {
5162 BRCMF_ERROR(("brcmf_sdbrcm_checkdied: echo"
5164 "offset %d (len %d) "
5165 "expect 0x%02x rcvd 0x%02x\n",
5167 SDPCM_TEST_FILL(offset, extra),
5172 brcmu_pkt_buf_free_skb(pkt, false);
5176 case SDPCM_TEST_DISCARD:
5177 brcmu_pkt_buf_free_skb(pkt, false);
5181 case SDPCM_TEST_BURST:
5182 case SDPCM_TEST_SEND:
5184 BRCMF_INFO(("brcmf_sdbrcm_checkdied: unsupported or unknown "
5185 "command, pktlen %d seq %d" " cmd %d extra %d"
5186 " len %d\n", pktlen, seq, cmd, extra, len));
5187 brcmu_pkt_buf_free_skb(pkt, false);
5191 /* For recv mode, stop at limie (and tell dongle to stop sending) */
5192 if (bus->pktgen_mode == BRCMF_PKTGEN_RECV) {
5193 if (bus->pktgen_total
5194 && (bus->pktgen_rcvd >= bus->pktgen_total)) {
5195 bus->pktgen_count = 0;
5196 brcmf_sdbrcm_sdtest_set(bus, false);
5202 extern bool brcmf_sdbrcm_bus_watchdog(struct brcmf_pub *drvr)
5204 struct brcmf_bus *bus;
5206 BRCMF_TIMER(("%s: Enter\n", __func__));
5210 if (bus->drvr->dongle_reset)
5213 /* Ignore the timer if simulating bus down */
5217 brcmf_sdbrcm_sdlock(bus);
5219 /* Poll period: check device if appropriate. */
5220 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
5223 /* Reset poll tick */
5226 /* Check device if no interrupts */
5227 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
5229 if (!bus->dpc_sched) {
5231 devpend = brcmf_sdcard_cfg_read(bus->sdiodev,
5232 SDIO_FUNC_0, SDIO_CCCR_INTx,
5235 devpend & (INTR_STATUS_FUNC1 |
5239 /* If there is something, make like the ISR and
5245 bus->dpc_sched = true;
5246 brcmf_sdbrcm_sched_dpc(bus);
5251 /* Update interrupt tracking */
5252 bus->lastintrs = bus->intrcount;
5255 /* Poll for console output periodically */
5256 if (drvr->busstate == BRCMF_BUS_DATA && brcmf_console_ms != 0) {
5257 bus->console.count += brcmf_watchdog_ms;
5258 if (bus->console.count >= brcmf_console_ms) {
5259 bus->console.count -= brcmf_console_ms;
5260 /* Make sure backplane clock is on */
5261 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5262 if (brcmf_sdbrcm_readconsole(bus) < 0)
5263 brcmf_console_ms = 0; /* On error,
5270 /* Generate packets if configured */
5271 if (bus->pktgen_count && (++bus->pktgen_tick >= bus->pktgen_freq)) {
5272 /* Make sure backplane clock is on */
5273 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5274 bus->pktgen_tick = 0;
5275 brcmf_sdbrcm_pktgen(bus);
5279 /* On idle timeout clear activity flag and/or turn off clock */
5280 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
5281 if (++bus->idlecount >= bus->idletime) {
5283 if (bus->activity) {
5284 bus->activity = false;
5285 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
5287 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
5292 brcmf_sdbrcm_sdunlock(bus);
5298 static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub *drvr,
5299 unsigned char *msg, uint msglen)
5301 struct brcmf_bus *bus = drvr->bus;
5304 struct sk_buff *pkt;
5306 /* Address could be zero if CONSOLE := 0 in dongle Makefile */
5307 if (bus->console_addr == 0)
5310 /* Exclusive bus access */
5311 brcmf_sdbrcm_sdlock(bus);
5313 /* Don't allow input if dongle is in reset */
5314 if (bus->drvr->dongle_reset) {
5315 brcmf_sdbrcm_sdunlock(bus);
5319 /* Request clock to allow SDIO accesses */
5321 /* No pend allowed since txpkt is called later, ht clk has to be on */
5322 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5324 /* Zero cbuf_index */
5325 addr = bus->console_addr + offsetof(struct rte_console, cbuf_idx);
5326 val = cpu_to_le32(0);
5327 rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
5331 /* Write message into cbuf */
5332 addr = bus->console_addr + offsetof(struct rte_console, cbuf);
5333 rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)msg, msglen);
5337 /* Write length into vcons_in */
5338 addr = bus->console_addr + offsetof(struct rte_console, vcons_in);
5339 val = cpu_to_le32(msglen);
5340 rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
5344 /* Bump dongle by sending an empty event pkt.
5345 * sdpcm_sendup (RX) checks for virtual console input.
5347 pkt = brcmu_pkt_buf_get_skb(4 + SDPCM_RESERVE);
5348 if ((pkt != NULL) && bus->clkstate == CLK_AVAIL)
5349 brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true);
5352 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
5353 bus->activity = false;
5354 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
5357 brcmf_sdbrcm_sdunlock(bus);
5363 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
5365 if (chipid == BCM4329_CHIP_ID)
5370 void *brcmf_sdbrcm_probe(u16 bus_no, u16 slot, u16 func, uint bustype,
5371 u32 regsva, struct brcmf_sdio_dev *sdiodev)
5374 struct brcmf_bus *bus;
5376 /* Init global variables at run-time, not as part of the declaration.
5377 * This is required to support init/de-init of the driver.
5379 * of globals as part of the declaration results in non-deterministic
5380 * behavior since the value of the globals may be different on the
5381 * first time that the driver is initialized vs subsequent
5384 brcmf_txbound = BRCMF_TXBOUND;
5385 brcmf_rxbound = BRCMF_RXBOUND;
5386 brcmf_alignctl = true;
5388 brcmf_readahead = true;
5390 brcmf_dongle_memsize = 0;
5391 brcmf_txminmax = BRCMF_TXMINMAX;
5397 BRCMF_TRACE(("%s: Enter\n", __func__));
5399 /* We make an assumption about address window mappings:
5400 * regsva == SI_ENUM_BASE*/
5402 /* Allocate private bus interface state */
5403 bus = kzalloc(sizeof(struct brcmf_bus), GFP_ATOMIC);
5405 BRCMF_ERROR(("%s: kmalloc of struct dhd_bus failed\n",
5409 bus->sdiodev = sdiodev;
5411 bus->bus = BRCMF_BUS;
5412 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
5413 bus->usebufpool = false; /* Use bufpool if allocated,
5414 else use locally malloced rxbuf */
5416 /* attempt to attach to the dongle */
5417 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
5418 BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_attach failed\n",
5423 spin_lock_init(&bus->txqlock);
5424 init_waitqueue_head(&bus->ctrl_wait);
5425 init_waitqueue_head(&bus->ioctl_resp_wait);
5427 /* Set up the watchdog timer */
5428 init_timer(&bus->timer);
5429 bus->timer.data = (unsigned long)bus;
5430 bus->timer.function = brcmf_sdbrcm_watchdog;
5432 /* Initialize thread based operation and lock */
5433 if ((brcmf_watchdog_prio >= 0) && (brcmf_dpc_prio >= 0)) {
5434 bus->threads_only = true;
5435 sema_init(&bus->sdsem, 1);
5437 bus->threads_only = false;
5438 spin_lock_init(&bus->sdlock);
5441 if (brcmf_dpc_prio >= 0) {
5442 /* Initialize watchdog thread */
5443 init_completion(&bus->watchdog_wait);
5444 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
5445 bus, "brcmf_watchdog");
5446 if (IS_ERR(bus->watchdog_tsk)) {
5448 "brcmf_watchdog thread failed to start\n");
5449 bus->watchdog_tsk = NULL;
5452 bus->watchdog_tsk = NULL;
5454 /* Set up the bottom half handler */
5455 if (brcmf_dpc_prio >= 0) {
5456 /* Initialize DPC thread */
5457 init_completion(&bus->dpc_wait);
5458 bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
5460 if (IS_ERR(bus->dpc_tsk)) {
5462 "brcmf_dpc thread failed to start\n");
5463 bus->dpc_tsk = NULL;
5466 tasklet_init(&bus->tasklet, brcmf_sdbrcm_dpc_tasklet,
5467 (unsigned long)bus);
5468 bus->dpc_tsk = NULL;
5471 /* Attach to the brcmf/OS/network interface */
5472 bus->drvr = brcmf_attach(bus, SDPCM_RESERVE);
5474 BRCMF_ERROR(("%s: brcmf_attach failed\n", __func__));
5478 /* Allocate buffers */
5479 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
5480 BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_malloc failed\n",
5485 if (!(brcmf_sdbrcm_probe_init(bus))) {
5486 BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_init failed\n", __func__));
5490 /* Register interrupt callback, but mask it (not operational yet). */
5491 BRCMF_INTR(("%s: disable SDIO interrupts (not interested yet)\n",
5493 ret = brcmf_sdcard_intr_reg(bus->sdiodev);
5495 BRCMF_ERROR(("%s: FAILED: sdcard_intr_reg returned %d\n",
5499 BRCMF_INTR(("%s: registered SDIO interrupt function ok\n", __func__));
5501 BRCMF_INFO(("%s: completed!!\n", __func__));
5503 /* if firmware path present try to download and bring up bus */
5504 ret = brcmf_bus_start(bus->drvr);
5506 if (ret == -ENOLINK) {
5507 BRCMF_ERROR(("%s: dongle is not responding\n",
5512 /* Ok, have the per-port tell the stack we're open for business */
5513 if (brcmf_net_attach(bus->drvr, 0) != 0) {
5514 BRCMF_ERROR(("%s: Net attach failed!!\n", __func__));
5521 brcmf_sdbrcm_release(bus);
5526 brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, u32 regsva)
5533 bus->alp_only = true;
5535 /* Return the window to backplane enumeration space for core access */
5536 if (brcmf_sdbrcm_set_siaddr_window(bus, SI_ENUM_BASE))
5537 BRCMF_ERROR(("%s: FAILED to return to SI_ENUM_BASE\n",
5541 printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
5542 brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4));
5547 * Force PLL off until brcmf_sdbrcm_chip_attach()
5548 * programs PLL control regs
5551 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
5552 SBSDIO_FUNC1_CHIPCLKCSR,
5553 BRCMF_INIT_CLKCTL1, &err);
5556 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
5557 SBSDIO_FUNC1_CHIPCLKCSR, &err);
5559 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
5560 BRCMF_ERROR(("brcmf_sdbrcm_probe: ChipClkCSR access: err %d"
5561 " wrote 0x%02x read 0x%02x\n",
5562 err, BRCMF_INIT_CLKCTL1, clkctl));
5566 if (brcmf_sdbrcm_chip_attach(bus, regsva)) {
5567 BRCMF_ERROR(("%s: brcmf_sdbrcm_chip_attach failed!\n",
5572 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
5573 BRCMF_ERROR(("%s: unsupported chip: 0x%04x\n",
5574 __func__, bus->ci->chip));
5578 brcmf_sdbrcm_sdiod_drive_strength_init(bus, brcmf_sdiod_drive_strength);
5580 /* Get info on the ARM and SOCRAM cores... */
5581 if (!BRCMF_NOPMU(bus)) {
5582 brcmf_sdcard_reg_read(bus->sdiodev,
5583 CORE_SB(bus->ci->armcorebase, sbidhigh), 4);
5584 bus->orig_ramsize = bus->ci->ramsize;
5585 if (!(bus->orig_ramsize)) {
5586 BRCMF_ERROR(("%s: failed to find SOCRAM memory!\n",
5590 bus->ramsize = bus->orig_ramsize;
5591 if (brcmf_dongle_memsize)
5592 brcmf_sdbrcm_setmemsize(bus, brcmf_dongle_memsize);
5594 BRCMF_ERROR(("DHD: dongle ram size is set to %d(orig %d)\n",
5595 bus->ramsize, bus->orig_ramsize));
5598 /* Set core control so an SDIO reset does a backplane reset */
5599 reg_addr = bus->ci->buscorebase +
5600 offsetof(struct sdpcmd_regs, corecontrol);
5601 reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32));
5602 brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
5603 reg_val | CC_BPRESEN);
5605 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
5607 /* Locate an appropriately-aligned portion of hdrbuf */
5608 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
5611 /* Set the poll and/or interrupt flags */
5612 bus->intr = (bool) brcmf_intr;
5613 bus->poll = (bool) brcmf_poll;
5623 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus)
5625 BRCMF_TRACE(("%s: Enter\n", __func__));
5627 if (bus->drvr->maxctl) {
5629 roundup((bus->drvr->maxctl + SDPCM_HDRLEN),
5630 ALIGNMENT) + BRCMF_SDALIGN;
5631 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
5632 if (!(bus->rxbuf)) {
5633 BRCMF_ERROR(("%s: kmalloc of %d-byte rxbuf failed\n",
5634 __func__, bus->rxblen));
5639 /* Allocate buffer to receive glomed packet */
5640 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
5641 if (!(bus->databuf)) {
5642 BRCMF_ERROR(("%s: kmalloc of %d-byte databuf failed\n",
5643 __func__, MAX_DATA_BUF));
5644 /* release rxbuf which was already located as above */
5650 /* Align the buffer */
5651 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
5652 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
5653 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
5655 bus->dataptr = bus->databuf;
5663 static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus)
5665 BRCMF_TRACE(("%s: Enter\n", __func__));
5668 brcmf_sdbrcm_pktgen_init(bus);
5671 /* Disable F2 to clear any intermediate frame state on the dongle */
5672 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
5673 SDIO_FUNC_ENABLE_1, NULL);
5675 bus->drvr->busstate = BRCMF_BUS_DOWN;
5676 bus->sleeping = false;
5677 bus->rxflow = false;
5679 /* Done with backplane-dependent accesses, can drop clock... */
5680 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
5681 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
5683 /* ...and initialize clock/power states */
5684 bus->clkstate = CLK_SDONLY;
5685 bus->idletime = (s32) brcmf_idletime;
5686 bus->idleclock = BRCMF_IDLE_ACTIVE;
5688 /* Query the F2 block size, set roundup accordingly */
5689 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
5690 bus->roundup = min(max_roundup, bus->blocksize);
5692 /* Query if bus module supports packet chaining,
5693 default to use if supported */
5694 if (brcmf_sdcard_iovar_op(bus->sdiodev, "sd_rxchain", NULL, 0,
5695 &bus->sd_rxchain, sizeof(s32),
5697 bus->sd_rxchain = false;
5699 BRCMF_INFO(("%s: bus module (through sdiocard API) %s"
5700 " chaining\n", __func__, bus->sd_rxchain
5701 ? "supports" : "does not support"));
5703 bus->use_rxchain = (bool) bus->sd_rxchain;
5709 brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus, void *card)
5713 /* Download the firmware */
5714 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5716 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
5718 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
5723 /* Detach and free everything */
5724 static void brcmf_sdbrcm_release(struct brcmf_bus *bus)
5726 BRCMF_TRACE(("%s: Enter\n", __func__));
5729 /* De-register interrupt handler */
5730 brcmf_sdcard_intr_dereg(bus->sdiodev);
5733 brcmf_detach(bus->drvr);
5734 brcmf_sdbrcm_release_dongle(bus);
5738 brcmf_sdbrcm_release_malloc(bus);
5743 BRCMF_TRACE(("%s: Disconnected\n", __func__));
5746 static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus)
5748 BRCMF_TRACE(("%s: Enter\n", __func__));
5750 if (bus->drvr && bus->drvr->dongle_reset)
5754 bus->rxctl = bus->rxbuf = NULL;
5757 kfree(bus->databuf);
5758 bus->databuf = NULL;
5761 static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus)
5763 BRCMF_TRACE(("%s: Enter\n", __func__));
5765 if (bus->drvr && bus->drvr->dongle_reset)
5769 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5770 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
5771 brcmf_sdbrcm_chip_detach(bus);
5772 if (bus->vars && bus->varsz)
5777 BRCMF_TRACE(("%s: Disconnected\n", __func__));
5780 void brcmf_sdbrcm_disconnect(void *ptr)
5782 struct brcmf_bus *bus = (struct brcmf_bus *)ptr;
5784 BRCMF_TRACE(("%s: Enter\n", __func__));
5787 brcmf_sdbrcm_release(bus);
5789 BRCMF_TRACE(("%s: Disconnected\n", __func__));
5792 int brcmf_bus_register(void)
5794 BRCMF_TRACE(("%s: Enter\n", __func__));
5796 /* Sanity check on the module parameters */
5798 /* Both watchdog and DPC as tasklets are ok */
5799 if ((brcmf_watchdog_prio < 0) && (brcmf_dpc_prio < 0))
5802 /* If both watchdog and DPC are threads, TX must be deferred */
5803 if ((brcmf_watchdog_prio >= 0) && (brcmf_dpc_prio >= 0)
5804 && brcmf_deferred_tx)
5807 BRCMF_ERROR(("Invalid module parameters.\n"));
5811 return brcmf_sdio_register();
5814 void brcmf_bus_unregister(void)
5816 BRCMF_TRACE(("%s: Enter\n", __func__));
5818 brcmf_sdio_unregister();
5821 static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus)
5825 u8 *memblock = NULL, *memptr;
5828 BRCMF_INFO(("%s: Enter\n", __func__));
5830 bus->fw_name = BCM4329_FW_NAME;
5831 ret = request_firmware(&bus->firmware, bus->fw_name,
5832 &bus->sdiodev->func[2]->dev);
5834 BRCMF_ERROR(("%s: Fail to request firmware %d\n",
5840 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
5841 if (memblock == NULL) {
5842 BRCMF_ERROR(("%s: Failed to allocate memory %d bytes\n",
5843 __func__, MEMBLOCK));
5847 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
5848 memptr += (BRCMF_SDALIGN -
5849 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
5851 /* Download image */
5853 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
5854 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
5856 BRCMF_ERROR(("%s: error %d on writing %d membytes at "
5857 "0x%08x\n", __func__, ret, MEMBLOCK,
5868 release_firmware(bus->firmware);
5875 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
5876 * and ending in a NUL.
5877 * Removes carriage returns, empty lines, comment lines, and converts
5879 * Shortens buffer as needed and pads with NULs. End of buffer is marked
5883 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
5892 findNewline = false;
5895 for (n = 0; n < len; n++) {
5898 if (varbuf[n] == '\r')
5900 if (findNewline && varbuf[n] != '\n')
5902 findNewline = false;
5903 if (varbuf[n] == '#') {
5907 if (varbuf[n] == '\n') {
5917 buf_len = dp - varbuf;
5919 while (dp < varbuf + n)
5925 static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus)
5928 char *memblock = NULL;
5932 bus->nv_name = BCM4329_NV_NAME;
5933 ret = request_firmware(&bus->firmware, bus->nv_name,
5934 &bus->sdiodev->func[2]->dev);
5936 BRCMF_ERROR(("%s: Fail to request nvram %d\n", __func__, ret));
5941 memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
5942 if (memblock == NULL) {
5943 BRCMF_ERROR(("%s: Failed to allocate memory %d bytes\n",
5944 __func__, MEMBLOCK));
5949 len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
5951 if (len > 0 && len < MEMBLOCK) {
5952 bufp = (char *)memblock;
5954 len = brcmf_process_nvram_vars(bufp, len);
5958 ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
5960 BRCMF_ERROR(("%s: error downloading vars: %d\n",
5963 BRCMF_ERROR(("%s: error reading nvram file: %d\n",
5971 release_firmware(bus->firmware);
5977 static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus)
5981 /* Keep arm in reset */
5982 if (brcmf_sdbrcm_download_state(bus, true)) {
5983 BRCMF_ERROR(("%s: error placing ARM core in reset\n",
5988 /* External image takes precedence if specified */
5989 if (brcmf_sdbrcm_download_code_file(bus)) {
5990 BRCMF_ERROR(("%s: dongle image file download failed\n",
5995 /* External nvram takes precedence if specified */
5996 if (brcmf_sdbrcm_download_nvram(bus))
5997 BRCMF_ERROR(("%s: dongle nvram file download failed\n",
6000 /* Take arm out of reset */
6001 if (brcmf_sdbrcm_download_state(bus, false)) {
6002 BRCMF_ERROR(("%s: error getting out of ARM core reset\n",
6015 brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn, uint flags,
6016 u8 *buf, uint nbytes, struct sk_buff *pkt,
6017 void (*complete)(void *handle, int status,
6021 return brcmf_sdcard_send_buf
6022 (bus->sdiodev, addr, fn, flags, buf, nbytes, pkt, complete,
6026 int brcmf_bus_devreset(struct brcmf_pub *drvr, u8 flag)
6029 struct brcmf_bus *bus;
6034 brcmf_sdbrcm_wd_timer(bus, 0);
6035 if (!bus->drvr->dongle_reset) {
6036 /* Expect app to have torn down any
6037 connection before calling */
6038 /* Stop the bus, disable F2 */
6039 brcmf_sdbrcm_bus_stop(bus, false);
6041 /* Clean tx/rx buffer pointers,
6042 detach from the dongle */
6043 brcmf_sdbrcm_release_dongle(bus);
6045 bus->drvr->dongle_reset = true;
6046 bus->drvr->up = false;
6048 BRCMF_TRACE(("%s: WLAN OFF DONE\n", __func__));
6049 /* App can now remove power from device */
6053 /* App must have restored power to device before calling */
6055 BRCMF_TRACE(("\n\n%s: == WLAN ON ==\n", __func__));
6057 if (bus->drvr->dongle_reset) {
6060 /* Attempt to re-attach & download */
6061 if (brcmf_sdbrcm_probe_attach(bus, SI_ENUM_BASE)) {
6062 /* Attempt to download binary to the dongle */
6063 if (brcmf_sdbrcm_probe_init(bus)) {
6064 /* Re-init bus, enable F2 transfer */
6065 brcmf_sdbrcm_bus_init(bus->drvr, false);
6067 bus->drvr->dongle_reset = false;
6068 bus->drvr->up = true;
6070 BRCMF_TRACE(("%s: WLAN ON DONE\n",
6077 bcmerror = -EISCONN;
6078 BRCMF_ERROR(("%s: Set DEVRESET=false invoked when"
6079 " device is on\n", __func__));
6082 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
6088 brcmf_sdbrcm_chip_recognition(struct brcmf_sdio_dev *sdiodev,
6089 struct chip_info *ci, u32 regs)
6095 * Chipid is assume to be at offset 0 from regs arg
6096 * For different chiptypes or old sdio hosts w/o chipcommon,
6097 * other ways of recognition should be added here.
6099 ci->cccorebase = regs;
6100 regdata = brcmf_sdcard_reg_read(sdiodev,
6101 CORE_CC_REG(ci->cccorebase, chipid), 4);
6102 ci->chip = regdata & CID_ID_MASK;
6103 ci->chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT;
6105 BRCMF_INFO(("%s: chipid=0x%x chiprev=%d\n",
6106 __func__, ci->chip, ci->chiprev));
6108 /* Address of cores for new chips should be added here */
6110 case BCM4329_CHIP_ID:
6111 ci->buscorebase = BCM4329_CORE_BUS_BASE;
6112 ci->ramcorebase = BCM4329_CORE_SOCRAM_BASE;
6113 ci->armcorebase = BCM4329_CORE_ARM_BASE;
6114 ci->ramsize = BCM4329_RAMSIZE;
6117 BRCMF_ERROR(("%s: chipid 0x%x is not supported\n",
6118 __func__, ci->chip));
6122 regdata = brcmf_sdcard_reg_read(sdiodev,
6123 CORE_SB(ci->cccorebase, sbidhigh), 4);
6124 ci->ccrev = SBCOREREV(regdata);
6126 regdata = brcmf_sdcard_reg_read(sdiodev,
6127 CORE_CC_REG(ci->cccorebase, pmucapabilities), 4);
6128 ci->pmurev = regdata & PCAP_REV_MASK;
6130 regdata = brcmf_sdcard_reg_read(sdiodev,
6131 CORE_SB(ci->buscorebase, sbidhigh), 4);
6132 ci->buscorerev = SBCOREREV(regdata);
6133 ci->buscoretype = (regdata & SBIDH_CC_MASK) >> SBIDH_CC_SHIFT;
6135 BRCMF_INFO(("%s: ccrev=%d, pmurev=%d, buscore rev/type=%d/0x%x\n",
6136 __func__, ci->ccrev, ci->pmurev,
6137 ci->buscorerev, ci->buscoretype));
6139 /* get chipcommon capabilites */
6140 ci->cccaps = brcmf_sdcard_reg_read(sdiodev,
6141 CORE_CC_REG(ci->cccorebase, capabilities), 4);
6147 brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_dev *sdiodev, u32 corebase)
6151 regdata = brcmf_sdcard_reg_read(sdiodev,
6152 CORE_SB(corebase, sbtmstatelow), 4);
6153 if (regdata & SBTML_RESET)
6156 regdata = brcmf_sdcard_reg_read(sdiodev,
6157 CORE_SB(corebase, sbtmstatelow), 4);
6158 if ((regdata & (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) != 0) {
6160 * set target reject and spin until busy is clear
6161 * (preserve core-specific bits)
6163 regdata = brcmf_sdcard_reg_read(sdiodev,
6164 CORE_SB(corebase, sbtmstatelow), 4);
6165 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow),
6166 4, regdata | SBTML_REJ);
6168 regdata = brcmf_sdcard_reg_read(sdiodev,
6169 CORE_SB(corebase, sbtmstatelow), 4);
6171 SPINWAIT((brcmf_sdcard_reg_read(sdiodev,
6172 CORE_SB(corebase, sbtmstatehigh), 4) &
6173 SBTMH_BUSY), 100000);
6175 regdata = brcmf_sdcard_reg_read(sdiodev,
6176 CORE_SB(corebase, sbtmstatehigh), 4);
6177 if (regdata & SBTMH_BUSY)
6178 BRCMF_ERROR(("%s: ARM core still busy\n", __func__));
6180 regdata = brcmf_sdcard_reg_read(sdiodev,
6181 CORE_SB(corebase, sbidlow), 4);
6182 if (regdata & SBIDL_INIT) {
6183 regdata = brcmf_sdcard_reg_read(sdiodev,
6184 CORE_SB(corebase, sbimstate), 4) |
6186 brcmf_sdcard_reg_write(sdiodev,
6187 CORE_SB(corebase, sbimstate), 4,
6189 regdata = brcmf_sdcard_reg_read(sdiodev,
6190 CORE_SB(corebase, sbimstate), 4);
6192 SPINWAIT((brcmf_sdcard_reg_read(sdiodev,
6193 CORE_SB(corebase, sbimstate), 4) &
6197 /* set reset and reject while enabling the clocks */
6198 brcmf_sdcard_reg_write(sdiodev,
6199 CORE_SB(corebase, sbtmstatelow), 4,
6200 (((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
6201 SBTML_REJ | SBTML_RESET));
6202 regdata = brcmf_sdcard_reg_read(sdiodev,
6203 CORE_SB(corebase, sbtmstatelow), 4);
6206 /* clear the initiator reject bit */
6207 regdata = brcmf_sdcard_reg_read(sdiodev,
6208 CORE_SB(corebase, sbidlow), 4);
6209 if (regdata & SBIDL_INIT) {
6210 regdata = brcmf_sdcard_reg_read(sdiodev,
6211 CORE_SB(corebase, sbimstate), 4) &
6213 brcmf_sdcard_reg_write(sdiodev,
6214 CORE_SB(corebase, sbimstate), 4,
6219 /* leave reset and reject asserted */
6220 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
6221 (SBTML_REJ | SBTML_RESET));
6226 brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs)
6228 struct chip_info *ci;
6232 BRCMF_TRACE(("%s: Enter\n", __func__));
6234 /* alloc chip_info_t */
6235 ci = kmalloc(sizeof(struct chip_info), GFP_ATOMIC);
6237 BRCMF_ERROR(("%s: malloc failed!\n", __func__));
6241 memset((unsigned char *)ci, 0, sizeof(struct chip_info));
6243 /* bus/core/clk setup for register access */
6244 /* Try forcing SDIO core to do ALPAvail request only */
6245 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
6246 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
6247 SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
6249 BRCMF_ERROR(("%s: error writing for HT off\n", __func__));
6253 /* If register supported, wait for ALPAvail and then force ALP */
6254 /* This may take up to 15 milliseconds */
6255 clkval = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
6256 SBSDIO_FUNC1_CHIPCLKCSR, NULL);
6257 if ((clkval & ~SBSDIO_AVBITS) == clkset) {
6259 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
6260 SBSDIO_FUNC1_CHIPCLKCSR,
6262 !SBSDIO_ALPAV(clkval)),
6263 PMU_MAX_TRANSITION_DLY);
6264 if (!SBSDIO_ALPAV(clkval)) {
6265 BRCMF_ERROR(("%s: timeout on ALPAV wait,"
6266 " clkval 0x%02x\n", __func__, clkval));
6270 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF |
6272 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
6273 SBSDIO_FUNC1_CHIPCLKCSR,
6277 BRCMF_ERROR(("%s: ChipClkCSR access: wrote 0x%02x"
6278 " read 0x%02x\n", __func__, clkset, clkval));
6283 /* Also, disable the extra SDIO pull-ups */
6284 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
6285 SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
6287 err = brcmf_sdbrcm_chip_recognition(bus->sdiodev, ci, regs);
6292 * Make sure any on-chip ARM is off (in case strapping is wrong),
6293 * or downloaded code was already running.
6295 brcmf_sdbrcm_chip_disablecore(bus->sdiodev, ci->armcorebase);
6297 brcmf_sdcard_reg_write(bus->sdiodev,
6298 CORE_CC_REG(ci->cccorebase, gpiopullup), 4, 0);
6299 brcmf_sdcard_reg_write(bus->sdiodev,
6300 CORE_CC_REG(ci->cccorebase, gpiopulldown), 4, 0);
6302 /* Disable F2 to clear any intermediate frame state on the dongle */
6303 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
6304 SDIO_FUNC_ENABLE_1, NULL);
6306 /* WAR: cmd52 backplane read so core HW will drop ALPReq */
6307 clkval = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
6310 /* Done with backplane-dependent accesses, can drop clock... */
6311 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
6312 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
6323 brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase)
6328 * Must do the disable sequence first to work for
6329 * arbitrary current core state.
6331 brcmf_sdbrcm_chip_disablecore(sdiodev, corebase);
6334 * Now do the initialization sequence.
6335 * set reset while enabling the clock and
6336 * forcing them on throughout the core
6338 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
6339 ((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
6343 regdata = brcmf_sdcard_reg_read(sdiodev,
6344 CORE_SB(corebase, sbtmstatehigh), 4);
6345 if (regdata & SBTMH_SERR)
6346 brcmf_sdcard_reg_write(sdiodev,
6347 CORE_SB(corebase, sbtmstatehigh), 4, 0);
6349 regdata = brcmf_sdcard_reg_read(sdiodev,
6350 CORE_SB(corebase, sbimstate), 4);
6351 if (regdata & (SBIM_IBE | SBIM_TO))
6352 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbimstate), 4,
6353 regdata & ~(SBIM_IBE | SBIM_TO));
6355 /* clear reset and allow it to propagate throughout the core */
6356 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
6357 (SICF_FGC << SBTML_SICF_SHIFT) |
6358 (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
6361 /* leave clock enabled */
6362 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
6363 (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
6367 /* SDIO Pad drive strength to select value mappings */
6368 struct sdiod_drive_str {
6369 u8 strength; /* Pad Drive Strength in mA */
6370 u8 sel; /* Chip-specific select value */
6373 /* SDIO Drive Strength to sel value table for PMU Rev 1 */
6374 static const struct sdiod_drive_str sdiod_drive_strength_tab1[] = {
6382 /* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
6383 static const struct sdiod_drive_str sdiod_drive_strength_tab2[] = {
6394 /* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
6395 static const struct sdiod_drive_str sdiod_drive_strength_tab3[] = {
6407 #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
6409 static void brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus,
6410 u32 drivestrength) {
6411 struct sdiod_drive_str *str_tab = NULL;
6416 if (!(bus->ci->cccaps & CC_CAP_PMU))
6419 switch (SDIOD_DRVSTR_KEY(bus->ci->chip, bus->ci->pmurev)) {
6420 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
6421 str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab1;
6422 str_mask = 0x30000000;
6425 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
6426 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
6427 str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab2;
6428 str_mask = 0x00003800;
6431 case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
6432 str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab3;
6433 str_mask = 0x00003800;
6437 BRCMF_ERROR(("No SDIO Drive strength init"
6438 "done for chip %s rev %d pmurev %d\n",
6439 brcmu_chipname(bus->ci->chip, chn, 8),
6440 bus->ci->chiprev, bus->ci->pmurev));
6444 if (str_tab != NULL) {
6445 u32 drivestrength_sel = 0;
6449 for (i = 0; str_tab[i].strength != 0; i++) {
6450 if (drivestrength >= str_tab[i].strength) {
6451 drivestrength_sel = str_tab[i].sel;
6456 brcmf_sdcard_reg_write(bus->sdiodev,
6457 CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
6459 cc_data_temp = brcmf_sdcard_reg_read(bus->sdiodev,
6460 CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4);
6461 cc_data_temp &= ~str_mask;
6462 drivestrength_sel <<= str_shift;
6463 cc_data_temp |= drivestrength_sel;
6464 brcmf_sdcard_reg_write(bus->sdiodev,
6465 CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
6468 BRCMF_INFO(("SDIO: %dmA drive strength selected, "
6469 "set to 0x%08x\n", drivestrength, cc_data_temp));
6474 brcmf_sdbrcm_chip_detach(struct brcmf_bus *bus)
6476 BRCMF_TRACE(("%s: Enter\n", __func__));
6483 brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar)
6485 brcmf_sdbrcm_sdunlock(bus);
6486 wait_event_interruptible_timeout(bus->ctrl_wait,
6487 (*lockvar == false), HZ * 2);
6488 brcmf_sdbrcm_sdlock(bus);
6493 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus)
6495 if (waitqueue_active(&bus->ctrl_wait))
6496 wake_up_interruptible(&bus->ctrl_wait);
6501 brcmf_sdbrcm_watchdog_thread(void *data)
6503 struct brcmf_bus *bus = (struct brcmf_bus *)data;
6505 /* This thread doesn't need any user-level access,
6506 * so get rid of all our resources
6508 if (brcmf_watchdog_prio > 0) {
6509 struct sched_param param;
6510 param.sched_priority = (brcmf_watchdog_prio < MAX_RT_PRIO) ?
6511 brcmf_watchdog_prio : (MAX_RT_PRIO - 1);
6512 sched_setscheduler(current, SCHED_FIFO, ¶m);
6515 allow_signal(SIGTERM);
6516 /* Run until signal received */
6518 if (kthread_should_stop())
6520 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
6521 if (bus->drvr->dongle_reset == false)
6522 brcmf_sdbrcm_bus_watchdog(bus->drvr);
6523 /* Count the tick for reference */
6524 bus->drvr->tickcnt++;
6532 brcmf_sdbrcm_watchdog(unsigned long data)
6534 struct brcmf_bus *bus = (struct brcmf_bus *)data;
6536 if (brcmf_watchdog_prio >= 0) {
6537 if (bus->watchdog_tsk)
6538 complete(&bus->watchdog_wait);
6542 brcmf_sdbrcm_bus_watchdog(bus->drvr);
6544 /* Count the tick for reference */
6545 bus->drvr->tickcnt++;
6548 /* Reschedule the watchdog */
6549 if (bus->wd_timer_valid)
6550 mod_timer(&bus->timer, jiffies + brcmf_watchdog_ms * HZ / 1000);
6554 brcmf_sdbrcm_wd_timer(struct brcmf_bus *bus, uint wdtick)
6556 static uint save_ms;
6558 /* don't start the wd until fw is loaded */
6559 if (bus->drvr->busstate == BRCMF_BUS_DOWN)
6562 /* Totally stop the timer */
6563 if (!wdtick && bus->wd_timer_valid == true) {
6564 del_timer_sync(&bus->timer);
6565 bus->wd_timer_valid = false;
6571 brcmf_watchdog_ms = (uint) wdtick;
6573 if (save_ms != brcmf_watchdog_ms) {
6574 if (bus->wd_timer_valid == true)
6575 /* Stop timer and restart at new value */
6576 del_timer_sync(&bus->timer);
6578 /* Create timer again when watchdog period is
6579 dynamically changed or in the first instance
6581 bus->timer.expires =
6582 jiffies + brcmf_watchdog_ms * HZ / 1000;
6583 add_timer(&bus->timer);
6586 /* Re arm the timer, at last watchdog period */
6587 mod_timer(&bus->timer,
6588 jiffies + brcmf_watchdog_ms * HZ / 1000);
6591 bus->wd_timer_valid = true;
6596 static int brcmf_sdbrcm_dpc_thread(void *data)
6598 struct brcmf_bus *bus = (struct brcmf_bus *) data;
6600 /* This thread doesn't need any user-level access,
6601 * so get rid of all our resources
6603 if (brcmf_dpc_prio > 0) {
6604 struct sched_param param;
6605 param.sched_priority = (brcmf_dpc_prio < MAX_RT_PRIO) ?
6606 brcmf_dpc_prio : (MAX_RT_PRIO - 1);
6607 sched_setscheduler(current, SCHED_FIFO, ¶m);
6610 allow_signal(SIGTERM);
6611 /* Run until signal received */
6613 if (kthread_should_stop())
6615 if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
6616 /* Call bus dpc unless it indicated down
6617 (then clean stop) */
6618 if (bus->drvr->busstate != BRCMF_BUS_DOWN) {
6619 if (brcmf_sdbrcm_dpc(bus))
6620 complete(&bus->dpc_wait);
6622 brcmf_sdbrcm_bus_stop(bus, true);
6630 static void brcmf_sdbrcm_dpc_tasklet(unsigned long data)
6632 struct brcmf_bus *bus = (struct brcmf_bus *) data;
6634 /* Call bus dpc unless it indicated down (then clean stop) */
6635 if (bus->drvr->busstate != BRCMF_BUS_DOWN) {
6636 if (brcmf_sdbrcm_dpc(bus))
6637 tasklet_schedule(&bus->tasklet);
6639 brcmf_sdbrcm_bus_stop(bus, true);
6642 static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus *bus)
6645 complete(&bus->dpc_wait);
6649 tasklet_schedule(&bus->tasklet);
6652 static void brcmf_sdbrcm_sdlock(struct brcmf_bus *bus)
6654 if (bus->threads_only)
6657 spin_lock_bh(&bus->sdlock);
6660 static void brcmf_sdbrcm_sdunlock(struct brcmf_bus *bus)
6662 if (bus->threads_only)
6665 spin_unlock_bh(&bus->sdlock);
6668 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus)
6670 if (bus->firmware->size < bus->fw_ptr + len)
6671 len = bus->firmware->size - bus->fw_ptr;
6673 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
6678 MODULE_FIRMWARE(BCM4329_FW_NAME);
6679 MODULE_FIRMWARE(BCM4329_NV_NAME);
6681 static int brcmf_sdbrcm_ioctl_resp_wait(struct brcmf_bus *bus, uint *condition,
6684 DECLARE_WAITQUEUE(wait, current);
6685 int timeout = msecs_to_jiffies(brcmf_ioctl_timeout_msec);
6687 /* Wait until control frame is available */
6688 add_wait_queue(&bus->ioctl_resp_wait, &wait);
6689 set_current_state(TASK_INTERRUPTIBLE);
6691 while (!(*condition) && (!signal_pending(current) && timeout))
6692 timeout = schedule_timeout(timeout);
6694 if (signal_pending(current))
6697 set_current_state(TASK_RUNNING);
6698 remove_wait_queue(&bus->ioctl_resp_wait, &wait);
6703 static int brcmf_sdbrcm_ioctl_resp_wake(struct brcmf_bus *bus)
6705 if (waitqueue_active(&bus->ioctl_resp_wait))
6706 wake_up_interruptible(&bus->ioctl_resp_wait);
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