2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <asm/unaligned.h>
32 #include <brcmu_wifi.h>
33 #include <brcmu_utils.h>
34 #include <brcm_hw_ids.h>
36 #include "sdio_host.h"
40 /* ARM trap handling */
64 #define CBUF_LEN (128)
67 u32 buf; /* Can't be pointer on (64-bit) hosts */
70 char *_buf_compat; /* Redundant pointer for backward compat. */
75 * When there is no UART (e.g. Quickturn),
76 * the host should write a complete
77 * input line directly into cbuf and then write
78 * the length into vcons_in.
79 * This may also be used when there is a real UART
80 * (at risk of conflicting with
81 * the real UART). vcons_out is currently unused.
86 /* Output (logging) buffer
87 * Console output is written to a ring buffer log_buf at index log_idx.
88 * The host may read the output when it sees log_idx advance.
89 * Output will be lost if the output wraps around faster than the host
94 /* Console input line buffer
95 * Characters are read one at a time into cbuf
96 * until <CR> is received, then
97 * the buffer is processed as a command line.
98 * Also used for virtual UART.
105 #include <chipcommon.h>
109 #include "dhd_proto.h"
113 #define TXQLEN 2048 /* bulk tx queue length */
114 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
115 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
118 #define TXRETRIES 2 /* # of retries for tx frames */
120 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
123 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
126 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
128 #define MEMBLOCK 2048 /* Block size used for downloading
130 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
131 biggest possible glom */
133 #ifndef BRCMF_FIRSTREAD
134 #define BRCMF_FIRSTREAD 32
137 #if !ISPOWEROF2(BRCMF_FIRSTREAD)
138 #error BRCMF_FIRSTREAD is not a power of 2!
141 /* SBSDIO_DEVICE_CTL */
143 /* 1: device will assert busy signal when receiving CMD53 */
144 #define SBSDIO_DEVCTL_SETBUSY 0x01
145 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
146 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
147 /* 1: mask all interrupts to host except the chipActive (rev 8) */
148 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
149 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
150 * sdio bus power cycle to clear (rev 9) */
151 #define SBSDIO_DEVCTL_PADS_ISO 0x08
152 /* Force SD->SB reset mapping (rev 11) */
153 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
154 /* Determined by CoreControl bit */
155 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
156 /* Force backplane reset */
157 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
158 /* Force no backplane reset */
159 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
161 /* SBSDIO_FUNC1_CHIPCLKCSR */
163 /* Force ALP request to backplane */
164 #define SBSDIO_FORCE_ALP 0x01
165 /* Force HT request to backplane */
166 #define SBSDIO_FORCE_HT 0x02
167 /* Force ILP request to backplane */
168 #define SBSDIO_FORCE_ILP 0x04
169 /* Make ALP ready (power up xtal) */
170 #define SBSDIO_ALP_AVAIL_REQ 0x08
171 /* Make HT ready (power up PLL) */
172 #define SBSDIO_HT_AVAIL_REQ 0x10
173 /* Squelch clock requests from HW */
174 #define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20
175 /* Status: ALP is ready */
176 #define SBSDIO_ALP_AVAIL 0x40
177 /* Status: HT is ready */
178 #define SBSDIO_HT_AVAIL 0x80
180 #define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
181 #define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
182 #define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
183 #define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
185 #define SBSDIO_CLKAV(regval, alponly) \
186 (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
188 /* direct(mapped) cis space */
190 /* MAPPED common CIS address */
191 #define SBSDIO_CIS_BASE_COMMON 0x1000
192 /* maximum bytes in one CIS */
193 #define SBSDIO_CIS_SIZE_LIMIT 0x200
194 /* cis offset addr is < 17 bits */
195 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
197 /* manfid tuple length, include tuple, link bytes */
198 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
201 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
202 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
203 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
204 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
205 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
206 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
207 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
208 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
209 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
210 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
211 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
212 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
213 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
214 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
215 #define I_PC (1 << 10) /* descriptor error */
216 #define I_PD (1 << 11) /* data error */
217 #define I_DE (1 << 12) /* Descriptor protocol Error */
218 #define I_RU (1 << 13) /* Receive descriptor Underflow */
219 #define I_RO (1 << 14) /* Receive fifo Overflow */
220 #define I_XU (1 << 15) /* Transmit fifo Underflow */
221 #define I_RI (1 << 16) /* Receive Interrupt */
222 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
223 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
224 #define I_XI (1 << 24) /* Transmit Interrupt */
225 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
226 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
227 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
228 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
229 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
230 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
231 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
232 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
233 #define I_DMA (I_RI | I_XI | I_ERRORS)
236 #define CC_CISRDY (1 << 0) /* CIS Ready */
237 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
238 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
239 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
240 #define CC_XMTDATAAVAIL_MODE (1 << 4)
241 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
244 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
245 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
246 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
247 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
250 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
252 /* Total length of frame header for dongle protocol */
253 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
255 #define SDPCM_RESERVE (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN)
257 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
261 * Software allocation of To SB Mailbox resources
264 /* tosbmailbox bits corresponding to intstatus bits */
265 #define SMB_NAK (1 << 0) /* Frame NAK */
266 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
267 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
268 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
270 /* tosbmailboxdata */
271 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
274 * Software allocation of To Host Mailbox resources
278 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
279 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
280 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
281 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
283 /* tohostmailboxdata */
284 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
285 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
286 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
287 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
289 #define HMB_DATA_FCDATA_MASK 0xff000000
290 #define HMB_DATA_FCDATA_SHIFT 24
292 #define HMB_DATA_VERSION_MASK 0x00ff0000
293 #define HMB_DATA_VERSION_SHIFT 16
296 * Software-defined protocol header
299 /* Current protocol version */
300 #define SDPCM_PROT_VERSION 4
302 /* SW frame header */
303 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
305 #define SDPCM_CHANNEL_MASK 0x00000f00
306 #define SDPCM_CHANNEL_SHIFT 8
307 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
309 #define SDPCM_NEXTLEN_OFFSET 2
311 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
312 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
313 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
314 #define SDPCM_DOFFSET_MASK 0xff000000
315 #define SDPCM_DOFFSET_SHIFT 24
316 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
317 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
318 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
319 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
321 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
323 /* logical channel numbers */
324 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
325 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
326 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
327 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
328 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
330 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
332 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
334 /* For TEST_CHANNEL packets, define another 4-byte header */
335 #define SDPCM_TEST_HDRLEN 4 /*
336 * Generally: Cmd(1), Ext(1), Len(2);
337 * Semantics of Ext byte depend on
338 * command. Len is current or requested
339 * frame length, not including test
340 * header; sent little-endian.
342 #define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext:pattern id. */
343 #define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext:pattern id. */
344 #define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext:pattern id. */
345 #define SDPCM_TEST_BURST 0x04 /*
346 * Receiver to send a burst.
347 * Ext is a frame count
349 #define SDPCM_TEST_SEND 0x05 /*
350 * Receiver sets send mode.
351 * Ext is boolean on/off
354 /* Handy macro for filling in datagen packets with a pattern */
355 #define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno))
358 * Shared structure between dongle and the host.
359 * The structure contains pointers to trap or assert information.
361 #define SDPCM_SHARED_VERSION 0x0002
362 #define SDPCM_SHARED_VERSION_MASK 0x00FF
363 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
364 #define SDPCM_SHARED_ASSERT 0x0200
365 #define SDPCM_SHARED_TRAP 0x0400
368 /* Space for header read, limit for data packets */
370 #define MAX_HDR_READ 32
372 #if !ISPOWEROF2(MAX_HDR_READ)
373 #error MAX_HDR_READ is not a power of 2!
376 #define MAX_RX_DATASZ 2048
378 /* Maximum milliseconds to wait for F2 to come up */
379 #define BRCMF_WAIT_F2RDY 3000
381 /* Bump up limit on waiting for HT to account for first startup;
382 * if the image is doing a CRC calculation before programming the PMU
383 * for HT availability, it could take a couple hundred ms more, so
384 * max out at a 1 second (1000000us).
386 #if (PMU_MAX_TRANSITION_DLY <= 1000000)
387 #undef PMU_MAX_TRANSITION_DLY
388 #define PMU_MAX_TRANSITION_DLY 1000000
391 /* Value for ChipClockCSR during initial setup */
392 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
393 SBSDIO_ALP_AVAIL_REQ)
395 /* Flags for SDH calls */
396 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
399 #define SBIM_IBE 0x20000 /* inbanderror */
400 #define SBIM_TO 0x40000 /* timeout */
401 #define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */
402 #define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */
407 #define SBTML_RESET 0x0001
409 #define SBTML_REJ_MASK 0x0006
411 #define SBTML_REJ 0x0002
412 /* temporary reject, for error recovery */
413 #define SBTML_TMPREJ 0x0004
415 /* Shift to locate the SI control flags in sbtml */
416 #define SBTML_SICF_SHIFT 16
419 #define SBTMH_SERR 0x0001 /* serror */
420 #define SBTMH_INT 0x0002 /* interrupt */
421 #define SBTMH_BUSY 0x0004 /* busy */
422 #define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */
424 /* Shift to locate the SI status flags in sbtmh */
425 #define SBTMH_SISF_SHIFT 16
428 #define SBIDL_INIT 0x80 /* initiator */
431 #define SBIDH_RC_MASK 0x000f /* revision code */
432 #define SBIDH_RCE_MASK 0x7000 /* revision code extension field */
433 #define SBIDH_RCE_SHIFT 8
434 #define SBCOREREV(sbidh) \
435 ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | \
436 ((sbidh) & SBIDH_RC_MASK))
437 #define SBIDH_CC_MASK 0x8ff0 /* core code */
438 #define SBIDH_CC_SHIFT 4
439 #define SBIDH_VC_MASK 0xffff0000 /* vendor code */
440 #define SBIDH_VC_SHIFT 16
443 * Conversion of 802.1D priority to precedence level
445 #define PRIO2PREC(prio) \
446 (((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? \
450 * Core reg address translation.
451 * Both macro's returns a 32 bits byte address on the backplane bus.
453 #define CORE_CC_REG(base, field) \
454 (base + offsetof(struct chipcregs, field))
455 #define CORE_BUS_REG(base, field) \
456 (base + offsetof(struct sdpcmd_regs, field))
457 #define CORE_SB(base, field) \
458 (base + SBCONFIGOFF + offsetof(struct sbconfig, field))
462 u32 corecontrol; /* 0x00, rev8 */
463 u32 corestatus; /* rev8 */
465 u32 biststatus; /* rev8 */
468 u16 pcmciamesportaladdr; /* 0x010, rev8 */
470 u16 pcmciamesportalmask; /* rev8 */
472 u16 pcmciawrframebc; /* rev8 */
474 u16 pcmciaunderflowtimer; /* rev8 */
478 u32 intstatus; /* 0x020, rev8 */
479 u32 hostintmask; /* rev8 */
480 u32 intmask; /* rev8 */
481 u32 sbintstatus; /* rev8 */
482 u32 sbintmask; /* rev8 */
483 u32 funcintmask; /* rev4 */
485 u32 tosbmailbox; /* 0x040, rev8 */
486 u32 tohostmailbox; /* rev8 */
487 u32 tosbmailboxdata; /* rev8 */
488 u32 tohostmailboxdata; /* rev8 */
490 /* synchronized access to registers in SDIO clock domain */
491 u32 sdioaccess; /* 0x050, rev8 */
494 /* PCMCIA frame control */
495 u8 pcmciaframectrl; /* 0x060, rev8 */
497 u8 pcmciawatermark; /* rev8 */
500 /* interrupt batching control */
501 u32 intrcvlazy; /* 0x100, rev8 */
505 u32 cmd52rd; /* 0x110, rev8 */
506 u32 cmd52wr; /* rev8 */
507 u32 cmd53rd; /* rev8 */
508 u32 cmd53wr; /* rev8 */
509 u32 abort; /* rev8 */
510 u32 datacrcerror; /* rev8 */
511 u32 rdoutofsync; /* rev8 */
512 u32 wroutofsync; /* rev8 */
513 u32 writebusy; /* rev8 */
514 u32 readwait; /* rev8 */
515 u32 readterm; /* rev8 */
516 u32 writeterm; /* rev8 */
518 u32 clockctlstatus; /* rev8 */
521 u32 PAD[128]; /* DMA engines */
523 /* SDIO/PCMCIA CIS region */
524 char cis[512]; /* 0x400-0x5ff, rev6 */
526 /* PCMCIA function control registers */
527 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
530 /* PCMCIA backplane access */
531 u16 backplanecsr; /* 0x76E, rev6 */
532 u16 backplaneaddr0; /* rev6 */
533 u16 backplaneaddr1; /* rev6 */
534 u16 backplaneaddr2; /* rev6 */
535 u16 backplaneaddr3; /* rev6 */
536 u16 backplanedata0; /* rev6 */
537 u16 backplanedata1; /* rev6 */
538 u16 backplanedata2; /* rev6 */
539 u16 backplanedata3; /* rev6 */
542 /* sprom "size" & "blank" info */
543 u16 spromstatus; /* 0x7BE, rev2 */
550 /* Device console log buffer state */
551 struct brcmf_console {
552 uint count; /* Poll interval msec counter */
553 uint log_addr; /* Log struct address (fixed) */
554 struct rte_log log; /* Log struct (host copy) */
555 uint bufsize; /* Size of log buffer */
556 u8 *buf; /* Log buffer (host copy) */
557 uint last; /* Last buffer read index */
561 struct sdpcm_shared {
565 u32 assert_file_addr;
567 u32 console_addr; /* Address of struct rte_console */
573 /* misc chip info needed by some of the routines */
580 u32 buscorebase; /* 32 bits backplane bus address */
589 /* Private data for SDIO bus interaction */
591 struct brcmf_pub *drvr;
593 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
594 struct chip_info *ci; /* Chip info struct */
595 char *vars; /* Variables (from CIS and/or other) */
596 uint varsz; /* Size of variables buffer */
598 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
599 u32 orig_ramsize; /* Size of RAM in SOCRAM (bytes) */
601 u32 hostintmask; /* Copy of Host Interrupt Mask */
602 u32 intstatus; /* Intstatus bits (events) pending */
603 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
604 bool fcstate; /* State of dongle flow-control */
606 uint blocksize; /* Block size of SDIO transfers */
607 uint roundup; /* Max roundup limit */
609 struct pktq txq; /* Queue length used for flow-control */
610 u8 flowcontrol; /* per prio flow control bitmask */
611 u8 tx_seq; /* Transmit sequence number (next) */
612 u8 tx_max; /* Maximum transmit sequence allowed */
614 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
615 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
616 u16 nextlen; /* Next Read Len from last header */
617 u8 rx_seq; /* Receive sequence number (expected) */
618 bool rxskip; /* Skip receive (awaiting NAK ACK) */
620 struct sk_buff *glomd; /* Packet containing glomming descriptor */
621 struct sk_buff *glom; /* Packet chain for glommed superframe */
622 uint glomerr; /* Glom packet read errors */
624 u8 *rxbuf; /* Buffer for receiving control packets */
625 uint rxblen; /* Allocated length of rxbuf */
626 u8 *rxctl; /* Aligned pointer into rxbuf */
627 u8 *databuf; /* Buffer for receiving big glom packet */
628 u8 *dataptr; /* Aligned pointer into databuf */
629 uint rxlen; /* Length of valid data in buffer */
631 u8 sdpcm_ver; /* Bus protocol reported by dongle */
633 bool intr; /* Use interrupts */
634 bool poll; /* Use polling */
635 bool ipend; /* Device interrupt is pending */
636 uint intrcount; /* Count of device interrupt callbacks */
637 uint lastintrs; /* Count as of last watchdog timer */
638 uint spurious; /* Count of spurious interrupts */
639 uint pollrate; /* Ticks between device polls */
640 uint polltick; /* Tick counter */
641 uint pollcnt; /* Count of active polls */
644 struct brcmf_console console; /* Console output polling support */
645 uint console_addr; /* Console address from shared struct */
648 uint regfails; /* Count of R_REG failures */
650 uint clkstate; /* State of sd and backplane clock(s) */
651 bool activity; /* Activity flag for clock down */
652 s32 idletime; /* Control for activity timeout */
653 s32 idlecount; /* Activity timeout counter */
654 s32 idleclock; /* How to set bus driver when idle */
656 bool use_rxchain; /* If brcmf should use PKT chains */
657 bool sleeping; /* Is SDIO bus sleeping? */
658 bool rxflow_mode; /* Rx flow control mode */
659 bool rxflow; /* Is rx flow control on */
660 bool alp_only; /* Don't use HT clock (ALP only) */
661 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
665 /* external loopback */
669 /* pktgen configuration */
670 uint pktgen_freq; /* Ticks between bursts */
671 uint pktgen_count; /* Packets to send each burst */
672 uint pktgen_print; /* Bursts between count displays */
673 uint pktgen_total; /* Stop after this many */
674 uint pktgen_minlen; /* Minimum packet data len */
675 uint pktgen_maxlen; /* Maximum packet data len */
676 uint pktgen_mode; /* Configured mode: tx, rx, or echo */
677 uint pktgen_stop; /* Number of tx failures causing stop */
679 /* active pktgen fields */
680 uint pktgen_tick; /* Tick counter for bursts */
681 uint pktgen_ptick; /* Burst counter for printing */
682 uint pktgen_sent; /* Number of test packets generated */
683 uint pktgen_rcvd; /* Number of test packets received */
684 uint pktgen_fail; /* Number of failed send attempts */
685 u16 pktgen_len; /* Length of next packet to send */
688 /* Some additional counters */
689 uint tx_sderrs; /* Count of tx attempts with sd errors */
690 uint fcqueued; /* Tx packets that got queued */
691 uint rxrtx; /* Count of rtx requests (NAK to dongle) */
692 uint rx_toolong; /* Receive frames too long to receive */
693 uint rxc_errors; /* SDIO errors when reading control frames */
694 uint rx_hdrfail; /* SDIO errors on header reads */
695 uint rx_badhdr; /* Bad received headers (roosync?) */
696 uint rx_badseq; /* Mismatched rx sequence number */
697 uint fc_rcvd; /* Number of flow-control events received */
698 uint fc_xoff; /* Number which turned on flow-control */
699 uint fc_xon; /* Number which turned off flow-control */
700 uint rxglomfail; /* Failed deglom attempts */
701 uint rxglomframes; /* Number of glom frames (superframes) */
702 uint rxglompkts; /* Number of packets from glom frames */
703 uint f2rxhdrs; /* Number of header reads */
704 uint f2rxdata; /* Number of frame data reads */
705 uint f2txdata; /* Number of f2 frame writes */
706 uint f1regdata; /* Number of f1 register accesses */
710 bool ctrl_frame_stat;
713 wait_queue_head_t ctrl_wait;
714 wait_queue_head_t ioctl_resp_wait;
716 struct timer_list timer;
717 struct completion watchdog_wait;
718 struct task_struct *watchdog_tsk;
721 struct tasklet_struct tasklet;
722 struct task_struct *dpc_tsk;
723 struct completion dpc_wait;
726 struct semaphore sdsem;
730 const struct firmware *firmware;
737 u32 sbipsflag; /* initiator port ocp slave flag */
739 u32 sbtpsflag; /* target port ocp slave flag */
741 u32 sbtmerrloga; /* (sonics >= 2.3) */
743 u32 sbtmerrlog; /* (sonics >= 2.3) */
745 u32 sbadmatch3; /* address match3 */
747 u32 sbadmatch2; /* address match2 */
749 u32 sbadmatch1; /* address match1 */
751 u32 sbimstate; /* initiator agent state */
752 u32 sbintvec; /* interrupt mask */
753 u32 sbtmstatelow; /* target state */
754 u32 sbtmstatehigh; /* target state */
755 u32 sbbwa0; /* bandwidth allocation table0 */
757 u32 sbimconfiglow; /* initiator configuration */
758 u32 sbimconfighigh; /* initiator configuration */
759 u32 sbadmatch0; /* address match0 */
761 u32 sbtmconfiglow; /* target configuration */
762 u32 sbtmconfighigh; /* target configuration */
763 u32 sbbconfig; /* broadcast configuration */
765 u32 sbbstate; /* broadcast state */
767 u32 sbactcnfg; /* activate configuration */
769 u32 sbflagst; /* current sbflags */
771 u32 sbidlow; /* identification */
772 u32 sbidhigh; /* identification */
778 #define CLK_PENDING 2 /* Not used yet */
782 static int qcount[NUMPRIO];
783 static int tx_packets[NUMPRIO];
786 /* Deferred transmit */
787 uint brcmf_deferred_tx = 1;
788 module_param(brcmf_deferred_tx, uint, 0);
790 /* Watchdog thread priority, -1 to use kernel timer */
791 int brcmf_watchdog_prio = 97;
792 module_param(brcmf_watchdog_prio, int, 0);
794 /* Watchdog interval */
795 uint brcmf_watchdog_ms = 10;
796 module_param(brcmf_watchdog_ms, uint, 0);
798 /* DPC thread priority, -1 to use tasklet */
799 int brcmf_dpc_prio = 98;
800 module_param(brcmf_dpc_prio, int, 0);
803 /* Console poll interval */
804 uint brcmf_console_ms;
805 module_param(brcmf_console_ms, uint, 0);
811 module_param(brcmf_txbound, uint, 0);
812 module_param(brcmf_rxbound, uint, 0);
815 int brcmf_idletime = 1;
816 module_param(brcmf_idletime, int, 0);
818 /* SDIO Drive Strength (in milliamps) */
819 uint brcmf_sdiod_drive_strength = 6;
820 module_param(brcmf_sdiod_drive_strength, uint, 0);
824 module_param(brcmf_poll, uint, 0);
827 uint brcmf_intr = true;
828 module_param(brcmf_intr, uint, 0);
830 /* IOCTL response timeout */
831 static int brcmf_ioctl_timeout_msec = IOCTL_RESP_TIMEOUT;
833 /* override the RAM size if possible */
834 #define DONGLE_MIN_MEMSIZE (128 * 1024)
835 int brcmf_dongle_memsize;
836 module_param(brcmf_dongle_memsize, int, 0);
838 static bool brcmf_alignctl;
840 static bool retrydata;
841 #define RETRYCHAN(chan) (((chan) == SDPCM_EVENT_CHANNEL) || retrydata)
843 static const uint firstread = BRCMF_FIRSTREAD;
845 /* Retry count for register access failures */
846 static const uint retry_limit = 2;
848 /* Force even SD lengths (some host controllers mess up on odd bytes) */
849 static bool forcealign;
853 #define PKTALIGN(_p, _len, _align) \
856 datalign = (unsigned long)((_p)->data); \
857 datalign = roundup(datalign, (_align)) - datalign; \
859 skb_pull((_p), datalign); \
860 __skb_trim((_p), (_len)); \
863 /* Limit on rounding up frames */
864 static const uint max_roundup = 512;
866 /* Try doing readahead */
867 static bool brcmf_readahead;
869 /* To check if there's window offered */
870 #define DATAOK(bus) \
871 (((u8)(bus->tx_max - bus->tx_seq) != 0) && \
872 (((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
875 * Reads a register in the SDIO hardware block. This block occupies a series of
876 * adresses on the 32 bit backplane bus.
879 r_sdreg32(struct brcmf_bus *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
883 *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
884 bus->ci->buscorebase + reg_offset, sizeof(u32));
885 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
886 (++(*retryvar) <= retry_limit));
888 bus->regfails += (*retryvar-1);
889 if (*retryvar > retry_limit) {
890 BRCMF_ERROR(("FAILED READ %Xh\n", reg_offset));
897 w_sdreg32(struct brcmf_bus *bus, u32 regval, u32 reg_offset, u32 *retryvar)
901 brcmf_sdcard_reg_write(bus->sdiodev,
902 bus->ci->buscorebase + reg_offset,
903 sizeof(u32), regval);
904 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
905 (++(*retryvar) <= retry_limit));
907 bus->regfails += (*retryvar-1);
908 if (*retryvar > retry_limit)
909 BRCMF_ERROR(("FAILED REGISTER WRITE"
910 " %Xh\n", reg_offset));
914 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
916 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
919 static void brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, void *pkt, uint seq);
920 static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus *bus, bool start);
924 static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub *drvr,
925 unsigned char *msg, uint msglen);
926 static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size);
927 static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus);
929 static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter);
931 static void brcmf_sdbrcm_release(struct brcmf_bus *bus);
932 static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus);
933 static bool brcmf_sdbrcm_chipmatch(u16 chipid);
934 static bool brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, u32 regsva);
935 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus);
936 static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus);
937 static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus);
939 static uint brcmf_process_nvram_vars(char *varbuf, uint len);
941 static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size);
942 static int brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn,
943 uint flags, u8 *buf, uint nbytes,
945 void (*complete)(void *handle, int status,
949 static bool brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus, void *card);
950 static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus);
952 static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus);
953 static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus);
956 brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_dev *sdiodev, u32 corebase);
958 static int brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs);
961 brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase);
963 static void brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus,
965 static void brcmf_sdbrcm_chip_detach(struct brcmf_bus *bus);
966 static void brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar);
967 static void brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus);
968 static void brcmf_sdbrcm_watchdog(unsigned long data);
969 static int brcmf_sdbrcm_watchdog_thread(void *data);
970 static int brcmf_sdbrcm_dpc_thread(void *data);
971 static void brcmf_sdbrcm_dpc_tasklet(unsigned long data);
972 static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus *bus);
973 static void brcmf_sdbrcm_sdlock(struct brcmf_bus *bus);
974 static void brcmf_sdbrcm_sdunlock(struct brcmf_bus *bus);
975 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus);
976 static int brcmf_sdbrcm_ioctl_resp_wait(struct brcmf_bus *bus, uint *condition,
978 static int brcmf_sdbrcm_ioctl_resp_wake(struct brcmf_bus *bus);
980 /* Packet free applicable unconditionally for sdio and sdspi.
981 * Conditional if bufpool was present for gspi bus.
983 static void brcmf_sdbrcm_pktfree2(struct brcmf_bus *bus, struct sk_buff *pkt)
986 brcmu_pkt_buf_free_skb(pkt);
989 static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size)
991 s32 min_size = DONGLE_MIN_MEMSIZE;
992 /* Restrict the memsize to user specified limit */
993 BRCMF_ERROR(("user: Restrict the dongle ram size to %d, min %d\n",
994 brcmf_dongle_memsize, min_size));
995 if ((brcmf_dongle_memsize > min_size) &&
996 (brcmf_dongle_memsize < (s32) bus->orig_ramsize))
997 bus->ramsize = brcmf_dongle_memsize;
1000 static int brcmf_sdbrcm_set_siaddr_window(struct brcmf_bus *bus, u32 address)
1003 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1004 SBSDIO_FUNC1_SBADDRLOW,
1005 (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err);
1007 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1008 SBSDIO_FUNC1_SBADDRMID,
1009 (address >> 16) & SBSDIO_SBADDRMID_MASK, &err);
1011 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1012 SBSDIO_FUNC1_SBADDRHIGH,
1013 (address >> 24) & SBSDIO_SBADDRHIGH_MASK,
1018 /* Turn backplane clock on or off */
1019 static int brcmf_sdbrcm_htclk(struct brcmf_bus *bus, bool on, bool pendok)
1022 u8 clkctl, clkreq, devctl;
1023 unsigned long timeout;
1025 BRCMF_TRACE(("%s: Enter\n", __func__));
1030 /* Request HT Avail */
1032 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
1034 if ((bus->ci->chip == BCM4329_CHIP_ID)
1035 && (bus->ci->chiprev == 0))
1036 clkreq |= SBSDIO_FORCE_ALP;
1038 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1039 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
1041 BRCMF_ERROR(("%s: HT Avail request error: %d\n",
1046 if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID)
1047 && (bus->ci->buscorerev == 9))) {
1049 r_sdreg32(bus, &dummy,
1050 offsetof(struct sdpcmd_regs, clockctlstatus),
1054 /* Check current status */
1055 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1056 SBSDIO_FUNC1_CHIPCLKCSR, &err);
1058 BRCMF_ERROR(("%s: HT Avail read error: %d\n",
1063 /* Go to pending and await interrupt if appropriate */
1064 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
1065 /* Allow only clock-available interrupt */
1066 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
1068 SBSDIO_DEVICE_CTL, &err);
1070 BRCMF_ERROR(("%s: Devctl error setting CA:"
1071 " %d\n", __func__, err));
1075 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
1076 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1077 SBSDIO_DEVICE_CTL, devctl, &err);
1078 BRCMF_INFO(("CLKCTL: set PENDING\n"));
1079 bus->clkstate = CLK_PENDING;
1082 } else if (bus->clkstate == CLK_PENDING) {
1083 /* Cancel CA-only interrupt filter */
1085 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1086 SBSDIO_DEVICE_CTL, &err);
1087 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
1088 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1089 SBSDIO_DEVICE_CTL, devctl, &err);
1092 /* Otherwise, wait here (polling) for HT Avail */
1094 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
1095 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
1096 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev,
1098 SBSDIO_FUNC1_CHIPCLKCSR,
1100 if (time_after(jiffies, timeout))
1103 usleep_range(5000, 10000);
1106 BRCMF_ERROR(("%s: HT Avail request error: %d\n",
1110 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
1111 BRCMF_ERROR(("%s: HT Avail timeout (%d): "
1112 "clkctl 0x%02x\n", __func__,
1113 PMU_MAX_TRANSITION_DLY, clkctl));
1117 /* Mark clock available */
1118 bus->clkstate = CLK_AVAIL;
1119 BRCMF_INFO(("CLKCTL: turned ON\n"));
1122 if (bus->alp_only != true) {
1123 if (SBSDIO_ALPONLY(clkctl))
1124 BRCMF_ERROR(("%s: HT Clock should be on.\n",
1127 #endif /* defined (BCMDBG) */
1129 bus->activity = true;
1133 if (bus->clkstate == CLK_PENDING) {
1134 /* Cancel CA-only interrupt filter */
1135 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
1137 SBSDIO_DEVICE_CTL, &err);
1138 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
1139 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1140 SBSDIO_DEVICE_CTL, devctl, &err);
1143 bus->clkstate = CLK_SDONLY;
1144 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1145 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
1146 BRCMF_INFO(("CLKCTL: turned OFF\n"));
1148 BRCMF_ERROR(("%s: Failed access turning clock off:"
1149 " %d\n", __func__, err));
1156 /* Change idle/active SD state */
1157 static int brcmf_sdbrcm_sdclk(struct brcmf_bus *bus, bool on)
1159 BRCMF_TRACE(("%s: Enter\n", __func__));
1162 bus->clkstate = CLK_SDONLY;
1164 bus->clkstate = CLK_NONE;
1169 /* Transition SD and backplane clock readiness */
1170 static int brcmf_sdbrcm_clkctl(struct brcmf_bus *bus, uint target, bool pendok)
1173 uint oldstate = bus->clkstate;
1176 BRCMF_TRACE(("%s: Enter\n", __func__));
1178 /* Early exit if we're already there */
1179 if (bus->clkstate == target) {
1180 if (target == CLK_AVAIL) {
1181 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
1182 bus->activity = true;
1189 /* Make sure SD clock is available */
1190 if (bus->clkstate == CLK_NONE)
1191 brcmf_sdbrcm_sdclk(bus, true);
1192 /* Now request HT Avail on the backplane */
1193 brcmf_sdbrcm_htclk(bus, true, pendok);
1194 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
1195 bus->activity = true;
1199 /* Remove HT request, or bring up SD clock */
1200 if (bus->clkstate == CLK_NONE)
1201 brcmf_sdbrcm_sdclk(bus, true);
1202 else if (bus->clkstate == CLK_AVAIL)
1203 brcmf_sdbrcm_htclk(bus, false, false);
1205 BRCMF_ERROR(("brcmf_sdbrcm_clkctl: request for %d -> %d"
1206 "\n", bus->clkstate, target));
1207 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
1211 /* Make sure to remove HT request */
1212 if (bus->clkstate == CLK_AVAIL)
1213 brcmf_sdbrcm_htclk(bus, false, false);
1214 /* Now remove the SD clock */
1215 brcmf_sdbrcm_sdclk(bus, false);
1216 brcmf_sdbrcm_wd_timer(bus, 0);
1220 BRCMF_INFO(("brcmf_sdbrcm_clkctl: %d -> %d\n",
1221 oldstate, bus->clkstate));
1227 int brcmf_sdbrcm_bussleep(struct brcmf_bus *bus, bool sleep)
1231 BRCMF_INFO(("brcmf_sdbrcm_bussleep: request %s (currently %s)\n",
1232 (sleep ? "SLEEP" : "WAKE"),
1233 (bus->sleeping ? "SLEEP" : "WAKE")));
1235 /* Done if we're already in the requested state */
1236 if (sleep == bus->sleeping)
1239 /* Going to sleep: set the alarm and turn off the lights... */
1241 /* Don't sleep if something is pending */
1242 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
1245 /* Make sure the controller has the bus up */
1246 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1248 /* Tell device to start using OOB wakeup */
1249 w_sdreg32(bus, SMB_USE_OOB,
1250 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1251 if (retries > retry_limit)
1252 BRCMF_ERROR(("CANNOT SIGNAL CHIP, "
1253 "WILL NOT WAKE UP!!\n"));
1255 /* Turn off our contribution to the HT clock request */
1256 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
1258 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1259 SBSDIO_FUNC1_CHIPCLKCSR,
1260 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
1262 /* Isolate the bus */
1263 if (bus->ci->chip != BCM4329_CHIP_ID) {
1264 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1266 SBSDIO_DEVCTL_PADS_ISO, NULL);
1270 bus->sleeping = true;
1273 /* Waking up: bus power up is ok, set local state */
1275 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1276 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
1278 /* Force pad isolation off if possible
1279 (in case power never toggled) */
1280 if ((bus->ci->buscoretype == PCMCIA_CORE_ID)
1281 && (bus->ci->buscorerev >= 10))
1282 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1283 SBSDIO_DEVICE_CTL, 0, NULL);
1285 /* Make sure the controller has the bus up */
1286 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1288 /* Send misc interrupt to indicate OOB not needed */
1289 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
1291 if (retries <= retry_limit)
1292 w_sdreg32(bus, SMB_DEV_INT,
1293 offsetof(struct sdpcmd_regs, tosbmailbox),
1296 if (retries > retry_limit)
1297 BRCMF_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"));
1299 /* Make sure we have SD bus access */
1300 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
1303 bus->sleeping = false;
1309 #define BUS_WAKE(bus) \
1311 if ((bus)->sleeping) \
1312 brcmf_sdbrcm_bussleep((bus), false); \
1315 /* Writes a HW/SW header into the packet and sends it. */
1316 /* Assumes: (a) header space already there, (b) caller holds lock */
1317 static int brcmf_sdbrcm_txpkt(struct brcmf_bus *bus, struct sk_buff *pkt,
1318 uint chan, bool free_pkt)
1325 struct sk_buff *new;
1328 BRCMF_TRACE(("%s: Enter\n", __func__));
1330 if (bus->drvr->dongle_reset) {
1335 frame = (u8 *) (pkt->data);
1337 /* Add alignment padding, allocate new packet if needed */
1338 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1340 if (skb_headroom(pkt) < pad) {
1341 BRCMF_INFO(("%s: insufficient headroom %d for %d pad\n",
1342 __func__, skb_headroom(pkt), pad));
1343 bus->drvr->tx_realloc++;
1344 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
1346 BRCMF_ERROR(("%s: couldn't allocate new "
1347 "%d-byte packet\n", __func__,
1348 pkt->len + BRCMF_SDALIGN));
1353 PKTALIGN(new, pkt->len, BRCMF_SDALIGN);
1354 memcpy(new->data, pkt->data, pkt->len);
1356 brcmu_pkt_buf_free_skb(pkt);
1357 /* free the pkt if canned one is not used */
1360 frame = (u8 *) (pkt->data);
1361 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
1365 frame = (u8 *) (pkt->data);
1366 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
1367 memset(frame, 0, pad + SDPCM_HDRLEN);
1370 /* precondition: pad < BRCMF_SDALIGN */
1372 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1373 len = (u16) (pkt->len);
1374 *(u16 *) frame = cpu_to_le16(len);
1375 *(((u16 *) frame) + 1) = cpu_to_le16(~len);
1377 /* Software tag: channel, sequence number, data offset */
1379 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1381 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1383 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1384 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1387 tx_packets[pkt->priority]++;
1388 if (BRCMF_BYTES_ON() &&
1389 (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
1390 (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
1391 printk(KERN_DEBUG "Tx Frame:\n");
1392 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
1393 } else if (BRCMF_HDRS_ON()) {
1394 printk(KERN_DEBUG "TxHdr:\n");
1395 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1396 frame, min_t(u16, len, 16));
1400 /* Raise len to next SDIO block to eliminate tail command */
1401 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1402 u16 pad = bus->blocksize - (len % bus->blocksize);
1403 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1405 } else if (len % BRCMF_SDALIGN) {
1406 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1409 /* Some controllers have trouble with odd bytes -- round to even */
1410 if (forcealign && (len & (ALIGNMENT - 1)))
1411 len = roundup(len, ALIGNMENT);
1414 ret = brcmf_sdbrcm_send_buf(bus,
1415 brcmf_sdcard_cur_sbwad(bus->sdiodev),
1416 SDIO_FUNC_2, F2SYNC, frame, len, pkt, NULL, NULL);
1420 /* On failure, abort the command
1421 and terminate the frame */
1422 BRCMF_INFO(("%s: sdio error %d, abort command and "
1423 "terminate frame.\n", __func__, ret));
1426 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1427 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1428 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
1432 for (i = 0; i < 3; i++) {
1434 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
1436 SBSDIO_FUNC1_WFRAMEBCHI,
1438 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
1440 SBSDIO_FUNC1_WFRAMEBCLO,
1442 bus->f1regdata += 2;
1443 if ((hi == 0) && (lo == 0))
1449 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1451 } while ((ret < 0) && retrydata && retries++ < TXRETRIES);
1454 /* restore pkt buffer pointer before calling tx complete routine */
1455 skb_pull(pkt, SDPCM_HDRLEN + pad);
1456 brcmf_sdbrcm_sdunlock(bus);
1457 brcmf_txcomplete(bus->drvr, pkt, ret != 0);
1458 brcmf_sdbrcm_sdlock(bus);
1461 brcmu_pkt_buf_free_skb(pkt);
1466 int brcmf_sdbrcm_bus_txdata(struct brcmf_bus *bus, struct sk_buff *pkt)
1471 BRCMF_TRACE(("%s: Enter\n", __func__));
1476 /* Push the test header if doing loopback */
1477 if (bus->ext_loop) {
1479 skb_push(pkt, SDPCM_TEST_HDRLEN);
1481 *data++ = SDPCM_TEST_ECHOREQ;
1482 *data++ = (u8) bus->loopid++;
1483 *data++ = (datalen >> 0);
1484 *data++ = (datalen >> 8);
1485 datalen += SDPCM_TEST_HDRLEN;
1489 /* Add space for the header */
1490 skb_push(pkt, SDPCM_HDRLEN);
1491 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
1493 prec = PRIO2PREC((pkt->priority & PRIOMASK));
1495 /* Check for existing queue, current flow-control,
1496 pending event, or pending clock */
1497 if (brcmf_deferred_tx || bus->fcstate || pktq_len(&bus->txq)
1498 || bus->dpc_sched || (!DATAOK(bus))
1499 || (bus->flowcontrol & NBITVAL(prec))
1500 || (bus->clkstate != CLK_AVAIL)) {
1501 BRCMF_TRACE(("%s: deferring pktq len %d\n", __func__,
1502 pktq_len(&bus->txq)));
1505 /* Priority based enq */
1506 spin_lock_bh(&bus->txqlock);
1507 if (brcmf_c_prec_enq(bus->drvr, &bus->txq, pkt, prec) ==
1509 skb_pull(pkt, SDPCM_HDRLEN);
1510 brcmf_txcomplete(bus->drvr, pkt, false);
1511 brcmu_pkt_buf_free_skb(pkt);
1512 BRCMF_ERROR(("%s: out of bus->txq !!!\n", __func__));
1517 spin_unlock_bh(&bus->txqlock);
1519 if (pktq_len(&bus->txq) >= TXHI)
1520 brcmf_txflowcontrol(bus->drvr, 0, ON);
1523 if (pktq_plen(&bus->txq, prec) > qcount[prec])
1524 qcount[prec] = pktq_plen(&bus->txq, prec);
1526 /* Schedule DPC if needed to send queued packet(s) */
1527 if (brcmf_deferred_tx && !bus->dpc_sched) {
1528 bus->dpc_sched = true;
1529 brcmf_sdbrcm_sched_dpc(bus);
1532 /* Lock: we're about to use shared data/code (and SDIO) */
1533 brcmf_sdbrcm_sdlock(bus);
1535 /* Otherwise, send it now */
1537 /* Make sure back plane ht clk is on, no pending allowed */
1538 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
1541 BRCMF_TRACE(("%s: calling txpkt\n", __func__));
1542 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1544 ret = brcmf_sdbrcm_txpkt(bus, pkt,
1545 (bus->ext_loop ? SDPCM_TEST_CHANNEL :
1546 SDPCM_DATA_CHANNEL), true);
1549 bus->drvr->tx_errors++;
1551 bus->drvr->dstats.tx_bytes += datalen;
1553 if (bus->idletime == BRCMF_IDLE_IMMEDIATE &&
1555 bus->activity = false;
1556 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
1559 brcmf_sdbrcm_sdunlock(bus);
1565 static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes)
1567 struct sk_buff *pkt;
1570 int ret = 0, prec_out;
1575 struct brcmf_pub *drvr = bus->drvr;
1577 BRCMF_TRACE(("%s: Enter\n", __func__));
1579 tx_prec_map = ~bus->flowcontrol;
1581 /* Send frames until the limit or some other event */
1582 for (cnt = 0; (cnt < maxframes) && DATAOK(bus); cnt++) {
1583 spin_lock_bh(&bus->txqlock);
1584 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1586 spin_unlock_bh(&bus->txqlock);
1589 spin_unlock_bh(&bus->txqlock);
1590 datalen = pkt->len - SDPCM_HDRLEN;
1593 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1595 ret = brcmf_sdbrcm_txpkt(bus, pkt,
1596 (bus->ext_loop ? SDPCM_TEST_CHANNEL :
1597 SDPCM_DATA_CHANNEL), true);
1600 bus->drvr->tx_errors++;
1602 bus->drvr->dstats.tx_bytes += datalen;
1604 /* In poll mode, need to check for other events */
1605 if (!bus->intr && cnt) {
1606 /* Check device status, signal pending interrupt */
1607 r_sdreg32(bus, &intstatus,
1608 offsetof(struct sdpcmd_regs, intstatus),
1611 if (brcmf_sdcard_regfail(bus->sdiodev))
1613 if (intstatus & bus->hostintmask)
1618 /* Deflow-control stack if needed */
1619 if (drvr->up && (drvr->busstate == BRCMF_BUS_DATA) &&
1620 drvr->txoff && (pktq_len(&bus->txq) < TXLOW))
1621 brcmf_txflowcontrol(drvr, 0, OFF);
1627 brcmf_sdbrcm_bus_txctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
1637 BRCMF_TRACE(("%s: Enter\n", __func__));
1639 if (bus->drvr->dongle_reset)
1642 /* Back the pointer to make a room for bus header */
1643 frame = msg - SDPCM_HDRLEN;
1644 len = (msglen += SDPCM_HDRLEN);
1646 /* Add alignment padding (optional for ctl frames) */
1647 if (brcmf_alignctl) {
1648 doff = ((unsigned long)frame % BRCMF_SDALIGN);
1653 memset(frame, 0, doff + SDPCM_HDRLEN);
1655 /* precondition: doff < BRCMF_SDALIGN */
1657 doff += SDPCM_HDRLEN;
1659 /* Round send length to next SDIO block */
1660 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1661 u16 pad = bus->blocksize - (len % bus->blocksize);
1662 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1664 } else if (len % BRCMF_SDALIGN) {
1665 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1668 /* Satisfy length-alignment requirements */
1669 if (forcealign && (len & (ALIGNMENT - 1)))
1670 len = roundup(len, ALIGNMENT);
1672 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
1674 /* Need to lock here to protect txseq and SDIO tx calls */
1675 brcmf_sdbrcm_sdlock(bus);
1679 /* Make sure backplane clock is on */
1680 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1682 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1683 *(u16 *) frame = cpu_to_le16((u16) msglen);
1684 *(((u16 *) frame) + 1) = cpu_to_le16(~msglen);
1686 /* Software tag: channel, sequence number, data offset */
1688 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
1690 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
1691 SDPCM_DOFFSET_MASK);
1692 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1693 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1696 BRCMF_INFO(("%s: No bus credit bus->tx_max %d,"
1697 " bus->tx_seq %d\n", __func__,
1698 bus->tx_max, bus->tx_seq));
1699 bus->ctrl_frame_stat = true;
1701 bus->ctrl_frame_buf = frame;
1702 bus->ctrl_frame_len = len;
1704 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
1706 if (bus->ctrl_frame_stat == false) {
1707 BRCMF_INFO(("%s: ctrl_frame_stat == false\n",
1711 BRCMF_INFO(("%s: ctrl_frame_stat == true\n", __func__));
1718 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
1719 printk(KERN_DEBUG "Tx Frame:\n");
1720 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1722 } else if (BRCMF_HDRS_ON()) {
1723 printk(KERN_DEBUG "TxHdr:\n");
1724 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1725 frame, min_t(u16, len, 16));
1730 bus->ctrl_frame_stat = false;
1731 ret = brcmf_sdbrcm_send_buf(bus,
1732 brcmf_sdcard_cur_sbwad(bus->sdiodev),
1734 F2SYNC, frame, len, NULL, NULL, NULL);
1737 /* On failure, abort the command and
1738 terminate the frame */
1739 BRCMF_INFO(("%s: sdio error %d, abort command "
1740 "and terminate frame.\n",
1744 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1746 brcmf_sdcard_cfg_write(bus->sdiodev,
1748 SBSDIO_FUNC1_FRAMECTRL,
1752 for (i = 0; i < 3; i++) {
1754 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
1756 SBSDIO_FUNC1_WFRAMEBCHI,
1758 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
1760 SBSDIO_FUNC1_WFRAMEBCLO,
1762 bus->f1regdata += 2;
1763 if ((hi == 0) && (lo == 0))
1770 (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1772 } while ((ret < 0) && retries++ < TXRETRIES);
1775 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
1776 bus->activity = false;
1777 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
1780 brcmf_sdbrcm_sdunlock(bus);
1783 bus->drvr->tx_ctlerrs++;
1785 bus->drvr->tx_ctlpkts++;
1787 return ret ? -EIO : 0;
1791 brcmf_sdbrcm_bus_rxctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
1797 BRCMF_TRACE(("%s: Enter\n", __func__));
1799 if (bus->drvr->dongle_reset)
1802 /* Wait until control frame is available */
1803 timeleft = brcmf_sdbrcm_ioctl_resp_wait(bus, &bus->rxlen, &pending);
1805 brcmf_sdbrcm_sdlock(bus);
1807 memcpy(msg, bus->rxctl, min(msglen, rxlen));
1809 brcmf_sdbrcm_sdunlock(bus);
1812 BRCMF_CTL(("%s: resumed on rxctl frame, got %d expected %d\n",
1813 __func__, rxlen, msglen));
1814 } else if (timeleft == 0) {
1815 BRCMF_ERROR(("%s: resumed on timeout\n", __func__));
1817 brcmf_sdbrcm_sdlock(bus);
1818 brcmf_sdbrcm_checkdied(bus, NULL, 0);
1819 brcmf_sdbrcm_sdunlock(bus);
1821 } else if (pending == true) {
1822 BRCMF_CTL(("%s: cancelled\n", __func__));
1823 return -ERESTARTSYS;
1825 BRCMF_CTL(("%s: resumed for unknown reason?\n", __func__));
1827 brcmf_sdbrcm_sdlock(bus);
1828 brcmf_sdbrcm_checkdied(bus, NULL, 0);
1829 brcmf_sdbrcm_sdunlock(bus);
1834 bus->drvr->rx_ctlpkts++;
1836 bus->drvr->rx_ctlerrs++;
1838 return rxlen ? (int)rxlen : -ETIMEDOUT;
1878 const struct brcmu_iovar brcmf_sdio_iovars[] = {
1879 {"intr", IOV_INTR, 0, IOVT_BOOL, 0},
1880 {"sleep", IOV_SLEEP, 0, IOVT_BOOL, 0},
1881 {"pollrate", IOV_POLLRATE, 0, IOVT_UINT32, 0},
1882 {"idletime", IOV_IDLETIME, 0, IOVT_INT32, 0},
1883 {"idleclock", IOV_IDLECLOCK, 0, IOVT_INT32, 0},
1884 {"membytes", IOV_MEMBYTES, 0, IOVT_BUFFER, 2 * sizeof(int)},
1885 {"memsize", IOV_MEMSIZE, 0, IOVT_UINT32, 0},
1886 {"download", IOV_DOWNLOAD, 0, IOVT_BOOL, 0},
1887 {"vars", IOV_VARS, 0, IOVT_BUFFER, 0},
1888 {"sdiod_drive", IOV_SDIOD_DRIVE, 0, IOVT_UINT32, 0},
1889 {"readahead", IOV_READAHEAD, 0, IOVT_BOOL, 0},
1890 {"sdrxchain", IOV_SDRXCHAIN, 0, IOVT_BOOL, 0},
1891 {"alignctl", IOV_ALIGNCTL, 0, IOVT_BOOL, 0},
1892 {"sdalign", IOV_SDALIGN, 0, IOVT_BOOL, 0},
1893 {"devreset", IOV_DEVRESET, 0, IOVT_BOOL, 0},
1894 {"wdtick", IOV_WDTICK, 0, IOVT_UINT32, 0},
1895 {"ioctl_timeout", IOV_IOCTLTIMEOUT, 0, IOVT_UINT32, 0},
1897 {"cons", IOV_CONS, 0, IOVT_BUFFER, 0}
1899 {"dconpoll", IOV_DCONSOLE_POLL, 0, IOVT_UINT32, 0}
1901 {"sdreg", IOV_SDREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
1903 {"sbreg", IOV_SBREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
1905 {"sd_cis", IOV_SDCIS, 0, IOVT_BUFFER, BRCMF_IOCTL_MAXLEN}
1907 {"forcealign", IOV_FORCEEVEN, 0, IOVT_BOOL, 0}
1909 {"txbound", IOV_TXBOUND, 0, IOVT_UINT32, 0}
1911 {"rxbound", IOV_RXBOUND, 0, IOVT_UINT32, 0}
1913 {"txminmax", IOV_TXMINMAX, 0, IOVT_UINT32, 0}
1915 {"checkdied", IOV_CHECKDIED, 0, IOVT_BUFFER, 0}
1919 {"extloop", IOV_EXTLOOP, 0, IOVT_BOOL, 0}
1921 {"pktgen", IOV_PKTGEN, 0, IOVT_BUFFER, sizeof(struct brcmf_pktgen)}
1929 brcmf_dump_pct(struct brcmu_strbuf *strbuf, char *desc, uint num, uint div)
1934 brcmu_bprintf(strbuf, "%s N/A", desc);
1937 q2 = (100 * (num - (q1 * div))) / div;
1938 brcmu_bprintf(strbuf, "%s %d.%02d", desc, q1, q2);
1942 void brcmf_sdbrcm_bus_dump(struct brcmf_pub *drvr, struct brcmu_strbuf *strbuf)
1944 struct brcmf_bus *bus = drvr->bus;
1946 brcmu_bprintf(strbuf, "Bus SDIO structure:\n");
1947 brcmu_bprintf(strbuf,
1948 "hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n",
1949 bus->hostintmask, bus->intstatus, bus->sdpcm_ver);
1950 brcmu_bprintf(strbuf,
1951 "fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n",
1952 bus->fcstate, pktq_len(&bus->txq), bus->tx_seq, bus->tx_max,
1953 bus->rxskip, bus->rxlen, bus->rx_seq);
1954 brcmu_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n",
1955 bus->intr, bus->intrcount, bus->lastintrs, bus->spurious);
1956 brcmu_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n",
1957 bus->pollrate, bus->pollcnt, bus->regfails);
1959 brcmu_bprintf(strbuf, "\nAdditional counters:\n");
1960 brcmu_bprintf(strbuf,
1961 "tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n",
1962 bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong,
1964 brcmu_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n",
1965 bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq);
1966 brcmu_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n",
1967 bus->fc_rcvd, bus->fc_xoff, bus->fc_xon);
1968 brcmu_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n",
1969 bus->rxglomfail, bus->rxglomframes, bus->rxglompkts);
1970 brcmu_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs"
1972 (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs,
1973 bus->f2rxdata, bus->f2txdata, bus->f1regdata);
1975 brcmf_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->drvr->rx_packets,
1976 (bus->f2rxhdrs + bus->f2rxdata));
1977 brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->rx_packets,
1979 brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->rx_packets,
1980 (bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata));
1981 brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->rx_packets,
1983 brcmu_bprintf(strbuf, "\n");
1985 brcmf_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts),
1986 bus->drvr->rx_packets);
1987 brcmf_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts,
1989 brcmu_bprintf(strbuf, "\n");
1991 brcmf_dump_pct(strbuf, "Tx: pkts/f2wr", bus->drvr->tx_packets,
1993 brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->tx_packets,
1995 brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->tx_packets,
1996 (bus->f2txdata + bus->f1regdata));
1997 brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->tx_packets,
1999 brcmu_bprintf(strbuf, "\n");
2001 brcmf_dump_pct(strbuf, "Total: pkts/f2rw",
2002 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2003 (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata));
2004 brcmf_dump_pct(strbuf, ", pkts/f1sd",
2005 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2007 brcmf_dump_pct(strbuf, ", pkts/sd",
2008 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2009 (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata +
2011 brcmf_dump_pct(strbuf, ", pkts/int",
2012 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2014 brcmu_bprintf(strbuf, "\n\n");
2018 if (bus->pktgen_count) {
2019 brcmu_bprintf(strbuf, "pktgen config and count:\n");
2020 brcmu_bprintf(strbuf,
2021 "freq %d count %d print %d total %d min %d len %d\n",
2022 bus->pktgen_freq, bus->pktgen_count,
2023 bus->pktgen_print, bus->pktgen_total,
2024 bus->pktgen_minlen, bus->pktgen_maxlen);
2025 brcmu_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n",
2026 bus->pktgen_sent, bus->pktgen_rcvd,
2031 brcmu_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n",
2032 bus->dpc_sched, " not ");
2033 brcmu_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize,
2036 brcmu_bprintf(strbuf,
2037 "clkstate %d activity %d idletime %d idlecount %d sleeping %d\n",
2038 bus->clkstate, bus->activity, bus->idletime, bus->idlecount,
2042 void brcmf_bus_clearcounts(struct brcmf_pub *drvr)
2044 struct brcmf_bus *bus = (struct brcmf_bus *) drvr->bus;
2046 bus->intrcount = bus->lastintrs = bus->spurious = bus->regfails = 0;
2047 bus->rxrtx = bus->rx_toolong = bus->rxc_errors = 0;
2048 bus->rx_hdrfail = bus->rx_badhdr = bus->rx_badseq = 0;
2049 bus->tx_sderrs = bus->fc_rcvd = bus->fc_xoff = bus->fc_xon = 0;
2050 bus->rxglomfail = bus->rxglomframes = bus->rxglompkts = 0;
2051 bus->f2rxhdrs = bus->f2rxdata = bus->f2txdata = bus->f1regdata = 0;
2055 static int brcmf_sdbrcm_pktgen_get(struct brcmf_bus *bus, u8 *arg)
2057 struct brcmf_pktgen pktgen;
2059 pktgen.version = BRCMF_PKTGEN_VERSION;
2060 pktgen.freq = bus->pktgen_freq;
2061 pktgen.count = bus->pktgen_count;
2062 pktgen.print = bus->pktgen_print;
2063 pktgen.total = bus->pktgen_total;
2064 pktgen.minlen = bus->pktgen_minlen;
2065 pktgen.maxlen = bus->pktgen_maxlen;
2066 pktgen.numsent = bus->pktgen_sent;
2067 pktgen.numrcvd = bus->pktgen_rcvd;
2068 pktgen.numfail = bus->pktgen_fail;
2069 pktgen.mode = bus->pktgen_mode;
2070 pktgen.stop = bus->pktgen_stop;
2072 memcpy(arg, &pktgen, sizeof(pktgen));
2077 static int brcmf_sdbrcm_pktgen_set(struct brcmf_bus *bus, u8 *arg)
2079 struct brcmf_pktgen pktgen;
2080 uint oldcnt, oldmode;
2082 memcpy(&pktgen, arg, sizeof(pktgen));
2083 if (pktgen.version != BRCMF_PKTGEN_VERSION)
2086 oldcnt = bus->pktgen_count;
2087 oldmode = bus->pktgen_mode;
2089 bus->pktgen_freq = pktgen.freq;
2090 bus->pktgen_count = pktgen.count;
2091 bus->pktgen_print = pktgen.print;
2092 bus->pktgen_total = pktgen.total;
2093 bus->pktgen_minlen = pktgen.minlen;
2094 bus->pktgen_maxlen = pktgen.maxlen;
2095 bus->pktgen_mode = pktgen.mode;
2096 bus->pktgen_stop = pktgen.stop;
2098 bus->pktgen_tick = bus->pktgen_ptick = 0;
2099 bus->pktgen_len = max(bus->pktgen_len, bus->pktgen_minlen);
2100 bus->pktgen_len = min(bus->pktgen_len, bus->pktgen_maxlen);
2102 /* Clear counts for a new pktgen (mode change, or was stopped) */
2103 if (bus->pktgen_count && (!oldcnt || oldmode != bus->pktgen_mode))
2104 bus->pktgen_sent = bus->pktgen_rcvd = bus->pktgen_fail = 0;
2111 brcmf_sdbrcm_membytes(struct brcmf_bus *bus, bool write, u32 address, u8 *data,
2118 /* Determine initial transfer parameters */
2119 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2120 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2121 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2125 /* Set the backplane window to include the start address */
2126 bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
2128 BRCMF_ERROR(("%s: window change failed\n", __func__));
2132 /* Do the transfer(s) */
2134 BRCMF_INFO(("%s: %s %d bytes at offset 0x%08x in window"
2135 " 0x%08x\n", __func__, (write ? "write" : "read"),
2136 dsize, sdaddr, (address & SBSDIO_SBWINDOW_MASK)));
2137 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2138 sdaddr, data, dsize);
2140 BRCMF_ERROR(("%s: membytes transfer failed\n",
2145 /* Adjust for next transfer (if any) */
2150 bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
2152 BRCMF_ERROR(("%s: window change failed\n",
2157 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2162 /* Return the window to backplane enumeration space for core access */
2163 if (brcmf_sdbrcm_set_siaddr_window(bus,
2164 brcmf_sdcard_cur_sbwad(
2166 BRCMF_ERROR(("%s: FAILED to set window back to 0x%x\n",
2167 __func__, brcmf_sdcard_cur_sbwad(bus->sdiodev)));
2174 brcmf_sdbrcm_readshared(struct brcmf_bus *bus, struct sdpcm_shared *sh)
2179 /* Read last word in memory to determine address of
2180 sdpcm_shared structure */
2181 rv = brcmf_sdbrcm_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr,
2186 addr = le32_to_cpu(addr);
2188 BRCMF_INFO(("sdpcm_shared address 0x%08X\n", addr));
2191 * Check if addr is valid.
2192 * NVRAM length at the end of memory should have been overwritten.
2194 if (addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff)) {
2195 BRCMF_ERROR(("%s: address (0x%08x) of sdpcm_shared invalid\n",
2200 /* Read rte_shared structure */
2201 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *) sh,
2202 sizeof(struct sdpcm_shared));
2207 sh->flags = le32_to_cpu(sh->flags);
2208 sh->trap_addr = le32_to_cpu(sh->trap_addr);
2209 sh->assert_exp_addr = le32_to_cpu(sh->assert_exp_addr);
2210 sh->assert_file_addr = le32_to_cpu(sh->assert_file_addr);
2211 sh->assert_line = le32_to_cpu(sh->assert_line);
2212 sh->console_addr = le32_to_cpu(sh->console_addr);
2213 sh->msgtrace_addr = le32_to_cpu(sh->msgtrace_addr);
2215 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2216 BRCMF_ERROR(("%s: sdpcm_shared version %d in brcmf "
2217 "is different than sdpcm_shared version %d in dongle\n",
2218 __func__, SDPCM_SHARED_VERSION,
2219 sh->flags & SDPCM_SHARED_VERSION_MASK));
2226 static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size)
2230 char *mbuffer = NULL;
2231 uint maxstrlen = 256;
2233 struct brcmf_trap tr;
2234 struct sdpcm_shared sdpcm_shared;
2235 struct brcmu_strbuf strbuf;
2237 BRCMF_TRACE(("%s: Enter\n", __func__));
2241 * Called after a rx ctrl timeout. "data" is NULL.
2242 * allocate memory to trace the trap or assert.
2245 mbuffer = data = kmalloc(msize, GFP_ATOMIC);
2246 if (mbuffer == NULL) {
2247 BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__,
2254 str = kmalloc(maxstrlen, GFP_ATOMIC);
2256 BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__, maxstrlen));
2261 bcmerror = brcmf_sdbrcm_readshared(bus, &sdpcm_shared);
2265 brcmu_binit(&strbuf, data, size);
2267 brcmu_bprintf(&strbuf,
2268 "msgtrace address : 0x%08X\nconsole address : 0x%08X\n",
2269 sdpcm_shared.msgtrace_addr, sdpcm_shared.console_addr);
2271 if ((sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2272 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2273 * (Avoids conflict with real asserts for programmatic
2274 * parsing of output.)
2276 brcmu_bprintf(&strbuf, "Assrt not built in dongle\n");
2278 if ((sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) ==
2280 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2281 * (Avoids conflict with real asserts for programmatic
2282 * parsing of output.)
2284 brcmu_bprintf(&strbuf, "No trap%s in dongle",
2285 (sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT)
2288 if (sdpcm_shared.flags & SDPCM_SHARED_ASSERT) {
2289 /* Download assert */
2290 brcmu_bprintf(&strbuf, "Dongle assert");
2291 if (sdpcm_shared.assert_exp_addr != 0) {
2293 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2294 sdpcm_shared.assert_exp_addr,
2295 (u8 *) str, maxstrlen);
2299 str[maxstrlen - 1] = '\0';
2300 brcmu_bprintf(&strbuf, " expr \"%s\"", str);
2303 if (sdpcm_shared.assert_file_addr != 0) {
2305 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2306 sdpcm_shared.assert_file_addr,
2307 (u8 *) str, maxstrlen);
2311 str[maxstrlen - 1] = '\0';
2312 brcmu_bprintf(&strbuf, " file \"%s\"", str);
2315 brcmu_bprintf(&strbuf, " line %d ",
2316 sdpcm_shared.assert_line);
2319 if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
2320 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2321 sdpcm_shared.trap_addr, (u8 *)&tr,
2322 sizeof(struct brcmf_trap));
2326 brcmu_bprintf(&strbuf,
2327 "Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x,"
2328 "lp 0x%x, rpc 0x%x Trap offset 0x%x, "
2329 "r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n",
2330 tr.type, tr.epc, tr.cpsr, tr.spsr, tr.r13,
2331 tr.r14, tr.pc, sdpcm_shared.trap_addr,
2332 tr.r0, tr.r1, tr.r2, tr.r3, tr.r4, tr.r5,
2337 if (sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP))
2338 BRCMF_ERROR(("%s: %s\n", __func__, strbuf.origbuf));
2341 if (sdpcm_shared.flags & SDPCM_SHARED_TRAP)
2342 /* Mem dump to a file on device */
2343 brcmf_sdbrcm_mem_dump(bus);
2354 static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus)
2357 int size; /* Full mem size */
2358 int start = 0; /* Start address */
2359 int read_size = 0; /* Read size of each iteration */
2360 u8 *buf = NULL, *databuf = NULL;
2362 /* Get full mem size */
2363 size = bus->ramsize;
2364 buf = kmalloc(size, GFP_ATOMIC);
2366 BRCMF_ERROR(("%s: Out of memory (%d bytes)\n", __func__, size));
2370 /* Read mem content */
2371 printk(KERN_DEBUG "Dump dongle memory");
2374 read_size = min(MEMBLOCK, size);
2375 ret = brcmf_sdbrcm_membytes(bus, false, start, databuf,
2378 BRCMF_ERROR(("%s: Error membytes %d\n", __func__, ret));
2384 /* Decrement size and increment start address */
2387 databuf += read_size;
2389 printk(KERN_DEBUG "Done\n");
2391 /* free buf before return !!! */
2392 if (brcmf_write_to_file(bus->drvr, buf, bus->ramsize)) {
2393 BRCMF_ERROR(("%s: Error writing to files\n", __func__));
2397 /* buf free handled in brcmf_write_to_file, not here */
2401 #define CONSOLE_LINE_MAX 192
2403 static int brcmf_sdbrcm_readconsole(struct brcmf_bus *bus)
2405 struct brcmf_console *c = &bus->console;
2406 u8 line[CONSOLE_LINE_MAX], ch;
2410 /* Don't do anything until FWREADY updates console address */
2411 if (bus->console_addr == 0)
2414 /* Read console log struct */
2415 addr = bus->console_addr + offsetof(struct rte_console, log);
2416 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log,
2421 /* Allocate console buffer (one time only) */
2422 if (c->buf == NULL) {
2423 c->bufsize = le32_to_cpu(c->log.buf_size);
2424 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2429 idx = le32_to_cpu(c->log.idx);
2431 /* Protect against corrupt value */
2432 if (idx > c->bufsize)
2435 /* Skip reading the console buffer if the index pointer
2440 /* Read the console buffer */
2441 addr = le32_to_cpu(c->log.buf);
2442 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2446 while (c->last != idx) {
2447 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2448 if (c->last == idx) {
2449 /* This would output a partial line.
2451 * the buffer pointer and output this
2452 * line next time around.
2457 c->last = c->bufsize - n;
2460 ch = c->buf[c->last];
2461 c->last = (c->last + 1) % c->bufsize;
2468 if (line[n - 1] == '\r')
2471 printk(KERN_DEBUG "CONSOLE: %s\n", line);
2480 int brcmf_sdbrcm_downloadvars(struct brcmf_bus *bus, void *arg, int len)
2484 BRCMF_TRACE(("%s: Enter\n", __func__));
2486 /* Basic sanity checks */
2487 if (bus->drvr->up) {
2488 bcmerror = -EISCONN;
2492 bcmerror = -EOVERFLOW;
2496 /* Free the old ones and replace with passed variables */
2499 bus->vars = kmalloc(len, GFP_ATOMIC);
2500 bus->varsz = bus->vars ? len : 0;
2501 if (bus->vars == NULL) {
2506 /* Copy the passed variables, which should include the
2507 terminating double-null */
2508 memcpy(bus->vars, arg, bus->varsz);
2513 static int brcmf_sdbrcm_doiovar(struct brcmf_bus *bus,
2514 const struct brcmu_iovar *vi, u32 actionid,
2515 const char *name, void *params, int plen,
2516 void *arg, int len, int val_size)
2522 BRCMF_TRACE(("%s: Enter, action %d name %s params %p plen %d arg %p "
2523 "len %d val_size %d\n", __func__, actionid, name, params,
2524 plen, arg, len, val_size));
2526 bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
2530 if (plen >= (int)sizeof(int_val))
2531 memcpy(&int_val, params, sizeof(int_val));
2533 bool_val = (int_val != 0) ? true : false;
2535 /* Some ioctls use the bus */
2536 brcmf_sdbrcm_sdlock(bus);
2538 /* Check if dongle is in reset. If so, only allow DEVRESET iovars */
2539 if (bus->drvr->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) ||
2540 actionid == IOV_GVAL(IOV_DEVRESET))) {
2545 /* Handle sleep stuff before any clock mucking */
2546 if (vi->varid == IOV_SLEEP) {
2547 if (IOV_ISSET(actionid)) {
2548 bcmerror = brcmf_sdbrcm_bussleep(bus, bool_val);
2550 int_val = (s32) bus->sleeping;
2551 memcpy(arg, &int_val, val_size);
2556 /* Request clock to allow SDIO accesses */
2557 if (!bus->drvr->dongle_reset) {
2559 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2563 case IOV_GVAL(IOV_INTR):
2564 int_val = (s32) bus->intr;
2565 memcpy(arg, &int_val, val_size);
2568 case IOV_SVAL(IOV_INTR):
2569 bus->intr = bool_val;
2572 case IOV_GVAL(IOV_POLLRATE):
2573 int_val = (s32) bus->pollrate;
2574 memcpy(arg, &int_val, val_size);
2577 case IOV_SVAL(IOV_POLLRATE):
2578 bus->pollrate = (uint) int_val;
2579 bus->poll = (bus->pollrate != 0);
2582 case IOV_GVAL(IOV_IDLETIME):
2583 int_val = bus->idletime;
2584 memcpy(arg, &int_val, val_size);
2587 case IOV_SVAL(IOV_IDLETIME):
2588 if ((int_val < 0) && (int_val != BRCMF_IDLE_IMMEDIATE))
2591 bus->idletime = int_val;
2594 case IOV_GVAL(IOV_IDLECLOCK):
2595 int_val = (s32) bus->idleclock;
2596 memcpy(arg, &int_val, val_size);
2599 case IOV_SVAL(IOV_IDLECLOCK):
2600 bus->idleclock = int_val;
2603 case IOV_SVAL(IOV_MEMBYTES):
2604 case IOV_GVAL(IOV_MEMBYTES):
2610 bool set = (actionid == IOV_SVAL(IOV_MEMBYTES));
2612 address = (u32) int_val;
2613 memcpy(&int_val, (char *)params + sizeof(int_val),
2615 size = (uint) int_val;
2617 /* Do some validation */
2618 dsize = set ? plen - (2 * sizeof(int)) : len;
2620 BRCMF_ERROR(("%s: error on %s membytes, addr "
2621 "0x%08x size %d dsize %d\n",
2622 __func__, (set ? "set" : "get"),
2623 address, size, dsize));
2628 BRCMF_INFO(("%s: Request to %s %d bytes at address "
2629 "0x%08x\n", __func__,
2630 (set ? "write" : "read"), size, address));
2632 /* If we know about SOCRAM, check for a fit */
2633 if ((bus->orig_ramsize) &&
2634 ((address > bus->orig_ramsize)
2635 || (address + size > bus->orig_ramsize))) {
2636 BRCMF_ERROR(("%s: ramsize 0x%08x doesn't have"
2637 " %d bytes at 0x%08x\n", __func__,
2638 bus->orig_ramsize, size, address));
2643 /* Generate the actual data pointer */
2645 set ? (u8 *) params +
2646 2 * sizeof(int) : (u8 *) arg;
2648 /* Call to do the transfer */
2649 bcmerror = brcmf_sdbrcm_membytes(bus, set, address,
2655 case IOV_GVAL(IOV_MEMSIZE):
2656 int_val = (s32) bus->ramsize;
2657 memcpy(arg, &int_val, val_size);
2660 case IOV_GVAL(IOV_SDIOD_DRIVE):
2661 int_val = (s32) brcmf_sdiod_drive_strength;
2662 memcpy(arg, &int_val, val_size);
2665 case IOV_SVAL(IOV_SDIOD_DRIVE):
2666 brcmf_sdiod_drive_strength = int_val;
2667 brcmf_sdbrcm_sdiod_drive_strength_init(bus,
2668 brcmf_sdiod_drive_strength);
2671 case IOV_SVAL(IOV_DOWNLOAD):
2672 bcmerror = brcmf_sdbrcm_download_state(bus, bool_val);
2675 case IOV_SVAL(IOV_VARS):
2676 bcmerror = brcmf_sdbrcm_downloadvars(bus, arg, len);
2679 case IOV_GVAL(IOV_READAHEAD):
2680 int_val = (s32) brcmf_readahead;
2681 memcpy(arg, &int_val, val_size);
2684 case IOV_SVAL(IOV_READAHEAD):
2685 if (bool_val && !brcmf_readahead)
2687 brcmf_readahead = bool_val;
2690 case IOV_GVAL(IOV_SDRXCHAIN):
2691 int_val = (s32) bus->use_rxchain;
2692 memcpy(arg, &int_val, val_size);
2695 case IOV_SVAL(IOV_SDRXCHAIN):
2696 if (bool_val && !bus->sd_rxchain)
2697 bcmerror = -ENOTSUPP;
2699 bus->use_rxchain = bool_val;
2701 case IOV_GVAL(IOV_ALIGNCTL):
2702 int_val = (s32) brcmf_alignctl;
2703 memcpy(arg, &int_val, val_size);
2706 case IOV_SVAL(IOV_ALIGNCTL):
2707 brcmf_alignctl = bool_val;
2710 case IOV_GVAL(IOV_SDALIGN):
2711 int_val = BRCMF_SDALIGN;
2712 memcpy(arg, &int_val, val_size);
2716 case IOV_GVAL(IOV_VARS):
2717 if (bus->varsz < (uint) len)
2718 memcpy(arg, bus->vars, bus->varsz);
2720 bcmerror = -EOVERFLOW;
2725 case IOV_GVAL(IOV_DCONSOLE_POLL):
2726 int_val = (s32) brcmf_console_ms;
2727 memcpy(arg, &int_val, val_size);
2730 case IOV_SVAL(IOV_DCONSOLE_POLL):
2731 brcmf_console_ms = (uint) int_val;
2734 case IOV_SVAL(IOV_CONS):
2736 bcmerror = brcmf_sdbrcm_bus_console_in(bus->drvr,
2740 case IOV_GVAL(IOV_SDREG):
2742 struct brcmf_sdreg *sd_ptr;
2745 sd_ptr = (struct brcmf_sdreg *) params;
2747 addr = bus->ci->buscorebase + sd_ptr->offset;
2748 size = sd_ptr->func;
2749 int_val = (s32) brcmf_sdcard_reg_read(bus->sdiodev,
2751 if (brcmf_sdcard_regfail(bus->sdiodev))
2753 memcpy(arg, &int_val, sizeof(s32));
2757 case IOV_SVAL(IOV_SDREG):
2759 struct brcmf_sdreg *sd_ptr;
2762 sd_ptr = (struct brcmf_sdreg *) params;
2764 addr = bus->ci->buscorebase + sd_ptr->offset;
2765 size = sd_ptr->func;
2766 brcmf_sdcard_reg_write(bus->sdiodev, addr, size,
2768 if (brcmf_sdcard_regfail(bus->sdiodev))
2773 /* Same as above, but offset is not backplane
2775 case IOV_GVAL(IOV_SBREG):
2777 struct brcmf_sdreg sdreg;
2780 memcpy(&sdreg, params, sizeof(sdreg));
2782 addr = SI_ENUM_BASE + sdreg.offset;
2784 int_val = (s32) brcmf_sdcard_reg_read(bus->sdiodev,
2786 if (brcmf_sdcard_regfail(bus->sdiodev))
2788 memcpy(arg, &int_val, sizeof(s32));
2792 case IOV_SVAL(IOV_SBREG):
2794 struct brcmf_sdreg sdreg;
2797 memcpy(&sdreg, params, sizeof(sdreg));
2799 addr = SI_ENUM_BASE + sdreg.offset;
2801 brcmf_sdcard_reg_write(bus->sdiodev, addr, size,
2803 if (brcmf_sdcard_regfail(bus->sdiodev))
2808 case IOV_GVAL(IOV_SDCIS):
2812 strcat(arg, "\nFunc 0\n");
2813 brcmf_sdcard_cis_read(bus->sdiodev, 0x10,
2814 (u8 *) arg + strlen(arg),
2815 SBSDIO_CIS_SIZE_LIMIT);
2816 strcat(arg, "\nFunc 1\n");
2817 brcmf_sdcard_cis_read(bus->sdiodev, 0x11,
2818 (u8 *) arg + strlen(arg),
2819 SBSDIO_CIS_SIZE_LIMIT);
2820 strcat(arg, "\nFunc 2\n");
2821 brcmf_sdcard_cis_read(bus->sdiodev, 0x12,
2822 (u8 *) arg + strlen(arg),
2823 SBSDIO_CIS_SIZE_LIMIT);
2827 case IOV_GVAL(IOV_FORCEEVEN):
2828 int_val = (s32) forcealign;
2829 memcpy(arg, &int_val, val_size);
2832 case IOV_SVAL(IOV_FORCEEVEN):
2833 forcealign = bool_val;
2836 case IOV_GVAL(IOV_TXBOUND):
2837 int_val = (s32) brcmf_txbound;
2838 memcpy(arg, &int_val, val_size);
2841 case IOV_SVAL(IOV_TXBOUND):
2842 brcmf_txbound = (uint) int_val;
2845 case IOV_GVAL(IOV_RXBOUND):
2846 int_val = (s32) brcmf_rxbound;
2847 memcpy(arg, &int_val, val_size);
2850 case IOV_SVAL(IOV_RXBOUND):
2851 brcmf_rxbound = (uint) int_val;
2854 case IOV_GVAL(IOV_TXMINMAX):
2855 int_val = (s32) brcmf_txminmax;
2856 memcpy(arg, &int_val, val_size);
2859 case IOV_SVAL(IOV_TXMINMAX):
2860 brcmf_txminmax = (uint) int_val;
2865 case IOV_GVAL(IOV_EXTLOOP):
2866 int_val = (s32) bus->ext_loop;
2867 memcpy(arg, &int_val, val_size);
2870 case IOV_SVAL(IOV_EXTLOOP):
2871 bus->ext_loop = bool_val;
2874 case IOV_GVAL(IOV_PKTGEN):
2875 bcmerror = brcmf_sdbrcm_pktgen_get(bus, arg);
2878 case IOV_SVAL(IOV_PKTGEN):
2879 bcmerror = brcmf_sdbrcm_pktgen_set(bus, arg);
2883 case IOV_SVAL(IOV_DEVRESET):
2884 BRCMF_TRACE(("%s: Called set IOV_DEVRESET=%d dongle_reset=%d "
2886 __func__, bool_val, bus->drvr->dongle_reset,
2887 bus->drvr->busstate));
2889 brcmf_bus_devreset(bus->drvr, (u8) bool_val);
2893 case IOV_GVAL(IOV_DEVRESET):
2894 BRCMF_TRACE(("%s: Called get IOV_DEVRESET\n", __func__));
2896 /* Get its status */
2897 int_val = (bool) bus->drvr->dongle_reset;
2898 memcpy(arg, &int_val, val_size);
2902 case IOV_GVAL(IOV_WDTICK):
2903 int_val = (s32) brcmf_watchdog_ms;
2904 memcpy(arg, &int_val, val_size);
2907 case IOV_SVAL(IOV_WDTICK):
2908 if (!bus->drvr->up) {
2909 bcmerror = -ENOLINK;
2912 brcmf_sdbrcm_wd_timer(bus, (uint) int_val);
2915 case IOV_GVAL(IOV_IOCTLTIMEOUT):{
2916 int_val = brcmf_ioctl_timeout_msec;
2917 memcpy(arg, &int_val, sizeof(int_val));
2921 case IOV_SVAL(IOV_IOCTLTIMEOUT):{
2925 brcmf_ioctl_timeout_msec = int_val;
2930 bcmerror = -ENOTSUPP;
2935 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2936 bus->activity = false;
2937 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2940 brcmf_sdbrcm_sdunlock(bus);
2942 if (actionid == IOV_SVAL(IOV_DEVRESET) && bool_val == false)
2943 brcmf_c_preinit_ioctls(bus->drvr);
2948 static int brcmf_sdbrcm_write_vars(struct brcmf_bus *bus)
2956 char *nvram_ularray;
2959 /* Even if there are no vars are to be written, we still
2960 need to set the ramsize. */
2961 varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
2962 varaddr = (bus->ramsize - 4) - varsize;
2965 vbuffer = kzalloc(varsize, GFP_ATOMIC);
2969 memcpy(vbuffer, bus->vars, bus->varsz);
2971 /* Write the vars list */
2973 brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
2975 /* Verify NVRAM bytes */
2976 BRCMF_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize));
2977 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
2981 /* Upload image to verify downloaded contents. */
2982 memset(nvram_ularray, 0xaa, varsize);
2984 /* Read the vars list to temp buffer for comparison */
2986 brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
2989 BRCMF_ERROR(("%s: error %d on reading %d nvram bytes"
2990 " at 0x%08x\n", __func__, bcmerror,
2993 /* Compare the org NVRAM with the one read from RAM */
2994 if (memcmp(vbuffer, nvram_ularray, varsize))
2995 BRCMF_ERROR(("%s: Downloaded NVRAM image is "
2996 "corrupted.\n", __func__));
2998 BRCMF_ERROR(("%s: Download/Upload/Compare of"
2999 " NVRAM ok.\n", __func__));
3001 kfree(nvram_ularray);
3007 /* adjust to the user specified RAM */
3008 BRCMF_INFO(("Physical memory size: %d, usable memory size: %d\n",
3009 bus->orig_ramsize, bus->ramsize));
3010 BRCMF_INFO(("Vars are at %d, orig varsize is %d\n", varaddr, varsize));
3011 varsize = ((bus->orig_ramsize - 4) - varaddr);
3014 * Determine the length token:
3015 * Varsize, converted to words, in lower 16-bits, checksum
3021 varsizew = varsize / 4;
3022 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3023 varsizew = cpu_to_le32(varsizew);
3026 BRCMF_INFO(("New varsize is %d, length token=0x%08x\n", varsize,
3029 /* Write the length token to the last word */
3030 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->orig_ramsize - 4),
3031 (u8 *)&varsizew, 4);
3036 static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
3042 /* To enter download state, disable ARM and reset SOCRAM.
3043 * To exit download state, simply reset ARM (default is RAM boot).
3046 bus->alp_only = true;
3048 brcmf_sdbrcm_chip_disablecore(bus->sdiodev,
3049 bus->ci->armcorebase);
3051 brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->ramcorebase);
3053 /* Clear the top bit of memory */
3056 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3060 regdata = brcmf_sdcard_reg_read(bus->sdiodev,
3061 CORE_SB(bus->ci->ramcorebase, sbtmstatelow), 4);
3062 regdata &= (SBTML_RESET | SBTML_REJ_MASK |
3063 (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
3064 if ((SICF_CLOCK_EN << SBTML_SICF_SHIFT) != regdata) {
3065 BRCMF_ERROR(("%s: SOCRAM core is down after reset?\n",
3071 bcmerror = brcmf_sdbrcm_write_vars(bus);
3073 BRCMF_ERROR(("%s: no vars written to RAM\n", __func__));
3077 w_sdreg32(bus, 0xFFFFFFFF,
3078 offsetof(struct sdpcmd_regs, intstatus), &retries);
3080 brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->armcorebase);
3082 /* Allow HT Clock now that the ARM is running. */
3083 bus->alp_only = false;
3085 bus->drvr->busstate = BRCMF_BUS_LOAD;
3092 brcmf_sdbrcm_bus_iovar_op(struct brcmf_pub *drvr, const char *name,
3093 void *params, int plen, void *arg, int len, bool set)
3095 struct brcmf_bus *bus = drvr->bus;
3096 const struct brcmu_iovar *vi = NULL;
3101 BRCMF_TRACE(("%s: Enter\n", __func__));
3103 if (name == NULL || len < 0)
3106 /* Set does not take qualifiers */
3107 if (set && (params || plen))
3110 /* Get must have return space;*/
3111 if (!set && !(arg && len))
3114 /* Look up var locally; if not found pass to host driver */
3115 vi = brcmu_iovar_lookup(brcmf_sdio_iovars, name);
3117 brcmf_sdbrcm_sdlock(bus);
3121 /* Turn on clock in case SD command needs backplane */
3122 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3124 bcmerror = brcmf_sdcard_iovar_op(bus->sdiodev, name, params,
3125 plen, arg, len, set);
3127 if (bus->idletime == BRCMF_IDLE_IMMEDIATE &&
3129 bus->activity = false;
3130 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
3133 brcmf_sdbrcm_sdunlock(bus);
3137 BRCMF_CTL(("%s: %s %s, len %d plen %d\n", __func__,
3138 name, (set ? "set" : "get"), len, plen));
3140 /* set up 'params' pointer in case this is a set command so that
3141 * the convenience int and bool code can be common to set and get
3143 if (params == NULL) {
3148 if (vi->type == IOVT_VOID)
3150 else if (vi->type == IOVT_BUFFER)
3153 /* all other types are integer sized */
3154 val_size = sizeof(int);
3156 actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
3157 bcmerror = brcmf_sdbrcm_doiovar(bus, vi, actionid, name, params, plen,
3158 arg, len, val_size);
3164 void brcmf_sdbrcm_bus_stop(struct brcmf_bus *bus, bool enforce_mutex)
3166 u32 local_hostintmask;
3171 BRCMF_TRACE(("%s: Enter\n", __func__));
3174 brcmf_sdbrcm_sdlock(bus);
3178 /* Enable clock for device interrupts */
3179 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3181 if (bus->watchdog_tsk) {
3182 send_sig(SIGTERM, bus->watchdog_tsk, 1);
3183 kthread_stop(bus->watchdog_tsk);
3184 bus->watchdog_tsk = NULL;
3188 send_sig(SIGTERM, bus->dpc_tsk, 1);
3189 kthread_stop(bus->dpc_tsk);
3190 bus->dpc_tsk = NULL;
3192 tasklet_kill(&bus->tasklet);
3194 /* Disable and clear interrupts at the chip level also */
3195 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
3196 local_hostintmask = bus->hostintmask;
3197 bus->hostintmask = 0;
3199 /* Change our idea of bus state */
3200 bus->drvr->busstate = BRCMF_BUS_DOWN;
3202 /* Force clocks on backplane to be sure F2 interrupt propagates */
3203 saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3204 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3206 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3207 SBSDIO_FUNC1_CHIPCLKCSR,
3208 (saveclk | SBSDIO_FORCE_HT), &err);
3211 BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n",
3214 /* Turn off the bus (F2), free any pending packets */
3215 BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__));
3216 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3217 SDIO_FUNC_ENABLE_1, NULL);
3219 /* Clear any pending interrupts now that F2 is disabled */
3220 w_sdreg32(bus, local_hostintmask,
3221 offsetof(struct sdpcmd_regs, intstatus), &retries);
3223 /* Turn off the backplane clock (only) */
3224 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3226 /* Clear the data packet queues */
3227 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
3229 /* Clear any held glomming stuff */
3231 brcmu_pkt_buf_free_skb(bus->glomd);
3234 brcmu_pkt_buf_free_skb(bus->glom);
3236 bus->glom = bus->glomd = NULL;
3238 /* Clear rx control and wake any waiters */
3240 brcmf_sdbrcm_ioctl_resp_wake(bus);
3242 /* Reset some F2 state stuff */
3243 bus->rxskip = false;
3244 bus->tx_seq = bus->rx_seq = 0;
3247 brcmf_sdbrcm_sdunlock(bus);
3250 int brcmf_sdbrcm_bus_init(struct brcmf_pub *drvr, bool enforce_mutex)
3252 struct brcmf_bus *bus = drvr->bus;
3253 unsigned long timeout;
3259 BRCMF_TRACE(("%s: Enter\n", __func__));
3261 /* try to download image and nvram to the dongle */
3262 if (drvr->busstate == BRCMF_BUS_DOWN) {
3263 if (!(brcmf_sdbrcm_download_firmware(bus, bus->sdiodev)))
3270 /* Start the watchdog timer */
3271 bus->drvr->tickcnt = 0;
3272 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
3275 brcmf_sdbrcm_sdlock(bus);
3277 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3278 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3279 if (bus->clkstate != CLK_AVAIL)
3282 /* Force clocks on backplane to be sure F2 interrupt propagates */
3284 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3285 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3287 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3288 SBSDIO_FUNC1_CHIPCLKCSR,
3289 (saveclk | SBSDIO_FORCE_HT), &err);
3292 BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n",
3297 /* Enable function 2 (frame transfers) */
3298 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3299 offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3300 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3302 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3305 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3307 while (enable != ready) {
3308 ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0,
3309 SDIO_CCCR_IORx, NULL);
3310 if (time_after(jiffies, timeout))
3312 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3313 /* prevent busy waiting if it takes too long */
3314 msleep_interruptible(20);
3317 BRCMF_INFO(("%s: enable 0x%02x, ready 0x%02x\n",
3318 __func__, enable, ready));
3320 /* If F2 successfully enabled, set core and enable interrupts */
3321 if (ready == enable) {
3322 /* Set up the interrupt mask and enable interrupts */
3323 bus->hostintmask = HOSTINTMASK;
3324 w_sdreg32(bus, bus->hostintmask,
3325 offsetof(struct sdpcmd_regs, hostintmask), &retries);
3327 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3328 SBSDIO_WATERMARK, 8, &err);
3330 /* Set bus state according to enable result */
3331 drvr->busstate = BRCMF_BUS_DATA;
3335 /* Disable F2 again */
3336 enable = SDIO_FUNC_ENABLE_1;
3337 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
3338 SDIO_CCCR_IOEx, enable, NULL);
3341 /* Restore previous clock setting */
3342 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3343 SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3345 #if defined(OOB_INTR_ONLY)
3346 /* Host registration for OOB interrupt */
3347 if (brcmf_sdio_register_oob_intr(bus->dhd)) {
3348 brcmf_sdbrcm_wd_timer(bus, 0);
3349 BRCMF_ERROR(("%s Host failed to resgister for OOB\n",
3355 /* Enable oob at firmware */
3356 brcmf_sdbrcm_enable_oob_intr(bus, true);
3357 #endif /* defined(OOB_INTR_ONLY) */
3359 /* If we didn't come up, turn off backplane clock */
3360 if (drvr->busstate != BRCMF_BUS_DATA)
3361 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3365 brcmf_sdbrcm_sdunlock(bus);
3370 static void brcmf_sdbrcm_rxfail(struct brcmf_bus *bus, bool abort, bool rtx)
3377 BRCMF_ERROR(("%s: %sterminate frame%s\n", __func__,
3378 (abort ? "abort command, " : ""),
3379 (rtx ? ", send NAK" : "")));
3382 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
3384 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3385 SBSDIO_FUNC1_FRAMECTRL,
3389 /* Wait until the packet has been flushed (device/FIFO stable) */
3390 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
3391 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3392 SBSDIO_FUNC1_RFRAMEBCHI, NULL);
3393 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3394 SBSDIO_FUNC1_RFRAMEBCLO, NULL);
3395 bus->f1regdata += 2;
3397 if ((hi == 0) && (lo == 0))
3400 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
3401 BRCMF_ERROR(("%s: count growing: last 0x%04x now "
3403 __func__, lastrbc, ((hi << 8) + lo)));
3405 lastrbc = (hi << 8) + lo;
3409 BRCMF_ERROR(("%s: count never zeroed: last 0x%04x\n",
3410 __func__, lastrbc));
3412 BRCMF_INFO(("%s: flush took %d iterations\n", __func__,
3413 (0xffff - retries)));
3417 w_sdreg32(bus, SMB_NAK,
3418 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
3421 if (retries <= retry_limit)
3425 /* Clear partial in any case */
3428 /* If we can't reach the device, signal failure */
3429 if (err || brcmf_sdcard_regfail(bus->sdiodev))
3430 bus->drvr->busstate = BRCMF_BUS_DOWN;
3434 brcmf_sdbrcm_read_control(struct brcmf_bus *bus, u8 *hdr, uint len, uint doff)
3440 BRCMF_TRACE(("%s: Enter\n", __func__));
3442 /* Set rxctl for frame (w/optional alignment) */
3443 bus->rxctl = bus->rxbuf;
3444 if (brcmf_alignctl) {
3445 bus->rxctl += firstread;
3446 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
3448 bus->rxctl += (BRCMF_SDALIGN - pad);
3449 bus->rxctl -= firstread;
3452 /* Copy the already-read portion over */
3453 memcpy(bus->rxctl, hdr, firstread);
3454 if (len <= firstread)
3457 /* Raise rdlen to next SDIO block to avoid tail command */
3458 rdlen = len - firstread;
3459 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
3460 pad = bus->blocksize - (rdlen % bus->blocksize);
3461 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
3462 ((len + pad) < bus->drvr->maxctl))
3464 } else if (rdlen % BRCMF_SDALIGN) {
3465 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
3468 /* Satisfy length-alignment requirements */
3469 if (forcealign && (rdlen & (ALIGNMENT - 1)))
3470 rdlen = roundup(rdlen, ALIGNMENT);
3472 /* Drop if the read is too big or it exceeds our maximum */
3473 if ((rdlen + firstread) > bus->drvr->maxctl) {
3474 BRCMF_ERROR(("%s: %d-byte control read exceeds %d-byte"
3475 " buffer\n", __func__, rdlen, bus->drvr->maxctl));
3476 bus->drvr->rx_errors++;
3477 brcmf_sdbrcm_rxfail(bus, false, false);
3481 if ((len - doff) > bus->drvr->maxctl) {
3482 BRCMF_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds "
3484 __func__, len, (len - doff), bus->drvr->maxctl));
3485 bus->drvr->rx_errors++;
3487 brcmf_sdbrcm_rxfail(bus, false, false);
3491 /* Read remainder of frame body into the rxctl buffer */
3492 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
3493 brcmf_sdcard_cur_sbwad(bus->sdiodev),
3495 F2SYNC, (bus->rxctl + firstread), rdlen,
3499 /* Control frame failures need retransmission */
3501 BRCMF_ERROR(("%s: read %d control bytes failed: %d\n",
3502 __func__, rdlen, sdret));
3504 brcmf_sdbrcm_rxfail(bus, true, true);
3511 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
3512 printk(KERN_DEBUG "RxCtrl:\n");
3513 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
3517 /* Point to valid data and indicate its length */
3519 bus->rxlen = len - doff;
3522 /* Awake any waiters */
3523 brcmf_sdbrcm_ioctl_resp_wake(bus);
3526 static u8 brcmf_sdbrcm_rxglom(struct brcmf_bus *bus, u8 rxseq)
3532 struct sk_buff *pfirst, *plast, *pnext, *save_pfirst;
3535 u8 chan, seq, doff, sfdoff;
3539 bool usechain = bus->use_rxchain;
3541 /* If packets, issue read(s) and send up packet chain */
3542 /* Return sequence numbers consumed? */
3544 BRCMF_TRACE(("brcmf_sdbrcm_rxglom: start: glomd %p glom %p\n",
3545 bus->glomd, bus->glom));
3547 /* If there's a descriptor, generate the packet chain */
3549 pfirst = plast = pnext = NULL;
3550 dlen = (u16) (bus->glomd->len);
3551 dptr = bus->glomd->data;
3552 if (!dlen || (dlen & 1)) {
3553 BRCMF_ERROR(("%s: bad glomd len(%d),"
3554 " ignore descriptor\n",
3559 for (totlen = num = 0; dlen; num++) {
3560 /* Get (and move past) next length */
3561 sublen = get_unaligned_le16(dptr);
3562 dlen -= sizeof(u16);
3563 dptr += sizeof(u16);
3564 if ((sublen < SDPCM_HDRLEN) ||
3565 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
3566 BRCMF_ERROR(("%s: descriptor len %d bad: %d\n",
3567 __func__, num, sublen));
3571 if (sublen % BRCMF_SDALIGN) {
3572 BRCMF_ERROR(("%s: sublen %d not multiple of"
3573 " %d\n", __func__, sublen,
3579 /* For last frame, adjust read len so total
3580 is a block multiple */
3583 (roundup(totlen, bus->blocksize) - totlen);
3584 totlen = roundup(totlen, bus->blocksize);
3587 /* Allocate/chain packet for next subframe */
3588 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
3589 if (pnext == NULL) {
3590 BRCMF_ERROR(("%s: bcm_pkt_buf_get_skb failed, "
3591 "num %d len %d\n", __func__,
3596 pfirst = plast = pnext;
3598 plast->next = pnext;
3602 /* Adhere to start alignment requirements */
3603 PKTALIGN(pnext, sublen, BRCMF_SDALIGN);
3606 /* If all allocations succeeded, save packet chain
3609 BRCMF_GLOM(("%s: allocated %d-byte packet chain for %d "
3610 "subframes\n", __func__, totlen, num));
3611 if (BRCMF_GLOM_ON() && bus->nextlen) {
3612 if (totlen != bus->nextlen) {
3613 BRCMF_GLOM(("%s: glomdesc mismatch: "
3614 "nextlen %d glomdesc %d "
3615 "rxseq %d\n", __func__,
3621 pfirst = pnext = NULL;
3624 brcmu_pkt_buf_free_skb(pfirst);
3629 /* Done with descriptor packet */
3630 brcmu_pkt_buf_free_skb(bus->glomd);
3635 /* Ok -- either we just generated a packet chain,
3636 or had one from before */
3638 if (BRCMF_GLOM_ON()) {
3639 BRCMF_GLOM(("%s: try superframe read, packet chain:\n",
3641 for (pnext = bus->glom; pnext; pnext = pnext->next) {
3642 BRCMF_GLOM((" %p: %p len 0x%04x (%d)\n",
3643 pnext, (u8 *) (pnext->data),
3644 pnext->len, pnext->len));
3649 dlen = (u16) brcmu_pkttotlen(pfirst);
3651 /* Do an SDIO read for the superframe. Configurable iovar to
3652 * read directly into the chained packet, or allocate a large
3653 * packet and and copy into the chain.
3656 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
3657 brcmf_sdcard_cur_sbwad(bus->sdiodev),
3659 F2SYNC, (u8 *) pfirst->data, dlen,
3660 pfirst, NULL, NULL);
3661 } else if (bus->dataptr) {
3662 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
3663 brcmf_sdcard_cur_sbwad(bus->sdiodev),
3665 F2SYNC, bus->dataptr, dlen,
3667 sublen = (u16) brcmu_pktfrombuf(pfirst, 0, dlen,
3669 if (sublen != dlen) {
3670 BRCMF_ERROR(("%s: FAILED TO COPY, dlen %d "
3672 __func__, dlen, sublen));
3677 BRCMF_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, "
3678 "FORCE FAILURE\n", dlen));
3683 /* On failure, kill the superframe, allow a couple retries */
3685 BRCMF_ERROR(("%s: glom read of %d bytes failed: %d\n",
3686 __func__, dlen, errcode));
3687 bus->drvr->rx_errors++;
3689 if (bus->glomerr++ < 3) {
3690 brcmf_sdbrcm_rxfail(bus, true, true);
3693 brcmf_sdbrcm_rxfail(bus, true, false);
3694 brcmu_pkt_buf_free_skb(bus->glom);
3701 if (BRCMF_GLOM_ON()) {
3702 printk(KERN_DEBUG "SUPERFRAME:\n");
3703 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3704 pfirst->data, min_t(int, pfirst->len, 48));
3708 /* Validate the superframe header */
3709 dptr = (u8 *) (pfirst->data);
3710 sublen = get_unaligned_le16(dptr);
3711 check = get_unaligned_le16(dptr + sizeof(u16));
3713 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3714 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
3715 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
3716 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
3717 BRCMF_INFO(("%s: nextlen too large (%d) seq %d\n",
3718 __func__, bus->nextlen, seq));
3721 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3722 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3725 if ((u16)~(sublen ^ check)) {
3726 BRCMF_ERROR(("%s (superframe): HW hdr error: len/check "
3727 "0x%04x/0x%04x\n", __func__, sublen,
3730 } else if (roundup(sublen, bus->blocksize) != dlen) {
3731 BRCMF_ERROR(("%s (superframe): len 0x%04x, rounded "
3732 "0x%04x, expect 0x%04x\n",
3734 roundup(sublen, bus->blocksize), dlen));
3736 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
3737 SDPCM_GLOM_CHANNEL) {
3738 BRCMF_ERROR(("%s (superframe): bad channel %d\n",
3740 SDPCM_PACKET_CHANNEL(&dptr
3741 [SDPCM_FRAMETAG_LEN])));
3743 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
3744 BRCMF_ERROR(("%s (superframe): got 2nd descriptor?\n",
3747 } else if ((doff < SDPCM_HDRLEN) ||
3748 (doff > (pfirst->len - SDPCM_HDRLEN))) {
3749 BRCMF_ERROR(("%s (superframe): Bad data offset %d: "
3750 "HW %d pkt %d min %d\n",
3751 __func__, doff, sublen,
3752 pfirst->len, SDPCM_HDRLEN));
3756 /* Check sequence number of superframe SW header */
3758 BRCMF_INFO(("%s: (superframe) rx_seq %d, expected %d\n",
3759 __func__, seq, rxseq));
3764 /* Check window for sanity */
3765 if ((u8) (txmax - bus->tx_seq) > 0x40) {
3766 BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
3767 __func__, txmax, bus->tx_seq));
3768 txmax = bus->tx_seq + 2;
3770 bus->tx_max = txmax;
3772 /* Remove superframe header, remember offset */
3773 skb_pull(pfirst, doff);
3776 /* Validate all the subframe headers */
3777 for (num = 0, pnext = pfirst; pnext && !errcode;
3778 num++, pnext = pnext->next) {
3779 dptr = (u8 *) (pnext->data);
3780 dlen = (u16) (pnext->len);
3781 sublen = get_unaligned_le16(dptr);
3782 check = get_unaligned_le16(dptr + sizeof(u16));
3783 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3784 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3786 if (BRCMF_GLOM_ON()) {
3787 printk(KERN_DEBUG "subframe:\n");
3788 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3793 if ((u16)~(sublen ^ check)) {
3794 BRCMF_ERROR(("%s (subframe %d): HW hdr error: "
3795 "len/check 0x%04x/0x%04x\n",
3796 __func__, num, sublen, check));
3798 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
3799 BRCMF_ERROR(("%s (subframe %d): length mismatch"
3800 ": len 0x%04x, expect 0x%04x\n",
3801 __func__, num, sublen, dlen));
3803 } else if ((chan != SDPCM_DATA_CHANNEL) &&
3804 (chan != SDPCM_EVENT_CHANNEL)) {
3805 BRCMF_ERROR(("%s (subframe %d): bad channel"
3806 " %d\n", __func__, num, chan));
3808 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
3809 BRCMF_ERROR(("%s (subframe %d): Bad data offset"
3810 " %d: HW %d min %d\n",
3811 __func__, num, doff, sublen,
3818 /* Terminate frame on error, request
3820 if (bus->glomerr++ < 3) {
3821 /* Restore superframe header space */
3822 skb_push(pfirst, sfdoff);
3823 brcmf_sdbrcm_rxfail(bus, true, true);
3826 brcmf_sdbrcm_rxfail(bus, true, false);
3827 brcmu_pkt_buf_free_skb(bus->glom);
3835 /* Basic SD framing looks ok - process each packet (header) */
3836 save_pfirst = pfirst;
3840 for (num = 0; pfirst; rxseq++, pfirst = pnext) {
3841 pnext = pfirst->next;
3842 pfirst->next = NULL;
3844 dptr = (u8 *) (pfirst->data);
3845 sublen = get_unaligned_le16(dptr);
3846 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3847 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
3848 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3850 BRCMF_GLOM(("%s: Get subframe %d, %p(%p/%d), sublen %d "
3852 __func__, num, pfirst, pfirst->data,
3853 pfirst->len, sublen, chan, seq));
3855 /* precondition: chan == SDPCM_DATA_CHANNEL ||
3856 chan == SDPCM_EVENT_CHANNEL */
3859 BRCMF_GLOM(("%s: rx_seq %d, expected %d\n",
3860 __func__, seq, rxseq));
3865 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
3866 printk(KERN_DEBUG "Rx Subframe Data:\n");
3867 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3872 __skb_trim(pfirst, sublen);
3873 skb_pull(pfirst, doff);
3875 if (pfirst->len == 0) {
3876 brcmu_pkt_buf_free_skb(pfirst);
3878 plast->next = pnext;
3880 save_pfirst = pnext;
3883 } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx,
3885 BRCMF_ERROR(("%s: rx protocol error\n",
3887 bus->drvr->rx_errors++;
3888 brcmu_pkt_buf_free_skb(pfirst);
3890 plast->next = pnext;
3892 save_pfirst = pnext;
3897 /* this packet will go up, link back into
3898 chain and count it */
3899 pfirst->next = pnext;
3904 if (BRCMF_GLOM_ON()) {
3905 BRCMF_GLOM(("%s subframe %d to stack, %p"
3906 "(%p/%d) nxt/lnk %p/%p\n",
3907 __func__, num, pfirst, pfirst->data,
3908 pfirst->len, pfirst->next,
3910 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3912 min_t(int, pfirst->len, 32));
3917 brcmf_sdbrcm_sdunlock(bus);
3918 brcmf_rx_frame(bus->drvr, ifidx, save_pfirst, num);
3919 brcmf_sdbrcm_sdlock(bus);
3922 bus->rxglomframes++;
3923 bus->rxglompkts += num;
3928 /* Return true if there may be more frames to read */
3930 brcmf_sdbrcm_readframes(struct brcmf_bus *bus, uint maxframes, bool *finished)
3932 u16 len, check; /* Extracted hardware header fields */
3933 u8 chan, seq, doff; /* Extracted software header fields */
3934 u8 fcbits; /* Extracted fcbits from software header */
3936 struct sk_buff *pkt; /* Packet for event or data frames */
3937 u16 pad; /* Number of pad bytes to read */
3938 u16 rdlen; /* Total number of bytes to read */
3939 u8 rxseq; /* Next sequence number to expect */
3940 uint rxleft = 0; /* Remaining number of frames allowed */
3941 int sdret; /* Return code from calls */
3942 u8 txmax; /* Maximum tx sequence offered */
3943 bool len_consistent; /* Result of comparing readahead len and
3947 uint rxcount = 0; /* Total frames read */
3949 #if defined(BCMDBG) || defined(SDTEST)
3950 bool sdtest = false; /* To limit message spew from test mode */
3953 BRCMF_TRACE(("%s: Enter\n", __func__));
3956 /* Allow pktgen to override maxframes */
3957 if (bus->pktgen_count && (bus->pktgen_mode == BRCMF_PKTGEN_RECV)) {
3958 maxframes = bus->pktgen_count;
3963 /* Not finished unless we encounter no more frames indication */
3966 for (rxseq = bus->rx_seq, rxleft = maxframes;
3967 !bus->rxskip && rxleft && bus->drvr->busstate != BRCMF_BUS_DOWN;
3968 rxseq++, rxleft--) {
3970 /* Handle glomming separately */
3971 if (bus->glom || bus->glomd) {
3973 BRCMF_GLOM(("%s: calling rxglom: glomd %p, glom %p\n",
3974 __func__, bus->glomd, bus->glom));
3975 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
3976 BRCMF_GLOM(("%s: rxglom returned %d\n", __func__, cnt));
3978 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
3982 /* Try doing single read if we can */
3983 if (brcmf_readahead && bus->nextlen) {
3984 u16 nextlen = bus->nextlen;
3987 rdlen = len = nextlen << 4;
3989 /* Pad read to blocksize for efficiency */
3990 if (bus->roundup && bus->blocksize
3991 && (rdlen > bus->blocksize)) {
3994 (rdlen % bus->blocksize);
3995 if ((pad <= bus->roundup)
3996 && (pad < bus->blocksize)
3997 && ((rdlen + pad + firstread) <
4000 } else if (rdlen % BRCMF_SDALIGN) {
4001 rdlen += BRCMF_SDALIGN -
4002 (rdlen % BRCMF_SDALIGN);
4005 /* We use bus->rxctl buffer in WinXP for initial
4006 * control pkt receives.
4007 * Later we use buffer-poll for data as well
4008 * as control packets.
4009 * This is required because dhd receives full
4010 * frame in gSPI unlike SDIO.
4011 * After the frame is received we have to
4012 * distinguish whether it is data
4013 * or non-data frame.
4015 /* Allocate a packet buffer */
4016 pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
4018 /* Give up on data, request rtx of events */
4019 BRCMF_ERROR(("%s (nextlen): "
4020 "brcmu_pkt_buf_get_skb "
4022 " len %d rdlen %d expected"
4023 " rxseq %d\n", __func__,
4024 len, rdlen, rxseq));
4027 PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
4028 rxbuf = (u8 *) (pkt->data);
4029 /* Read the entire frame */
4030 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
4031 brcmf_sdcard_cur_sbwad(
4033 SDIO_FUNC_2, F2SYNC,
4039 BRCMF_ERROR(("%s (nextlen): read %d"
4040 " bytes failed: %d\n",
4041 __func__, rdlen, sdret));
4042 brcmu_pkt_buf_free_skb(pkt);
4043 bus->drvr->rx_errors++;
4044 /* Force retry w/normal header read.
4045 * Don't attempt NAK for
4048 brcmf_sdbrcm_rxfail(bus, true, true);
4053 /* Now check the header */
4054 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
4056 /* Extract hardware header fields */
4057 len = get_unaligned_le16(bus->rxhdr);
4058 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
4060 /* All zeros means readahead info was bad */
4061 if (!(len | check)) {
4062 BRCMF_INFO(("%s (nextlen): read zeros in HW "
4063 "header???\n", __func__));
4064 brcmf_sdbrcm_pktfree2(bus, pkt);
4068 /* Validate check bytes */
4069 if ((u16)~(len ^ check)) {
4070 BRCMF_ERROR(("%s (nextlen): HW hdr error:"
4071 " nextlen/len/check"
4072 " 0x%04x/0x%04x/0x%04x\n",
4073 __func__, nextlen, len, check));
4075 brcmf_sdbrcm_rxfail(bus, false, false);
4076 brcmf_sdbrcm_pktfree2(bus, pkt);
4080 /* Validate frame length */
4081 if (len < SDPCM_HDRLEN) {
4082 BRCMF_ERROR(("%s (nextlen): HW hdr length "
4083 "invalid: %d\n", __func__, len));
4084 brcmf_sdbrcm_pktfree2(bus, pkt);
4088 /* Check for consistency withreadahead info */
4089 len_consistent = (nextlen != (roundup(len, 16) >> 4));
4090 if (len_consistent) {
4091 /* Mismatch, force retry w/normal
4092 header (may be >4K) */
4093 BRCMF_ERROR(("%s (nextlen): mismatch, "
4094 "nextlen %d len %d rnd %d; "
4095 "expected rxseq %d\n",
4097 len, roundup(len, 16), rxseq));
4098 brcmf_sdbrcm_rxfail(bus, true, true);
4099 brcmf_sdbrcm_pktfree2(bus, pkt);
4103 /* Extract software header fields */
4104 chan = SDPCM_PACKET_CHANNEL(
4105 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4106 seq = SDPCM_PACKET_SEQUENCE(
4107 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4108 doff = SDPCM_DOFFSET_VALUE(
4109 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4110 txmax = SDPCM_WINDOW_VALUE(
4111 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4114 bus->rxhdr[SDPCM_FRAMETAG_LEN +
4115 SDPCM_NEXTLEN_OFFSET];
4116 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
4117 BRCMF_INFO(("%s (nextlen): got frame w/nextlen"
4118 " too large (%d), seq %d\n",
4119 __func__, bus->nextlen, seq));
4123 bus->drvr->rx_readahead_cnt++;
4125 /* Handle Flow Control */
4126 fcbits = SDPCM_FCMASK_VALUE(
4127 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4129 if (bus->flowcontrol != fcbits) {
4130 if (~bus->flowcontrol & fcbits)
4133 if (bus->flowcontrol & ~fcbits)
4137 bus->flowcontrol = fcbits;
4140 /* Check and update sequence number */
4142 BRCMF_INFO(("%s (nextlen): rx_seq %d, expected "
4143 "%d\n", __func__, seq, rxseq));
4148 /* Check window for sanity */
4149 if ((u8) (txmax - bus->tx_seq) > 0x40) {
4150 BRCMF_ERROR(("%s: got unlikely tx max %d with "
4152 __func__, txmax, bus->tx_seq));
4153 txmax = bus->tx_seq + 2;
4155 bus->tx_max = txmax;
4158 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
4159 printk(KERN_DEBUG "Rx Data:\n");
4160 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4162 } else if (BRCMF_HDRS_ON()) {
4163 printk(KERN_DEBUG "RxHdr:\n");
4164 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4165 bus->rxhdr, SDPCM_HDRLEN);
4169 if (chan == SDPCM_CONTROL_CHANNEL) {
4170 BRCMF_ERROR(("%s (nextlen): readahead"
4171 " on control packet %d?\n",
4173 /* Force retry w/normal header read */
4175 brcmf_sdbrcm_rxfail(bus, false, true);
4176 brcmf_sdbrcm_pktfree2(bus, pkt);
4180 /* Validate data offset */
4181 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
4182 BRCMF_ERROR(("%s (nextlen): bad data offset %d:"
4183 " HW len %d min %d\n", __func__,
4184 doff, len, SDPCM_HDRLEN));
4185 brcmf_sdbrcm_rxfail(bus, false, false);
4186 brcmf_sdbrcm_pktfree2(bus, pkt);
4190 /* All done with this one -- now deliver the packet */
4194 /* Read frame header (hardware and software) */
4195 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
4196 brcmf_sdcard_cur_sbwad(bus->sdiodev),
4197 SDIO_FUNC_2, F2SYNC, bus->rxhdr, firstread,
4202 BRCMF_ERROR(("%s: RXHEADER FAILED: %d\n", __func__,
4205 brcmf_sdbrcm_rxfail(bus, true, true);
4209 if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) {
4210 printk(KERN_DEBUG "RxHdr:\n");
4211 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4212 bus->rxhdr, SDPCM_HDRLEN);
4216 /* Extract hardware header fields */
4217 len = get_unaligned_le16(bus->rxhdr);
4218 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
4220 /* All zeros means no more frames */
4221 if (!(len | check)) {
4226 /* Validate check bytes */
4227 if ((u16) ~(len ^ check)) {
4228 BRCMF_ERROR(("%s: HW hdr err: len/check "
4229 "0x%04x/0x%04x\n", __func__, len, check));
4231 brcmf_sdbrcm_rxfail(bus, false, false);
4235 /* Validate frame length */
4236 if (len < SDPCM_HDRLEN) {
4237 BRCMF_ERROR(("%s: HW hdr length invalid: %d\n",
4242 /* Extract software header fields */
4243 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4244 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4245 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4246 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4248 /* Validate data offset */
4249 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
4250 BRCMF_ERROR(("%s: Bad data offset %d: HW len %d,"
4251 " min %d seq %d\n", __func__, doff,
4252 len, SDPCM_HDRLEN, seq));
4254 brcmf_sdbrcm_rxfail(bus, false, false);
4258 /* Save the readahead length if there is one */
4260 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
4261 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
4262 BRCMF_INFO(("%s (nextlen): got frame w/nextlen too"
4263 " large (%d), seq %d\n",
4264 __func__, bus->nextlen, seq));
4268 /* Handle Flow Control */
4269 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4271 if (bus->flowcontrol != fcbits) {
4272 if (~bus->flowcontrol & fcbits)
4275 if (bus->flowcontrol & ~fcbits)
4279 bus->flowcontrol = fcbits;
4282 /* Check and update sequence number */
4284 BRCMF_INFO(("%s: rx_seq %d, expected %d\n", __func__,
4290 /* Check window for sanity */
4291 if ((u8) (txmax - bus->tx_seq) > 0x40) {
4292 BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
4293 __func__, txmax, bus->tx_seq));
4294 txmax = bus->tx_seq + 2;
4296 bus->tx_max = txmax;
4298 /* Call a separate function for control frames */
4299 if (chan == SDPCM_CONTROL_CHANNEL) {
4300 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
4304 /* precondition: chan is either SDPCM_DATA_CHANNEL,
4305 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
4306 SDPCM_GLOM_CHANNEL */
4308 /* Length to read */
4309 rdlen = (len > firstread) ? (len - firstread) : 0;
4311 /* May pad read to blocksize for efficiency */
4312 if (bus->roundup && bus->blocksize &&
4313 (rdlen > bus->blocksize)) {
4314 pad = bus->blocksize - (rdlen % bus->blocksize);
4315 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
4316 ((rdlen + pad + firstread) < MAX_RX_DATASZ))
4318 } else if (rdlen % BRCMF_SDALIGN) {
4319 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
4322 /* Satisfy length-alignment requirements */
4323 if (forcealign && (rdlen & (ALIGNMENT - 1)))
4324 rdlen = roundup(rdlen, ALIGNMENT);
4326 if ((rdlen + firstread) > MAX_RX_DATASZ) {
4327 /* Too long -- skip this frame */
4328 BRCMF_ERROR(("%s: too long: len %d rdlen %d\n",
4329 __func__, len, rdlen));
4330 bus->drvr->rx_errors++;
4332 brcmf_sdbrcm_rxfail(bus, false, false);
4336 pkt = brcmu_pkt_buf_get_skb(rdlen + firstread + BRCMF_SDALIGN);
4338 /* Give up on data, request rtx of events */
4339 BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed:"
4340 " rdlen %d chan %d\n", __func__, rdlen,
4342 bus->drvr->rx_dropped++;
4343 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
4347 /* Leave room for what we already read, and align remainder */
4348 skb_pull(pkt, firstread);
4349 PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
4351 /* Read the remaining frame data */
4352 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
4353 brcmf_sdcard_cur_sbwad(bus->sdiodev),
4354 SDIO_FUNC_2, F2SYNC, ((u8 *) (pkt->data)),
4355 rdlen, pkt, NULL, NULL);
4359 BRCMF_ERROR(("%s: read %d %s bytes failed: %d\n",
4361 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
4362 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
4363 : "test")), sdret));
4364 brcmu_pkt_buf_free_skb(pkt);
4365 bus->drvr->rx_errors++;
4366 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
4370 /* Copy the already-read portion */
4371 skb_push(pkt, firstread);
4372 memcpy(pkt->data, bus->rxhdr, firstread);
4375 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
4376 printk(KERN_DEBUG "Rx Data:\n");
4377 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4383 /* Save superframe descriptor and allocate packet frame */
4384 if (chan == SDPCM_GLOM_CHANNEL) {
4385 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
4386 BRCMF_GLOM(("%s: glom descriptor, %d bytes:\n",
4389 if (BRCMF_GLOM_ON()) {
4390 printk(KERN_DEBUG "Glom Data:\n");
4391 print_hex_dump_bytes("",
4396 __skb_trim(pkt, len);
4397 skb_pull(pkt, SDPCM_HDRLEN);
4400 BRCMF_ERROR(("%s: glom superframe w/o "
4401 "descriptor!\n", __func__));
4402 brcmf_sdbrcm_rxfail(bus, false, false);
4407 /* Fill in packet len and prio, deliver upward */
4408 __skb_trim(pkt, len);
4409 skb_pull(pkt, doff);
4412 /* Test channel packets are processed separately */
4413 if (chan == SDPCM_TEST_CHANNEL) {
4414 brcmf_sdbrcm_checkdied(bus, pkt, seq);
4419 if (pkt->len == 0) {
4420 brcmu_pkt_buf_free_skb(pkt);
4422 } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pkt) != 0) {
4423 BRCMF_ERROR(("%s: rx protocol error\n", __func__));
4424 brcmu_pkt_buf_free_skb(pkt);
4425 bus->drvr->rx_errors++;
4429 /* Unlock during rx call */
4430 brcmf_sdbrcm_sdunlock(bus);
4431 brcmf_rx_frame(bus->drvr, ifidx, pkt, 1);
4432 brcmf_sdbrcm_sdlock(bus);
4434 rxcount = maxframes - rxleft;
4436 /* Message if we hit the limit */
4437 if (!rxleft && !sdtest)
4438 BRCMF_DATA(("%s: hit rx limit of %d frames\n", __func__,
4442 BRCMF_DATA(("%s: processed %d frames\n", __func__, rxcount));
4443 /* Back off rxseq if awaiting rtx, update rx_seq */
4446 bus->rx_seq = rxseq;
4451 static u32 brcmf_sdbrcm_hostmail(struct brcmf_bus *bus)
4458 BRCMF_TRACE(("%s: Enter\n", __func__));
4460 /* Read mailbox data and ack that we did so */
4461 r_sdreg32(bus, &hmb_data,
4462 offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
4464 if (retries <= retry_limit)
4465 w_sdreg32(bus, SMB_INT_ACK,
4466 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
4467 bus->f1regdata += 2;
4469 /* Dongle recomposed rx frames, accept them again */
4470 if (hmb_data & HMB_DATA_NAKHANDLED) {
4471 BRCMF_INFO(("Dongle reports NAK handled, expect rtx of %d\n",
4474 BRCMF_ERROR(("%s: unexpected NAKHANDLED!\n", __func__));
4476 bus->rxskip = false;
4477 intstatus |= I_HMB_FRAME_IND;
4481 * DEVREADY does not occur with gSPI.
4483 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
4485 (hmb_data & HMB_DATA_VERSION_MASK) >>
4486 HMB_DATA_VERSION_SHIFT;
4487 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
4488 BRCMF_ERROR(("Version mismatch, dongle reports %d, "
4490 bus->sdpcm_ver, SDPCM_PROT_VERSION));
4492 BRCMF_INFO(("Dongle ready, protocol version %d\n",
4497 * Flow Control has been moved into the RX headers and this out of band
4498 * method isn't used any more.
4499 * remaining backward compatible with older dongles.
4501 if (hmb_data & HMB_DATA_FC) {
4502 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
4503 HMB_DATA_FCDATA_SHIFT;
4505 if (fcbits & ~bus->flowcontrol)
4508 if (bus->flowcontrol & ~fcbits)
4512 bus->flowcontrol = fcbits;
4515 /* Shouldn't be any others */
4516 if (hmb_data & ~(HMB_DATA_DEVREADY |
4517 HMB_DATA_NAKHANDLED |
4520 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
4521 BRCMF_ERROR(("Unknown mailbox data content: 0x%02x\n",
4527 static bool brcmf_sdbrcm_dpc(struct brcmf_bus *bus)
4529 u32 intstatus, newstatus = 0;
4531 uint rxlimit = brcmf_rxbound; /* Rx frames to read before resched */
4532 uint txlimit = brcmf_txbound; /* Tx frames to send before resched */
4533 uint framecnt = 0; /* Temporary counter of tx/rx frames */
4534 bool rxdone = true; /* Flag for no more read data */
4535 bool resched = false; /* Flag indicating resched wanted */
4537 BRCMF_TRACE(("%s: Enter\n", __func__));
4539 /* Start with leftover status bits */
4540 intstatus = bus->intstatus;
4542 brcmf_sdbrcm_sdlock(bus);
4544 /* If waiting for HTAVAIL, check status */
4545 if (bus->clkstate == CLK_PENDING) {
4547 u8 clkctl, devctl = 0;
4550 /* Check for inconsistent device control */
4551 devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
4552 SBSDIO_DEVICE_CTL, &err);
4554 BRCMF_ERROR(("%s: error reading DEVCTL: %d\n",
4556 bus->drvr->busstate = BRCMF_BUS_DOWN;
4560 /* Read CSR, if clock on switch to AVAIL, else ignore */
4561 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
4562 SBSDIO_FUNC1_CHIPCLKCSR, &err);
4564 BRCMF_ERROR(("%s: error reading CSR: %d\n", __func__,
4566 bus->drvr->busstate = BRCMF_BUS_DOWN;
4569 BRCMF_INFO(("DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
4572 if (SBSDIO_HTAV(clkctl)) {
4573 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
4575 SBSDIO_DEVICE_CTL, &err);
4577 BRCMF_ERROR(("%s: error reading DEVCTL: %d\n",
4579 bus->drvr->busstate = BRCMF_BUS_DOWN;
4581 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
4582 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
4583 SBSDIO_DEVICE_CTL, devctl, &err);
4585 BRCMF_ERROR(("%s: error writing DEVCTL: %d\n",
4587 bus->drvr->busstate = BRCMF_BUS_DOWN;
4589 bus->clkstate = CLK_AVAIL;
4597 /* Make sure backplane clock is on */
4598 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
4599 if (bus->clkstate == CLK_PENDING)
4602 /* Pending interrupt indicates new device status */
4605 r_sdreg32(bus, &newstatus,
4606 offsetof(struct sdpcmd_regs, intstatus), &retries);
4608 if (brcmf_sdcard_regfail(bus->sdiodev))
4610 newstatus &= bus->hostintmask;
4611 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
4613 w_sdreg32(bus, newstatus,
4614 offsetof(struct sdpcmd_regs, intstatus),
4620 /* Merge new bits with previous */
4621 intstatus |= newstatus;
4624 /* Handle flow-control change: read new state in case our ack
4625 * crossed another change interrupt. If change still set, assume
4626 * FC ON for safety, let next loop through do the debounce.
4628 if (intstatus & I_HMB_FC_CHANGE) {
4629 intstatus &= ~I_HMB_FC_CHANGE;
4630 w_sdreg32(bus, I_HMB_FC_CHANGE,
4631 offsetof(struct sdpcmd_regs, intstatus), &retries);
4633 r_sdreg32(bus, &newstatus,
4634 offsetof(struct sdpcmd_regs, intstatus), &retries);
4635 bus->f1regdata += 2;
4637 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
4638 intstatus |= (newstatus & bus->hostintmask);
4641 /* Handle host mailbox indication */
4642 if (intstatus & I_HMB_HOST_INT) {
4643 intstatus &= ~I_HMB_HOST_INT;
4644 intstatus |= brcmf_sdbrcm_hostmail(bus);
4647 /* Generally don't ask for these, can get CRC errors... */
4648 if (intstatus & I_WR_OOSYNC) {
4649 BRCMF_ERROR(("Dongle reports WR_OOSYNC\n"));
4650 intstatus &= ~I_WR_OOSYNC;
4653 if (intstatus & I_RD_OOSYNC) {
4654 BRCMF_ERROR(("Dongle reports RD_OOSYNC\n"));
4655 intstatus &= ~I_RD_OOSYNC;
4658 if (intstatus & I_SBINT) {
4659 BRCMF_ERROR(("Dongle reports SBINT\n"));
4660 intstatus &= ~I_SBINT;
4663 /* Would be active due to wake-wlan in gSPI */
4664 if (intstatus & I_CHIPACTIVE) {
4665 BRCMF_INFO(("Dongle reports CHIPACTIVE\n"));
4666 intstatus &= ~I_CHIPACTIVE;
4669 /* Ignore frame indications if rxskip is set */
4671 intstatus &= ~I_HMB_FRAME_IND;
4673 /* On frame indication, read available frames */
4674 if (PKT_AVAILABLE()) {
4675 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
4676 if (rxdone || bus->rxskip)
4677 intstatus &= ~I_HMB_FRAME_IND;
4678 rxlimit -= min(framecnt, rxlimit);
4681 /* Keep still-pending events for next scheduling */
4682 bus->intstatus = intstatus;
4685 if (DATAOK(bus) && bus->ctrl_frame_stat &&
4686 (bus->clkstate == CLK_AVAIL)) {
4689 ret = brcmf_sdbrcm_send_buf(bus,
4690 brcmf_sdcard_cur_sbwad(bus->sdiodev),
4691 SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
4692 (u32) bus->ctrl_frame_len, NULL, NULL, NULL);
4695 /* On failure, abort the command and
4696 terminate the frame */
4697 BRCMF_INFO(("%s: sdio error %d, abort command and "
4698 "terminate frame.\n", __func__, ret));
4701 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
4703 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
4704 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
4708 for (i = 0; i < 3; i++) {
4710 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
4712 SBSDIO_FUNC1_WFRAMEBCHI,
4714 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
4716 SBSDIO_FUNC1_WFRAMEBCLO,
4718 bus->f1regdata += 2;
4719 if ((hi == 0) && (lo == 0))
4725 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
4727 BRCMF_INFO(("Return_dpc value is : %d\n", ret));
4728 bus->ctrl_frame_stat = false;
4729 brcmf_sdbrcm_wait_event_wakeup(bus);
4731 /* Send queued frames (limit 1 if rx may still be pending) */
4732 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
4733 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
4735 framecnt = rxdone ? txlimit : min(txlimit, brcmf_txminmax);
4736 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
4737 txlimit -= framecnt;
4740 /* Resched if events or tx frames are pending,
4741 else await next interrupt */
4742 /* On failed register access, all bets are off:
4743 no resched or interrupts */
4744 if ((bus->drvr->busstate == BRCMF_BUS_DOWN) ||
4745 brcmf_sdcard_regfail(bus->sdiodev)) {
4746 BRCMF_ERROR(("%s: failed backplane access over SDIO, halting "
4747 "operation %d\n", __func__,
4748 brcmf_sdcard_regfail(bus->sdiodev)));
4749 bus->drvr->busstate = BRCMF_BUS_DOWN;
4751 } else if (bus->clkstate == CLK_PENDING) {
4752 BRCMF_INFO(("%s: rescheduled due to CLK_PENDING awaiting "
4753 "I_CHIPACTIVE interrupt\n", __func__));
4755 } else if (bus->intstatus || bus->ipend ||
4756 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
4757 && DATAOK(bus)) || PKT_AVAILABLE()) {
4761 bus->dpc_sched = resched;
4763 /* If we're done for now, turn off clock request. */
4764 if ((bus->clkstate != CLK_PENDING)
4765 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
4766 bus->activity = false;
4767 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
4770 brcmf_sdbrcm_sdunlock(bus);
4775 void brcmf_sdbrcm_isr(void *arg)
4777 struct brcmf_bus *bus = (struct brcmf_bus *) arg;
4779 BRCMF_TRACE(("%s: Enter\n", __func__));
4782 BRCMF_ERROR(("%s : bus is null pointer , exit\n", __func__));
4786 if (bus->drvr->busstate == BRCMF_BUS_DOWN) {
4787 BRCMF_ERROR(("%s : bus is down. we have nothing to do\n",
4791 /* Count the interrupt call */
4795 /* Shouldn't get this interrupt if we're sleeping? */
4796 if (bus->sleeping) {
4797 BRCMF_ERROR(("INTERRUPT WHILE SLEEPING??\n"));
4801 /* Disable additional interrupts (is this needed now)? */
4803 BRCMF_ERROR(("brcmf_sdbrcm_isr() w/o interrupt configured!\n"));
4805 #if defined(SDIO_ISR_THREAD)
4806 BRCMF_TRACE(("Calling brcmf_sdbrcm_dpc() from %s\n", __func__));
4807 while (brcmf_sdbrcm_dpc(bus))
4810 bus->dpc_sched = true;
4811 brcmf_sdbrcm_sched_dpc(bus);
4817 static void brcmf_sdbrcm_pktgen_init(struct brcmf_bus *bus)
4819 /* Default to specified length, or full range */
4820 if (brcmf_pktgen_len) {
4821 bus->pktgen_maxlen = min(brcmf_pktgen_len,
4822 BRCMF_MAX_PKTGEN_LEN);
4823 bus->pktgen_minlen = bus->pktgen_maxlen;
4825 bus->pktgen_maxlen = BRCMF_MAX_PKTGEN_LEN;
4826 bus->pktgen_minlen = 0;
4828 bus->pktgen_len = (u16) bus->pktgen_minlen;
4830 /* Default to per-watchdog burst with 10s print time */
4831 bus->pktgen_freq = 1;
4832 bus->pktgen_print = 10000 / brcmf_watchdog_ms;
4833 bus->pktgen_count = (brcmf_pktgen * brcmf_watchdog_ms + 999) / 1000;
4835 /* Default to echo mode */
4836 bus->pktgen_mode = BRCMF_PKTGEN_ECHO;
4837 bus->pktgen_stop = 1;
4840 static void brcmf_sdbrcm_pktgen(struct brcmf_bus *bus)
4842 struct sk_buff *pkt;
4848 /* Display current count if appropriate */
4849 if (bus->pktgen_print && (++bus->pktgen_ptick >= bus->pktgen_print)) {
4850 bus->pktgen_ptick = 0;
4851 printk(KERN_DEBUG "%s: send attempts %d rcvd %d\n",
4852 __func__, bus->pktgen_sent, bus->pktgen_rcvd);
4855 /* For recv mode, just make sure dongle has started sending */
4856 if (bus->pktgen_mode == BRCMF_PKTGEN_RECV) {
4857 if (!bus->pktgen_rcvd)
4858 brcmf_sdbrcm_sdtest_set(bus, true);
4862 /* Otherwise, generate or request the specified number of packets */
4863 for (pktcount = 0; pktcount < bus->pktgen_count; pktcount++) {
4864 /* Stop if total has been reached */
4865 if (bus->pktgen_total
4866 && (bus->pktgen_sent >= bus->pktgen_total)) {
4867 bus->pktgen_count = 0;
4871 /* Allocate an appropriate-sized packet */
4872 len = bus->pktgen_len;
4873 pkt = brcmu_pkt_buf_get_skb(
4874 len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN,
4877 BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n",
4881 PKTALIGN(pkt, (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN),
4883 data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
4885 /* Write test header cmd and extra based on mode */
4886 switch (bus->pktgen_mode) {
4887 case BRCMF_PKTGEN_ECHO:
4888 *data++ = SDPCM_TEST_ECHOREQ;
4889 *data++ = (u8) bus->pktgen_sent;
4892 case BRCMF_PKTGEN_SEND:
4893 *data++ = SDPCM_TEST_DISCARD;
4894 *data++ = (u8) bus->pktgen_sent;
4897 case BRCMF_PKTGEN_RXBURST:
4898 *data++ = SDPCM_TEST_BURST;
4899 *data++ = (u8) bus->pktgen_count;
4903 BRCMF_ERROR(("Unrecognized pktgen mode %d\n",
4905 brcmu_pkt_buf_free_skb(pkt, true);
4906 bus->pktgen_count = 0;
4910 /* Write test header length field */
4911 *data++ = (len >> 0);
4912 *data++ = (len >> 8);
4914 /* Then fill in the remainder -- N/A for burst,
4916 for (fillbyte = 0; fillbyte < len; fillbyte++)
4918 SDPCM_TEST_FILL(fillbyte, (u8) bus->pktgen_sent);
4921 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
4922 data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
4923 printk(KERN_DEBUG "brcmf_sdbrcm_pktgen: Tx Data:\n");
4924 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, data,
4925 pkt->len - SDPCM_HDRLEN);
4930 if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) {
4932 if (bus->pktgen_stop
4933 && bus->pktgen_stop == bus->pktgen_fail)
4934 bus->pktgen_count = 0;
4938 /* Bump length if not fixed, wrap at max */
4939 if (++bus->pktgen_len > bus->pktgen_maxlen)
4940 bus->pktgen_len = (u16) bus->pktgen_minlen;
4942 /* Special case for burst mode: just send one request! */
4943 if (bus->pktgen_mode == BRCMF_PKTGEN_RXBURST)
4948 static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus *bus, bool start)
4950 struct sk_buff *pkt;
4953 /* Allocate the packet */
4954 pkt = brcmu_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN +
4955 BRCMF_SDALIGN, true);
4957 BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", __func__));
4960 PKTALIGN(pkt, (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), BRCMF_SDALIGN);
4961 data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
4963 /* Fill in the test header */
4964 *data++ = SDPCM_TEST_SEND;
4966 *data++ = (bus->pktgen_maxlen >> 0);
4967 *data++ = (bus->pktgen_maxlen >> 8);
4970 if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true))
4975 brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, struct sk_buff *pkt, uint seq)
4985 /* Check for min length */
4987 if (pktlen < SDPCM_TEST_HDRLEN) {
4988 BRCMF_ERROR(("brcmf_sdbrcm_checkdied: toss runt frame, pktlen "
4990 brcmu_pkt_buf_free_skb(pkt, false);
4994 /* Extract header fields */
4999 len += *data++ << 8;
5001 /* Check length for relevant commands */
5002 if (cmd == SDPCM_TEST_DISCARD || cmd == SDPCM_TEST_ECHOREQ
5003 || cmd == SDPCM_TEST_ECHORSP) {
5004 if (pktlen != len + SDPCM_TEST_HDRLEN) {
5005 BRCMF_ERROR(("brcmf_sdbrcm_checkdied: frame length "
5006 "mismatch, pktlen %d seq %d"
5007 " cmd %d extra %d len %d\n",
5008 pktlen, seq, cmd, extra, len));
5009 brcmu_pkt_buf_free_skb(pkt, false);
5014 /* Process as per command */
5016 case SDPCM_TEST_ECHOREQ:
5017 /* Rx->Tx turnaround ok (even on NDIS w/current
5019 *(u8 *) (pkt->data) = SDPCM_TEST_ECHORSP;
5020 if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true) == 0)
5024 brcmu_pkt_buf_free_skb(pkt, false);
5029 case SDPCM_TEST_ECHORSP:
5030 if (bus->ext_loop) {
5031 brcmu_pkt_buf_free_skb(pkt, false);
5036 for (offset = 0; offset < len; offset++, data++) {
5037 if (*data != SDPCM_TEST_FILL(offset, extra)) {
5038 BRCMF_ERROR(("brcmf_sdbrcm_checkdied: echo"
5040 "offset %d (len %d) "
5041 "expect 0x%02x rcvd 0x%02x\n",
5043 SDPCM_TEST_FILL(offset, extra),
5048 brcmu_pkt_buf_free_skb(pkt, false);
5052 case SDPCM_TEST_DISCARD:
5053 brcmu_pkt_buf_free_skb(pkt, false);
5057 case SDPCM_TEST_BURST:
5058 case SDPCM_TEST_SEND:
5060 BRCMF_INFO(("brcmf_sdbrcm_checkdied: unsupported or unknown "
5061 "command, pktlen %d seq %d" " cmd %d extra %d"
5062 " len %d\n", pktlen, seq, cmd, extra, len));
5063 brcmu_pkt_buf_free_skb(pkt, false);
5067 /* For recv mode, stop at limie (and tell dongle to stop sending) */
5068 if (bus->pktgen_mode == BRCMF_PKTGEN_RECV) {
5069 if (bus->pktgen_total
5070 && (bus->pktgen_rcvd >= bus->pktgen_total)) {
5071 bus->pktgen_count = 0;
5072 brcmf_sdbrcm_sdtest_set(bus, false);
5078 extern bool brcmf_sdbrcm_bus_watchdog(struct brcmf_pub *drvr)
5080 struct brcmf_bus *bus;
5082 BRCMF_TIMER(("%s: Enter\n", __func__));
5086 if (bus->drvr->dongle_reset)
5089 /* Ignore the timer if simulating bus down */
5093 brcmf_sdbrcm_sdlock(bus);
5095 /* Poll period: check device if appropriate. */
5096 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
5099 /* Reset poll tick */
5102 /* Check device if no interrupts */
5103 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
5105 if (!bus->dpc_sched) {
5107 devpend = brcmf_sdcard_cfg_read(bus->sdiodev,
5108 SDIO_FUNC_0, SDIO_CCCR_INTx,
5111 devpend & (INTR_STATUS_FUNC1 |
5115 /* If there is something, make like the ISR and
5121 bus->dpc_sched = true;
5122 brcmf_sdbrcm_sched_dpc(bus);
5127 /* Update interrupt tracking */
5128 bus->lastintrs = bus->intrcount;
5131 /* Poll for console output periodically */
5132 if (drvr->busstate == BRCMF_BUS_DATA && brcmf_console_ms != 0) {
5133 bus->console.count += brcmf_watchdog_ms;
5134 if (bus->console.count >= brcmf_console_ms) {
5135 bus->console.count -= brcmf_console_ms;
5136 /* Make sure backplane clock is on */
5137 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5138 if (brcmf_sdbrcm_readconsole(bus) < 0)
5139 brcmf_console_ms = 0; /* On error,
5146 /* Generate packets if configured */
5147 if (bus->pktgen_count && (++bus->pktgen_tick >= bus->pktgen_freq)) {
5148 /* Make sure backplane clock is on */
5149 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5150 bus->pktgen_tick = 0;
5151 brcmf_sdbrcm_pktgen(bus);
5155 /* On idle timeout clear activity flag and/or turn off clock */
5156 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
5157 if (++bus->idlecount >= bus->idletime) {
5159 if (bus->activity) {
5160 bus->activity = false;
5161 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
5163 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
5168 brcmf_sdbrcm_sdunlock(bus);
5174 static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub *drvr,
5175 unsigned char *msg, uint msglen)
5177 struct brcmf_bus *bus = drvr->bus;
5180 struct sk_buff *pkt;
5182 /* Address could be zero if CONSOLE := 0 in dongle Makefile */
5183 if (bus->console_addr == 0)
5186 /* Exclusive bus access */
5187 brcmf_sdbrcm_sdlock(bus);
5189 /* Don't allow input if dongle is in reset */
5190 if (bus->drvr->dongle_reset) {
5191 brcmf_sdbrcm_sdunlock(bus);
5195 /* Request clock to allow SDIO accesses */
5197 /* No pend allowed since txpkt is called later, ht clk has to be on */
5198 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5200 /* Zero cbuf_index */
5201 addr = bus->console_addr + offsetof(struct rte_console, cbuf_idx);
5202 val = cpu_to_le32(0);
5203 rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
5207 /* Write message into cbuf */
5208 addr = bus->console_addr + offsetof(struct rte_console, cbuf);
5209 rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)msg, msglen);
5213 /* Write length into vcons_in */
5214 addr = bus->console_addr + offsetof(struct rte_console, vcons_in);
5215 val = cpu_to_le32(msglen);
5216 rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
5220 /* Bump dongle by sending an empty event pkt.
5221 * sdpcm_sendup (RX) checks for virtual console input.
5223 pkt = brcmu_pkt_buf_get_skb(4 + SDPCM_RESERVE);
5224 if ((pkt != NULL) && bus->clkstate == CLK_AVAIL)
5225 brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true);
5228 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
5229 bus->activity = false;
5230 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
5233 brcmf_sdbrcm_sdunlock(bus);
5239 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
5241 if (chipid == BCM4329_CHIP_ID)
5246 void *brcmf_sdbrcm_probe(u16 bus_no, u16 slot, u16 func, uint bustype,
5247 u32 regsva, struct brcmf_sdio_dev *sdiodev)
5250 struct brcmf_bus *bus;
5252 /* Init global variables at run-time, not as part of the declaration.
5253 * This is required to support init/de-init of the driver.
5255 * of globals as part of the declaration results in non-deterministic
5256 * behavior since the value of the globals may be different on the
5257 * first time that the driver is initialized vs subsequent
5260 brcmf_txbound = BRCMF_TXBOUND;
5261 brcmf_rxbound = BRCMF_RXBOUND;
5262 brcmf_alignctl = true;
5263 brcmf_readahead = true;
5265 brcmf_dongle_memsize = 0;
5266 brcmf_txminmax = BRCMF_TXMINMAX;
5272 BRCMF_TRACE(("%s: Enter\n", __func__));
5274 /* We make an assumption about address window mappings:
5275 * regsva == SI_ENUM_BASE*/
5277 /* Allocate private bus interface state */
5278 bus = kzalloc(sizeof(struct brcmf_bus), GFP_ATOMIC);
5280 BRCMF_ERROR(("%s: kmalloc of struct dhd_bus failed\n",
5284 bus->sdiodev = sdiodev;
5286 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
5287 bus->usebufpool = false; /* Use bufpool if allocated,
5288 else use locally malloced rxbuf */
5290 /* attempt to attach to the dongle */
5291 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
5292 BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_attach failed\n",
5297 spin_lock_init(&bus->txqlock);
5298 init_waitqueue_head(&bus->ctrl_wait);
5299 init_waitqueue_head(&bus->ioctl_resp_wait);
5301 /* Set up the watchdog timer */
5302 init_timer(&bus->timer);
5303 bus->timer.data = (unsigned long)bus;
5304 bus->timer.function = brcmf_sdbrcm_watchdog;
5306 /* Initialize thread based operation and lock */
5307 if ((brcmf_watchdog_prio >= 0) && (brcmf_dpc_prio >= 0)) {
5308 bus->threads_only = true;
5309 sema_init(&bus->sdsem, 1);
5311 bus->threads_only = false;
5312 spin_lock_init(&bus->sdlock);
5315 if (brcmf_dpc_prio >= 0) {
5316 /* Initialize watchdog thread */
5317 init_completion(&bus->watchdog_wait);
5318 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
5319 bus, "brcmf_watchdog");
5320 if (IS_ERR(bus->watchdog_tsk)) {
5322 "brcmf_watchdog thread failed to start\n");
5323 bus->watchdog_tsk = NULL;
5326 bus->watchdog_tsk = NULL;
5328 /* Set up the bottom half handler */
5329 if (brcmf_dpc_prio >= 0) {
5330 /* Initialize DPC thread */
5331 init_completion(&bus->dpc_wait);
5332 bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
5334 if (IS_ERR(bus->dpc_tsk)) {
5336 "brcmf_dpc thread failed to start\n");
5337 bus->dpc_tsk = NULL;
5340 tasklet_init(&bus->tasklet, brcmf_sdbrcm_dpc_tasklet,
5341 (unsigned long)bus);
5342 bus->dpc_tsk = NULL;
5345 /* Attach to the brcmf/OS/network interface */
5346 bus->drvr = brcmf_attach(bus, SDPCM_RESERVE);
5348 BRCMF_ERROR(("%s: brcmf_attach failed\n", __func__));
5352 /* Allocate buffers */
5353 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
5354 BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_malloc failed\n",
5359 if (!(brcmf_sdbrcm_probe_init(bus))) {
5360 BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_init failed\n", __func__));
5364 /* Register interrupt callback, but mask it (not operational yet). */
5365 BRCMF_INTR(("%s: disable SDIO interrupts (not interested yet)\n",
5367 ret = brcmf_sdcard_intr_reg(bus->sdiodev);
5369 BRCMF_ERROR(("%s: FAILED: sdcard_intr_reg returned %d\n",
5373 BRCMF_INTR(("%s: registered SDIO interrupt function ok\n", __func__));
5375 BRCMF_INFO(("%s: completed!!\n", __func__));
5377 /* if firmware path present try to download and bring up bus */
5378 ret = brcmf_bus_start(bus->drvr);
5380 if (ret == -ENOLINK) {
5381 BRCMF_ERROR(("%s: dongle is not responding\n",
5386 /* Ok, have the per-port tell the stack we're open for business */
5387 if (brcmf_net_attach(bus->drvr, 0) != 0) {
5388 BRCMF_ERROR(("%s: Net attach failed!!\n", __func__));
5395 brcmf_sdbrcm_release(bus);
5400 brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, u32 regsva)
5407 bus->alp_only = true;
5409 /* Return the window to backplane enumeration space for core access */
5410 if (brcmf_sdbrcm_set_siaddr_window(bus, SI_ENUM_BASE))
5411 BRCMF_ERROR(("%s: FAILED to return to SI_ENUM_BASE\n",
5415 printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
5416 brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4));
5421 * Force PLL off until brcmf_sdbrcm_chip_attach()
5422 * programs PLL control regs
5425 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
5426 SBSDIO_FUNC1_CHIPCLKCSR,
5427 BRCMF_INIT_CLKCTL1, &err);
5430 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
5431 SBSDIO_FUNC1_CHIPCLKCSR, &err);
5433 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
5434 BRCMF_ERROR(("brcmf_sdbrcm_probe: ChipClkCSR access: err %d"
5435 " wrote 0x%02x read 0x%02x\n",
5436 err, BRCMF_INIT_CLKCTL1, clkctl));
5440 if (brcmf_sdbrcm_chip_attach(bus, regsva)) {
5441 BRCMF_ERROR(("%s: brcmf_sdbrcm_chip_attach failed!\n",
5446 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
5447 BRCMF_ERROR(("%s: unsupported chip: 0x%04x\n",
5448 __func__, bus->ci->chip));
5452 brcmf_sdbrcm_sdiod_drive_strength_init(bus, brcmf_sdiod_drive_strength);
5454 /* Get info on the ARM and SOCRAM cores... */
5455 brcmf_sdcard_reg_read(bus->sdiodev,
5456 CORE_SB(bus->ci->armcorebase, sbidhigh), 4);
5457 bus->orig_ramsize = bus->ci->ramsize;
5458 if (!(bus->orig_ramsize)) {
5459 BRCMF_ERROR(("%s: failed to find SOCRAM memory!\n",
5463 bus->ramsize = bus->orig_ramsize;
5464 if (brcmf_dongle_memsize)
5465 brcmf_sdbrcm_setmemsize(bus, brcmf_dongle_memsize);
5467 BRCMF_ERROR(("DHD: dongle ram size is set to %d(orig %d)\n",
5468 bus->ramsize, bus->orig_ramsize));
5470 /* Set core control so an SDIO reset does a backplane reset */
5471 reg_addr = bus->ci->buscorebase +
5472 offsetof(struct sdpcmd_regs, corecontrol);
5473 reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32));
5474 brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
5475 reg_val | CC_BPRESEN);
5477 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
5479 /* Locate an appropriately-aligned portion of hdrbuf */
5480 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
5483 /* Set the poll and/or interrupt flags */
5484 bus->intr = (bool) brcmf_intr;
5485 bus->poll = (bool) brcmf_poll;
5495 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus)
5497 BRCMF_TRACE(("%s: Enter\n", __func__));
5499 if (bus->drvr->maxctl) {
5501 roundup((bus->drvr->maxctl + SDPCM_HDRLEN),
5502 ALIGNMENT) + BRCMF_SDALIGN;
5503 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
5504 if (!(bus->rxbuf)) {
5505 BRCMF_ERROR(("%s: kmalloc of %d-byte rxbuf failed\n",
5506 __func__, bus->rxblen));
5511 /* Allocate buffer to receive glomed packet */
5512 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
5513 if (!(bus->databuf)) {
5514 BRCMF_ERROR(("%s: kmalloc of %d-byte databuf failed\n",
5515 __func__, MAX_DATA_BUF));
5516 /* release rxbuf which was already located as above */
5522 /* Align the buffer */
5523 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
5524 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
5525 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
5527 bus->dataptr = bus->databuf;
5535 static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus)
5537 BRCMF_TRACE(("%s: Enter\n", __func__));
5540 brcmf_sdbrcm_pktgen_init(bus);
5543 /* Disable F2 to clear any intermediate frame state on the dongle */
5544 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
5545 SDIO_FUNC_ENABLE_1, NULL);
5547 bus->drvr->busstate = BRCMF_BUS_DOWN;
5548 bus->sleeping = false;
5549 bus->rxflow = false;
5551 /* Done with backplane-dependent accesses, can drop clock... */
5552 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
5553 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
5555 /* ...and initialize clock/power states */
5556 bus->clkstate = CLK_SDONLY;
5557 bus->idletime = (s32) brcmf_idletime;
5558 bus->idleclock = BRCMF_IDLE_ACTIVE;
5560 /* Query the F2 block size, set roundup accordingly */
5561 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
5562 bus->roundup = min(max_roundup, bus->blocksize);
5564 /* Query if bus module supports packet chaining,
5565 default to use if supported */
5566 if (brcmf_sdcard_iovar_op(bus->sdiodev, "sd_rxchain", NULL, 0,
5567 &bus->sd_rxchain, sizeof(s32),
5569 bus->sd_rxchain = false;
5571 BRCMF_INFO(("%s: bus module (through sdiocard API) %s"
5572 " chaining\n", __func__, bus->sd_rxchain
5573 ? "supports" : "does not support"));
5575 bus->use_rxchain = (bool) bus->sd_rxchain;
5581 brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus, void *card)
5585 /* Download the firmware */
5586 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5588 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
5590 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
5595 /* Detach and free everything */
5596 static void brcmf_sdbrcm_release(struct brcmf_bus *bus)
5598 BRCMF_TRACE(("%s: Enter\n", __func__));
5601 /* De-register interrupt handler */
5602 brcmf_sdcard_intr_dereg(bus->sdiodev);
5605 brcmf_detach(bus->drvr);
5606 brcmf_sdbrcm_release_dongle(bus);
5610 brcmf_sdbrcm_release_malloc(bus);
5615 BRCMF_TRACE(("%s: Disconnected\n", __func__));
5618 static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus)
5620 BRCMF_TRACE(("%s: Enter\n", __func__));
5622 if (bus->drvr && bus->drvr->dongle_reset)
5626 bus->rxctl = bus->rxbuf = NULL;
5629 kfree(bus->databuf);
5630 bus->databuf = NULL;
5633 static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus)
5635 BRCMF_TRACE(("%s: Enter\n", __func__));
5637 if (bus->drvr && bus->drvr->dongle_reset)
5641 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
5642 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
5643 brcmf_sdbrcm_chip_detach(bus);
5644 if (bus->vars && bus->varsz)
5649 BRCMF_TRACE(("%s: Disconnected\n", __func__));
5652 void brcmf_sdbrcm_disconnect(void *ptr)
5654 struct brcmf_bus *bus = (struct brcmf_bus *)ptr;
5656 BRCMF_TRACE(("%s: Enter\n", __func__));
5659 brcmf_sdbrcm_release(bus);
5661 BRCMF_TRACE(("%s: Disconnected\n", __func__));
5664 int brcmf_bus_register(void)
5666 BRCMF_TRACE(("%s: Enter\n", __func__));
5668 /* Sanity check on the module parameters */
5670 /* Both watchdog and DPC as tasklets are ok */
5671 if ((brcmf_watchdog_prio < 0) && (brcmf_dpc_prio < 0))
5674 /* If both watchdog and DPC are threads, TX must be deferred */
5675 if ((brcmf_watchdog_prio >= 0) && (brcmf_dpc_prio >= 0)
5676 && brcmf_deferred_tx)
5679 BRCMF_ERROR(("Invalid module parameters.\n"));
5683 return brcmf_sdio_register();
5686 void brcmf_bus_unregister(void)
5688 BRCMF_TRACE(("%s: Enter\n", __func__));
5690 brcmf_sdio_unregister();
5693 static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus)
5697 u8 *memblock = NULL, *memptr;
5700 BRCMF_INFO(("%s: Enter\n", __func__));
5702 bus->fw_name = BCM4329_FW_NAME;
5703 ret = request_firmware(&bus->firmware, bus->fw_name,
5704 &bus->sdiodev->func[2]->dev);
5706 BRCMF_ERROR(("%s: Fail to request firmware %d\n",
5712 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
5713 if (memblock == NULL) {
5714 BRCMF_ERROR(("%s: Failed to allocate memory %d bytes\n",
5715 __func__, MEMBLOCK));
5719 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
5720 memptr += (BRCMF_SDALIGN -
5721 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
5723 /* Download image */
5725 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
5726 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
5728 BRCMF_ERROR(("%s: error %d on writing %d membytes at "
5729 "0x%08x\n", __func__, ret, MEMBLOCK,
5740 release_firmware(bus->firmware);
5747 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
5748 * and ending in a NUL.
5749 * Removes carriage returns, empty lines, comment lines, and converts
5751 * Shortens buffer as needed and pads with NULs. End of buffer is marked
5755 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
5764 findNewline = false;
5767 for (n = 0; n < len; n++) {
5770 if (varbuf[n] == '\r')
5772 if (findNewline && varbuf[n] != '\n')
5774 findNewline = false;
5775 if (varbuf[n] == '#') {
5779 if (varbuf[n] == '\n') {
5789 buf_len = dp - varbuf;
5791 while (dp < varbuf + n)
5797 static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus)
5800 char *memblock = NULL;
5804 bus->nv_name = BCM4329_NV_NAME;
5805 ret = request_firmware(&bus->firmware, bus->nv_name,
5806 &bus->sdiodev->func[2]->dev);
5808 BRCMF_ERROR(("%s: Fail to request nvram %d\n", __func__, ret));
5813 memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
5814 if (memblock == NULL) {
5815 BRCMF_ERROR(("%s: Failed to allocate memory %d bytes\n",
5816 __func__, MEMBLOCK));
5821 len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
5823 if (len > 0 && len < MEMBLOCK) {
5824 bufp = (char *)memblock;
5826 len = brcmf_process_nvram_vars(bufp, len);
5830 ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
5832 BRCMF_ERROR(("%s: error downloading vars: %d\n",
5835 BRCMF_ERROR(("%s: error reading nvram file: %d\n",
5843 release_firmware(bus->firmware);
5849 static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus)
5853 /* Keep arm in reset */
5854 if (brcmf_sdbrcm_download_state(bus, true)) {
5855 BRCMF_ERROR(("%s: error placing ARM core in reset\n",
5860 /* External image takes precedence if specified */
5861 if (brcmf_sdbrcm_download_code_file(bus)) {
5862 BRCMF_ERROR(("%s: dongle image file download failed\n",
5867 /* External nvram takes precedence if specified */
5868 if (brcmf_sdbrcm_download_nvram(bus))
5869 BRCMF_ERROR(("%s: dongle nvram file download failed\n",
5872 /* Take arm out of reset */
5873 if (brcmf_sdbrcm_download_state(bus, false)) {
5874 BRCMF_ERROR(("%s: error getting out of ARM core reset\n",
5887 brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn, uint flags,
5888 u8 *buf, uint nbytes, struct sk_buff *pkt,
5889 void (*complete)(void *handle, int status,
5893 return brcmf_sdcard_send_buf
5894 (bus->sdiodev, addr, fn, flags, buf, nbytes, pkt, complete,
5898 int brcmf_bus_devreset(struct brcmf_pub *drvr, u8 flag)
5901 struct brcmf_bus *bus;
5906 brcmf_sdbrcm_wd_timer(bus, 0);
5907 if (!bus->drvr->dongle_reset) {
5908 /* Expect app to have torn down any
5909 connection before calling */
5910 /* Stop the bus, disable F2 */
5911 brcmf_sdbrcm_bus_stop(bus, false);
5913 /* Clean tx/rx buffer pointers,
5914 detach from the dongle */
5915 brcmf_sdbrcm_release_dongle(bus);
5917 bus->drvr->dongle_reset = true;
5918 bus->drvr->up = false;
5920 BRCMF_TRACE(("%s: WLAN OFF DONE\n", __func__));
5921 /* App can now remove power from device */
5925 /* App must have restored power to device before calling */
5927 BRCMF_TRACE(("\n\n%s: == WLAN ON ==\n", __func__));
5929 if (bus->drvr->dongle_reset) {
5932 /* Attempt to re-attach & download */
5933 if (brcmf_sdbrcm_probe_attach(bus, SI_ENUM_BASE)) {
5934 /* Attempt to download binary to the dongle */
5935 if (brcmf_sdbrcm_probe_init(bus)) {
5936 /* Re-init bus, enable F2 transfer */
5937 brcmf_sdbrcm_bus_init(bus->drvr, false);
5939 bus->drvr->dongle_reset = false;
5940 bus->drvr->up = true;
5942 BRCMF_TRACE(("%s: WLAN ON DONE\n",
5949 bcmerror = -EISCONN;
5950 BRCMF_ERROR(("%s: Set DEVRESET=false invoked when"
5951 " device is on\n", __func__));
5954 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
5960 brcmf_sdbrcm_chip_recognition(struct brcmf_sdio_dev *sdiodev,
5961 struct chip_info *ci, u32 regs)
5967 * Chipid is assume to be at offset 0 from regs arg
5968 * For different chiptypes or old sdio hosts w/o chipcommon,
5969 * other ways of recognition should be added here.
5971 ci->cccorebase = regs;
5972 regdata = brcmf_sdcard_reg_read(sdiodev,
5973 CORE_CC_REG(ci->cccorebase, chipid), 4);
5974 ci->chip = regdata & CID_ID_MASK;
5975 ci->chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT;
5977 BRCMF_INFO(("%s: chipid=0x%x chiprev=%d\n",
5978 __func__, ci->chip, ci->chiprev));
5980 /* Address of cores for new chips should be added here */
5982 case BCM4329_CHIP_ID:
5983 ci->buscorebase = BCM4329_CORE_BUS_BASE;
5984 ci->ramcorebase = BCM4329_CORE_SOCRAM_BASE;
5985 ci->armcorebase = BCM4329_CORE_ARM_BASE;
5986 ci->ramsize = BCM4329_RAMSIZE;
5989 BRCMF_ERROR(("%s: chipid 0x%x is not supported\n",
5990 __func__, ci->chip));
5994 regdata = brcmf_sdcard_reg_read(sdiodev,
5995 CORE_SB(ci->cccorebase, sbidhigh), 4);
5996 ci->ccrev = SBCOREREV(regdata);
5998 regdata = brcmf_sdcard_reg_read(sdiodev,
5999 CORE_CC_REG(ci->cccorebase, pmucapabilities), 4);
6000 ci->pmurev = regdata & PCAP_REV_MASK;
6002 regdata = brcmf_sdcard_reg_read(sdiodev,
6003 CORE_SB(ci->buscorebase, sbidhigh), 4);
6004 ci->buscorerev = SBCOREREV(regdata);
6005 ci->buscoretype = (regdata & SBIDH_CC_MASK) >> SBIDH_CC_SHIFT;
6007 BRCMF_INFO(("%s: ccrev=%d, pmurev=%d, buscore rev/type=%d/0x%x\n",
6008 __func__, ci->ccrev, ci->pmurev,
6009 ci->buscorerev, ci->buscoretype));
6011 /* get chipcommon capabilites */
6012 ci->cccaps = brcmf_sdcard_reg_read(sdiodev,
6013 CORE_CC_REG(ci->cccorebase, capabilities), 4);
6019 brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_dev *sdiodev, u32 corebase)
6023 regdata = brcmf_sdcard_reg_read(sdiodev,
6024 CORE_SB(corebase, sbtmstatelow), 4);
6025 if (regdata & SBTML_RESET)
6028 regdata = brcmf_sdcard_reg_read(sdiodev,
6029 CORE_SB(corebase, sbtmstatelow), 4);
6030 if ((regdata & (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) != 0) {
6032 * set target reject and spin until busy is clear
6033 * (preserve core-specific bits)
6035 regdata = brcmf_sdcard_reg_read(sdiodev,
6036 CORE_SB(corebase, sbtmstatelow), 4);
6037 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow),
6038 4, regdata | SBTML_REJ);
6040 regdata = brcmf_sdcard_reg_read(sdiodev,
6041 CORE_SB(corebase, sbtmstatelow), 4);
6043 SPINWAIT((brcmf_sdcard_reg_read(sdiodev,
6044 CORE_SB(corebase, sbtmstatehigh), 4) &
6045 SBTMH_BUSY), 100000);
6047 regdata = brcmf_sdcard_reg_read(sdiodev,
6048 CORE_SB(corebase, sbtmstatehigh), 4);
6049 if (regdata & SBTMH_BUSY)
6050 BRCMF_ERROR(("%s: ARM core still busy\n", __func__));
6052 regdata = brcmf_sdcard_reg_read(sdiodev,
6053 CORE_SB(corebase, sbidlow), 4);
6054 if (regdata & SBIDL_INIT) {
6055 regdata = brcmf_sdcard_reg_read(sdiodev,
6056 CORE_SB(corebase, sbimstate), 4) |
6058 brcmf_sdcard_reg_write(sdiodev,
6059 CORE_SB(corebase, sbimstate), 4,
6061 regdata = brcmf_sdcard_reg_read(sdiodev,
6062 CORE_SB(corebase, sbimstate), 4);
6064 SPINWAIT((brcmf_sdcard_reg_read(sdiodev,
6065 CORE_SB(corebase, sbimstate), 4) &
6069 /* set reset and reject while enabling the clocks */
6070 brcmf_sdcard_reg_write(sdiodev,
6071 CORE_SB(corebase, sbtmstatelow), 4,
6072 (((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
6073 SBTML_REJ | SBTML_RESET));
6074 regdata = brcmf_sdcard_reg_read(sdiodev,
6075 CORE_SB(corebase, sbtmstatelow), 4);
6078 /* clear the initiator reject bit */
6079 regdata = brcmf_sdcard_reg_read(sdiodev,
6080 CORE_SB(corebase, sbidlow), 4);
6081 if (regdata & SBIDL_INIT) {
6082 regdata = brcmf_sdcard_reg_read(sdiodev,
6083 CORE_SB(corebase, sbimstate), 4) &
6085 brcmf_sdcard_reg_write(sdiodev,
6086 CORE_SB(corebase, sbimstate), 4,
6091 /* leave reset and reject asserted */
6092 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
6093 (SBTML_REJ | SBTML_RESET));
6098 brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs)
6100 struct chip_info *ci;
6104 BRCMF_TRACE(("%s: Enter\n", __func__));
6106 /* alloc chip_info_t */
6107 ci = kmalloc(sizeof(struct chip_info), GFP_ATOMIC);
6109 BRCMF_ERROR(("%s: malloc failed!\n", __func__));
6113 memset((unsigned char *)ci, 0, sizeof(struct chip_info));
6115 /* bus/core/clk setup for register access */
6116 /* Try forcing SDIO core to do ALPAvail request only */
6117 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
6118 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
6119 SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
6121 BRCMF_ERROR(("%s: error writing for HT off\n", __func__));
6125 /* If register supported, wait for ALPAvail and then force ALP */
6126 /* This may take up to 15 milliseconds */
6127 clkval = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
6128 SBSDIO_FUNC1_CHIPCLKCSR, NULL);
6129 if ((clkval & ~SBSDIO_AVBITS) == clkset) {
6131 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
6132 SBSDIO_FUNC1_CHIPCLKCSR,
6134 !SBSDIO_ALPAV(clkval)),
6135 PMU_MAX_TRANSITION_DLY);
6136 if (!SBSDIO_ALPAV(clkval)) {
6137 BRCMF_ERROR(("%s: timeout on ALPAV wait,"
6138 " clkval 0x%02x\n", __func__, clkval));
6142 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF |
6144 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
6145 SBSDIO_FUNC1_CHIPCLKCSR,
6149 BRCMF_ERROR(("%s: ChipClkCSR access: wrote 0x%02x"
6150 " read 0x%02x\n", __func__, clkset, clkval));
6155 /* Also, disable the extra SDIO pull-ups */
6156 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
6157 SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
6159 err = brcmf_sdbrcm_chip_recognition(bus->sdiodev, ci, regs);
6164 * Make sure any on-chip ARM is off (in case strapping is wrong),
6165 * or downloaded code was already running.
6167 brcmf_sdbrcm_chip_disablecore(bus->sdiodev, ci->armcorebase);
6169 brcmf_sdcard_reg_write(bus->sdiodev,
6170 CORE_CC_REG(ci->cccorebase, gpiopullup), 4, 0);
6171 brcmf_sdcard_reg_write(bus->sdiodev,
6172 CORE_CC_REG(ci->cccorebase, gpiopulldown), 4, 0);
6174 /* Disable F2 to clear any intermediate frame state on the dongle */
6175 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
6176 SDIO_FUNC_ENABLE_1, NULL);
6178 /* WAR: cmd52 backplane read so core HW will drop ALPReq */
6179 clkval = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
6182 /* Done with backplane-dependent accesses, can drop clock... */
6183 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
6184 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
6195 brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase)
6200 * Must do the disable sequence first to work for
6201 * arbitrary current core state.
6203 brcmf_sdbrcm_chip_disablecore(sdiodev, corebase);
6206 * Now do the initialization sequence.
6207 * set reset while enabling the clock and
6208 * forcing them on throughout the core
6210 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
6211 ((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
6215 regdata = brcmf_sdcard_reg_read(sdiodev,
6216 CORE_SB(corebase, sbtmstatehigh), 4);
6217 if (regdata & SBTMH_SERR)
6218 brcmf_sdcard_reg_write(sdiodev,
6219 CORE_SB(corebase, sbtmstatehigh), 4, 0);
6221 regdata = brcmf_sdcard_reg_read(sdiodev,
6222 CORE_SB(corebase, sbimstate), 4);
6223 if (regdata & (SBIM_IBE | SBIM_TO))
6224 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbimstate), 4,
6225 regdata & ~(SBIM_IBE | SBIM_TO));
6227 /* clear reset and allow it to propagate throughout the core */
6228 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
6229 (SICF_FGC << SBTML_SICF_SHIFT) |
6230 (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
6233 /* leave clock enabled */
6234 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
6235 (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
6239 /* SDIO Pad drive strength to select value mappings */
6240 struct sdiod_drive_str {
6241 u8 strength; /* Pad Drive Strength in mA */
6242 u8 sel; /* Chip-specific select value */
6245 /* SDIO Drive Strength to sel value table for PMU Rev 1 */
6246 static const struct sdiod_drive_str sdiod_drive_strength_tab1[] = {
6254 /* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
6255 static const struct sdiod_drive_str sdiod_drive_strength_tab2[] = {
6266 /* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
6267 static const struct sdiod_drive_str sdiod_drive_strength_tab3[] = {
6279 #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
6281 static void brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus,
6282 u32 drivestrength) {
6283 struct sdiod_drive_str *str_tab = NULL;
6288 if (!(bus->ci->cccaps & CC_CAP_PMU))
6291 switch (SDIOD_DRVSTR_KEY(bus->ci->chip, bus->ci->pmurev)) {
6292 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
6293 str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab1;
6294 str_mask = 0x30000000;
6297 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
6298 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
6299 str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab2;
6300 str_mask = 0x00003800;
6303 case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
6304 str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab3;
6305 str_mask = 0x00003800;
6309 BRCMF_ERROR(("No SDIO Drive strength init"
6310 "done for chip %s rev %d pmurev %d\n",
6311 brcmu_chipname(bus->ci->chip, chn, 8),
6312 bus->ci->chiprev, bus->ci->pmurev));
6316 if (str_tab != NULL) {
6317 u32 drivestrength_sel = 0;
6321 for (i = 0; str_tab[i].strength != 0; i++) {
6322 if (drivestrength >= str_tab[i].strength) {
6323 drivestrength_sel = str_tab[i].sel;
6328 brcmf_sdcard_reg_write(bus->sdiodev,
6329 CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
6331 cc_data_temp = brcmf_sdcard_reg_read(bus->sdiodev,
6332 CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4);
6333 cc_data_temp &= ~str_mask;
6334 drivestrength_sel <<= str_shift;
6335 cc_data_temp |= drivestrength_sel;
6336 brcmf_sdcard_reg_write(bus->sdiodev,
6337 CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
6340 BRCMF_INFO(("SDIO: %dmA drive strength selected, "
6341 "set to 0x%08x\n", drivestrength, cc_data_temp));
6346 brcmf_sdbrcm_chip_detach(struct brcmf_bus *bus)
6348 BRCMF_TRACE(("%s: Enter\n", __func__));
6355 brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar)
6357 brcmf_sdbrcm_sdunlock(bus);
6358 wait_event_interruptible_timeout(bus->ctrl_wait,
6359 (*lockvar == false), HZ * 2);
6360 brcmf_sdbrcm_sdlock(bus);
6365 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus)
6367 if (waitqueue_active(&bus->ctrl_wait))
6368 wake_up_interruptible(&bus->ctrl_wait);
6373 brcmf_sdbrcm_watchdog_thread(void *data)
6375 struct brcmf_bus *bus = (struct brcmf_bus *)data;
6377 /* This thread doesn't need any user-level access,
6378 * so get rid of all our resources
6380 if (brcmf_watchdog_prio > 0) {
6381 struct sched_param param;
6382 param.sched_priority = (brcmf_watchdog_prio < MAX_RT_PRIO) ?
6383 brcmf_watchdog_prio : (MAX_RT_PRIO - 1);
6384 sched_setscheduler(current, SCHED_FIFO, ¶m);
6387 allow_signal(SIGTERM);
6388 /* Run until signal received */
6390 if (kthread_should_stop())
6392 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
6393 if (bus->drvr->dongle_reset == false)
6394 brcmf_sdbrcm_bus_watchdog(bus->drvr);
6395 /* Count the tick for reference */
6396 bus->drvr->tickcnt++;
6404 brcmf_sdbrcm_watchdog(unsigned long data)
6406 struct brcmf_bus *bus = (struct brcmf_bus *)data;
6408 if (brcmf_watchdog_prio >= 0) {
6409 if (bus->watchdog_tsk)
6410 complete(&bus->watchdog_wait);
6414 brcmf_sdbrcm_bus_watchdog(bus->drvr);
6416 /* Count the tick for reference */
6417 bus->drvr->tickcnt++;
6420 /* Reschedule the watchdog */
6421 if (bus->wd_timer_valid)
6422 mod_timer(&bus->timer, jiffies + brcmf_watchdog_ms * HZ / 1000);
6426 brcmf_sdbrcm_wd_timer(struct brcmf_bus *bus, uint wdtick)
6428 static uint save_ms;
6430 /* don't start the wd until fw is loaded */
6431 if (bus->drvr->busstate == BRCMF_BUS_DOWN)
6434 /* Totally stop the timer */
6435 if (!wdtick && bus->wd_timer_valid == true) {
6436 del_timer_sync(&bus->timer);
6437 bus->wd_timer_valid = false;
6443 brcmf_watchdog_ms = (uint) wdtick;
6445 if (save_ms != brcmf_watchdog_ms) {
6446 if (bus->wd_timer_valid == true)
6447 /* Stop timer and restart at new value */
6448 del_timer_sync(&bus->timer);
6450 /* Create timer again when watchdog period is
6451 dynamically changed or in the first instance
6453 bus->timer.expires =
6454 jiffies + brcmf_watchdog_ms * HZ / 1000;
6455 add_timer(&bus->timer);
6458 /* Re arm the timer, at last watchdog period */
6459 mod_timer(&bus->timer,
6460 jiffies + brcmf_watchdog_ms * HZ / 1000);
6463 bus->wd_timer_valid = true;
6468 static int brcmf_sdbrcm_dpc_thread(void *data)
6470 struct brcmf_bus *bus = (struct brcmf_bus *) data;
6472 /* This thread doesn't need any user-level access,
6473 * so get rid of all our resources
6475 if (brcmf_dpc_prio > 0) {
6476 struct sched_param param;
6477 param.sched_priority = (brcmf_dpc_prio < MAX_RT_PRIO) ?
6478 brcmf_dpc_prio : (MAX_RT_PRIO - 1);
6479 sched_setscheduler(current, SCHED_FIFO, ¶m);
6482 allow_signal(SIGTERM);
6483 /* Run until signal received */
6485 if (kthread_should_stop())
6487 if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
6488 /* Call bus dpc unless it indicated down
6489 (then clean stop) */
6490 if (bus->drvr->busstate != BRCMF_BUS_DOWN) {
6491 if (brcmf_sdbrcm_dpc(bus))
6492 complete(&bus->dpc_wait);
6494 brcmf_sdbrcm_bus_stop(bus, true);
6502 static void brcmf_sdbrcm_dpc_tasklet(unsigned long data)
6504 struct brcmf_bus *bus = (struct brcmf_bus *) data;
6506 /* Call bus dpc unless it indicated down (then clean stop) */
6507 if (bus->drvr->busstate != BRCMF_BUS_DOWN) {
6508 if (brcmf_sdbrcm_dpc(bus))
6509 tasklet_schedule(&bus->tasklet);
6511 brcmf_sdbrcm_bus_stop(bus, true);
6514 static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus *bus)
6517 complete(&bus->dpc_wait);
6521 tasklet_schedule(&bus->tasklet);
6524 static void brcmf_sdbrcm_sdlock(struct brcmf_bus *bus)
6526 if (bus->threads_only)
6529 spin_lock_bh(&bus->sdlock);
6532 static void brcmf_sdbrcm_sdunlock(struct brcmf_bus *bus)
6534 if (bus->threads_only)
6537 spin_unlock_bh(&bus->sdlock);
6540 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus)
6542 if (bus->firmware->size < bus->fw_ptr + len)
6543 len = bus->firmware->size - bus->fw_ptr;
6545 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
6550 MODULE_FIRMWARE(BCM4329_FW_NAME);
6551 MODULE_FIRMWARE(BCM4329_NV_NAME);
6553 static int brcmf_sdbrcm_ioctl_resp_wait(struct brcmf_bus *bus, uint *condition,
6556 DECLARE_WAITQUEUE(wait, current);
6557 int timeout = msecs_to_jiffies(brcmf_ioctl_timeout_msec);
6559 /* Wait until control frame is available */
6560 add_wait_queue(&bus->ioctl_resp_wait, &wait);
6561 set_current_state(TASK_INTERRUPTIBLE);
6563 while (!(*condition) && (!signal_pending(current) && timeout))
6564 timeout = schedule_timeout(timeout);
6566 if (signal_pending(current))
6569 set_current_state(TASK_RUNNING);
6570 remove_wait_queue(&bus->ioctl_resp_wait, &wait);
6575 static int brcmf_sdbrcm_ioctl_resp_wake(struct brcmf_bus *bus)
6577 if (waitqueue_active(&bus->ioctl_resp_wait))
6578 wake_up_interruptible(&bus->ioctl_resp_wait);
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