drivers/staging/brcm80211/brcmsmac/phy_shim.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 /*
  18  * This is "two-way" interface, acting as the SHIM layer between WL and PHY layer.
  19  *   WL driver can optinally call this translation layer to do some preprocessing, then reach PHY.
  20  *   On the PHY->WL driver direction, all calls go through this layer since PHY doesn't have the
  21  *   access to wlc_hw pointer.
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/module.h>
  26
  27 #include <defs.h>
  28 #include <brcmu_utils.h>
  29 #include <brcmu_wifi.h>
  30 #include <aiutils.h>
  31 #include <chipcommon.h>
  32 #include "dma.h"
  33 #include <pmu.h>
  34
  35 #include "types.h"
  36 #include "d11.h"
  37 #include "rate.h"
  38 #include "scb.h"
  39 #include "pub.h"
  40 #include "phy/phy_hal.h"
  41 #include "channel.h"
  42 #include "srom.h"
  43 #include "bottom_mac.h"
  44 #include "phy_hal.h"
  45 #include "main.h"
  46 #include "phy_shim.h"
  47 #include "mac80211_if.h"
  48
  49 /* PHY SHIM module specific state */
  50 struct wlc_phy_shim_info {
  51         struct wlc_hw_info *wlc_hw;     /* pointer to main wlc_hw structure */
  52         void *wlc;              /* pointer to main wlc structure */
  53         void *wl;               /* pointer to os-specific private state */
  54 };
  55
  56 wlc_phy_shim_info_t *wlc_phy_shim_attach(struct wlc_hw_info *wlc_hw,
  57                                                        void *wl, void *wlc) {
  58         wlc_phy_shim_info_t *physhim = NULL;
  59
  60         physhim = kzalloc(sizeof(wlc_phy_shim_info_t), GFP_ATOMIC);
  61         if (!physhim) {
  62                 wiphy_err(wlc_hw->wlc->wiphy,
  63                           "wl%d: wlc_phy_shim_attach: out of mem\n",
  64                           wlc_hw->unit);
  65                 return NULL;
  66         }
  67         physhim->wlc_hw = wlc_hw;
  68         physhim->wlc = wlc;
  69         physhim->wl = wl;
  70
  71         return physhim;
  72 }
  73
  74 void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim)
  75 {
  76         kfree(physhim);
  77 }
  78
  79 struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim,
  80                                      void (*fn) (void *arg), void *arg,
  81                                      const char *name)
  82 {
  83         return (struct wlapi_timer *)
  84                         brcms_init_timer(physhim->wl, fn, arg, name);
  85 }
  86
  87 void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
  88 {
  89         brcms_free_timer(physhim->wl, (struct brcms_timer *)t);
  90 }
  91
  92 void
  93 wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms,
  94                 int periodic)
  95 {
  96         brcms_add_timer(physhim->wl, (struct brcms_timer *)t, ms, periodic);
  97 }
  98
  99 bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
 100 {
 101         return brcms_del_timer(physhim->wl, (struct brcms_timer *)t);
 102 }
 103
 104 void wlapi_intrson(wlc_phy_shim_info_t *physhim)
 105 {
 106         brcms_intrson(physhim->wl);
 107 }
 108
 109 u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim)
 110 {
 111         return brcms_intrsoff(physhim->wl);
 112 }
 113
 114 void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, u32 macintmask)
 115 {
 116         brcms_intrsrestore(physhim->wl, macintmask);
 117 }
 118
 119 void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, u16 v)
 120 {
 121         wlc_bmac_write_shm(physhim->wlc_hw, offset, v);
 122 }
 123
 124 u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset)
 125 {
 126         return wlc_bmac_read_shm(physhim->wlc_hw, offset);
 127 }
 128
 129 void
 130 wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, u16 mask,
 131                u16 val, int bands)
 132 {
 133         wlc_bmac_mhf(physhim->wlc_hw, idx, mask, val, bands);
 134 }
 135
 136 void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags)
 137 {
 138         wlc_bmac_corereset(physhim->wlc_hw, flags);
 139 }
 140
 141 void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim)
 142 {
 143         wlc_suspend_mac_and_wait(physhim->wlc);
 144 }
 145
 146 void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode)
 147 {
 148         wlc_bmac_switch_macfreq(physhim->wlc_hw, spurmode);
 149 }
 150
 151 void wlapi_enable_mac(wlc_phy_shim_info_t *physhim)
 152 {
 153         wlc_enable_mac(physhim->wlc);
 154 }
 155
 156 void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, u32 val)
 157 {
 158         wlc_bmac_mctrl(physhim->wlc_hw, mask, val);
 159 }
 160
 161 void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim)
 162 {
 163         wlc_bmac_phy_reset(physhim->wlc_hw);
 164 }
 165
 166 void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw)
 167 {
 168         wlc_bmac_bw_set(physhim->wlc_hw, bw);
 169 }
 170
 171 u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim)
 172 {
 173         return wlc_bmac_get_txant(physhim->wlc_hw);
 174 }
 175
 176 void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk)
 177 {
 178         wlc_bmac_phyclk_fgc(physhim->wlc_hw, clk);
 179 }
 180
 181 void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk)
 182 {
 183         wlc_bmac_macphyclk_set(physhim->wlc_hw, clk);
 184 }
 185
 186 void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on)
 187 {
 188         wlc_bmac_core_phypll_ctl(physhim->wlc_hw, on);
 189 }
 190
 191 void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim)
 192 {
 193         wlc_bmac_core_phypll_reset(physhim->wlc_hw);
 194 }
 195
 196 void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t *physhim)
 197 {
 198         wlc_ucode_wake_override_set(physhim->wlc_hw, WLC_WAKE_OVERRIDE_PHYREG);
 199 }
 200
 201 void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t *physhim)
 202 {
 203         wlc_ucode_wake_override_clear(physhim->wlc_hw,
 204                                       WLC_WAKE_OVERRIDE_PHYREG);
 205 }
 206
 207 void
 208 wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int offset,
 209                               int len, void *buf)
 210 {
 211         wlc_bmac_write_template_ram(physhim->wlc_hw, offset, len, buf);
 212 }
 213
 214 u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, u8 rate)
 215 {
 216         return wlc_bmac_rate_shm_offset(physhim->wlc_hw, rate);
 217 }
 218
 219 void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim)
 220 {
 221 }
 222
 223 void
 224 wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint offset, void *buf,
 225                       int len, u32 sel)
 226 {
 227         wlc_bmac_copyfrom_objmem(physhim->wlc_hw, offset, buf, len, sel);
 228 }
 229
 230 void
 231 wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint offset, const void *buf,
 232                     int l, u32 sel)
 233 {
 234         wlc_bmac_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel);
 235 }