drivers/staging/brcm80211/brcmsmac/phy_shim.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 /*
  18  * This is "two-way" interface, acting as the SHIM layer between WL and PHY layer.
  19  *   WL driver can optinally call this translation layer to do some preprocessing, then reach PHY.
  20  *   On the PHY->WL driver direction, all calls go through this layer since PHY doesn't have the
  21  *   access to wlc_hw pointer.
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/module.h>
  26
  27 #include <defs.h>
  28 #include <brcmu_utils.h>
  29 #include <brcmu_wifi.h>
  30 #include <aiutils.h>
  31 #include <chipcommon.h>
  32 #include "dma.h"
  33 #include <pmu.h>
  34
  35 #include "types.h"
  36 #include "d11.h"
  37 #include "rate.h"
  38 #include "scb.h"
  39 #include "pub.h"
  40 #include "phy/phy_hal.h"
  41 #include "channel.h"
  42 #include "srom.h"
  43 #include "key.h"
  44 #include "bottom_mac.h"
  45 #include "phy_hal.h"
  46 #include "main.h"
  47 #include "phy_shim.h"
  48 #include "mac80211_if.h"
  49
  50 /* PHY SHIM module specific state */
  51 struct wlc_phy_shim_info {
  52         struct wlc_hw_info *wlc_hw;     /* pointer to main wlc_hw structure */
  53         void *wlc;              /* pointer to main wlc structure */
  54         void *wl;               /* pointer to os-specific private state */
  55 };
  56
  57 wlc_phy_shim_info_t *wlc_phy_shim_attach(struct wlc_hw_info *wlc_hw,
  58                                                        void *wl, void *wlc) {
  59         wlc_phy_shim_info_t *physhim = NULL;
  60
  61         physhim = kzalloc(sizeof(wlc_phy_shim_info_t), GFP_ATOMIC);
  62         if (!physhim) {
  63                 wiphy_err(wlc_hw->wlc->wiphy,
  64                           "wl%d: wlc_phy_shim_attach: out of mem\n",
  65                           wlc_hw->unit);
  66                 return NULL;
  67         }
  68         physhim->wlc_hw = wlc_hw;
  69         physhim->wlc = wlc;
  70         physhim->wl = wl;
  71
  72         return physhim;
  73 }
  74
  75 void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim)
  76 {
  77         kfree(physhim);
  78 }
  79
  80 struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim,
  81                                      void (*fn) (void *arg), void *arg,
  82                                      const char *name)
  83 {
  84         return (struct wlapi_timer *)
  85                         brcms_init_timer(physhim->wl, fn, arg, name);
  86 }
  87
  88 void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
  89 {
  90         brcms_free_timer(physhim->wl, (struct brcms_timer *)t);
  91 }
  92
  93 void
  94 wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms,
  95                 int periodic)
  96 {
  97         brcms_add_timer(physhim->wl, (struct brcms_timer *)t, ms, periodic);
  98 }
  99
 100 bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
 101 {
 102         return brcms_del_timer(physhim->wl, (struct brcms_timer *)t);
 103 }
 104
 105 void wlapi_intrson(wlc_phy_shim_info_t *physhim)
 106 {
 107         brcms_intrson(physhim->wl);
 108 }
 109
 110 u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim)
 111 {
 112         return brcms_intrsoff(physhim->wl);
 113 }
 114
 115 void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, u32 macintmask)
 116 {
 117         brcms_intrsrestore(physhim->wl, macintmask);
 118 }
 119
 120 void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, u16 v)
 121 {
 122         wlc_bmac_write_shm(physhim->wlc_hw, offset, v);
 123 }
 124
 125 u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset)
 126 {
 127         return wlc_bmac_read_shm(physhim->wlc_hw, offset);
 128 }
 129
 130 void
 131 wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, u16 mask,
 132                u16 val, int bands)
 133 {
 134         wlc_bmac_mhf(physhim->wlc_hw, idx, mask, val, bands);
 135 }
 136
 137 void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags)
 138 {
 139         wlc_bmac_corereset(physhim->wlc_hw, flags);
 140 }
 141
 142 void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim)
 143 {
 144         wlc_suspend_mac_and_wait(physhim->wlc);
 145 }
 146
 147 void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode)
 148 {
 149         wlc_bmac_switch_macfreq(physhim->wlc_hw, spurmode);
 150 }
 151
 152 void wlapi_enable_mac(wlc_phy_shim_info_t *physhim)
 153 {
 154         wlc_enable_mac(physhim->wlc);
 155 }
 156
 157 void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, u32 val)
 158 {
 159         wlc_bmac_mctrl(physhim->wlc_hw, mask, val);
 160 }
 161
 162 void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim)
 163 {
 164         wlc_bmac_phy_reset(physhim->wlc_hw);
 165 }
 166
 167 void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw)
 168 {
 169         wlc_bmac_bw_set(physhim->wlc_hw, bw);
 170 }
 171
 172 u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim)
 173 {
 174         return wlc_bmac_get_txant(physhim->wlc_hw);
 175 }
 176
 177 void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk)
 178 {
 179         wlc_bmac_phyclk_fgc(physhim->wlc_hw, clk);
 180 }
 181
 182 void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk)
 183 {
 184         wlc_bmac_macphyclk_set(physhim->wlc_hw, clk);
 185 }
 186
 187 void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on)
 188 {
 189         wlc_bmac_core_phypll_ctl(physhim->wlc_hw, on);
 190 }
 191
 192 void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim)
 193 {
 194         wlc_bmac_core_phypll_reset(physhim->wlc_hw);
 195 }
 196
 197 void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t *physhim)
 198 {
 199         wlc_ucode_wake_override_set(physhim->wlc_hw, WLC_WAKE_OVERRIDE_PHYREG);
 200 }
 201
 202 void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t *physhim)
 203 {
 204         wlc_ucode_wake_override_clear(physhim->wlc_hw,
 205                                       WLC_WAKE_OVERRIDE_PHYREG);
 206 }
 207
 208 void
 209 wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int offset,
 210                               int len, void *buf)
 211 {
 212         wlc_bmac_write_template_ram(physhim->wlc_hw, offset, len, buf);
 213 }
 214
 215 u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, u8 rate)
 216 {
 217         return wlc_bmac_rate_shm_offset(physhim->wlc_hw, rate);
 218 }
 219
 220 void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim)
 221 {
 222 }
 223
 224 void
 225 wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint offset, void *buf,
 226                       int len, u32 sel)
 227 {
 228         wlc_bmac_copyfrom_objmem(physhim->wlc_hw, offset, buf, len, sel);
 229 }
 230
 231 void
 232 wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint offset, const void *buf,
 233                     int l, u32 sel)
 234 {
 235         wlc_bmac_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel);
 236 }