drivers/staging/brcm80211/brcmsmac/wlc_types.h

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef _wlc_types_h_
  18 #define _wlc_types_h_
  19
  20 /* Bus types */
  21 #define SI_BUS                  0       /* SOC Interconnect */
  22 #define PCI_BUS                 1       /* PCI target */
  23 #define SDIO_BUS                3       /* SDIO target */
  24 #define JTAG_BUS                4       /* JTAG */
  25 #define USB_BUS                 5       /* USB (does not support R/W REG) */
  26 #define SPI_BUS                 6       /* gSPI target */
  27 #define RPC_BUS                 7       /* RPC target */
  28
  29 #define WL_CHAN_FREQ_RANGE_2G      0
  30 #define WL_CHAN_FREQ_RANGE_5GL     1
  31 #define WL_CHAN_FREQ_RANGE_5GM     2
  32 #define WL_CHAN_FREQ_RANGE_5GH     3
  33
  34 #define MAX_DMA_SEGS 4
  35
  36 #define BCMMSG(dev, fmt, args...)               \
  37 do {                                            \
  38         if (brcm_msg_level & LOG_TRACE_VAL)     \
  39                 wiphy_err(dev, "%s: " fmt, __func__, ##args);   \
  40 } while (0)
  41
  42 #define WL_ERROR_ON()           (brcm_msg_level & LOG_ERROR_VAL)
  43
  44 /* register access macros */
  45 #ifndef __BIG_ENDIAN
  46 #ifndef __mips__
  47 #define R_REG(r) \
  48         ({\
  49                 sizeof(*(r)) == sizeof(u8) ? \
  50                 readb((volatile u8*)(r)) : \
  51                 sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \
  52                 readl((volatile u32*)(r)); \
  53         })
  54 #else                           /* __mips__ */
  55 #define R_REG(r) \
  56         ({ \
  57                 __typeof(*(r)) __osl_v; \
  58                 __asm__ __volatile__("sync"); \
  59                 switch (sizeof(*(r))) { \
  60                 case sizeof(u8): \
  61                         __osl_v = readb((volatile u8*)(r)); \
  62                         break; \
  63                 case sizeof(u16): \
  64                         __osl_v = readw((volatile u16*)(r)); \
  65                         break; \
  66                 case sizeof(u32): \
  67                         __osl_v = \
  68                         readl((volatile u32*)(r)); \
  69                         break; \
  70                 } \
  71                 __asm__ __volatile__("sync"); \
  72                 __osl_v; \
  73         })
  74 #endif                          /* __mips__ */
  75
  76 #define W_REG(r, v) do { \
  77                 switch (sizeof(*(r))) { \
  78                 case sizeof(u8): \
  79                         writeb((u8)(v), (volatile u8*)(r)); break; \
  80                 case sizeof(u16): \
  81                         writew((u16)(v), (volatile u16*)(r)); break; \
  82                 case sizeof(u32): \
  83                         writel((u32)(v), (volatile u32*)(r)); break; \
  84                 }; \
  85         } while (0)
  86 #else                           /* __BIG_ENDIAN */
  87 #define R_REG(r) \
  88         ({ \
  89                 __typeof(*(r)) __osl_v; \
  90                 switch (sizeof(*(r))) { \
  91                 case sizeof(u8): \
  92                         __osl_v = \
  93                         readb((volatile u8*)((r)^3)); \
  94                         break; \
  95                 case sizeof(u16): \
  96                         __osl_v = \
  97                         readw((volatile u16*)((r)^2)); \
  98                         break; \
  99                 case sizeof(u32): \
 100                         __osl_v = readl((volatile u32*)(r)); \
 101                         break; \
 102                 } \
 103                 __osl_v; \
 104         })
 105
 106 #define W_REG(r, v) do { \
 107                 switch (sizeof(*(r))) { \
 108                 case sizeof(u8):        \
 109                         writeb((u8)(v), \
 110                         (volatile u8*)((r)^3)); break; \
 111                 case sizeof(u16):       \
 112                         writew((u16)(v), \
 113                         (volatile u16*)((r)^2)); break; \
 114                 case sizeof(u32):       \
 115                         writel((u32)(v), \
 116                         (volatile u32*)(r)); break; \
 117                 } \
 118         } while (0)
 119 #endif                          /* __BIG_ENDIAN */
 120
 121 #ifdef __mips__
 122 /*
 123  * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
 124  * transactions. As a fix, a read after write is performed on certain places
 125  * in the code. Older chips and the newer 5357 family don't require this fix.
 126  */
 127 #define W_REG_FLUSH(r, v)       ({ W_REG((r), (v)); (void)R_REG(r); })
 128 #else
 129 #define W_REG_FLUSH(r, v)       W_REG((r), (v))
 130 #endif                          /* __mips__ */
 131
 132 #define AND_REG(r, v)   W_REG((r), R_REG(r) & (v))
 133 #define OR_REG(r, v)    W_REG((r), R_REG(r) | (v))
 134
 135 #define SET_REG(r, mask, val) \
 136                 W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
 137
 138 /* forward declarations */
 139 struct sk_buff;
 140 struct brcms_info;
 141 struct wlc_info;
 142 struct wlc_hw_info;
 143 struct wlc_if;
 144 struct brcms_if;
 145 struct ampdu_info;
 146 struct antsel_info;
 147 struct bmac_pmq;
 148 struct d11init;
 149 struct dma_pub;
 150 struct wlc_bsscfg;
 151 struct brcmu_strbuf;
 152 struct si_pub;
 153
 154 /* brcm_msg_level is a bit vector with defs in bcmdefs.h */
 155 extern u32 brcm_msg_level;
 156
 157 #endif                          /* _wlc_types_h_ */