2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/kernel.h>
21 #include <linux/string.h>
24 #include <linux/bitops.h>
27 #include <wlc_phy_radio.h>
28 #include <wlc_phy_int.h>
29 #include <wlc_phy_lcn.h>
30 #include <wlc_phytbl_lcn.h>
32 #define PLL_2064_NDIV 90
33 #define PLL_2064_LOW_END_VCO 3000
34 #define PLL_2064_LOW_END_KVCO 27
35 #define PLL_2064_HIGH_END_VCO 4200
36 #define PLL_2064_HIGH_END_KVCO 68
37 #define PLL_2064_LOOP_BW_DOUBLER 200
38 #define PLL_2064_D30_DOUBLER 10500
39 #define PLL_2064_LOOP_BW 260
40 #define PLL_2064_D30 8000
41 #define PLL_2064_CAL_REF_TO 8
42 #define PLL_2064_MHZ 1000000
43 #define PLL_2064_OPEN_LOOP_DELAY 5
48 #define NOISE_IF_UPD_CHK_INTERVAL 1
49 #define NOISE_IF_UPD_RST_INTERVAL 60
50 #define NOISE_IF_UPD_THRESHOLD_CNT 1
51 #define NOISE_IF_UPD_TRHRESHOLD 50
52 #define NOISE_IF_UPD_TIMEOUT 1000
53 #define NOISE_IF_OFF 0
54 #define NOISE_IF_CHK 1
57 #define PAPD_BLANKING_PROFILE 3
59 #define PAPD_CORR_NORM 0
60 #define PAPD_BLANKING_THRESHOLD 0
61 #define PAPD_STOP_AFTER_LAST_UPDATE 0
63 #define LCN_TARGET_PWR 60
65 #define LCN_VBAT_OFFSET_433X 34649679
66 #define LCN_VBAT_SLOPE_433X 8258032
68 #define LCN_VBAT_SCALE_NOM 53
69 #define LCN_VBAT_SCALE_DEN 432
71 #define LCN_TEMPSENSE_OFFSET 80812
72 #define LCN_TEMPSENSE_DEN 2647
74 #define LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT \
76 #define LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK \
77 (0x7f << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT)
79 #define LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT \
81 #define LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK \
82 (0x7f << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT)
84 #define wlc_lcnphy_enable_tx_gain_override(pi) \
85 wlc_lcnphy_set_tx_gain_override(pi, true)
86 #define wlc_lcnphy_disable_tx_gain_override(pi) \
87 wlc_lcnphy_set_tx_gain_override(pi, false)
89 #define wlc_lcnphy_iqcal_active(pi) \
90 (read_phy_reg((pi), 0x451) & \
91 ((0x1 << 15) | (0x1 << 14)))
93 #define txpwrctrl_off(pi) (0x7 != ((read_phy_reg(pi, 0x4a4) & 0xE000) >> 13))
94 #define wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) \
95 (pi->temppwrctrl_capable)
96 #define wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) \
97 (pi->hwpwrctrl_capable)
99 #define SWCTRL_BT_TX 0x18
100 #define SWCTRL_OVR_DISABLE 0x40
102 #define AFE_CLK_INIT_MODE_TXRX2X 1
103 #define AFE_CLK_INIT_MODE_PAPD 0
105 #define LCNPHY_TBL_ID_IQLOCAL 0x00
107 #define LCNPHY_TBL_ID_RFSEQ 0x08
108 #define LCNPHY_TBL_ID_GAIN_IDX 0x0d
109 #define LCNPHY_TBL_ID_SW_CTRL 0x0f
110 #define LCNPHY_TBL_ID_GAIN_TBL 0x12
111 #define LCNPHY_TBL_ID_SPUR 0x14
112 #define LCNPHY_TBL_ID_SAMPLEPLAY 0x15
113 #define LCNPHY_TBL_ID_SAMPLEPLAY1 0x16
115 #define LCNPHY_TX_PWR_CTRL_RATE_OFFSET 832
116 #define LCNPHY_TX_PWR_CTRL_MAC_OFFSET 128
117 #define LCNPHY_TX_PWR_CTRL_GAIN_OFFSET 192
118 #define LCNPHY_TX_PWR_CTRL_IQ_OFFSET 320
119 #define LCNPHY_TX_PWR_CTRL_LO_OFFSET 448
120 #define LCNPHY_TX_PWR_CTRL_PWR_OFFSET 576
122 #define LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313 140
124 #define LCNPHY_TX_PWR_CTRL_START_NPT 1
125 #define LCNPHY_TX_PWR_CTRL_MAX_NPT 7
127 #define LCNPHY_NOISE_SAMPLES_DEFAULT 5000
129 #define LCNPHY_ACI_DETECT_START 1
130 #define LCNPHY_ACI_DETECT_PROGRESS 2
131 #define LCNPHY_ACI_DETECT_STOP 3
133 #define LCNPHY_ACI_CRSHIFRMLO_TRSH 100
134 #define LCNPHY_ACI_GLITCH_TRSH 2000
135 #define LCNPHY_ACI_TMOUT 250
136 #define LCNPHY_ACI_DETECT_TIMEOUT 2
137 #define LCNPHY_ACI_START_DELAY 0
139 #define wlc_lcnphy_tx_gain_override_enabled(pi) \
140 (0 != (read_phy_reg((pi), 0x43b) & (0x1 << 6)))
142 #define wlc_lcnphy_total_tx_frames(pi) \
143 wlapi_bmac_read_shm((pi)->sh->physhim, M_UCODE_MACSTAT + offsetof(macstat_t, txallfrm))
161 lcnphy_txgains_t gains;
164 } lcnphy_txcalgains_t;
170 } lcnphy_rx_iqcomp_t;
180 } lcnphy_unsign16_struct;
196 } lcnphy_papd_cal_type_t;
198 typedef u16 iqcal_gain_params_lcnphy[9];
200 static const iqcal_gain_params_lcnphy tbl_iqcal_gainparams_lcnphy_2G[] = {
201 {0, 0, 0, 0, 0, 0, 0, 0, 0},
204 static const iqcal_gain_params_lcnphy *tbl_iqcal_gainparams_lcnphy[1] = {
205 tbl_iqcal_gainparams_lcnphy_2G,
208 static const u16 iqcal_gainparams_numgains_lcnphy[1] = {
209 sizeof(tbl_iqcal_gainparams_lcnphy_2G) /
210 sizeof(*tbl_iqcal_gainparams_lcnphy_2G),
213 static const lcnphy_sfo_cfg_t lcnphy_sfo_cfg[] = {
231 u16 lcnphy_iqcal_loft_gainladder[] = {
255 u16 lcnphy_iqcal_ir_gainladder[] = {
279 lcnphy_spb_tone_t lcnphy_spb_tone_3750[] = {
315 u16 iqlo_loopback_rf_regs[20] = {
339 u16 tempsense_phy_regs[14] = {
357 u16 rxiq_cal_rf_reg[11] = {
372 lcnphy_rx_iqcomp_t lcnphy_rx_iqcomp_table_rev0[] = {
426 static const u32 lcnphy_23bitgaincode_table[] = {
466 static const s8 lcnphy_gain_table[] = {
506 static const s8 lcnphy_gain_index_offset_for_rssi[] = {
547 extern const u8 spur_tbl_rev0[];
548 extern const u32 dot11lcnphytbl_rx_gain_info_sz_rev1;
549 extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[];
550 extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa;
551 extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250;
553 typedef struct _chan_info_2064_lcnphy {
558 u8 txrf_mix_tune_ctrl;
561 u8 pa_rxrf_lna1_freq_tune;
562 u8 pa_rxrf_lna2_freq_tune;
564 } chan_info_2064_lcnphy_t;
566 static chan_info_2064_lcnphy_t chan_info_2064_lcnphy[] = {
567 {1, 2412, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
568 {2, 2417, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
569 {3, 2422, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
570 {4, 2427, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
571 {5, 2432, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
572 {6, 2437, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
573 {7, 2442, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
574 {8, 2447, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
575 {9, 2452, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
576 {10, 2457, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
577 {11, 2462, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
578 {12, 2467, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
579 {13, 2472, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
580 {14, 2484, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
583 lcnphy_radio_regs_t lcnphy_radio_regs_2064[] = {
585 {0x01, 0x64, 0x64, 0, 0},
586 {0x02, 0x20, 0x20, 0, 0},
587 {0x03, 0x66, 0x66, 0, 0},
588 {0x04, 0xf8, 0xf8, 0, 0},
590 {0x06, 0x10, 0x10, 0, 0},
594 {0x0A, 0x37, 0x37, 0, 0},
595 {0x0B, 0x6, 0x6, 0, 0},
596 {0x0C, 0x55, 0x55, 0, 0},
597 {0x0D, 0x8b, 0x8b, 0, 0},
599 {0x0F, 0x5, 0x5, 0, 0},
601 {0x11, 0xe, 0xe, 0, 0},
603 {0x13, 0xb, 0xb, 0, 0},
604 {0x14, 0x2, 0x2, 0, 0},
605 {0x15, 0x12, 0x12, 0, 0},
606 {0x16, 0x12, 0x12, 0, 0},
607 {0x17, 0xc, 0xc, 0, 0},
608 {0x18, 0xc, 0xc, 0, 0},
609 {0x19, 0xc, 0xc, 0, 0},
610 {0x1A, 0x8, 0x8, 0, 0},
611 {0x1B, 0x2, 0x2, 0, 0},
613 {0x1D, 0x1, 0x1, 0, 0},
614 {0x1E, 0x12, 0x12, 0, 0},
615 {0x1F, 0x6e, 0x6e, 0, 0},
616 {0x20, 0x2, 0x2, 0, 0},
617 {0x21, 0x23, 0x23, 0, 0},
618 {0x22, 0x8, 0x8, 0, 0},
621 {0x25, 0xc, 0xc, 0, 0},
622 {0x26, 0x33, 0x33, 0, 0},
623 {0x27, 0x55, 0x55, 0, 0},
625 {0x29, 0x30, 0x30, 0, 0},
626 {0x2A, 0xb, 0xb, 0, 0},
627 {0x2B, 0x1b, 0x1b, 0, 0},
628 {0x2C, 0x3, 0x3, 0, 0},
629 {0x2D, 0x1b, 0x1b, 0, 0},
631 {0x2F, 0x20, 0x20, 0, 0},
632 {0x30, 0xa, 0xa, 0, 0},
634 {0x32, 0x62, 0x62, 0, 0},
635 {0x33, 0x19, 0x19, 0, 0},
636 {0x34, 0x33, 0x33, 0, 0},
637 {0x35, 0x77, 0x77, 0, 0},
639 {0x37, 0x70, 0x70, 0, 0},
640 {0x38, 0x3, 0x3, 0, 0},
641 {0x39, 0xf, 0xf, 0, 0},
642 {0x3A, 0x6, 0x6, 0, 0},
643 {0x3B, 0xcf, 0xcf, 0, 0},
644 {0x3C, 0x1a, 0x1a, 0, 0},
645 {0x3D, 0x6, 0x6, 0, 0},
646 {0x3E, 0x42, 0x42, 0, 0},
648 {0x40, 0xfb, 0xfb, 0, 0},
649 {0x41, 0x9a, 0x9a, 0, 0},
650 {0x42, 0x7a, 0x7a, 0, 0},
651 {0x43, 0x29, 0x29, 0, 0},
653 {0x45, 0x8, 0x8, 0, 0},
654 {0x46, 0xce, 0xce, 0, 0},
655 {0x47, 0x27, 0x27, 0, 0},
656 {0x48, 0x62, 0x62, 0, 0},
657 {0x49, 0x6, 0x6, 0, 0},
658 {0x4A, 0x58, 0x58, 0, 0},
659 {0x4B, 0xf7, 0xf7, 0, 0},
661 {0x4D, 0xb3, 0xb3, 0, 0},
663 {0x4F, 0x2, 0x2, 0, 0},
665 {0x51, 0x9, 0x9, 0, 0},
666 {0x52, 0x5, 0x5, 0, 0},
667 {0x53, 0x17, 0x17, 0, 0},
668 {0x54, 0x38, 0x38, 0, 0},
671 {0x57, 0xb, 0xb, 0, 0},
678 {0x5E, 0x88, 0x88, 0, 0},
679 {0x5F, 0xcc, 0xcc, 0, 0},
680 {0x60, 0x74, 0x74, 0, 0},
681 {0x61, 0x74, 0x74, 0, 0},
682 {0x62, 0x74, 0x74, 0, 0},
683 {0x63, 0x44, 0x44, 0, 0},
684 {0x64, 0x77, 0x77, 0, 0},
685 {0x65, 0x44, 0x44, 0, 0},
686 {0x66, 0x77, 0x77, 0, 0},
687 {0x67, 0x55, 0x55, 0, 0},
688 {0x68, 0x77, 0x77, 0, 0},
689 {0x69, 0x77, 0x77, 0, 0},
691 {0x6B, 0x7f, 0x7f, 0, 0},
692 {0x6C, 0x8, 0x8, 0, 0},
694 {0x6E, 0x88, 0x88, 0, 0},
695 {0x6F, 0x66, 0x66, 0, 0},
696 {0x70, 0x66, 0x66, 0, 0},
697 {0x71, 0x28, 0x28, 0, 0},
698 {0x72, 0x55, 0x55, 0, 0},
699 {0x73, 0x4, 0x4, 0, 0},
703 {0x77, 0x1, 0x1, 0, 0},
704 {0x78, 0xd6, 0xd6, 0, 0},
715 {0x83, 0xb4, 0xb4, 0, 0},
716 {0x84, 0x1, 0x1, 0, 0},
717 {0x85, 0x20, 0x20, 0, 0},
718 {0x86, 0x5, 0x5, 0, 0},
719 {0x87, 0xff, 0xff, 0, 0},
720 {0x88, 0x7, 0x7, 0, 0},
721 {0x89, 0x77, 0x77, 0, 0},
722 {0x8A, 0x77, 0x77, 0, 0},
723 {0x8B, 0x77, 0x77, 0, 0},
724 {0x8C, 0x77, 0x77, 0, 0},
725 {0x8D, 0x8, 0x8, 0, 0},
726 {0x8E, 0xa, 0xa, 0, 0},
727 {0x8F, 0x8, 0x8, 0, 0},
728 {0x90, 0x18, 0x18, 0, 0},
729 {0x91, 0x5, 0x5, 0, 0},
730 {0x92, 0x1f, 0x1f, 0, 0},
731 {0x93, 0x10, 0x10, 0, 0},
732 {0x94, 0x3, 0x3, 0, 0},
735 {0x97, 0xaa, 0xaa, 0, 0},
737 {0x99, 0x23, 0x23, 0, 0},
738 {0x9A, 0x7, 0x7, 0, 0},
739 {0x9B, 0xf, 0xf, 0, 0},
740 {0x9C, 0x10, 0x10, 0, 0},
741 {0x9D, 0x3, 0x3, 0, 0},
742 {0x9E, 0x4, 0x4, 0, 0},
743 {0x9F, 0x20, 0x20, 0, 0},
748 {0xA4, 0x1, 0x1, 0, 0},
749 {0xA5, 0x77, 0x77, 0, 0},
750 {0xA6, 0x77, 0x77, 0, 0},
751 {0xA7, 0x77, 0x77, 0, 0},
752 {0xA8, 0x77, 0x77, 0, 0},
753 {0xA9, 0x8c, 0x8c, 0, 0},
754 {0xAA, 0x88, 0x88, 0, 0},
755 {0xAB, 0x78, 0x78, 0, 0},
756 {0xAC, 0x57, 0x57, 0, 0},
757 {0xAD, 0x88, 0x88, 0, 0},
759 {0xAF, 0x8, 0x8, 0, 0},
760 {0xB0, 0x88, 0x88, 0, 0},
762 {0xB2, 0x1b, 0x1b, 0, 0},
763 {0xB3, 0x3, 0x3, 0, 0},
764 {0xB4, 0x24, 0x24, 0, 0},
765 {0xB5, 0x3, 0x3, 0, 0},
766 {0xB6, 0x1b, 0x1b, 0, 0},
767 {0xB7, 0x24, 0x24, 0, 0},
768 {0xB8, 0x3, 0x3, 0, 0},
770 {0xBA, 0xaa, 0xaa, 0, 0},
772 {0xBC, 0x4, 0x4, 0, 0},
774 {0xBE, 0x8, 0x8, 0, 0},
775 {0xBF, 0x11, 0x11, 0, 0},
778 {0xC2, 0x62, 0x62, 0, 0},
779 {0xC3, 0x1e, 0x1e, 0, 0},
780 {0xC4, 0x33, 0x33, 0, 0},
781 {0xC5, 0x37, 0x37, 0, 0},
783 {0xC7, 0x70, 0x70, 0, 0},
784 {0xC8, 0x1e, 0x1e, 0, 0},
785 {0xC9, 0x6, 0x6, 0, 0},
786 {0xCA, 0x4, 0x4, 0, 0},
787 {0xCB, 0x2f, 0x2f, 0, 0},
788 {0xCC, 0xf, 0xf, 0, 0},
790 {0xCE, 0xff, 0xff, 0, 0},
791 {0xCF, 0x8, 0x8, 0, 0},
792 {0xD0, 0x3f, 0x3f, 0, 0},
793 {0xD1, 0x3f, 0x3f, 0, 0},
794 {0xD2, 0x3f, 0x3f, 0, 0},
798 {0xD6, 0xcc, 0xcc, 0, 0},
800 {0xD8, 0x8, 0x8, 0, 0},
801 {0xD9, 0x8, 0x8, 0, 0},
802 {0xDA, 0x8, 0x8, 0, 0},
803 {0xDB, 0x11, 0x11, 0, 0},
805 {0xDD, 0x87, 0x87, 0, 0},
806 {0xDE, 0x88, 0x88, 0, 0},
807 {0xDF, 0x8, 0x8, 0, 0},
808 {0xE0, 0x8, 0x8, 0, 0},
809 {0xE1, 0x8, 0x8, 0, 0},
813 {0xE5, 0xf5, 0xf5, 0, 0},
814 {0xE6, 0x30, 0x30, 0, 0},
815 {0xE7, 0x1, 0x1, 0, 0},
817 {0xE9, 0xff, 0xff, 0, 0},
820 {0xEC, 0x22, 0x22, 0, 0},
824 {0xF0, 0x3, 0x3, 0, 0},
825 {0xF1, 0x1, 0x1, 0, 0},
831 {0xF7, 0x6, 0x6, 0, 0},
834 {0xFA, 0x40, 0x40, 0, 0},
836 {0xFC, 0x1, 0x1, 0, 0},
837 {0xFD, 0x80, 0x80, 0, 0},
838 {0xFE, 0x2, 0x2, 0, 0},
839 {0xFF, 0x10, 0x10, 0, 0},
840 {0x100, 0x2, 0x2, 0, 0},
841 {0x101, 0x1e, 0x1e, 0, 0},
842 {0x102, 0x1e, 0x1e, 0, 0},
844 {0x104, 0x1f, 0x1f, 0, 0},
845 {0x105, 0, 0x8, 0, 1},
846 {0x106, 0x2a, 0x2a, 0, 0},
847 {0x107, 0xf, 0xf, 0, 0},
868 {0x11C, 0x1, 0x1, 0, 0},
874 {0x122, 0x80, 0x80, 0, 0},
876 {0x124, 0xf8, 0xf8, 0, 0},
892 #define LCNPHY_NUM_DIG_FILT_COEFFS 16
893 #define LCNPHY_NUM_TX_DIG_FILTERS_CCK 13
896 LCNPHY_txdigfiltcoeffs_cck[LCNPHY_NUM_TX_DIG_FILTERS_CCK]
897 [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = {
898 {0, 1, 415, 1874, 64, 128, 64, 792, 1656, 64, 128, 64, 778, 1582, 64,
900 {1, 1, 402, 1847, 259, 59, 259, 671, 1794, 68, 54, 68, 608, 1863, 93,
902 {2, 1, 415, 1874, 64, 128, 64, 792, 1656, 192, 384, 192, 778, 1582, 64,
904 {3, 1, 302, 1841, 129, 258, 129, 658, 1720, 205, 410, 205, 754, 1760,
906 {20, 1, 360, 1884, 242, 1734, 242, 752, 1720, 205, 1845, 205, 767, 1760,
908 {21, 1, 360, 1884, 149, 1874, 149, 752, 1720, 205, 1883, 205, 767, 1760,
910 {22, 1, 360, 1884, 98, 1948, 98, 752, 1720, 205, 1924, 205, 767, 1760,
912 {23, 1, 350, 1884, 116, 1966, 116, 752, 1720, 205, 2008, 205, 767, 1760,
914 {24, 1, 325, 1884, 32, 40, 32, 756, 1720, 256, 471, 256, 766, 1760, 256,
916 {25, 1, 299, 1884, 51, 64, 51, 736, 1720, 256, 471, 256, 765, 1760, 256,
918 {26, 1, 277, 1943, 39, 117, 88, 637, 1838, 64, 192, 144, 614, 1864, 128,
920 {27, 1, 245, 1943, 49, 147, 110, 626, 1838, 256, 768, 576, 613, 1864,
922 {30, 1, 302, 1841, 61, 122, 61, 658, 1720, 205, 410, 205, 754, 1760,
926 #define LCNPHY_NUM_TX_DIG_FILTERS_OFDM 3
928 LCNPHY_txdigfiltcoeffs_ofdm[LCNPHY_NUM_TX_DIG_FILTERS_OFDM]
929 [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = {
930 {0, 0, 0xa2, 0x0, 0x100, 0x100, 0x0, 0x0, 0x0, 0x100, 0x0, 0x0,
931 0x278, 0xfea0, 0x80, 0x100, 0x80,},
932 {1, 0, 374, 0xFF79, 16, 32, 16, 799, 0xFE74, 50, 32, 50,
933 750, 0xFE2B, 212, 0xFFCE, 212,},
934 {2, 0, 375, 0xFF16, 37, 76, 37, 799, 0xFE74, 32, 20, 32, 748,
935 0xFEF2, 128, 0xFFE2, 128}
938 #define wlc_lcnphy_set_start_tx_pwr_idx(pi, idx) \
939 mod_phy_reg(pi, 0x4a4, \
943 #define wlc_lcnphy_set_tx_pwr_npt(pi, npt) \
944 mod_phy_reg(pi, 0x4a5, \
948 #define wlc_lcnphy_get_tx_pwr_ctrl(pi) \
949 (read_phy_reg((pi), 0x4a4) & \
954 #define wlc_lcnphy_get_tx_pwr_npt(pi) \
955 ((read_phy_reg(pi, 0x4a5) & \
959 #define wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi) \
960 (read_phy_reg(pi, 0x473) & 0x1ff)
962 #define wlc_lcnphy_get_target_tx_pwr(pi) \
963 ((read_phy_reg(pi, 0x4a7) & \
967 #define wlc_lcnphy_set_target_tx_pwr(pi, target) \
968 mod_phy_reg(pi, 0x4a7, \
972 #define wlc_radio_2064_rcal_done(pi) (0 != (read_radio_reg(pi, RADIO_2064_REG05C) & 0x20))
973 #define tempsense_done(pi) (0x8000 == (read_phy_reg(pi, 0x476) & 0x8000))
975 #define LCNPHY_IQLOCC_READ(val) ((u8)(-(s8)(((val) & 0xf0) >> 4) + (s8)((val) & 0x0f)))
976 #define FIXED_TXPWR 78
977 #define LCNPHY_TEMPSENSE(val) ((s16)((val > 255) ? (val - 512) : val))
979 static u32 wlc_lcnphy_qdiv_roundup(u32 divident, u32 divisor,
981 static void wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi,
982 u16 ext_lna, u16 trsw,
986 static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi);
987 static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain);
988 static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx);
989 static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0);
990 static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi);
991 static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains);
992 static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable);
993 static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi);
994 static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable);
995 static void wlc_lcnphy_set_tx_gain(phy_info_t *pi,
996 lcnphy_txgains_t *target_gains);
997 static bool wlc_lcnphy_rx_iq_est(phy_info_t *pi, u16 num_samps,
998 u8 wait_time, lcnphy_iq_est_t *iq_est);
999 static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps);
1000 static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi);
1001 static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode);
1002 extern void wlc_lcnphy_tx_pwr_ctrl_init(wlc_phy_t *ppi);
1003 static void wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi,
1006 static void wlc_lcnphy_load_tx_gain_table(phy_info_t *pi,
1007 const lcnphy_tx_gain_tbl_entry *g);
1009 static void wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo,
1010 u16 thresh, s16 *ptr, int mode);
1011 static int wlc_lcnphy_calc_floor(s16 coeff, int type);
1012 static void wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi,
1013 u16 *values_to_save);
1014 static void wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi,
1015 u16 *values_to_save);
1016 static void wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x,
1018 static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type);
1019 static void wlc_lcnphy_a1(phy_info_t *pi, int cal_type,
1020 int num_levels, int step_size_lg2);
1021 static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi);
1023 static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi,
1024 chanspec_t chanspec);
1025 static void wlc_lcnphy_agc_temp_init(phy_info_t *pi);
1026 static void wlc_lcnphy_temp_adj(phy_info_t *pi);
1027 static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi);
1028 static void wlc_lcnphy_baseband_init(phy_info_t *pi);
1029 static void wlc_lcnphy_radio_init(phy_info_t *pi);
1030 static void wlc_lcnphy_rc_cal(phy_info_t *pi);
1031 static void wlc_lcnphy_rcal(phy_info_t *pi);
1032 static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable);
1033 static int wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm,
1035 static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b);
1037 void wlc_lcnphy_write_table(phy_info_t *pi, const phytbl_info_t *pti)
1039 wlc_phy_write_table(pi, pti, 0x455, 0x457, 0x456);
1042 void wlc_lcnphy_read_table(phy_info_t *pi, phytbl_info_t *pti)
1044 wlc_phy_read_table(pi, pti, 0x455, 0x457, 0x456);
1048 wlc_lcnphy_common_read_table(phy_info_t *pi, u32 tbl_id,
1049 const void *tbl_ptr, u32 tbl_len,
1050 u32 tbl_width, u32 tbl_offset)
1053 tab.tbl_id = tbl_id;
1054 tab.tbl_ptr = tbl_ptr;
1055 tab.tbl_len = tbl_len;
1056 tab.tbl_width = tbl_width;
1057 tab.tbl_offset = tbl_offset;
1058 wlc_lcnphy_read_table(pi, &tab);
1062 wlc_lcnphy_common_write_table(phy_info_t *pi, u32 tbl_id,
1063 const void *tbl_ptr, u32 tbl_len,
1064 u32 tbl_width, u32 tbl_offset)
1068 tab.tbl_id = tbl_id;
1069 tab.tbl_ptr = tbl_ptr;
1070 tab.tbl_len = tbl_len;
1071 tab.tbl_width = tbl_width;
1072 tab.tbl_offset = tbl_offset;
1073 wlc_lcnphy_write_table(pi, &tab);
1077 wlc_lcnphy_qdiv_roundup(u32 dividend, u32 divisor, u8 precision)
1079 u32 quotient, remainder, roundup, rbit;
1083 quotient = dividend / divisor;
1084 remainder = dividend % divisor;
1086 roundup = (divisor >> 1) + rbit;
1088 while (precision--) {
1090 if (remainder >= roundup) {
1092 remainder = ((remainder - roundup) << 1) + rbit;
1098 if (remainder >= roundup)
1104 static int wlc_lcnphy_calc_floor(s16 coeff_x, int type)
1110 k = (coeff_x - 1) / 2;
1116 if ((coeff_x + 1) < 0)
1119 k = (coeff_x + 1) / 2;
1124 s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi)
1127 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1129 if (txpwrctrl_off(pi))
1130 index = pi_lcn->lcnphy_current_index;
1131 else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
1133 (s8) (wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi)
1136 index = pi_lcn->lcnphy_current_index;
1140 static u32 wlc_lcnphy_measure_digital_power(phy_info_t *pi, u16 nsamples)
1142 lcnphy_iq_est_t iq_est = { 0, 0, 0 };
1144 if (!wlc_lcnphy_rx_iq_est(pi, nsamples, 32, &iq_est))
1146 return (iq_est.i_pwr + iq_est.q_pwr) / nsamples;
1149 void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel)
1151 u16 afectrlovr, afectrlovrval;
1152 afectrlovr = read_phy_reg(pi, 0x43b);
1153 afectrlovrval = read_phy_reg(pi, 0x43c);
1155 mod_phy_reg(pi, 0x43b, (0x1 << 1), (1) << 1);
1157 mod_phy_reg(pi, 0x43c, (0x1 << 1), (0) << 1);
1159 mod_phy_reg(pi, 0x43b, (0x1 << 4), (1) << 4);
1161 mod_phy_reg(pi, 0x43c, (0x1 << 6), (0) << 6);
1163 write_phy_reg(pi, 0x44b, 0xffff);
1164 wlc_lcnphy_tx_pu(pi, 1);
1166 mod_phy_reg(pi, 0x634, (0xff << 8), (0) << 8);
1168 or_phy_reg(pi, 0x6da, 0x0080);
1170 or_phy_reg(pi, 0x00a, 0x228);
1172 and_phy_reg(pi, 0x00a, ~(0x228));
1174 and_phy_reg(pi, 0x6da, 0xFF7F);
1175 write_phy_reg(pi, 0x43b, afectrlovr);
1176 write_phy_reg(pi, 0x43c, afectrlovrval);
1180 static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi)
1182 u16 save_AfeCtrlOvrVal, save_AfeCtrlOvr;
1184 save_AfeCtrlOvrVal = read_phy_reg(pi, 0x43c);
1185 save_AfeCtrlOvr = read_phy_reg(pi, 0x43b);
1187 write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal | 0x1);
1188 write_phy_reg(pi, 0x43b, save_AfeCtrlOvr | 0x1);
1190 write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal & 0xfffe);
1191 write_phy_reg(pi, 0x43b, save_AfeCtrlOvr & 0xfffe);
1193 write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal);
1194 write_phy_reg(pi, 0x43b, save_AfeCtrlOvr);
1197 static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable)
1200 write_phy_reg(pi, 0x942, 0x7);
1201 write_phy_reg(pi, 0x93b, ((1 << 13) + 23));
1202 write_phy_reg(pi, 0x93c, ((1 << 13) + 1989));
1204 write_phy_reg(pi, 0x44a, 0x084);
1205 write_phy_reg(pi, 0x44a, 0x080);
1206 write_phy_reg(pi, 0x6d3, 0x2222);
1207 write_phy_reg(pi, 0x6d3, 0x2220);
1209 write_phy_reg(pi, 0x942, 0x0);
1210 write_phy_reg(pi, 0x93b, ((0 << 13) + 23));
1211 write_phy_reg(pi, 0x93c, ((0 << 13) + 1989));
1213 wlapi_switch_macfreq(pi->sh->physhim, enable);
1216 void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec)
1218 u8 channel = CHSPEC_CHANNEL(chanspec);
1220 wlc_phy_chanspec_radio_set((wlc_phy_t *) pi, chanspec);
1222 wlc_lcnphy_set_chanspec_tweaks(pi, pi->radio_chanspec);
1224 or_phy_reg(pi, 0x44a, 0x44);
1225 write_phy_reg(pi, 0x44a, 0x80);
1227 if (!NORADIO_ENAB(pi->pubpi)) {
1228 wlc_lcnphy_radio_2064_channel_tune_4313(pi, channel);
1232 wlc_lcnphy_toggle_afe_pwdn(pi);
1234 write_phy_reg(pi, 0x657, lcnphy_sfo_cfg[channel - 1].ptcentreTs20);
1235 write_phy_reg(pi, 0x658, lcnphy_sfo_cfg[channel - 1].ptcentreFactor);
1237 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) {
1238 mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);
1240 wlc_lcnphy_load_tx_iir_filter(pi, false, 3);
1242 mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);
1244 wlc_lcnphy_load_tx_iir_filter(pi, false, 2);
1247 wlc_lcnphy_load_tx_iir_filter(pi, true, 0);
1249 mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3);
1253 static void wlc_lcnphy_set_dac_gain(phy_info_t *pi, u16 dac_gain)
1257 dac_ctrl = (read_phy_reg(pi, 0x439) >> 0);
1258 dac_ctrl = dac_ctrl & 0xc7f;
1259 dac_ctrl = dac_ctrl | (dac_gain << 7);
1260 mod_phy_reg(pi, 0x439, (0xfff << 0), (dac_ctrl) << 0);
1264 static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable)
1266 u16 bit = bEnable ? 1 : 0;
1268 mod_phy_reg(pi, 0x4b0, (0x1 << 7), bit << 7);
1270 mod_phy_reg(pi, 0x4b0, (0x1 << 14), bit << 14);
1272 mod_phy_reg(pi, 0x43b, (0x1 << 6), bit << 6);
1275 static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi)
1279 pa_gain = (read_phy_reg(pi, 0x4fb) &
1280 LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK) >>
1281 LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT;
1287 wlc_lcnphy_set_tx_gain(phy_info_t *pi, lcnphy_txgains_t *target_gains)
1289 u16 pa_gain = wlc_lcnphy_get_pa_gain(pi);
1291 mod_phy_reg(pi, 0x4b5,
1293 ((target_gains->gm_gain) | (target_gains->pga_gain << 8)) <<
1295 mod_phy_reg(pi, 0x4fb,
1297 ((target_gains->pad_gain) | (pa_gain << 8)) << 0);
1299 mod_phy_reg(pi, 0x4fc,
1301 ((target_gains->gm_gain) | (target_gains->pga_gain << 8)) <<
1303 mod_phy_reg(pi, 0x4fd,
1305 ((target_gains->pad_gain) | (pa_gain << 8)) << 0);
1307 wlc_lcnphy_set_dac_gain(pi, target_gains->dac_gain);
1309 wlc_lcnphy_enable_tx_gain_override(pi);
1312 static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0)
1314 u16 m0m1 = (u16) m0 << 8;
1317 tab.tbl_ptr = &m0m1;
1319 tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
1320 tab.tbl_offset = 87;
1322 wlc_lcnphy_write_table(pi, &tab);
1325 static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi)
1330 bzero(data_buf, sizeof(data_buf));
1332 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
1334 tab.tbl_ptr = data_buf;
1336 if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
1339 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
1340 wlc_lcnphy_write_table(pi, &tab);
1344 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_MAC_OFFSET;
1345 wlc_lcnphy_write_table(pi, &tab);
1350 LCNPHY_TSSI_POST_PA,
1352 } lcnphy_tssi_mode_t;
1354 static void wlc_lcnphy_set_tssi_mux(phy_info_t *pi, lcnphy_tssi_mode_t pos)
1356 mod_phy_reg(pi, 0x4d7, (0x1 << 0), (0x1) << 0);
1358 mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1) << 6);
1360 if (LCNPHY_TSSI_POST_PA == pos) {
1361 mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0) << 2);
1363 mod_phy_reg(pi, 0x4d9, (0x1 << 3), (1) << 3);
1365 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
1366 mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
1368 mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0x1);
1369 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);
1372 mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0x1) << 2);
1374 mod_phy_reg(pi, 0x4d9, (0x1 << 3), (0) << 3);
1376 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
1377 mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
1379 mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);
1380 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);
1383 mod_phy_reg(pi, 0x637, (0x3 << 14), (0) << 14);
1385 if (LCNPHY_TSSI_EXT == pos) {
1386 write_radio_reg(pi, RADIO_2064_REG07F, 1);
1387 mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 0x2);
1388 mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 0x1 << 7);
1389 mod_radio_reg(pi, RADIO_2064_REG028, 0x1f, 0x3);
1393 static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(phy_info_t *pi)
1395 u16 N1, N2, N3, N4, N5, N6, N;
1396 N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0))
1398 N2 = 1 << ((read_phy_reg(pi, 0x4a5) & (0x7 << 12))
1400 N3 = ((read_phy_reg(pi, 0x40d) & (0xff << 0))
1402 N4 = 1 << ((read_phy_reg(pi, 0x40d) & (0x7 << 8))
1404 N5 = ((read_phy_reg(pi, 0x4a2) & (0xff << 0))
1406 N6 = 1 << ((read_phy_reg(pi, 0x4a2) & (0x7 << 8))
1408 N = 2 * (N1 + N2 + N3 + N4 + 2 * (N5 + N6)) + 80;
1414 static void wlc_lcnphy_pwrctrl_rssiparams(phy_info_t *pi)
1416 u16 auxpga_vmid, auxpga_vmid_temp, auxpga_gain_temp;
1417 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1420 (2 << 8) | (pi_lcn->lcnphy_rssi_vc << 4) | pi_lcn->lcnphy_rssi_vf;
1421 auxpga_vmid_temp = (2 << 8) | (8 << 4) | 4;
1422 auxpga_gain_temp = 2;
1424 mod_phy_reg(pi, 0x4d8, (0x1 << 0), (0) << 0);
1426 mod_phy_reg(pi, 0x4d8, (0x1 << 1), (0) << 1);
1428 mod_phy_reg(pi, 0x4d7, (0x1 << 3), (0) << 3);
1430 mod_phy_reg(pi, 0x4db,
1433 (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
1435 mod_phy_reg(pi, 0x4dc,
1438 (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
1440 mod_phy_reg(pi, 0x40a,
1443 (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
1445 mod_phy_reg(pi, 0x40b,
1448 (auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12));
1450 mod_phy_reg(pi, 0x40c,
1453 (auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12));
1455 mod_radio_reg(pi, RADIO_2064_REG082, (1 << 5), (1 << 5));
1458 static void wlc_lcnphy_tssi_setup(phy_info_t *pi)
1463 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
1468 for (ind = 0; ind < 128; ind++) {
1469 wlc_lcnphy_write_table(pi, &tab);
1472 tab.tbl_offset = 704;
1473 for (ind = 0; ind < 128; ind++) {
1474 wlc_lcnphy_write_table(pi, &tab);
1477 mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);
1479 mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);
1481 mod_phy_reg(pi, 0x503, (0x1 << 4), (1) << 4);
1483 wlc_lcnphy_set_tssi_mux(pi, LCNPHY_TSSI_EXT);
1484 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);
1486 mod_phy_reg(pi, 0x4a4, (0x1 << 15), (1) << 15);
1488 mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);
1490 mod_phy_reg(pi, 0x4a4, (0x1ff << 0), (0) << 0);
1492 mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);
1494 mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);
1496 mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);
1498 mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);
1500 mod_phy_reg(pi, 0x40d, (0x7 << 8), (4) << 8);
1502 mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);
1504 mod_phy_reg(pi, 0x4a2, (0x7 << 8), (4) << 8);
1506 mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (0) << 6);
1508 mod_phy_reg(pi, 0x4a8, (0xff << 0), (0x1) << 0);
1510 wlc_lcnphy_clear_tx_power_offsets(pi);
1512 mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);
1514 mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (0xff) << 0);
1516 mod_phy_reg(pi, 0x49a, (0x1ff << 0), (0xff) << 0);
1518 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
1519 mod_radio_reg(pi, RADIO_2064_REG028, 0xf, 0xe);
1520 mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
1522 mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);
1523 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 1 << 3);
1526 write_radio_reg(pi, RADIO_2064_REG025, 0xc);
1528 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
1529 mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);
1531 if (CHSPEC_IS2G(pi->radio_chanspec))
1532 mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);
1534 mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 0 << 1);
1537 if (LCNREV_IS(pi->pubpi.phy_rev, 2))
1538 mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);
1540 mod_radio_reg(pi, RADIO_2064_REG03A, 0x4, 1 << 2);
1542 mod_radio_reg(pi, RADIO_2064_REG11A, 0x1, 1 << 0);
1544 mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 1 << 3);
1546 if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
1547 mod_phy_reg(pi, 0x4d7,
1548 (0x1 << 3) | (0x7 << 12), 0 << 3 | 2 << 12);
1551 rfseq = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);
1552 tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
1554 tab.tbl_ptr = &rfseq;
1557 wlc_lcnphy_write_table(pi, &tab);
1559 mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);
1561 mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);
1563 mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
1565 mod_phy_reg(pi, 0x4d7, (0x1 << 2), (1) << 2);
1567 mod_phy_reg(pi, 0x4d7, (0xf << 8), (0) << 8);
1569 wlc_lcnphy_pwrctrl_rssiparams(pi);
1572 void wlc_lcnphy_tx_pwr_update_npt(phy_info_t *pi)
1574 u16 tx_cnt, tx_total, npt;
1575 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1577 tx_total = wlc_lcnphy_total_tx_frames(pi);
1578 tx_cnt = tx_total - pi_lcn->lcnphy_tssi_tx_cnt;
1579 npt = wlc_lcnphy_get_tx_pwr_npt(pi);
1581 if (tx_cnt > (1 << npt)) {
1583 pi_lcn->lcnphy_tssi_tx_cnt = tx_total;
1585 pi_lcn->lcnphy_tssi_idx = wlc_lcnphy_get_current_tx_pwr_idx(pi);
1586 pi_lcn->lcnphy_tssi_npt = npt;
1591 s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1)
1595 a = 32768 + (a1 * tssi);
1596 b = (1024 * b0) + (64 * b1 * tssi);
1597 p = ((2 * b) + a) / (2 * a);
1602 static void wlc_lcnphy_txpower_reset_npt(phy_info_t *pi)
1604 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1605 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
1608 pi_lcn->lcnphy_tssi_idx = LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313;
1609 pi_lcn->lcnphy_tssi_npt = LCNPHY_TX_PWR_CTRL_START_NPT;
1612 void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi)
1615 u32 rate_table[WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM +
1616 WLC_NUM_RATES_MCS_1_STREAM];
1618 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
1621 for (i = 0, j = 0; i < ARRAY_SIZE(rate_table); i++, j++) {
1623 if (i == WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM)
1624 j = TXP_FIRST_MCS_20_SISO;
1626 rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j]));
1629 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
1631 tab.tbl_len = ARRAY_SIZE(rate_table);
1632 tab.tbl_ptr = rate_table;
1633 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
1634 wlc_lcnphy_write_table(pi, &tab);
1636 if (wlc_lcnphy_get_target_tx_pwr(pi) != pi->tx_power_min) {
1637 wlc_lcnphy_set_target_tx_pwr(pi, pi->tx_power_min);
1639 wlc_lcnphy_txpower_reset_npt(pi);
1643 static void wlc_lcnphy_set_tx_pwr_soft_ctrl(phy_info_t *pi, s8 index)
1645 u32 cck_offset[4] = { 22, 22, 22, 22 };
1646 u32 ofdm_offset, reg_offset_cck;
1651 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
1654 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);
1656 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x0) << 14);
1658 or_phy_reg(pi, 0x6da, 0x0040);
1661 for (i = 0; i < 4; i++)
1662 cck_offset[i] -= reg_offset_cck;
1663 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
1666 tab.tbl_ptr = cck_offset;
1667 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
1668 wlc_lcnphy_write_table(pi, &tab);
1671 tab.tbl_ptr = &ofdm_offset;
1672 for (i = 836; i < 862; i++) {
1674 wlc_lcnphy_write_table(pi, &tab);
1677 mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0x1) << 15);
1679 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);
1681 mod_phy_reg(pi, 0x4a4, (0x1 << 13), (0x1) << 13);
1683 mod_phy_reg(pi, 0x4b0, (0x1 << 7), (0) << 7);
1685 mod_phy_reg(pi, 0x43b, (0x1 << 6), (0) << 6);
1687 mod_phy_reg(pi, 0x4a9, (0x1 << 15), (1) << 15);
1689 index2 = (u16) (index * 2);
1690 mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);
1692 mod_phy_reg(pi, 0x6a3, (0x1 << 4), (0) << 4);
1696 static s8 wlc_lcnphy_tempcompensated_txpwrctrl(phy_info_t *pi)
1698 s8 index, delta_brd, delta_temp, new_index, tempcorrx;
1699 s16 manp, meas_temp, temp_diff;
1702 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1704 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
1705 return pi_lcn->lcnphy_current_index;
1707 index = FIXED_TXPWR;
1709 if (NORADIO_ENAB(pi->pubpi))
1712 if (pi_lcn->lcnphy_tempsense_slope == 0) {
1715 temp = (u16) wlc_lcnphy_tempsense(pi, 0);
1716 meas_temp = LCNPHY_TEMPSENSE(temp);
1718 if (pi->tx_power_min != 0) {
1719 delta_brd = (pi_lcn->lcnphy_measPower - pi->tx_power_min);
1724 manp = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_rawtempsense);
1725 temp_diff = manp - meas_temp;
1726 if (temp_diff < 0) {
1730 temp_diff = -temp_diff;
1733 delta_temp = (s8) wlc_lcnphy_qdiv_roundup((u32) (temp_diff * 192),
1735 lcnphy_tempsense_slope
1738 delta_temp = -delta_temp;
1740 if (pi_lcn->lcnphy_tempsense_option == 3
1741 && LCNREV_IS(pi->pubpi.phy_rev, 0))
1743 if (pi_lcn->lcnphy_tempcorrx > 31)
1744 tempcorrx = (s8) (pi_lcn->lcnphy_tempcorrx - 64);
1746 tempcorrx = (s8) pi_lcn->lcnphy_tempcorrx;
1747 if (LCNREV_IS(pi->pubpi.phy_rev, 1))
1750 index + delta_brd + delta_temp - pi_lcn->lcnphy_bandedge_corr;
1751 new_index += tempcorrx;
1753 if (LCNREV_IS(pi->pubpi.phy_rev, 1))
1755 if (new_index < 0 || new_index > 126) {
1761 static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(phy_info_t *pi, u16 mode)
1764 u16 current_mode = mode;
1765 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) &&
1766 mode == LCNPHY_TX_PWR_CTRL_HW)
1767 current_mode = LCNPHY_TX_PWR_CTRL_TEMPBASED;
1768 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&
1769 mode == LCNPHY_TX_PWR_CTRL_TEMPBASED)
1770 current_mode = LCNPHY_TX_PWR_CTRL_HW;
1771 return current_mode;
1774 void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode)
1776 u16 old_mode = wlc_lcnphy_get_tx_pwr_ctrl(pi);
1778 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1780 ASSERT((LCNPHY_TX_PWR_CTRL_OFF == mode) ||
1781 (LCNPHY_TX_PWR_CTRL_SW == mode) ||
1782 (LCNPHY_TX_PWR_CTRL_HW == mode) ||
1783 (LCNPHY_TX_PWR_CTRL_TEMPBASED == mode));
1785 mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, mode);
1786 old_mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, old_mode);
1788 mod_phy_reg(pi, 0x6da, (0x1 << 6),
1789 ((LCNPHY_TX_PWR_CTRL_HW == mode) ? 1 : 0) << 6);
1791 mod_phy_reg(pi, 0x6a3, (0x1 << 4),
1792 ((LCNPHY_TX_PWR_CTRL_HW == mode) ? 0 : 1) << 4);
1794 if (old_mode != mode) {
1795 if (LCNPHY_TX_PWR_CTRL_HW == old_mode) {
1797 wlc_lcnphy_tx_pwr_update_npt(pi);
1799 wlc_lcnphy_clear_tx_power_offsets(pi);
1801 if (LCNPHY_TX_PWR_CTRL_HW == mode) {
1803 wlc_lcnphy_txpower_recalc_target(pi);
1805 wlc_lcnphy_set_start_tx_pwr_idx(pi,
1808 wlc_lcnphy_set_tx_pwr_npt(pi, pi_lcn->lcnphy_tssi_npt);
1809 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0);
1811 pi_lcn->lcnphy_tssi_tx_cnt =
1812 wlc_lcnphy_total_tx_frames(pi);
1814 wlc_lcnphy_disable_tx_gain_override(pi);
1815 pi_lcn->lcnphy_tx_power_idx_override = -1;
1817 wlc_lcnphy_enable_tx_gain_override(pi);
1819 mod_phy_reg(pi, 0x4a4,
1820 ((0x1 << 15) | (0x1 << 14) | (0x1 << 13)), mode);
1821 if (mode == LCNPHY_TX_PWR_CTRL_TEMPBASED) {
1822 index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
1823 wlc_lcnphy_set_tx_pwr_soft_ctrl(pi, index);
1824 pi_lcn->lcnphy_current_index = (s8)
1825 ((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);
1830 static bool wlc_lcnphy_iqcal_wait(phy_info_t *pi)
1832 uint delay_count = 0;
1834 while (wlc_lcnphy_iqcal_active(pi)) {
1838 if (delay_count > (10 * 500))
1842 return (0 == wlc_lcnphy_iqcal_active(pi));
1846 wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi,
1847 lcnphy_txgains_t *target_gains,
1848 lcnphy_cal_mode_t cal_mode, bool keep_tone)
1851 lcnphy_txgains_t cal_gains, temp_gains;
1855 u16 ncorr_override[5];
1856 u16 syst_coeffs[] = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
1857 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
1860 u16 commands_fullcal[] = {
1861 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 };
1863 u16 commands_recal[] = {
1864 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 };
1866 u16 command_nums_fullcal[] = {
1867 0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 };
1869 u16 command_nums_recal[] = {
1870 0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 };
1871 u16 *command_nums = command_nums_fullcal;
1873 u16 *start_coeffs = NULL, *cal_cmds = NULL, cal_type, diq_start;
1874 u16 tx_pwr_ctrl_old, save_txpwrctrlrfctrl2;
1875 u16 save_sslpnCalibClkEnCtrl, save_sslpnRxFeClkEnCtrl;
1876 bool tx_gain_override_old;
1877 lcnphy_txgains_t old_gains;
1878 uint i, n_cal_cmds = 0, n_cal_start = 0;
1879 u16 *values_to_save;
1880 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1882 if (NORADIO_ENAB(pi->pubpi))
1885 values_to_save = MALLOC(pi->sh->osh, sizeof(u16) * 20);
1886 if (NULL == values_to_save) {
1890 save_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);
1891 save_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
1893 or_phy_reg(pi, 0x6da, 0x40);
1894 or_phy_reg(pi, 0x6db, 0x3);
1897 case LCNPHY_CAL_FULL:
1898 start_coeffs = syst_coeffs;
1899 cal_cmds = commands_fullcal;
1900 n_cal_cmds = ARRAY_SIZE(commands_fullcal);
1903 case LCNPHY_CAL_RECAL:
1904 ASSERT(pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid);
1906 start_coeffs = syst_coeffs;
1908 cal_cmds = commands_recal;
1909 n_cal_cmds = ARRAY_SIZE(commands_recal);
1910 command_nums = command_nums_recal;
1916 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
1917 start_coeffs, 11, 16, 64);
1919 write_phy_reg(pi, 0x6da, 0xffff);
1920 mod_phy_reg(pi, 0x503, (0x1 << 3), (1) << 3);
1922 tx_pwr_ctrl_old = wlc_lcnphy_get_tx_pwr_ctrl(pi);
1924 mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
1926 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
1928 save_txpwrctrlrfctrl2 = read_phy_reg(pi, 0x4db);
1930 mod_phy_reg(pi, 0x4db, (0x3ff << 0), (0x2a6) << 0);
1932 mod_phy_reg(pi, 0x4db, (0x7 << 12), (2) << 12);
1934 wlc_lcnphy_tx_iqlo_loopback(pi, values_to_save);
1936 tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
1937 if (tx_gain_override_old)
1938 wlc_lcnphy_get_tx_gain(pi, &old_gains);
1940 if (!target_gains) {
1941 if (!tx_gain_override_old)
1942 wlc_lcnphy_set_tx_pwr_by_index(pi,
1943 pi_lcn->lcnphy_tssi_idx);
1944 wlc_lcnphy_get_tx_gain(pi, &temp_gains);
1945 target_gains = &temp_gains;
1948 hash = (target_gains->gm_gain << 8) |
1949 (target_gains->pga_gain << 4) | (target_gains->pad_gain);
1951 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0);
1953 cal_gains = *target_gains;
1954 bzero(ncorr_override, sizeof(ncorr_override));
1955 for (j = 0; j < iqcal_gainparams_numgains_lcnphy[band_idx]; j++) {
1956 if (hash == tbl_iqcal_gainparams_lcnphy[band_idx][j][0]) {
1958 tbl_iqcal_gainparams_lcnphy[band_idx][j][1];
1959 cal_gains.pga_gain =
1960 tbl_iqcal_gainparams_lcnphy[band_idx][j][2];
1961 cal_gains.pad_gain =
1962 tbl_iqcal_gainparams_lcnphy[band_idx][j][3];
1963 bcopy(&tbl_iqcal_gainparams_lcnphy[band_idx][j][3],
1964 ncorr_override, sizeof(ncorr_override));
1969 wlc_lcnphy_set_tx_gain(pi, &cal_gains);
1971 write_phy_reg(pi, 0x453, 0xaa9);
1972 write_phy_reg(pi, 0x93d, 0xc0);
1974 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
1976 lcnphy_iqcal_loft_gainladder,
1977 ARRAY_SIZE(lcnphy_iqcal_loft_gainladder),
1980 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
1981 (const void *)lcnphy_iqcal_ir_gainladder,
1982 ARRAY_SIZE(lcnphy_iqcal_ir_gainladder), 16,
1985 if (pi->phy_tx_tone_freq) {
1987 wlc_lcnphy_stop_tx_tone(pi);
1989 wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);
1991 wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);
1994 write_phy_reg(pi, 0x6da, 0xffff);
1996 for (i = n_cal_start; i < n_cal_cmds; i++) {
1998 u16 best_coeffs[11];
2001 cal_type = (cal_cmds[i] & 0x0f00) >> 8;
2003 command_num = command_nums[i];
2004 if (ncorr_override[cal_type])
2006 ncorr_override[cal_type] << 8 | (command_num &
2009 write_phy_reg(pi, 0x452, command_num);
2011 if ((cal_type == 3) || (cal_type == 4)) {
2013 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2014 &diq_start, 1, 16, 69);
2016 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2017 &zero_diq, 1, 16, 69);
2020 write_phy_reg(pi, 0x451, cal_cmds[i]);
2022 if (!wlc_lcnphy_iqcal_wait(pi)) {
2027 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2029 ARRAY_SIZE(best_coeffs), 16, 96);
2030 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2032 ARRAY_SIZE(best_coeffs), 16, 64);
2034 if ((cal_type == 3) || (cal_type == 4)) {
2035 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2036 &diq_start, 1, 16, 69);
2038 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2039 pi_lcn->lcnphy_cal_results.
2040 txiqlocal_bestcoeffs,
2043 txiqlocal_bestcoeffs),
2047 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2048 pi_lcn->lcnphy_cal_results.
2049 txiqlocal_bestcoeffs,
2050 ARRAY_SIZE(pi_lcn->lcnphy_cal_results.
2051 txiqlocal_bestcoeffs), 16, 96);
2052 pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid = true;
2054 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2055 &pi_lcn->lcnphy_cal_results.
2056 txiqlocal_bestcoeffs[0], 4, 16, 80);
2058 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2059 &pi_lcn->lcnphy_cal_results.
2060 txiqlocal_bestcoeffs[5], 2, 16, 85);
2063 wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, values_to_save);
2064 MFREE(pi->sh->osh, values_to_save, 20 * sizeof(u16));
2067 wlc_lcnphy_stop_tx_tone(pi);
2069 write_phy_reg(pi, 0x4db, save_txpwrctrlrfctrl2);
2071 write_phy_reg(pi, 0x453, 0);
2073 if (tx_gain_override_old)
2074 wlc_lcnphy_set_tx_gain(pi, &old_gains);
2075 wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl_old);
2077 write_phy_reg(pi, 0x6da, save_sslpnCalibClkEnCtrl);
2078 write_phy_reg(pi, 0x6db, save_sslpnRxFeClkEnCtrl);
2082 static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi)
2084 bool suspend, tx_gain_override_old;
2085 lcnphy_txgains_t old_gains;
2086 phy_info_t *pi = (phy_info_t *) ppi;
2087 u16 idleTssi, idleTssi0_2C, idleTssi0_OB, idleTssi0_regvalue_OB,
2088 idleTssi0_regvalue_2C;
2089 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
2090 u16 SAVE_lpfgain = read_radio_reg(pi, RADIO_2064_REG112);
2091 u16 SAVE_jtag_bb_afe_switch =
2092 read_radio_reg(pi, RADIO_2064_REG007) & 1;
2093 u16 SAVE_jtag_auxpga = read_radio_reg(pi, RADIO_2064_REG0FF) & 0x10;
2094 u16 SAVE_iqadc_aux_en = read_radio_reg(pi, RADIO_2064_REG11F) & 4;
2095 idleTssi = read_phy_reg(pi, 0x4ab);
2098 (R_REG(pi->sh->osh, &((phy_info_t *) pi)->regs->maccontrol) &
2101 wlapi_suspend_mac_and_wait(pi->sh->physhim);
2102 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
2104 tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
2105 wlc_lcnphy_get_tx_gain(pi, &old_gains);
2107 wlc_lcnphy_enable_tx_gain_override(pi);
2108 wlc_lcnphy_set_tx_pwr_by_index(pi, 127);
2109 write_radio_reg(pi, RADIO_2064_REG112, 0x6);
2110 mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 1);
2111 mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4);
2112 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2);
2113 wlc_lcnphy_tssi_setup(pi);
2114 wlc_phy_do_dummy_tx(pi, true, OFF);
2115 idleTssi = ((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
2118 idleTssi0_2C = ((read_phy_reg(pi, 0x63e) & (0x1ff << 0))
2121 if (idleTssi0_2C >= 256)
2122 idleTssi0_OB = idleTssi0_2C - 256;
2124 idleTssi0_OB = idleTssi0_2C + 256;
2126 idleTssi0_regvalue_OB = idleTssi0_OB;
2127 if (idleTssi0_regvalue_OB >= 256)
2128 idleTssi0_regvalue_2C = idleTssi0_regvalue_OB - 256;
2130 idleTssi0_regvalue_2C = idleTssi0_regvalue_OB + 256;
2131 mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (idleTssi0_regvalue_2C) << 0);
2133 mod_phy_reg(pi, 0x44c, (0x1 << 12), (0) << 12);
2135 wlc_lcnphy_set_tx_gain_override(pi, tx_gain_override_old);
2136 wlc_lcnphy_set_tx_gain(pi, &old_gains);
2137 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
2139 write_radio_reg(pi, RADIO_2064_REG112, SAVE_lpfgain);
2140 mod_radio_reg(pi, RADIO_2064_REG007, 0x1, SAVE_jtag_bb_afe_switch);
2141 mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, SAVE_jtag_auxpga);
2142 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, SAVE_iqadc_aux_en);
2143 mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1 << 7);
2145 wlapi_enable_mac(pi->sh->physhim);
2148 static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, u8 mode)
2151 u16 save_txpwrCtrlEn;
2152 u8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain;
2156 u8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025,
2158 u16 values_to_save[14];
2161 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2164 save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007);
2165 save_reg0FF = (u8) read_radio_reg(pi, RADIO_2064_REG0FF);
2166 save_reg11F = (u8) read_radio_reg(pi, RADIO_2064_REG11F);
2167 save_reg005 = (u8) read_radio_reg(pi, RADIO_2064_REG005);
2168 save_reg025 = (u8) read_radio_reg(pi, RADIO_2064_REG025);
2169 save_reg112 = (u8) read_radio_reg(pi, RADIO_2064_REG112);
2171 for (i = 0; i < 14; i++)
2172 values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]);
2174 (0 == (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC));
2176 wlapi_suspend_mac_and_wait(pi->sh->physhim);
2177 save_txpwrCtrlEn = read_radio_reg(pi, 0x4a4);
2179 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
2180 index = pi_lcn->lcnphy_current_index;
2181 wlc_lcnphy_set_tx_pwr_by_index(pi, 127);
2182 mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 0x1);
2183 mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 0x1 << 4);
2184 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0x1 << 2);
2185 mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);
2187 mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);
2189 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);
2191 mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0) << 15);
2193 mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);
2195 mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);
2197 mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);
2199 mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);
2201 mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);
2203 mod_phy_reg(pi, 0x40d, (0x7 << 8), (6) << 8);
2205 mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);
2207 mod_phy_reg(pi, 0x4a2, (0x7 << 8), (6) << 8);
2209 mod_phy_reg(pi, 0x4d9, (0x7 << 4), (2) << 4);
2211 mod_phy_reg(pi, 0x4d9, (0x7 << 8), (3) << 8);
2213 mod_phy_reg(pi, 0x4d9, (0x7 << 12), (1) << 12);
2215 mod_phy_reg(pi, 0x4da, (0x1 << 12), (0) << 12);
2217 mod_phy_reg(pi, 0x4da, (0x1 << 13), (1) << 13);
2219 mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);
2221 write_radio_reg(pi, RADIO_2064_REG025, 0xC);
2223 mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 0x1 << 3);
2225 mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);
2227 mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);
2229 mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
2231 val = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);
2232 tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
2237 wlc_lcnphy_write_table(pi, &tab);
2238 if (mode == TEMPSENSE) {
2239 mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);
2241 mod_phy_reg(pi, 0x4d7, (0x7 << 12), (1) << 12);
2243 auxpga_vmidcourse = 8;
2244 auxpga_vmidfine = 0x4;
2246 mod_radio_reg(pi, RADIO_2064_REG082, 0x20, 1 << 5);
2248 mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);
2250 mod_phy_reg(pi, 0x4d7, (0x7 << 12), (3) << 12);
2252 auxpga_vmidcourse = 7;
2253 auxpga_vmidfine = 0xa;
2257 (u16) ((2 << 8) | (auxpga_vmidcourse << 4) | auxpga_vmidfine);
2258 mod_phy_reg(pi, 0x4d8, (0x1 << 0), (1) << 0);
2260 mod_phy_reg(pi, 0x4d8, (0x3ff << 2), (auxpga_vmid) << 2);
2262 mod_phy_reg(pi, 0x4d8, (0x1 << 1), (1) << 1);
2264 mod_phy_reg(pi, 0x4d8, (0x7 << 12), (auxpga_gain) << 12);
2266 mod_phy_reg(pi, 0x4d0, (0x1 << 5), (1) << 5);
2268 write_radio_reg(pi, RADIO_2064_REG112, 0x6);
2270 wlc_phy_do_dummy_tx(pi, true, OFF);
2271 if (!tempsense_done(pi))
2274 write_radio_reg(pi, RADIO_2064_REG007, (u16) save_reg007);
2275 write_radio_reg(pi, RADIO_2064_REG0FF, (u16) save_reg0FF);
2276 write_radio_reg(pi, RADIO_2064_REG11F, (u16) save_reg11F);
2277 write_radio_reg(pi, RADIO_2064_REG005, (u16) save_reg005);
2278 write_radio_reg(pi, RADIO_2064_REG025, (u16) save_reg025);
2279 write_radio_reg(pi, RADIO_2064_REG112, (u16) save_reg112);
2280 for (i = 0; i < 14; i++)
2281 write_phy_reg(pi, tempsense_phy_regs[i], values_to_save[i]);
2282 wlc_lcnphy_set_tx_pwr_by_index(pi, (int)index);
2284 write_radio_reg(pi, 0x4a4, save_txpwrCtrlEn);
2286 wlapi_enable_mac(pi->sh->physhim);
2290 void WLBANDINITFN(wlc_lcnphy_tx_pwr_ctrl_init) (wlc_phy_t *ppi)
2292 lcnphy_txgains_t tx_gains;
2296 s32 tssi, pwr, maxtargetpwr, mintargetpwr;
2298 phy_info_t *pi = (phy_info_t *) ppi;
2301 (0 == (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC));
2303 wlapi_suspend_mac_and_wait(pi->sh->physhim);
2305 if (NORADIO_ENAB(pi->pubpi)) {
2306 wlc_lcnphy_set_bbmult(pi, 0x30);
2308 wlapi_enable_mac(pi->sh->physhim);
2312 if (!pi->hwpwrctrl_capable) {
2313 if (CHSPEC_IS2G(pi->radio_chanspec)) {
2314 tx_gains.gm_gain = 4;
2315 tx_gains.pga_gain = 12;
2316 tx_gains.pad_gain = 12;
2317 tx_gains.dac_gain = 0;
2321 tx_gains.gm_gain = 7;
2322 tx_gains.pga_gain = 15;
2323 tx_gains.pad_gain = 14;
2324 tx_gains.dac_gain = 0;
2328 wlc_lcnphy_set_tx_gain(pi, &tx_gains);
2329 wlc_lcnphy_set_bbmult(pi, bbmult);
2330 wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
2333 wlc_lcnphy_idle_tssi_est(ppi);
2335 wlc_lcnphy_clear_tx_power_offsets(pi);
2337 b0 = pi->txpa_2g[0];
2338 b1 = pi->txpa_2g[1];
2339 a1 = pi->txpa_2g[2];
2340 maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1);
2341 mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1);
2343 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
2348 for (tssi = 0; tssi < 128; tssi++) {
2349 pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1);
2351 pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr;
2352 wlc_lcnphy_write_table(pi, &tab);
2356 mod_phy_reg(pi, 0x410, (0x1 << 7), (0) << 7);
2358 write_phy_reg(pi, 0x4a8, 10);
2360 wlc_lcnphy_set_target_tx_pwr(pi, LCN_TARGET_PWR);
2362 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);
2365 wlapi_enable_mac(pi->sh->physhim);
2368 static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi)
2373 tab.tbl_ptr = &m0m1;
2375 tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
2376 tab.tbl_offset = 87;
2378 wlc_lcnphy_read_table(pi, &tab);
2380 return (u8) ((m0m1 & 0xff00) >> 8);
2383 static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain)
2385 mod_phy_reg(pi, 0x4fb,
2386 LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK,
2387 gain << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT);
2388 mod_phy_reg(pi, 0x4fd,
2389 LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK,
2390 gain << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT);
2394 wlc_lcnphy_get_radio_loft(phy_info_t *pi,
2395 u8 *ei0, u8 *eq0, u8 *fi0, u8 *fq0)
2397 *ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089));
2398 *eq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08A));
2399 *fi0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08B));
2400 *fq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08C));
2403 static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains)
2407 dac_gain = read_phy_reg(pi, 0x439) >> 0;
2408 gains->dac_gain = (dac_gain & 0x380) >> 7;
2411 u16 rfgain0, rfgain1;
2413 rfgain0 = (read_phy_reg(pi, 0x4b5) & (0xffff << 0)) >> 0;
2414 rfgain1 = (read_phy_reg(pi, 0x4fb) & (0x7fff << 0)) >> 0;
2416 gains->gm_gain = rfgain0 & 0xff;
2417 gains->pga_gain = (rfgain0 >> 8) & 0xff;
2418 gains->pad_gain = rfgain1 & 0xff;
2422 void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b)
2430 tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
2434 tab.tbl_offset = 80;
2435 wlc_lcnphy_write_table(pi, &tab);
2438 void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq)
2442 tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
2444 tab.tbl_ptr = &didq;
2446 tab.tbl_offset = 85;
2447 wlc_lcnphy_write_table(pi, &tab);
2450 void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index)
2455 u32 bbmultiqcomp, txgain, locoeffs, rfpower;
2456 lcnphy_txgains_t gains;
2457 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2459 ASSERT(index <= LCNPHY_MAX_TX_POWER_INDEX);
2461 pi_lcn->lcnphy_tx_power_idx_override = (s8) index;
2462 pi_lcn->lcnphy_current_index = (u8) index;
2464 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
2468 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
2470 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index;
2471 tab.tbl_ptr = &bbmultiqcomp;
2472 wlc_lcnphy_read_table(pi, &tab);
2474 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index;
2476 tab.tbl_ptr = &txgain;
2477 wlc_lcnphy_read_table(pi, &tab);
2479 gains.gm_gain = (u16) (txgain & 0xff);
2480 gains.pga_gain = (u16) (txgain >> 8) & 0xff;
2481 gains.pad_gain = (u16) (txgain >> 16) & 0xff;
2482 gains.dac_gain = (u16) (bbmultiqcomp >> 28) & 0x07;
2483 wlc_lcnphy_set_tx_gain(pi, &gains);
2484 wlc_lcnphy_set_pa_gain(pi, (u16) (txgain >> 24) & 0x7f);
2486 bb_mult = (u8) ((bbmultiqcomp >> 20) & 0xff);
2487 wlc_lcnphy_set_bbmult(pi, bb_mult);
2489 wlc_lcnphy_enable_tx_gain_override(pi);
2491 if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
2493 a = (u16) ((bbmultiqcomp >> 10) & 0x3ff);
2494 b = (u16) (bbmultiqcomp & 0x3ff);
2495 wlc_lcnphy_set_tx_iqcc(pi, a, b);
2497 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + index;
2498 tab.tbl_ptr = &locoeffs;
2499 wlc_lcnphy_read_table(pi, &tab);
2501 wlc_lcnphy_set_tx_locc(pi, (u16) locoeffs);
2503 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index;
2504 tab.tbl_ptr = &rfpower;
2505 wlc_lcnphy_read_table(pi, &tab);
2506 mod_phy_reg(pi, 0x6a6, (0x1fff << 0), (rfpower * 8) << 0);
2511 static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx)
2514 mod_phy_reg(pi, 0x44d,
2516 (0x1 << 0), (tx ? (0x1 << 1) : 0) | (rx ? (0x1 << 0) : 0));
2518 or_phy_reg(pi, 0x44c, (0x1 << 1) | (0x1 << 0));
2521 static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi)
2525 u32 temp_offset[128];
2526 tab.tbl_ptr = temp_offset;
2528 tab.tbl_id = LCNPHY_TBL_ID_PAPDCOMPDELTATBL;
2532 bzero(temp_offset, sizeof(temp_offset));
2533 for (j = 1; j < 128; j += 2)
2534 temp_offset[j] = 0x80000;
2536 wlc_lcnphy_write_table(pi, &tab);
2541 wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi,
2546 u16 tia, u16 lna2, u16 lna1)
2548 u16 gain0_15, gain16_19;
2550 gain16_19 = biq2 & 0xf;
2551 gain0_15 = ((biq1 & 0xf) << 12) |
2552 ((tia & 0xf) << 8) |
2553 ((lna2 & 0x3) << 6) |
2554 ((lna2 & 0x3) << 4) | ((lna1 & 0x3) << 2) | ((lna1 & 0x3) << 0);
2556 mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0);
2557 mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0);
2558 mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11);
2560 if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
2561 mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
2562 mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10);
2564 mod_phy_reg(pi, 0x4b1, (0x1 << 10), 0 << 10);
2566 mod_phy_reg(pi, 0x4b1, (0x1 << 15), 0 << 15);
2568 mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
2571 mod_phy_reg(pi, 0x44d, (0x1 << 0), (!trsw) << 0);
2575 static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable)
2577 u16 ebit = enable ? 1 : 0;
2579 mod_phy_reg(pi, 0x4b0, (0x1 << 8), ebit << 8);
2581 mod_phy_reg(pi, 0x44c, (0x1 << 0), ebit << 0);
2583 if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
2584 mod_phy_reg(pi, 0x44c, (0x1 << 4), ebit << 4);
2585 mod_phy_reg(pi, 0x44c, (0x1 << 6), ebit << 6);
2586 mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);
2587 mod_phy_reg(pi, 0x4b0, (0x1 << 6), ebit << 6);
2589 mod_phy_reg(pi, 0x4b0, (0x1 << 12), ebit << 12);
2590 mod_phy_reg(pi, 0x4b0, (0x1 << 13), ebit << 13);
2591 mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);
2594 if (CHSPEC_IS2G(pi->radio_chanspec)) {
2595 mod_phy_reg(pi, 0x4b0, (0x1 << 10), ebit << 10);
2596 mod_phy_reg(pi, 0x4e5, (0x1 << 3), ebit << 3);
2600 void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable)
2604 and_phy_reg(pi, 0x43b, ~(u16) ((0x1 << 1) | (0x1 << 4)));
2606 mod_phy_reg(pi, 0x43c, (0x1 << 1), 1 << 1);
2608 and_phy_reg(pi, 0x44c,
2609 ~(u16) ((0x1 << 3) |
2612 (0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
2614 and_phy_reg(pi, 0x44d,
2615 ~(u16) ((0x1 << 3) | (0x1 << 5) | (0x1 << 14)));
2616 mod_phy_reg(pi, 0x44d, (0x1 << 2), 1 << 2);
2618 mod_phy_reg(pi, 0x44d, (0x1 << 1) | (0x1 << 0), (0x1 << 0));
2620 and_phy_reg(pi, 0x4f9,
2621 ~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
2623 and_phy_reg(pi, 0x4fa,
2624 ~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
2627 mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
2628 mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
2630 mod_phy_reg(pi, 0x43b, (0x1 << 4), 1 << 4);
2631 mod_phy_reg(pi, 0x43c, (0x1 << 6), 0 << 6);
2633 mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
2634 mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
2636 wlc_lcnphy_set_trsw_override(pi, true, false);
2638 mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2);
2639 mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2);
2641 if (CHSPEC_IS2G(pi->radio_chanspec)) {
2643 mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);
2644 mod_phy_reg(pi, 0x44d, (0x1 << 3), 1 << 3);
2646 mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);
2647 mod_phy_reg(pi, 0x44d, (0x1 << 5), 0 << 5);
2649 mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);
2650 mod_phy_reg(pi, 0x4fa, (0x1 << 1), 1 << 1);
2652 mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);
2653 mod_phy_reg(pi, 0x4fa, (0x1 << 2), 1 << 2);
2655 mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
2656 mod_phy_reg(pi, 0x4fa, (0x1 << 0), 1 << 0);
2659 mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);
2660 mod_phy_reg(pi, 0x44d, (0x1 << 3), 0 << 3);
2662 mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);
2663 mod_phy_reg(pi, 0x44d, (0x1 << 5), 1 << 5);
2665 mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);
2666 mod_phy_reg(pi, 0x4fa, (0x1 << 1), 0 << 1);
2668 mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);
2669 mod_phy_reg(pi, 0x4fa, (0x1 << 2), 0 << 2);
2671 mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
2672 mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);
2678 wlc_lcnphy_run_samples(phy_info_t *pi,
2680 u16 num_loops, u16 wait, bool iqcalmode)
2683 or_phy_reg(pi, 0x6da, 0x8080);
2685 mod_phy_reg(pi, 0x642, (0x7f << 0), (num_samps - 1) << 0);
2686 if (num_loops != 0xffff)
2688 mod_phy_reg(pi, 0x640, (0xffff << 0), num_loops << 0);
2690 mod_phy_reg(pi, 0x641, (0xffff << 0), wait << 0);
2694 and_phy_reg(pi, 0x453, (u16) ~(0x1 << 15));
2695 or_phy_reg(pi, 0x453, (0x1 << 15));
2697 write_phy_reg(pi, 0x63f, 1);
2698 wlc_lcnphy_tx_pu(pi, 1);
2701 or_radio_reg(pi, RADIO_2064_REG112, 0x6);
2704 void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode)
2708 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
2710 if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
2711 mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);
2712 mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);
2714 mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);
2715 mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);
2719 mod_phy_reg((pi), 0x410,
2722 ((CHSPEC_IS2G(pi->radio_chanspec)) ? (!mode) : 0) <<
2724 mod_phy_reg(pi, 0x410, (0x1 << 7), (mode) << 7);
2729 wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, u16 max_val,
2733 u16 num_samps, t, k;
2735 fixed theta = 0, rot = 0;
2740 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2742 pi->phy_tx_tone_freq = f_kHz;
2744 wlc_lcnphy_deaf_mode(pi, true);
2747 if (pi_lcn->lcnphy_spurmod) {
2748 write_phy_reg(pi, 0x942, 0x2);
2749 write_phy_reg(pi, 0x93b, 0x0);
2750 write_phy_reg(pi, 0x93c, 0x0);
2751 wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);
2757 bw = phy_bw * 1000 * k;
2758 num_samps = bw / ABS(f_kHz);
2759 ASSERT(num_samps <= ARRAY_SIZE(data_buf));
2761 } while ((num_samps * (u32) (ABS(f_kHz))) != bw);
2765 rot = FIXED((f_kHz * 36) / phy_bw) / 100;
2768 for (t = 0; t < num_samps; t++) {
2770 wlc_phy_cordic(theta, &tone_samp);
2774 i_samp = (u16) (FLOAT(tone_samp.i * max_val) & 0x3ff);
2775 q_samp = (u16) (FLOAT(tone_samp.q * max_val) & 0x3ff);
2776 data_buf[t] = (i_samp << 10) | q_samp;
2779 mod_phy_reg(pi, 0x6d6, (0x3 << 0), 0 << 0);
2781 mod_phy_reg(pi, 0x6da, (0x1 << 3), 1 << 3);
2783 tab.tbl_ptr = data_buf;
2784 tab.tbl_len = num_samps;
2785 tab.tbl_id = LCNPHY_TBL_ID_SAMPLEPLAY;
2788 wlc_lcnphy_write_table(pi, &tab);
2790 wlc_lcnphy_run_samples(pi, num_samps, 0xffff, 0, iqcalmode);
2793 void wlc_lcnphy_stop_tx_tone(phy_info_t *pi)
2795 s16 playback_status;
2796 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2798 pi->phy_tx_tone_freq = 0;
2799 if (pi_lcn->lcnphy_spurmod) {
2800 write_phy_reg(pi, 0x942, 0x7);
2801 write_phy_reg(pi, 0x93b, 0x2017);
2802 write_phy_reg(pi, 0x93c, 0x27c5);
2803 wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
2806 playback_status = read_phy_reg(pi, 0x644);
2807 if (playback_status & (0x1 << 0)) {
2808 wlc_lcnphy_tx_pu(pi, 0);
2809 mod_phy_reg(pi, 0x63f, (0x1 << 1), 1 << 1);
2810 } else if (playback_status & (0x1 << 1))
2811 mod_phy_reg(pi, 0x453, (0x1 << 15), 0 << 15);
2813 mod_phy_reg(pi, 0x6d6, (0x3 << 0), 1 << 0);
2815 mod_phy_reg(pi, 0x6da, (0x1 << 3), 0 << 3);
2817 mod_phy_reg(pi, 0x6da, (0x1 << 7), 0 << 7);
2819 and_radio_reg(pi, RADIO_2064_REG112, 0xFFF9);
2821 wlc_lcnphy_deaf_mode(pi, false);
2824 static void wlc_lcnphy_clear_trsw_override(phy_info_t *pi)
2827 and_phy_reg(pi, 0x44c, (u16) ~((0x1 << 1) | (0x1 << 0)));
2830 void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b)
2838 tab.tbl_offset = 80;
2840 wlc_lcnphy_read_table(pi, &tab);
2846 u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi)
2853 tab.tbl_ptr = &didq;
2855 tab.tbl_offset = 85;
2856 wlc_lcnphy_read_table(pi, &tab);
2861 static void wlc_lcnphy_txpwrtbl_iqlo_cal(phy_info_t *pi)
2864 lcnphy_txgains_t target_gains, old_gains;
2866 u16 a, b, didq, save_pa_gain = 0;
2867 uint idx, SAVE_txpwrindex = 0xFF;
2869 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
2871 u8 ei0, eq0, fi0, fq0;
2872 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2874 wlc_lcnphy_get_tx_gain(pi, &old_gains);
2875 save_pa_gain = wlc_lcnphy_get_pa_gain(pi);
2877 save_bb_mult = wlc_lcnphy_get_bbmult(pi);
2879 if (SAVE_txpwrctrl == LCNPHY_TX_PWR_CTRL_OFF)
2880 SAVE_txpwrindex = wlc_lcnphy_get_current_tx_pwr_idx(pi);
2882 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
2884 target_gains.gm_gain = 7;
2885 target_gains.pga_gain = 0;
2886 target_gains.pad_gain = 21;
2887 target_gains.dac_gain = 0;
2888 wlc_lcnphy_set_tx_gain(pi, &target_gains);
2889 wlc_lcnphy_set_tx_pwr_by_index(pi, 16);
2891 if (LCNREV_IS(pi->pubpi.phy_rev, 1) || pi_lcn->lcnphy_hw_iqcal_en) {
2893 wlc_lcnphy_set_tx_pwr_by_index(pi, 30);
2895 wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,
2897 lcnphy_recal ? LCNPHY_CAL_RECAL :
2898 LCNPHY_CAL_FULL), false);
2901 wlc_lcnphy_tx_iqlo_soft_cal_full(pi);
2904 wlc_lcnphy_get_radio_loft(pi, &ei0, &eq0, &fi0, &fq0);
2905 if ((ABS((s8) fi0) == 15) && (ABS((s8) fq0) == 15)) {
2906 if (CHSPEC_IS5G(pi->radio_chanspec)) {
2907 target_gains.gm_gain = 255;
2908 target_gains.pga_gain = 255;
2909 target_gains.pad_gain = 0xf0;
2910 target_gains.dac_gain = 0;
2912 target_gains.gm_gain = 7;
2913 target_gains.pga_gain = 45;
2914 target_gains.pad_gain = 186;
2915 target_gains.dac_gain = 0;
2918 if (LCNREV_IS(pi->pubpi.phy_rev, 1)
2919 || pi_lcn->lcnphy_hw_iqcal_en) {
2921 target_gains.pga_gain = 0;
2922 target_gains.pad_gain = 30;
2923 wlc_lcnphy_set_tx_pwr_by_index(pi, 16);
2924 wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,
2925 LCNPHY_CAL_FULL, false);
2928 wlc_lcnphy_tx_iqlo_soft_cal_full(pi);
2933 wlc_lcnphy_get_tx_iqcc(pi, &a, &b);
2935 didq = wlc_lcnphy_get_tx_locc(pi);
2937 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
2942 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
2944 for (idx = 0; idx < 128; idx++) {
2945 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + idx;
2947 wlc_lcnphy_read_table(pi, &tab);
2948 val = (val & 0xfff00000) |
2949 ((u32) (a & 0x3FF) << 10) | (b & 0x3ff);
2950 wlc_lcnphy_write_table(pi, &tab);
2953 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + idx;
2954 wlc_lcnphy_write_table(pi, &tab);
2957 pi_lcn->lcnphy_cal_results.txiqlocal_a = a;
2958 pi_lcn->lcnphy_cal_results.txiqlocal_b = b;
2959 pi_lcn->lcnphy_cal_results.txiqlocal_didq = didq;
2960 pi_lcn->lcnphy_cal_results.txiqlocal_ei0 = ei0;
2961 pi_lcn->lcnphy_cal_results.txiqlocal_eq0 = eq0;
2962 pi_lcn->lcnphy_cal_results.txiqlocal_fi0 = fi0;
2963 pi_lcn->lcnphy_cal_results.txiqlocal_fq0 = fq0;
2965 wlc_lcnphy_set_bbmult(pi, save_bb_mult);
2966 wlc_lcnphy_set_pa_gain(pi, save_pa_gain);
2967 wlc_lcnphy_set_tx_gain(pi, &old_gains);
2969 if (SAVE_txpwrctrl != LCNPHY_TX_PWR_CTRL_OFF)
2970 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
2972 wlc_lcnphy_set_tx_pwr_by_index(pi, SAVE_txpwrindex);
2975 s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode)
2977 u16 tempsenseval1, tempsenseval2;
2981 if (NORADIO_ENAB(pi->pubpi))
2987 (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC));
2989 wlapi_suspend_mac_and_wait(pi->sh->physhim);
2990 wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
2992 tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;
2993 tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;
2995 if (tempsenseval1 > 255)
2996 avg = (s16) (tempsenseval1 - 512);
2998 avg = (s16) tempsenseval1;
3000 if (tempsenseval2 > 255)
3001 avg += (s16) (tempsenseval2 - 512);
3003 avg += (s16) tempsenseval2;
3009 mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
3012 mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
3015 wlapi_enable_mac(pi->sh->physhim);
3020 u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode)
3022 u16 tempsenseval1, tempsenseval2;
3025 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3026 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3028 if (NORADIO_ENAB(pi->pubpi))
3034 (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC));
3036 wlapi_suspend_mac_and_wait(pi->sh->physhim);
3037 wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
3039 tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;
3040 tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;
3042 if (tempsenseval1 > 255)
3043 avg = (int)(tempsenseval1 - 512);
3045 avg = (int)tempsenseval1;
3047 if (pi_lcn->lcnphy_tempsense_option == 1 || pi->hwpwrctrl_capable) {
3048 if (tempsenseval2 > 255)
3049 avg = (int)(avg - tempsenseval2 + 512);
3051 avg = (int)(avg - tempsenseval2);
3053 if (tempsenseval2 > 255)
3054 avg = (int)(avg + tempsenseval2 - 512);
3056 avg = (int)(avg + tempsenseval2);
3062 if (pi_lcn->lcnphy_tempsense_option == 2)
3063 avg = tempsenseval1;
3066 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
3070 mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
3073 mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
3076 wlapi_enable_mac(pi->sh->physhim);
3081 s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode)
3083 s32 degree = wlc_lcnphy_tempsense_new(pi, mode);
3085 ((degree << 10) + LCN_TEMPSENSE_OFFSET + (LCN_TEMPSENSE_DEN >> 1))
3086 / LCN_TEMPSENSE_DEN;
3090 s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode)
3096 if (NORADIO_ENAB(pi->pubpi))
3102 (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC));
3104 wlapi_suspend_mac_and_wait(pi->sh->physhim);
3105 wlc_lcnphy_vbat_temp_sense_setup(pi, VBATSENSE);
3108 vbatsenseval = read_phy_reg(pi, 0x475) & 0x1FF;
3110 if (vbatsenseval > 255)
3111 avg = (s32) (vbatsenseval - 512);
3113 avg = (s32) vbatsenseval;
3116 (avg * LCN_VBAT_SCALE_NOM +
3117 (LCN_VBAT_SCALE_DEN >> 1)) / LCN_VBAT_SCALE_DEN;
3121 wlapi_enable_mac(pi->sh->physhim);
3126 static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode)
3129 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
3131 mod_phy_reg(pi, 0x6d1, (0x1 << 7), (1) << 7);
3133 if (((mode == AFE_CLK_INIT_MODE_PAPD) && (phybw40 == 0)) ||
3134 (mode == AFE_CLK_INIT_MODE_TXRX2X))
3135 write_phy_reg(pi, 0x6d0, 0x7);
3137 wlc_lcnphy_toggle_afe_pwdn(pi);
3141 wlc_lcnphy_rx_iq_est(phy_info_t *pi,
3143 u8 wait_time, lcnphy_iq_est_t *iq_est)
3148 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
3150 mod_phy_reg(pi, 0x6da, (0x1 << 5), (1) << 5);
3152 mod_phy_reg(pi, 0x410, (0x1 << 3), (0) << 3);
3154 mod_phy_reg(pi, 0x482, (0xffff << 0), (num_samps) << 0);
3156 mod_phy_reg(pi, 0x481, (0xff << 0), ((u16) wait_time) << 0);
3158 mod_phy_reg(pi, 0x481, (0x1 << 8), (0) << 8);
3160 mod_phy_reg(pi, 0x481, (0x1 << 9), (1) << 9);
3162 while (read_phy_reg(pi, 0x481) & (0x1 << 9)) {
3164 if (wait_count > (10 * 500)) {
3172 iq_est->iq_prod = ((u32) read_phy_reg(pi, 0x483) << 16) |
3173 (u32) read_phy_reg(pi, 0x484);
3174 iq_est->i_pwr = ((u32) read_phy_reg(pi, 0x485) << 16) |
3175 (u32) read_phy_reg(pi, 0x486);
3176 iq_est->q_pwr = ((u32) read_phy_reg(pi, 0x487) << 16) |
3177 (u32) read_phy_reg(pi, 0x488);
3180 mod_phy_reg(pi, 0x410, (0x1 << 3), (1) << 3);
3182 mod_phy_reg(pi, 0x6da, (0x1 << 5), (0) << 5);
3187 static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps)
3189 #define LCNPHY_MIN_RXIQ_PWR 2
3192 lcnphy_iq_est_t iq_est = { 0, 0, 0 };
3194 s16 iq_nbits, qq_nbits, arsh, brsh;
3197 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3199 a0_new = ((read_phy_reg(pi, 0x645) & (0x3ff << 0)) >> 0);
3200 b0_new = ((read_phy_reg(pi, 0x646) & (0x3ff << 0)) >> 0);
3201 mod_phy_reg(pi, 0x6d1, (0x1 << 2), (0) << 2);
3203 mod_phy_reg(pi, 0x64b, (0x1 << 6), (1) << 6);
3205 wlc_lcnphy_set_rx_iq_comp(pi, 0, 0);
3207 result = wlc_lcnphy_rx_iq_est(pi, num_samps, 32, &iq_est);
3211 iq = (s32) iq_est.iq_prod;
3215 if ((ii + qq) < LCNPHY_MIN_RXIQ_PWR) {
3220 iq_nbits = wlc_phy_nbits(iq);
3221 qq_nbits = wlc_phy_nbits(qq);
3223 arsh = 10 - (30 - iq_nbits);
3225 a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh)));
3226 temp = (s32) (ii >> arsh);
3231 a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh)));
3232 temp = (s32) (ii << -arsh);
3238 brsh = qq_nbits - 31 + 20;
3240 b = (qq << (31 - qq_nbits));
3241 temp = (s32) (ii >> brsh);
3246 b = (qq << (31 - qq_nbits));
3247 temp = (s32) (ii << -brsh);
3254 b = (s32) wlc_phy_sqrt_int((u32) b);
3256 a0_new = (u16) (a & 0x3ff);
3257 b0_new = (u16) (b & 0x3ff);
3260 wlc_lcnphy_set_rx_iq_comp(pi, a0_new, b0_new);
3262 mod_phy_reg(pi, 0x64b, (0x1 << 0), (1) << 0);
3264 mod_phy_reg(pi, 0x64b, (0x1 << 3), (1) << 3);
3266 pi_lcn->lcnphy_cal_results.rxiqcal_coeff_a0 = a0_new;
3267 pi_lcn->lcnphy_cal_results.rxiqcal_coeff_b0 = b0_new;
3273 wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp,
3274 int iqcomp_sz, bool tx_switch, bool rx_switch, int module,
3277 lcnphy_txgains_t old_gains;
3279 u8 tx_gain_index_old = 0;
3280 bool result = false, tx_gain_override_old = false;
3281 u16 i, Core1TxControl_old, RFOverride0_old,
3282 RFOverrideVal0_old, rfoverride2_old, rfoverride2val_old,
3283 rfoverride3_old, rfoverride3val_old, rfoverride4_old,
3284 rfoverride4val_old, afectrlovr_old, afectrlovrval_old;
3286 u32 received_power, rx_pwr_threshold;
3287 u16 old_sslpnCalibClkEnCtrl, old_sslpnRxFeClkEnCtrl;
3288 u16 values_to_save[11];
3290 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3292 ptr = MALLOC(pi->sh->osh, sizeof(s16) * 131);
3299 while (iqcomp_sz--) {
3300 if (iqcomp[iqcomp_sz].chan ==
3301 CHSPEC_CHANNEL(pi->radio_chanspec)) {
3303 wlc_lcnphy_set_rx_iq_comp(pi,
3305 iqcomp[iqcomp_sz].a,
3307 iqcomp[iqcomp_sz].b);
3318 tx_pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3319 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
3321 for (i = 0; i < 11; i++) {
3323 read_radio_reg(pi, rxiq_cal_rf_reg[i]);
3325 Core1TxControl_old = read_phy_reg(pi, 0x631);
3327 or_phy_reg(pi, 0x631, 0x0015);
3329 RFOverride0_old = read_phy_reg(pi, 0x44c);
3330 RFOverrideVal0_old = read_phy_reg(pi, 0x44d);
3331 rfoverride2_old = read_phy_reg(pi, 0x4b0);
3332 rfoverride2val_old = read_phy_reg(pi, 0x4b1);
3333 rfoverride3_old = read_phy_reg(pi, 0x4f9);
3334 rfoverride3val_old = read_phy_reg(pi, 0x4fa);
3335 rfoverride4_old = read_phy_reg(pi, 0x938);
3336 rfoverride4val_old = read_phy_reg(pi, 0x939);
3337 afectrlovr_old = read_phy_reg(pi, 0x43b);
3338 afectrlovrval_old = read_phy_reg(pi, 0x43c);
3339 old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
3340 old_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);
3342 tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
3343 if (tx_gain_override_old) {
3344 wlc_lcnphy_get_tx_gain(pi, &old_gains);
3345 tx_gain_index_old = pi_lcn->lcnphy_current_index;
3348 wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_idx);
3350 mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
3351 mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);
3353 mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
3354 mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
3356 write_radio_reg(pi, RADIO_2064_REG116, 0x06);
3357 write_radio_reg(pi, RADIO_2064_REG12C, 0x07);
3358 write_radio_reg(pi, RADIO_2064_REG06A, 0xd3);
3359 write_radio_reg(pi, RADIO_2064_REG098, 0x03);
3360 write_radio_reg(pi, RADIO_2064_REG00B, 0x7);
3361 mod_radio_reg(pi, RADIO_2064_REG113, 1 << 4, 1 << 4);
3362 write_radio_reg(pi, RADIO_2064_REG01D, 0x01);
3363 write_radio_reg(pi, RADIO_2064_REG114, 0x01);
3364 write_radio_reg(pi, RADIO_2064_REG02E, 0x10);
3365 write_radio_reg(pi, RADIO_2064_REG12A, 0x08);
3367 mod_phy_reg(pi, 0x938, (0x1 << 0), 1 << 0);
3368 mod_phy_reg(pi, 0x939, (0x1 << 0), 0 << 0);
3369 mod_phy_reg(pi, 0x938, (0x1 << 1), 1 << 1);
3370 mod_phy_reg(pi, 0x939, (0x1 << 1), 1 << 1);
3371 mod_phy_reg(pi, 0x938, (0x1 << 2), 1 << 2);
3372 mod_phy_reg(pi, 0x939, (0x1 << 2), 1 << 2);
3373 mod_phy_reg(pi, 0x938, (0x1 << 3), 1 << 3);
3374 mod_phy_reg(pi, 0x939, (0x1 << 3), 1 << 3);
3375 mod_phy_reg(pi, 0x938, (0x1 << 5), 1 << 5);
3376 mod_phy_reg(pi, 0x939, (0x1 << 5), 0 << 5);
3378 mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);
3379 mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);
3381 wlc_lcnphy_start_tx_tone(pi, 2000, 120, 0);
3382 write_phy_reg(pi, 0x6da, 0xffff);
3383 or_phy_reg(pi, 0x6db, 0x3);
3384 wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch);
3385 wlc_lcnphy_rx_gain_override_enable(pi, true);
3388 rx_pwr_threshold = 950;
3389 while (tia_gain > 0) {
3391 wlc_lcnphy_set_rx_gain_by_distribution(pi,
3398 wlc_lcnphy_measure_digital_power(pi, 2000);
3399 if (received_power < rx_pwr_threshold)
3402 result = wlc_lcnphy_calc_rx_iq_comp(pi, 0xffff);
3404 wlc_lcnphy_stop_tx_tone(pi);
3406 write_phy_reg(pi, 0x631, Core1TxControl_old);
3408 write_phy_reg(pi, 0x44c, RFOverrideVal0_old);
3409 write_phy_reg(pi, 0x44d, RFOverrideVal0_old);
3410 write_phy_reg(pi, 0x4b0, rfoverride2_old);
3411 write_phy_reg(pi, 0x4b1, rfoverride2val_old);
3412 write_phy_reg(pi, 0x4f9, rfoverride3_old);
3413 write_phy_reg(pi, 0x4fa, rfoverride3val_old);
3414 write_phy_reg(pi, 0x938, rfoverride4_old);
3415 write_phy_reg(pi, 0x939, rfoverride4val_old);
3416 write_phy_reg(pi, 0x43b, afectrlovr_old);
3417 write_phy_reg(pi, 0x43c, afectrlovrval_old);
3418 write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);
3419 write_phy_reg(pi, 0x6db, old_sslpnRxFeClkEnCtrl);
3421 wlc_lcnphy_clear_trsw_override(pi);
3423 mod_phy_reg(pi, 0x44c, (0x1 << 2), 0 << 2);
3425 for (i = 0; i < 11; i++) {
3426 write_radio_reg(pi, rxiq_cal_rf_reg[i],
3430 if (tx_gain_override_old) {
3431 wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_index_old);
3433 wlc_lcnphy_disable_tx_gain_override(pi);
3434 wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl);
3436 wlc_lcnphy_rx_gain_override_enable(pi, false);
3440 MFREE(pi->sh->osh, ptr, 131 * sizeof(s16));
3444 static void wlc_lcnphy_temp_adj(phy_info_t *pi)
3446 if (NORADIO_ENAB(pi->pubpi))
3450 static void wlc_lcnphy_glacial_timer_based_cal(phy_info_t *pi)
3454 u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3455 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3457 (0 == (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC));
3459 wlapi_suspend_mac_and_wait(pi->sh->physhim);
3460 wlc_lcnphy_deaf_mode(pi, true);
3461 pi->phy_lastcal = pi->sh->now;
3462 pi->phy_forcecal = false;
3463 index = pi_lcn->lcnphy_current_index;
3465 wlc_lcnphy_txpwrtbl_iqlo_cal(pi);
3467 wlc_lcnphy_set_tx_pwr_by_index(pi, index);
3468 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);
3469 wlc_lcnphy_deaf_mode(pi, false);
3471 wlapi_enable_mac(pi->sh->physhim);
3475 static void wlc_lcnphy_periodic_cal(phy_info_t *pi)
3477 bool suspend, full_cal;
3478 const lcnphy_rx_iqcomp_t *rx_iqcomp;
3480 u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3484 s32 tssi, pwr, maxtargetpwr, mintargetpwr;
3485 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3487 if (NORADIO_ENAB(pi->pubpi))
3490 pi->phy_lastcal = pi->sh->now;
3491 pi->phy_forcecal = false;
3493 (pi_lcn->lcnphy_full_cal_channel !=
3494 CHSPEC_CHANNEL(pi->radio_chanspec));
3495 pi_lcn->lcnphy_full_cal_channel = CHSPEC_CHANNEL(pi->radio_chanspec);
3496 index = pi_lcn->lcnphy_current_index;
3499 (0 == (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC));
3502 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000);
3503 wlapi_suspend_mac_and_wait(pi->sh->physhim);
3505 wlc_lcnphy_deaf_mode(pi, true);
3507 wlc_lcnphy_txpwrtbl_iqlo_cal(pi);
3509 rx_iqcomp = lcnphy_rx_iqcomp_table_rev0;
3510 rx_iqcomp_sz = ARRAY_SIZE(lcnphy_rx_iqcomp_table_rev0);
3512 if (LCNREV_IS(pi->pubpi.phy_rev, 1))
3513 wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 40);
3515 wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 127);
3517 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) {
3519 wlc_lcnphy_idle_tssi_est((wlc_phy_t *) pi);
3521 b0 = pi->txpa_2g[0];
3522 b1 = pi->txpa_2g[1];
3523 a1 = pi->txpa_2g[2];
3524 maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1);
3525 mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1);
3527 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
3532 for (tssi = 0; tssi < 128; tssi++) {
3533 pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1);
3534 pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr;
3535 wlc_lcnphy_write_table(pi, &tab);
3540 wlc_lcnphy_set_tx_pwr_by_index(pi, index);
3541 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);
3542 wlc_lcnphy_deaf_mode(pi, false);
3544 wlapi_enable_mac(pi->sh->physhim);
3547 void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode)
3550 int temp1, temp2, temp_diff;
3551 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3554 case PHY_PERICAL_CHAN:
3558 wlc_lcnphy_periodic_cal(pi);
3560 case PHY_PERICAL_PHYINIT:
3561 wlc_lcnphy_periodic_cal(pi);
3563 case PHY_PERICAL_WATCHDOG:
3564 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
3565 temp_new = wlc_lcnphy_tempsense(pi, 0);
3566 temp1 = LCNPHY_TEMPSENSE(temp_new);
3567 temp2 = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_cal_temper);
3568 temp_diff = temp1 - temp2;
3569 if ((pi_lcn->lcnphy_cal_counter > 90) ||
3570 (temp_diff > 60) || (temp_diff < -60)) {
3571 wlc_lcnphy_glacial_timer_based_cal(pi);
3572 wlc_2064_vco_cal(pi);
3573 pi_lcn->lcnphy_cal_temper = temp_new;
3574 pi_lcn->lcnphy_cal_counter = 0;
3576 pi_lcn->lcnphy_cal_counter++;
3579 case LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL:
3580 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
3581 wlc_lcnphy_tx_power_adjustment((wlc_phy_t *) pi);
3589 void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr, s8 *cck_pwr)
3593 status = (read_phy_reg(pi, 0x4ab));
3594 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&
3595 (status & (0x1 << 15))) {
3596 *ofdm_pwr = (s8) (((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
3599 if (wlc_phy_tpc_isenabled_lcnphy(pi))
3600 cck_offset = pi->tx_power_offset[TXP_FIRST_CCK];
3604 *cck_pwr = *ofdm_pwr + cck_offset;
3611 void WLBANDINITFN(wlc_phy_cal_init_lcnphy) (phy_info_t *pi)
3617 static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec)
3619 u8 channel = CHSPEC_CHANNEL(chanspec);
3620 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3622 if (NORADIO_ENAB(pi->pubpi))
3625 if (channel == 14) {
3626 mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);
3629 mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);
3632 pi_lcn->lcnphy_bandedge_corr = 2;
3634 pi_lcn->lcnphy_bandedge_corr = 4;
3636 if (channel == 1 || channel == 2 || channel == 3 ||
3637 channel == 4 || channel == 9 ||
3638 channel == 10 || channel == 11 || channel == 12) {
3639 si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03000c04);
3640 si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x0);
3641 si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x200005c0);
3643 si_pmu_pllupd(pi->sh->sih);
3644 write_phy_reg(pi, 0x942, 0);
3645 wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);
3646 pi_lcn->lcnphy_spurmod = 0;
3647 mod_phy_reg(pi, 0x424, (0xff << 8), (0x1b) << 8);
3649 write_phy_reg(pi, 0x425, 0x5907);
3651 si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03140c04);
3652 si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x333333);
3653 si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x202c2820);
3655 si_pmu_pllupd(pi->sh->sih);
3656 write_phy_reg(pi, 0x942, 0);
3657 wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
3659 pi_lcn->lcnphy_spurmod = 0;
3660 mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8);
3662 write_phy_reg(pi, 0x425, 0x590a);
3665 or_phy_reg(pi, 0x44a, 0x44);
3666 write_phy_reg(pi, 0x44a, 0x80);
3669 void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi)
3673 phy_info_t *pi = (phy_info_t *) ppi;
3674 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3675 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3676 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && SAVE_txpwrctrl) {
3677 index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
3678 index2 = (u16) (index * 2);
3679 mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);
3681 pi_lcn->lcnphy_current_index = (s8)
3682 ((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);
3686 static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b)
3688 mod_phy_reg(pi, 0x645, (0x3ff << 0), (a) << 0);
3690 mod_phy_reg(pi, 0x646, (0x3ff << 0), (b) << 0);
3692 mod_phy_reg(pi, 0x647, (0x3ff << 0), (a) << 0);
3694 mod_phy_reg(pi, 0x648, (0x3ff << 0), (b) << 0);
3696 mod_phy_reg(pi, 0x649, (0x3ff << 0), (a) << 0);
3698 mod_phy_reg(pi, 0x64a, (0x3ff << 0), (b) << 0);
3702 void WLBANDINITFN(wlc_phy_init_lcnphy) (phy_info_t *pi)
3705 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3706 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
3708 pi_lcn->lcnphy_cal_counter = 0;
3709 pi_lcn->lcnphy_cal_temper = pi_lcn->lcnphy_rawtempsense;
3711 or_phy_reg(pi, 0x44a, 0x80);
3712 and_phy_reg(pi, 0x44a, 0x7f);
3714 wlc_lcnphy_afe_clk_init(pi, AFE_CLK_INIT_MODE_TXRX2X);
3716 write_phy_reg(pi, 0x60a, 160);
3718 write_phy_reg(pi, 0x46a, 25);
3720 wlc_lcnphy_baseband_init(pi);
3722 wlc_lcnphy_radio_init(pi);
3724 if (CHSPEC_IS2G(pi->radio_chanspec))
3725 wlc_lcnphy_tx_pwr_ctrl_init((wlc_phy_t *) pi);
3727 wlc_phy_chanspec_set((wlc_phy_t *) pi, pi->radio_chanspec);
3729 si_pmu_regcontrol(pi->sh->sih, 0, 0xf, 0x9);
3731 si_pmu_chipcontrol(pi->sh->sih, 0, 0xffffffff, 0x03CDDDDD);
3733 if ((pi->sh->boardflags & BFL_FEM)
3734 && wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
3735 wlc_lcnphy_set_tx_pwr_by_index(pi, FIXED_TXPWR);
3737 wlc_lcnphy_agc_temp_init(pi);
3739 wlc_lcnphy_temp_adj(pi);
3741 mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
3744 mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
3746 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);
3747 pi_lcn->lcnphy_noise_samples = LCNPHY_NOISE_SAMPLES_DEFAULT;
3748 wlc_lcnphy_calib_modes(pi, PHY_PERICAL_PHYINIT);
3752 wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi, u16 *values_to_save)
3756 for (i = 0; i < 20; i++) {
3758 read_radio_reg(pi, iqlo_loopback_rf_regs[i]);
3761 mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
3762 mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
3764 mod_phy_reg(pi, 0x44c, (0x1 << 11), 1 << 11);
3765 mod_phy_reg(pi, 0x44d, (0x1 << 13), 0 << 13);
3767 mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
3768 mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
3770 mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);
3771 mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);
3773 if (LCNREV_IS(pi->pubpi.phy_rev, 2))
3774 and_radio_reg(pi, RADIO_2064_REG03A, 0xFD);
3776 and_radio_reg(pi, RADIO_2064_REG03A, 0xF9);
3777 or_radio_reg(pi, RADIO_2064_REG11A, 0x1);
3779 or_radio_reg(pi, RADIO_2064_REG036, 0x01);
3780 or_radio_reg(pi, RADIO_2064_REG11A, 0x18);
3783 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
3784 if (CHSPEC_IS5G(pi->radio_chanspec))
3785 mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);
3787 or_radio_reg(pi, RADIO_2064_REG03A, 1);
3789 if (CHSPEC_IS5G(pi->radio_chanspec))
3790 mod_radio_reg(pi, RADIO_2064_REG03A, 3, 1);
3792 or_radio_reg(pi, RADIO_2064_REG03A, 0x3);
3797 write_radio_reg(pi, RADIO_2064_REG025, 0xF);
3798 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
3799 if (CHSPEC_IS5G(pi->radio_chanspec))
3800 mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x4);
3802 mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x6);
3804 if (CHSPEC_IS5G(pi->radio_chanspec))
3805 mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x4 << 1);
3807 mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x6 << 1);
3812 write_radio_reg(pi, RADIO_2064_REG005, 0x8);
3813 or_radio_reg(pi, RADIO_2064_REG112, 0x80);
3816 or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);
3817 or_radio_reg(pi, RADIO_2064_REG11F, 0x44);
3820 or_radio_reg(pi, RADIO_2064_REG00B, 0x7);
3821 or_radio_reg(pi, RADIO_2064_REG113, 0x10);
3824 write_radio_reg(pi, RADIO_2064_REG007, 0x1);
3828 mod_radio_reg(pi, RADIO_2064_REG0FC, 0x3 << 0, (vmid >> 8) & 0x3);
3829 write_radio_reg(pi, RADIO_2064_REG0FD, (vmid & 0xff));
3830 or_radio_reg(pi, RADIO_2064_REG11F, 0x44);
3833 or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);
3835 write_radio_reg(pi, RADIO_2064_REG012, 0x02);
3836 or_radio_reg(pi, RADIO_2064_REG112, 0x06);
3837 write_radio_reg(pi, RADIO_2064_REG036, 0x11);
3838 write_radio_reg(pi, RADIO_2064_REG059, 0xcc);
3839 write_radio_reg(pi, RADIO_2064_REG05C, 0x2e);
3840 write_radio_reg(pi, RADIO_2064_REG078, 0xd7);
3841 write_radio_reg(pi, RADIO_2064_REG092, 0x15);
3845 wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo, u16 thresh,
3848 u32 curval1, curval2, stpptr, curptr, strptr, val;
3849 u16 sslpnCalibClkEnCtrl, timer;
3850 u16 old_sslpnCalibClkEnCtrl;
3852 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3855 old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
3857 curval1 = R_REG(pi->sh->osh, &pi->regs->psm_corectlsts);
3859 W_REG(pi->sh->osh, &pi->regs->psm_corectlsts, ((1 << 6) | curval1));
3861 W_REG(pi->sh->osh, &pi->regs->smpl_clct_strptr, 0x7E00);
3862 W_REG(pi->sh->osh, &pi->regs->smpl_clct_stpptr, 0x8000);
3864 curval2 = R_REG(pi->sh->osh, &pi->regs->psm_phy_hdr_param);
3865 W_REG(pi->sh->osh, &pi->regs->psm_phy_hdr_param, curval2 | 0x30);
3867 write_phy_reg(pi, 0x555, 0x0);
3868 write_phy_reg(pi, 0x5a6, 0x5);
3870 write_phy_reg(pi, 0x5a2, (u16) (mode | mode << 6));
3871 write_phy_reg(pi, 0x5cf, 3);
3872 write_phy_reg(pi, 0x5a5, 0x3);
3873 write_phy_reg(pi, 0x583, 0x0);
3874 write_phy_reg(pi, 0x584, 0x0);
3875 write_phy_reg(pi, 0x585, 0x0fff);
3876 write_phy_reg(pi, 0x586, 0x0000);
3878 write_phy_reg(pi, 0x580, 0x4501);
3880 sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
3881 write_phy_reg(pi, 0x6da, (u32) (sslpnCalibClkEnCtrl | 0x2008));
3882 stpptr = R_REG(pi->sh->osh, &pi->regs->smpl_clct_stpptr);
3883 curptr = R_REG(pi->sh->osh, &pi->regs->smpl_clct_curptr);
3886 curptr = R_REG(pi->sh->osh, &pi->regs->smpl_clct_curptr);
3888 } while ((curptr != stpptr) && (timer < 500));
3890 W_REG(pi->sh->osh, &pi->regs->psm_phy_hdr_param, 0x2);
3892 W_REG(pi->sh->osh, &pi->regs->tplatewrptr, strptr);
3893 while (strptr < 0x8000) {
3894 val = R_REG(pi->sh->osh, &pi->regs->tplatewrdata);
3895 imag = ((val >> 16) & 0x3ff);
3896 real = ((val) & 0x3ff);
3903 if (pi_lcn->lcnphy_iqcal_swp_dis)
3904 ptr[(strptr - 0x7E00) / 4] = real;
3906 ptr[(strptr - 0x7E00) / 4] = imag;
3907 if (clip_detect_algo) {
3908 if (imag > thresh || imag < -thresh) {
3916 write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);
3917 W_REG(pi->sh->osh, &pi->regs->psm_phy_hdr_param, curval2);
3918 W_REG(pi->sh->osh, &pi->regs->psm_corectlsts, curval1);
3921 static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi)
3923 lcnphy_unsign16_struct iqcc0, locc2, locc3, locc4;
3925 wlc_lcnphy_set_cc(pi, 0, 0, 0);
3926 wlc_lcnphy_set_cc(pi, 2, 0, 0);
3927 wlc_lcnphy_set_cc(pi, 3, 0, 0);
3928 wlc_lcnphy_set_cc(pi, 4, 0, 0);
3930 wlc_lcnphy_a1(pi, 4, 0, 0);
3931 wlc_lcnphy_a1(pi, 3, 0, 0);
3932 wlc_lcnphy_a1(pi, 2, 3, 2);
3933 wlc_lcnphy_a1(pi, 0, 5, 8);
3934 wlc_lcnphy_a1(pi, 2, 2, 1);
3935 wlc_lcnphy_a1(pi, 0, 4, 3);
3937 iqcc0 = wlc_lcnphy_get_cc(pi, 0);
3938 locc2 = wlc_lcnphy_get_cc(pi, 2);
3939 locc3 = wlc_lcnphy_get_cc(pi, 3);
3940 locc4 = wlc_lcnphy_get_cc(pi, 4);
3944 wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x, s16 coeff_y)
3951 wlc_lcnphy_set_tx_iqcc(pi, coeff_x, coeff_y);
3954 di0dq0 = (coeff_x & 0xff) << 8 | (coeff_y & 0xff);
3955 wlc_lcnphy_set_tx_locc(pi, di0dq0);
3958 k = wlc_lcnphy_calc_floor(coeff_x, 0);
3960 k = wlc_lcnphy_calc_floor(coeff_x, 1);
3962 data_rf = (x * 16 + y);
3963 write_radio_reg(pi, RADIO_2064_REG089, data_rf);
3964 k = wlc_lcnphy_calc_floor(coeff_y, 0);
3966 k = wlc_lcnphy_calc_floor(coeff_y, 1);
3968 data_rf = (x * 16 + y);
3969 write_radio_reg(pi, RADIO_2064_REG08A, data_rf);
3972 k = wlc_lcnphy_calc_floor(coeff_x, 0);
3974 k = wlc_lcnphy_calc_floor(coeff_x, 1);
3976 data_rf = (x * 16 + y);
3977 write_radio_reg(pi, RADIO_2064_REG08B, data_rf);
3978 k = wlc_lcnphy_calc_floor(coeff_y, 0);
3980 k = wlc_lcnphy_calc_floor(coeff_y, 1);
3982 data_rf = (x * 16 + y);
3983 write_radio_reg(pi, RADIO_2064_REG08C, data_rf);
3988 static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type)
3991 u8 di0, dq0, ei, eq, fi, fq;
3992 lcnphy_unsign16_struct cc;
3997 wlc_lcnphy_get_tx_iqcc(pi, &a, &b);
4002 didq = wlc_lcnphy_get_tx_locc(pi);
4003 di0 = (((didq & 0xff00) << 16) >> 24);
4004 dq0 = (((didq & 0x00ff) << 24) >> 24);
4009 wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);
4014 wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);
4023 wlc_lcnphy_a1(phy_info_t *pi, int cal_type, int num_levels, int step_size_lg2)
4025 const lcnphy_spb_tone_t *phy_c1;
4026 lcnphy_spb_tone_t phy_c2;
4027 lcnphy_unsign16_struct phy_c3;
4028 int phy_c4, phy_c5, k, l, j, phy_c6;
4029 u16 phy_c7, phy_c8, phy_c9;
4030 s16 phy_c10, phy_c11, phy_c12, phy_c13, phy_c14, phy_c15, phy_c16;
4032 s32 phy_c18, phy_c19;
4033 u32 phy_c20, phy_c21;
4034 bool phy_c22, phy_c23, phy_c24, phy_c25;
4035 u16 phy_c26, phy_c27;
4036 u16 phy_c28, phy_c29, phy_c30;
4040 phy_c10 = phy_c13 = phy_c14 = phy_c8 = 0;
4041 ptr = MALLOC(pi->sh->osh, sizeof(s16) * 131);
4046 phy_c32 = MALLOC(pi->sh->osh, sizeof(u16) * 20);
4047 if (NULL == phy_c32) {
4050 phy_c26 = read_phy_reg(pi, 0x6da);
4051 phy_c27 = read_phy_reg(pi, 0x6db);
4052 phy_c31 = read_radio_reg(pi, RADIO_2064_REG026);
4053 write_phy_reg(pi, 0x93d, 0xC0);
4055 wlc_lcnphy_start_tx_tone(pi, 3750, 88, 0);
4056 write_phy_reg(pi, 0x6da, 0xffff);
4057 or_phy_reg(pi, 0x6db, 0x3);
4059 wlc_lcnphy_tx_iqlo_loopback(pi, phy_c32);
4061 phy_c28 = read_phy_reg(pi, 0x938);
4062 phy_c29 = read_phy_reg(pi, 0x4d7);
4063 phy_c30 = read_phy_reg(pi, 0x4d8);
4064 or_phy_reg(pi, 0x938, 0x1 << 2);
4065 or_phy_reg(pi, 0x4d7, 0x1 << 2);
4066 or_phy_reg(pi, 0x4d7, 0x1 << 3);
4067 mod_phy_reg(pi, 0x4d7, (0x7 << 12), 0x2 << 12);
4068 or_phy_reg(pi, 0x4d8, 1 << 0);
4069 or_phy_reg(pi, 0x4d8, 1 << 1);
4070 mod_phy_reg(pi, 0x4d8, (0x3ff << 2), 0x23A << 2);
4071 mod_phy_reg(pi, 0x4d8, (0x7 << 12), 0x7 << 12);
4072 phy_c1 = &lcnphy_spb_tone_3750[0];
4075 if (num_levels == 0) {
4076 if (cal_type != 0) {
4082 if (step_size_lg2 == 0) {
4083 if (cal_type != 0) {
4090 phy_c7 = (1 << step_size_lg2);
4091 phy_c3 = wlc_lcnphy_get_cc(pi, cal_type);
4092 phy_c15 = (s16) phy_c3.re;
4093 phy_c16 = (s16) phy_c3.im;
4094 if (cal_type == 2) {
4095 if (phy_c3.re > 127)
4096 phy_c15 = phy_c3.re - 256;
4097 if (phy_c3.im > 127)
4098 phy_c16 = phy_c3.im - 256;
4100 wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);
4102 for (phy_c8 = 0; phy_c7 != 0 && phy_c8 < num_levels; phy_c8++) {
4120 phy_c9 = read_phy_reg(pi, 0x93d);
4121 phy_c9 = 2 * phy_c9;
4126 write_radio_reg(pi, RADIO_2064_REG026,
4127 (phy_c5 & 0x7) | ((phy_c5 & 0x7) << 4));
4131 wlc_lcnphy_samp_cap(pi, 1, phy_c9, &ptr[0], 2);
4136 if ((phy_c22 != phy_c24) && (!phy_c25))
4140 if (phy_c5 <= 0 || phy_c5 >= 7)
4148 else if (phy_c5 > 7)
4151 for (k = -phy_c7; k <= phy_c7; k += phy_c7) {
4152 for (l = -phy_c7; l <= phy_c7; l += phy_c7) {
4153 phy_c11 = phy_c15 + k;
4154 phy_c12 = phy_c16 + l;
4156 if (phy_c11 < -phy_c10)
4158 else if (phy_c11 > phy_c10)
4160 if (phy_c12 < -phy_c10)
4162 else if (phy_c12 > phy_c10)
4164 wlc_lcnphy_set_cc(pi, cal_type, phy_c11,
4167 wlc_lcnphy_samp_cap(pi, 0, 0, ptr, 2);
4171 for (j = 0; j < 128; j++) {
4172 if (cal_type != 0) {
4173 phy_c6 = j % phy_c4;
4175 phy_c6 = (2 * j) % phy_c4;
4177 phy_c2.re = phy_c1[phy_c6].re;
4178 phy_c2.im = phy_c1[phy_c6].im;
4180 phy_c18 = phy_c18 + phy_c17 * phy_c2.re;
4181 phy_c19 = phy_c19 + phy_c17 * phy_c2.im;
4184 phy_c18 = phy_c18 >> 10;
4185 phy_c19 = phy_c19 >> 10;
4187 ((phy_c18 * phy_c18) + (phy_c19 * phy_c19));
4189 if (phy_c23 || phy_c20 < phy_c21) {
4200 phy_c7 = phy_c7 >> 1;
4201 wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);
4206 wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, phy_c32);
4207 wlc_lcnphy_stop_tx_tone(pi);
4208 write_phy_reg(pi, 0x6da, phy_c26);
4209 write_phy_reg(pi, 0x6db, phy_c27);
4210 write_phy_reg(pi, 0x938, phy_c28);
4211 write_phy_reg(pi, 0x4d7, phy_c29);
4212 write_phy_reg(pi, 0x4d8, phy_c30);
4213 write_radio_reg(pi, RADIO_2064_REG026, phy_c31);
4215 MFREE(pi->sh->osh, phy_c32, 20 * sizeof(u16));
4216 MFREE(pi->sh->osh, ptr, 131 * sizeof(s16));
4220 wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi, u16 *values_to_save)
4224 and_phy_reg(pi, 0x44c, 0x0 >> 11);
4226 and_phy_reg(pi, 0x43b, 0xC);
4228 for (i = 0; i < 20; i++) {
4229 write_radio_reg(pi, iqlo_loopback_rf_regs[i],
4235 WLBANDINITFN(wlc_lcnphy_load_tx_gain_table) (phy_info_t *pi,
4236 const lcnphy_tx_gain_tbl_entry *
4244 if (CHSPEC_IS5G(pi->radio_chanspec))
4249 if (pi->sh->boardflags & BFL_FEM)
4251 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
4256 for (j = 0; j < 128; j++) {
4257 gm_gain = gain_table[j].gm;
4258 val = (((u32) pa_gain << 24) |
4259 (gain_table[j].pad << 16) |
4260 (gain_table[j].pga << 8) | gm_gain);
4262 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + j;
4263 wlc_lcnphy_write_table(pi, &tab);
4265 val = (gain_table[j].dac << 28) | (gain_table[j].bb_mult << 20);
4266 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + j;
4267 wlc_lcnphy_write_table(pi, &tab);
4271 static void wlc_lcnphy_load_rfpower(phy_info_t *pi)
4274 u32 val, bbmult, rfgain;
4276 u8 scale_factor = 1;
4277 s16 temp, temp1, temp2, qQ, qQ1, qQ2, shift;
4279 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
4283 for (index = 0; index < 128; index++) {
4284 tab.tbl_ptr = &bbmult;
4285 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index;
4286 wlc_lcnphy_read_table(pi, &tab);
4287 bbmult = bbmult >> 20;
4289 tab.tbl_ptr = &rfgain;
4290 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index;
4291 wlc_lcnphy_read_table(pi, &tab);
4293 qm_log10((s32) (bbmult), 0, &temp1, &qQ1);
4294 qm_log10((s32) (1 << 6), 0, &temp2, &qQ2);
4297 temp2 = qm_shr16(temp2, qQ2 - qQ1);
4300 temp1 = qm_shr16(temp1, qQ1 - qQ2);
4303 temp = qm_sub16(temp1, temp2);
4310 val = (((index << shift) + (5 * temp) +
4311 (1 << (scale_factor + shift - 3))) >> (scale_factor +
4315 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index;
4316 wlc_lcnphy_write_table(pi, &tab);
4320 static void WLBANDINITFN(wlc_lcnphy_tbl_init) (phy_info_t *pi)
4327 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
4329 for (idx = 0; idx < dot11lcnphytbl_info_sz_rev0; idx++) {
4330 wlc_lcnphy_write_table(pi, &dot11lcnphytbl_info_rev0[idx]);
4333 if (pi->sh->boardflags & BFL_FEM_BT) {
4334 tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
4340 wlc_lcnphy_write_table(pi, &tab);
4343 tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
4350 wlc_lcnphy_write_table(pi, &tab);
4354 wlc_lcnphy_write_table(pi, &tab);
4358 wlc_lcnphy_write_table(pi, &tab);
4360 if (CHSPEC_IS2G(pi->radio_chanspec)) {
4361 if (pi->sh->boardflags & BFL_FEM)
4362 wlc_lcnphy_load_tx_gain_table(pi,
4363 dot11lcnphy_2GHz_extPA_gaintable_rev0);
4365 wlc_lcnphy_load_tx_gain_table(pi,
4366 dot11lcnphy_2GHz_gaintable_rev0);
4369 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
4370 if (CHSPEC_IS2G(pi->radio_chanspec)) {
4372 idx < dot11lcnphytbl_rx_gain_info_2G_rev2_sz;
4374 if (pi->sh->boardflags & BFL_EXTLNA)
4375 wlc_lcnphy_write_table(pi,
4376 &dot11lcnphytbl_rx_gain_info_extlna_2G_rev2
4379 wlc_lcnphy_write_table(pi,
4380 &dot11lcnphytbl_rx_gain_info_2G_rev2
4384 idx < dot11lcnphytbl_rx_gain_info_5G_rev2_sz;
4386 if (pi->sh->boardflags & BFL_EXTLNA_5GHz)
4387 wlc_lcnphy_write_table(pi,
4388 &dot11lcnphytbl_rx_gain_info_extlna_5G_rev2
4391 wlc_lcnphy_write_table(pi,
4392 &dot11lcnphytbl_rx_gain_info_5G_rev2
4397 if ((pi->sh->boardflags & BFL_FEM)
4398 && !(pi->sh->boardflags & BFL_FEM_BT))
4399 wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313_epa);
4400 else if (pi->sh->boardflags & BFL_FEM_BT) {
4401 if (pi->sh->boardrev < 0x1250)
4402 wlc_lcnphy_write_table(pi,
4403 &dot11lcn_sw_ctrl_tbl_info_4313_bt_epa);
4405 wlc_lcnphy_write_table(pi,
4406 &dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250);
4408 wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313);
4410 wlc_lcnphy_load_rfpower(pi);
4412 wlc_lcnphy_clear_papd_comptable(pi);
4415 static void WLBANDINITFN(wlc_lcnphy_rev0_baseband_init) (phy_info_t *pi)
4418 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
4420 write_radio_reg(pi, RADIO_2064_REG11C, 0x0);
4422 write_phy_reg(pi, 0x43b, 0x0);
4423 write_phy_reg(pi, 0x43c, 0x0);
4424 write_phy_reg(pi, 0x44c, 0x0);
4425 write_phy_reg(pi, 0x4e6, 0x0);
4426 write_phy_reg(pi, 0x4f9, 0x0);
4427 write_phy_reg(pi, 0x4b0, 0x0);
4428 write_phy_reg(pi, 0x938, 0x0);
4429 write_phy_reg(pi, 0x4b0, 0x0);
4430 write_phy_reg(pi, 0x44e, 0);
4432 or_phy_reg(pi, 0x567, 0x03);
4434 or_phy_reg(pi, 0x44a, 0x44);
4435 write_phy_reg(pi, 0x44a, 0x80);
4437 if (!(pi->sh->boardflags & BFL_FEM))
4438 wlc_lcnphy_set_tx_pwr_by_index(pi, 52);
4442 afectrl1 = (u16) ((pi_lcn->lcnphy_rssi_vf) |
4443 (pi_lcn->lcnphy_rssi_vc << 4) | (pi_lcn->
4446 write_phy_reg(pi, 0x43e, afectrl1);
4449 mod_phy_reg(pi, 0x634, (0xff << 0), 0xC << 0);
4450 if (pi->sh->boardflags & BFL_FEM) {
4451 mod_phy_reg(pi, 0x634, (0xff << 0), 0xA << 0);
4453 write_phy_reg(pi, 0x910, 0x1);
4456 mod_phy_reg(pi, 0x448, (0x3 << 8), 1 << 8);
4457 mod_phy_reg(pi, 0x608, (0xff << 0), 0x17 << 0);
4458 mod_phy_reg(pi, 0x604, (0x7ff << 0), 0x3EA << 0);
4462 static void WLBANDINITFN(wlc_lcnphy_rev2_baseband_init) (phy_info_t *pi)
4464 if (CHSPEC_IS5G(pi->radio_chanspec)) {
4465 mod_phy_reg(pi, 0x416, (0xff << 0), 80 << 0);
4467 mod_phy_reg(pi, 0x416, (0xff << 8), 80 << 8);
4471 static void wlc_lcnphy_agc_temp_init(phy_info_t *pi)
4476 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
4478 if (NORADIO_ENAB(pi->pubpi))
4481 temp = (s16) read_phy_reg(pi, 0x4df);
4482 pi_lcn->lcnphy_ofdmgainidxtableoffset = (temp & (0xff << 0)) >> 0;
4484 if (pi_lcn->lcnphy_ofdmgainidxtableoffset > 127)
4485 pi_lcn->lcnphy_ofdmgainidxtableoffset -= 256;
4487 pi_lcn->lcnphy_dsssgainidxtableoffset = (temp & (0xff << 8)) >> 8;
4489 if (pi_lcn->lcnphy_dsssgainidxtableoffset > 127)
4490 pi_lcn->lcnphy_dsssgainidxtableoffset -= 256;
4492 tab.tbl_ptr = tableBuffer;
4495 tab.tbl_offset = 59;
4497 wlc_lcnphy_read_table(pi, &tab);
4499 if (tableBuffer[0] > 63)
4500 tableBuffer[0] -= 128;
4501 pi_lcn->lcnphy_tr_R_gain_val = tableBuffer[0];
4503 if (tableBuffer[1] > 63)
4504 tableBuffer[1] -= 128;
4505 pi_lcn->lcnphy_tr_T_gain_val = tableBuffer[1];
4507 temp = (s16) (read_phy_reg(pi, 0x434)
4511 pi_lcn->lcnphy_input_pwr_offset_db = (s8) temp;
4513 pi_lcn->lcnphy_Med_Low_Gain_db = (read_phy_reg(pi, 0x424)
4516 pi_lcn->lcnphy_Very_Low_Gain_db = (read_phy_reg(pi, 0x425)
4520 tab.tbl_ptr = tableBuffer;
4522 tab.tbl_id = LCNPHY_TBL_ID_GAIN_IDX;
4523 tab.tbl_offset = 28;
4525 wlc_lcnphy_read_table(pi, &tab);
4527 pi_lcn->lcnphy_gain_idx_14_lowword = tableBuffer[0];
4528 pi_lcn->lcnphy_gain_idx_14_hiword = tableBuffer[1];
4532 static void WLBANDINITFN(wlc_lcnphy_bu_tweaks) (phy_info_t *pi)
4534 if (NORADIO_ENAB(pi->pubpi))
4537 or_phy_reg(pi, 0x805, 0x1);
4539 mod_phy_reg(pi, 0x42f, (0x7 << 0), (0x3) << 0);
4541 mod_phy_reg(pi, 0x030, (0x7 << 0), (0x3) << 0);
4543 write_phy_reg(pi, 0x414, 0x1e10);
4544 write_phy_reg(pi, 0x415, 0x0640);
4546 mod_phy_reg(pi, 0x4df, (0xff << 8), -9 << 8);
4548 or_phy_reg(pi, 0x44a, 0x44);
4549 write_phy_reg(pi, 0x44a, 0x80);
4550 mod_phy_reg(pi, 0x434, (0xff << 0), (0xFD) << 0);
4552 mod_phy_reg(pi, 0x420, (0xff << 0), (16) << 0);
4554 if (!(pi->sh->boardrev < 0x1204))
4555 mod_radio_reg(pi, RADIO_2064_REG09B, 0xF0, 0xF0);
4557 write_phy_reg(pi, 0x7d6, 0x0902);
4558 mod_phy_reg(pi, 0x429, (0xf << 0), (0x9) << 0);
4560 mod_phy_reg(pi, 0x429, (0x3f << 4), (0xe) << 4);
4562 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
4563 mod_phy_reg(pi, 0x423, (0xff << 0), (0x46) << 0);
4565 mod_phy_reg(pi, 0x411, (0xff << 0), (1) << 0);
4567 mod_phy_reg(pi, 0x434, (0xff << 0), (0xFF) << 0);
4569 mod_phy_reg(pi, 0x656, (0xf << 0), (2) << 0);
4571 mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2);
4573 mod_radio_reg(pi, RADIO_2064_REG0F7, 0x4, 0x4);
4574 mod_radio_reg(pi, RADIO_2064_REG0F1, 0x3, 0);
4575 mod_radio_reg(pi, RADIO_2064_REG0F2, 0xF8, 0x90);
4576 mod_radio_reg(pi, RADIO_2064_REG0F3, 0x3, 0x2);
4577 mod_radio_reg(pi, RADIO_2064_REG0F3, 0xf0, 0xa0);
4579 mod_radio_reg(pi, RADIO_2064_REG11F, 0x2, 0x2);
4581 wlc_lcnphy_clear_tx_power_offsets(pi);
4582 mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (10) << 6);
4587 static void WLBANDINITFN(wlc_lcnphy_baseband_init) (phy_info_t *pi)
4590 wlc_lcnphy_tbl_init(pi);
4591 wlc_lcnphy_rev0_baseband_init(pi);
4592 if (LCNREV_IS(pi->pubpi.phy_rev, 2))
4593 wlc_lcnphy_rev2_baseband_init(pi);
4594 wlc_lcnphy_bu_tweaks(pi);
4597 static void WLBANDINITFN(wlc_radio_2064_init) (phy_info_t *pi)
4600 lcnphy_radio_regs_t *lcnphyregs = NULL;
4602 lcnphyregs = lcnphy_radio_regs_2064;
4604 for (i = 0; lcnphyregs[i].address != 0xffff; i++)
4605 if (CHSPEC_IS5G(pi->radio_chanspec) && lcnphyregs[i].do_init_a)
4607 ((lcnphyregs[i].address & 0x3fff) |
4608 RADIO_DEFAULT_CORE),
4609 (u16) lcnphyregs[i].init_a);
4610 else if (lcnphyregs[i].do_init_g)
4612 ((lcnphyregs[i].address & 0x3fff) |
4613 RADIO_DEFAULT_CORE),
4614 (u16) lcnphyregs[i].init_g);
4616 write_radio_reg(pi, RADIO_2064_REG032, 0x62);
4617 write_radio_reg(pi, RADIO_2064_REG033, 0x19);
4619 write_radio_reg(pi, RADIO_2064_REG090, 0x10);
4621 write_radio_reg(pi, RADIO_2064_REG010, 0x00);
4623 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
4625 write_radio_reg(pi, RADIO_2064_REG060, 0x7f);
4626 write_radio_reg(pi, RADIO_2064_REG061, 0x72);
4627 write_radio_reg(pi, RADIO_2064_REG062, 0x7f);
4630 write_radio_reg(pi, RADIO_2064_REG01D, 0x02);
4631 write_radio_reg(pi, RADIO_2064_REG01E, 0x06);
4633 mod_phy_reg(pi, 0x4ea, (0x7 << 0), 0 << 0);
4635 mod_phy_reg(pi, 0x4ea, (0x7 << 3), 1 << 3);
4637 mod_phy_reg(pi, 0x4ea, (0x7 << 6), 2 << 6);
4639 mod_phy_reg(pi, 0x4ea, (0x7 << 9), 3 << 9);
4641 mod_phy_reg(pi, 0x4ea, (0x7 << 12), 4 << 12);
4643 write_phy_reg(pi, 0x4ea, 0x4688);
4645 mod_phy_reg(pi, 0x4eb, (0x7 << 0), 2 << 0);
4647 mod_phy_reg(pi, 0x4eb, (0x7 << 6), 0 << 6);
4649 mod_phy_reg(pi, 0x46a, (0xffff << 0), 25 << 0);
4651 wlc_lcnphy_set_tx_locc(pi, 0);
4653 wlc_lcnphy_rcal(pi);
4655 wlc_lcnphy_rc_cal(pi);
4658 static void WLBANDINITFN(wlc_lcnphy_radio_init) (phy_info_t *pi)
4660 if (NORADIO_ENAB(pi->pubpi))
4663 wlc_radio_2064_init(pi);
4666 static void wlc_lcnphy_rcal(phy_info_t *pi)
4670 if (NORADIO_ENAB(pi->pubpi))
4673 and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);
4675 or_radio_reg(pi, RADIO_2064_REG004, 0x40);
4676 or_radio_reg(pi, RADIO_2064_REG120, 0x10);
4678 or_radio_reg(pi, RADIO_2064_REG078, 0x80);
4679 or_radio_reg(pi, RADIO_2064_REG129, 0x02);
4681 or_radio_reg(pi, RADIO_2064_REG057, 0x01);
4683 or_radio_reg(pi, RADIO_2064_REG05B, 0x02);
4685 SPINWAIT(!wlc_radio_2064_rcal_done(pi), 10 * 1000 * 1000);
4687 if (wlc_radio_2064_rcal_done(pi)) {
4688 rcal_value = (u8) read_radio_reg(pi, RADIO_2064_REG05C);
4689 rcal_value = rcal_value & 0x1f;
4692 and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);
4694 and_radio_reg(pi, RADIO_2064_REG057, 0xFE);
4697 static void wlc_lcnphy_rc_cal(phy_info_t *pi)
4702 if (NORADIO_ENAB(pi->pubpi))
4705 dflt_rc_cal_val = 7;
4706 if (LCNREV_IS(pi->pubpi.phy_rev, 1))
4707 dflt_rc_cal_val = 11;
4709 (dflt_rc_cal_val << 10) | (dflt_rc_cal_val << 5) |
4711 write_phy_reg(pi, 0x933, flt_val);
4712 write_phy_reg(pi, 0x934, flt_val);
4713 write_phy_reg(pi, 0x935, flt_val);
4714 write_phy_reg(pi, 0x936, flt_val);
4715 write_phy_reg(pi, 0x937, (flt_val & 0x1FF));
4720 static bool wlc_phy_txpwr_srom_read_lcnphy(phy_info_t *pi)
4724 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
4726 if (CHSPEC_IS2G(pi->radio_chanspec)) {
4728 u32 offset_ofdm, offset_mcs;
4730 pi_lcn->lcnphy_tr_isolation_mid =
4731 (u8) PHY_GETINTVAR(pi, "triso2g");
4733 pi_lcn->lcnphy_rx_power_offset =
4734 (u8) PHY_GETINTVAR(pi, "rxpo2g");
4736 pi->txpa_2g[0] = (s16) PHY_GETINTVAR(pi, "pa0b0");
4737 pi->txpa_2g[1] = (s16) PHY_GETINTVAR(pi, "pa0b1");
4738 pi->txpa_2g[2] = (s16) PHY_GETINTVAR(pi, "pa0b2");
4740 pi_lcn->lcnphy_rssi_vf = (u8) PHY_GETINTVAR(pi, "rssismf2g");
4741 pi_lcn->lcnphy_rssi_vc = (u8) PHY_GETINTVAR(pi, "rssismc2g");
4742 pi_lcn->lcnphy_rssi_gs = (u8) PHY_GETINTVAR(pi, "rssisav2g");
4745 pi_lcn->lcnphy_rssi_vf_lowtemp = pi_lcn->lcnphy_rssi_vf;
4746 pi_lcn->lcnphy_rssi_vc_lowtemp = pi_lcn->lcnphy_rssi_vc;
4747 pi_lcn->lcnphy_rssi_gs_lowtemp = pi_lcn->lcnphy_rssi_gs;
4749 pi_lcn->lcnphy_rssi_vf_hightemp =
4750 pi_lcn->lcnphy_rssi_vf;
4751 pi_lcn->lcnphy_rssi_vc_hightemp =
4752 pi_lcn->lcnphy_rssi_vc;
4753 pi_lcn->lcnphy_rssi_gs_hightemp =
4754 pi_lcn->lcnphy_rssi_gs;
4757 txpwr = (s8) PHY_GETINTVAR(pi, "maxp2ga0");
4758 pi->tx_srom_max_2g = txpwr;
4760 for (i = 0; i < PWRTBL_NUM_COEFF; i++) {
4761 pi->txpa_2g_low_temp[i] = pi->txpa_2g[i];
4762 pi->txpa_2g_high_temp[i] = pi->txpa_2g[i];
4765 cckpo = (u16) PHY_GETINTVAR(pi, "cck2gpo");
4767 uint max_pwr_chan = txpwr;
4769 for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) {
4770 pi->tx_srom_max_rate_2g[i] = max_pwr_chan -
4771 ((cckpo & 0xf) * 2);
4775 offset_ofdm = (u32) PHY_GETINTVAR(pi, "ofdm2gpo");
4776 for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) {
4777 pi->tx_srom_max_rate_2g[i] = max_pwr_chan -
4778 ((offset_ofdm & 0xf) * 2);
4784 opo = (u8) PHY_GETINTVAR(pi, "opo");
4786 for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) {
4787 pi->tx_srom_max_rate_2g[i] = txpwr;
4790 offset_ofdm = (u32) PHY_GETINTVAR(pi, "ofdm2gpo");
4792 for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) {
4793 pi->tx_srom_max_rate_2g[i] = txpwr -
4794 ((offset_ofdm & 0xf) * 2);
4798 ((u16) PHY_GETINTVAR(pi, "mcs2gpo1") << 16) |
4799 (u16) PHY_GETINTVAR(pi, "mcs2gpo0");
4800 pi_lcn->lcnphy_mcs20_po = offset_mcs;
4801 for (i = TXP_FIRST_SISO_MCS_20;
4802 i <= TXP_LAST_SISO_MCS_20; i++) {
4803 pi->tx_srom_max_rate_2g[i] =
4804 txpwr - ((offset_mcs & 0xf) * 2);
4809 pi_lcn->lcnphy_rawtempsense =
4810 (u16) PHY_GETINTVAR(pi, "rawtempsense");
4811 pi_lcn->lcnphy_measPower =
4812 (u8) PHY_GETINTVAR(pi, "measpower");
4813 pi_lcn->lcnphy_tempsense_slope =
4814 (u8) PHY_GETINTVAR(pi, "tempsense_slope");
4815 pi_lcn->lcnphy_hw_iqcal_en =
4816 (bool) PHY_GETINTVAR(pi, "hw_iqcal_en");
4817 pi_lcn->lcnphy_iqcal_swp_dis =
4818 (bool) PHY_GETINTVAR(pi, "iqcal_swp_dis");
4819 pi_lcn->lcnphy_tempcorrx =
4820 (u8) PHY_GETINTVAR(pi, "tempcorrx");
4821 pi_lcn->lcnphy_tempsense_option =
4822 (u8) PHY_GETINTVAR(pi, "tempsense_option");
4823 pi_lcn->lcnphy_freqoffset_corr =
4824 (u8) PHY_GETINTVAR(pi, "freqoffset_corr");
4825 if ((u8) getintvar(pi->vars, "aa2g") > 1)
4826 wlc_phy_ant_rxdiv_set((wlc_phy_t *) pi,
4827 (u8) getintvar(pi->vars,
4830 pi_lcn->lcnphy_cck_dig_filt_type = -1;
4831 if (PHY_GETVAR(pi, "cckdigfilttype")) {
4833 temp = (s16) PHY_GETINTVAR(pi, "cckdigfilttype");
4835 pi_lcn->lcnphy_cck_dig_filt_type = temp;
4842 void wlc_2064_vco_cal(phy_info_t *pi)
4846 mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 1 << 3);
4847 calnrst = (u8) read_radio_reg(pi, RADIO_2064_REG056) & 0xf8;
4848 write_radio_reg(pi, RADIO_2064_REG056, calnrst);
4850 write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x03);
4852 write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x07);
4854 mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 0);
4858 wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, u8 channel)
4861 const chan_info_2064_lcnphy_t *ci;
4862 u8 rfpll_doubler = 0;
4863 u8 pll_pwrup, pll_pwrup_ovr;
4864 fixed qFxtal, qFref, qFvco, qFcal;
4865 u8 d15, d16, f16, e44, e45;
4866 u32 div_int, div_frac, fvco3, fpfd, fref3, fcal_div;
4867 u16 loop_bw, d30, setCount;
4868 if (NORADIO_ENAB(pi->pubpi))
4870 ci = &chan_info_2064_lcnphy[0];
4873 mod_radio_reg(pi, RADIO_2064_REG09D, 0x4, 0x1 << 2);
4875 write_radio_reg(pi, RADIO_2064_REG09E, 0xf);
4876 if (!rfpll_doubler) {
4877 loop_bw = PLL_2064_LOOP_BW;
4880 loop_bw = PLL_2064_LOOP_BW_DOUBLER;
4881 d30 = PLL_2064_D30_DOUBLER;
4884 if (CHSPEC_IS2G(pi->radio_chanspec)) {
4885 for (i = 0; i < ARRAY_SIZE(chan_info_2064_lcnphy); i++)
4886 if (chan_info_2064_lcnphy[i].chan == channel)
4889 if (i >= ARRAY_SIZE(chan_info_2064_lcnphy)) {
4893 ci = &chan_info_2064_lcnphy[i];
4896 write_radio_reg(pi, RADIO_2064_REG02A, ci->logen_buftune);
4898 mod_radio_reg(pi, RADIO_2064_REG030, 0x3, ci->logen_rccr_tx);
4900 mod_radio_reg(pi, RADIO_2064_REG091, 0x3, ci->txrf_mix_tune_ctrl);
4902 mod_radio_reg(pi, RADIO_2064_REG038, 0xf, ci->pa_input_tune_g);
4904 mod_radio_reg(pi, RADIO_2064_REG030, 0x3 << 2,
4905 (ci->logen_rccr_rx) << 2);
4907 mod_radio_reg(pi, RADIO_2064_REG05E, 0xf, ci->pa_rxrf_lna1_freq_tune);
4909 mod_radio_reg(pi, RADIO_2064_REG05E, (0xf) << 4,
4910 (ci->pa_rxrf_lna2_freq_tune) << 4);
4912 write_radio_reg(pi, RADIO_2064_REG06C, ci->rxrf_rxrf_spare1);
4914 pll_pwrup = (u8) read_radio_reg(pi, RADIO_2064_REG044);
4915 pll_pwrup_ovr = (u8) read_radio_reg(pi, RADIO_2064_REG12B);
4917 or_radio_reg(pi, RADIO_2064_REG044, 0x07);
4919 or_radio_reg(pi, RADIO_2064_REG12B, (0x07) << 1);
4923 fpfd = rfpll_doubler ? (pi->xtalfreq << 1) : (pi->xtalfreq);
4924 if (pi->xtalfreq > 26000000)
4926 if (pi->xtalfreq > 52000000)
4934 fvco3 = (ci->freq * 3);
4937 qFxtal = wlc_lcnphy_qdiv_roundup(pi->xtalfreq, PLL_2064_MHZ, 16);
4938 qFref = wlc_lcnphy_qdiv_roundup(fpfd, PLL_2064_MHZ, 16);
4939 qFcal = pi->xtalfreq * fcal_div / PLL_2064_MHZ;
4940 qFvco = wlc_lcnphy_qdiv_roundup(fvco3, 2, 16);
4942 write_radio_reg(pi, RADIO_2064_REG04F, 0x02);
4944 d15 = (pi->xtalfreq * fcal_div * 4 / 5) / PLL_2064_MHZ - 1;
4945 write_radio_reg(pi, RADIO_2064_REG052, (0x07 & (d15 >> 2)));
4946 write_radio_reg(pi, RADIO_2064_REG053, (d15 & 0x3) << 5);
4948 d16 = (qFcal * 8 / (d15 + 1)) - 1;
4949 write_radio_reg(pi, RADIO_2064_REG051, d16);
4951 f16 = ((d16 + 1) * (d15 + 1)) / qFcal;
4952 setCount = f16 * 3 * (ci->freq) / 32 - 1;
4953 mod_radio_reg(pi, RADIO_2064_REG053, (0x0f << 0),
4954 (u8) (setCount >> 8));
4956 or_radio_reg(pi, RADIO_2064_REG053, 0x10);
4957 write_radio_reg(pi, RADIO_2064_REG054, (u8) (setCount & 0xff));
4959 div_int = ((fvco3 * (PLL_2064_MHZ >> 4)) / fref3) << 4;
4961 div_frac = ((fvco3 * (PLL_2064_MHZ >> 4)) % fref3) << 4;
4962 while (div_frac >= fref3) {
4966 div_frac = wlc_lcnphy_qdiv_roundup(div_frac, fref3, 20);
4968 mod_radio_reg(pi, RADIO_2064_REG045, (0x1f << 0),
4969 (u8) (div_int >> 4));
4970 mod_radio_reg(pi, RADIO_2064_REG046, (0x1f << 4),
4971 (u8) (div_int << 4));
4972 mod_radio_reg(pi, RADIO_2064_REG046, (0x0f << 0),
4973 (u8) (div_frac >> 16));
4974 write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff);
4975 write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff);
4977 write_radio_reg(pi, RADIO_2064_REG040, 0xfb);
4979 write_radio_reg(pi, RADIO_2064_REG041, 0x9A);
4980 write_radio_reg(pi, RADIO_2064_REG042, 0xA3);
4981 write_radio_reg(pi, RADIO_2064_REG043, 0x0C);
4984 u8 h29, h23, c28, d29, h28_ten, e30, h30_ten, cp_current;
4985 u16 c29, c38, c30, g30, d28;
4992 d28 = (((PLL_2064_HIGH_END_KVCO - PLL_2064_LOW_END_KVCO) *
4993 (fvco3 / 2 - PLL_2064_LOW_END_VCO)) /
4994 (PLL_2064_HIGH_END_VCO - PLL_2064_LOW_END_VCO))
4995 + PLL_2064_LOW_END_KVCO;
4996 h28_ten = (d28 * 10) / c28;
4998 e30 = (d30 - 680) / 490;
4999 g30 = 680 + (e30 * 490);
5000 h30_ten = (g30 * 10) / c30;
5001 cp_current = ((c38 * h29 * h23 * 100) / h28_ten) / h30_ten;
5002 mod_radio_reg(pi, RADIO_2064_REG03C, 0x3f, cp_current);
5004 if (channel >= 1 && channel <= 5)
5005 write_radio_reg(pi, RADIO_2064_REG03C, 0x8);
5007 write_radio_reg(pi, RADIO_2064_REG03C, 0x7);
5008 write_radio_reg(pi, RADIO_2064_REG03D, 0x3);
5010 mod_radio_reg(pi, RADIO_2064_REG044, 0x0c, 0x0c);
5013 wlc_2064_vco_cal(pi);
5015 write_radio_reg(pi, RADIO_2064_REG044, pll_pwrup);
5016 write_radio_reg(pi, RADIO_2064_REG12B, pll_pwrup_ovr);
5017 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
5018 write_radio_reg(pi, RADIO_2064_REG038, 3);
5019 write_radio_reg(pi, RADIO_2064_REG091, 7);
5023 bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi)
5025 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
5028 return (LCNPHY_TX_PWR_CTRL_HW ==
5029 wlc_lcnphy_get_tx_pwr_ctrl((pi)));
5032 void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi)
5035 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
5036 wlc_lcnphy_calib_modes(pi, LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL);
5037 } else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) {
5039 pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
5040 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
5041 wlc_lcnphy_txpower_recalc_target(pi);
5043 wlc_lcnphy_set_tx_pwr_ctrl(pi, pwr_ctrl);
5048 void wlc_phy_detach_lcnphy(phy_info_t *pi)
5050 MFREE(pi->sh->osh, pi->u.pi_lcnphy, sizeof(phy_info_lcnphy_t));
5053 bool wlc_phy_attach_lcnphy(phy_info_t *pi)
5055 phy_info_lcnphy_t *pi_lcn;
5058 (phy_info_lcnphy_t *) MALLOC(pi->sh->osh,
5059 sizeof(phy_info_lcnphy_t));
5060 if (pi->u.pi_lcnphy == NULL) {
5063 bzero((char *)pi->u.pi_lcnphy, sizeof(phy_info_lcnphy_t));
5065 pi_lcn = pi->u.pi_lcnphy;
5067 if ((0 == (pi->sh->boardflags & BFL_NOPA)) && !NORADIO_ENAB(pi->pubpi)) {
5068 pi->hwpwrctrl = true;
5069 pi->hwpwrctrl_capable = true;
5072 pi->xtalfreq = si_alp_clock(pi->sh->sih);
5073 ASSERT(0 == (pi->xtalfreq % 1000));
5075 pi_lcn->lcnphy_papd_rxGnCtrl_init = 0;
5077 pi->pi_fptr.init = wlc_phy_init_lcnphy;
5078 pi->pi_fptr.calinit = wlc_phy_cal_init_lcnphy;
5079 pi->pi_fptr.chanset = wlc_phy_chanspec_set_lcnphy;
5080 pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_lcnphy;
5081 pi->pi_fptr.txiqccget = wlc_lcnphy_get_tx_iqcc;
5082 pi->pi_fptr.txiqccset = wlc_lcnphy_set_tx_iqcc;
5083 pi->pi_fptr.txloccget = wlc_lcnphy_get_tx_locc;
5084 pi->pi_fptr.radioloftget = wlc_lcnphy_get_radio_loft;
5085 pi->pi_fptr.detach = wlc_phy_detach_lcnphy;
5087 if (!wlc_phy_txpwr_srom_read_lcnphy(pi))
5090 if ((pi->sh->boardflags & BFL_FEM) && (LCNREV_IS(pi->pubpi.phy_rev, 1))) {
5091 if (pi_lcn->lcnphy_tempsense_option == 3) {
5092 pi->hwpwrctrl = true;
5093 pi->hwpwrctrl_capable = true;
5094 pi->temppwrctrl_capable = false;
5096 pi->hwpwrctrl = false;
5097 pi->hwpwrctrl_capable = false;
5098 pi->temppwrctrl_capable = true;
5105 static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain)
5107 u16 trsw, ext_lna, lna1, lna2, tia, biq0, biq1, gain0_15, gain16_19;
5109 trsw = (gain & ((u32) 1 << 28)) ? 0 : 1;
5110 ext_lna = (u16) (gain >> 29) & 0x01;
5111 lna1 = (u16) (gain >> 0) & 0x0f;
5112 lna2 = (u16) (gain >> 4) & 0x0f;
5113 tia = (u16) (gain >> 8) & 0xf;
5114 biq0 = (u16) (gain >> 12) & 0xf;
5115 biq1 = (u16) (gain >> 16) & 0xf;
5117 gain0_15 = (u16) ((lna1 & 0x3) | ((lna1 & 0x3) << 2) |
5118 ((lna2 & 0x3) << 4) | ((lna2 & 0x3) << 6) |
5119 ((tia & 0xf) << 8) | ((biq0 & 0xf) << 12));
5122 mod_phy_reg(pi, 0x44d, (0x1 << 0), trsw << 0);
5123 mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
5124 mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10);
5125 mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0);
5126 mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0);
5128 if (CHSPEC_IS2G(pi->radio_chanspec)) {
5129 mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11);
5130 mod_phy_reg(pi, 0x4e6, (0x3 << 3), lna1 << 3);
5132 wlc_lcnphy_rx_gain_override_enable(pi, true);
5135 static u32 wlc_lcnphy_get_receive_power(phy_info_t *pi, s32 *gain_index)
5137 u32 received_power = 0;
5140 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
5143 if (*gain_index >= 0)
5144 gain_code = lcnphy_23bitgaincode_table[*gain_index];
5146 if (-1 == *gain_index) {
5148 while ((*gain_index <= (s32) max_index)
5149 && (received_power < 700)) {
5150 wlc_lcnphy_set_rx_gain(pi,
5151 lcnphy_23bitgaincode_table
5154 wlc_lcnphy_measure_digital_power(pi,
5156 lcnphy_noise_samples);
5161 wlc_lcnphy_set_rx_gain(pi, gain_code);
5163 wlc_lcnphy_measure_digital_power(pi,
5165 lcnphy_noise_samples);
5168 return received_power;
5171 s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index)
5174 s32 nominal_power_db;
5175 s32 log_val, gain_mismatch, desired_gain, input_power_offset_db,
5177 s32 received_power, temperature;
5179 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
5181 received_power = wlc_lcnphy_get_receive_power(pi, &gain_index);
5183 gain = lcnphy_gain_table[gain_index];
5185 nominal_power_db = read_phy_reg(pi, 0x425) >> 8;
5188 u32 power = (received_power * 16);
5189 u32 msb1, msb2, val1, val2, diff1, diff2;
5190 msb1 = ffs(power) - 1;
5194 diff1 = (power - val1);
5195 diff2 = (val2 - power);
5202 log_val = log_val * 3;
5204 gain_mismatch = (nominal_power_db / 2) - (log_val);
5206 desired_gain = gain + gain_mismatch;
5208 input_power_offset_db = read_phy_reg(pi, 0x434) & 0xFF;
5210 if (input_power_offset_db > 127)
5211 input_power_offset_db -= 256;
5213 input_power_db = input_power_offset_db - desired_gain;
5216 input_power_db + lcnphy_gain_index_offset_for_rssi[gain_index];
5218 freq = wlc_phy_channel2freq(CHSPEC_CHANNEL(pi->radio_chanspec));
5219 if ((freq > 2427) && (freq <= 2467))
5220 input_power_db = input_power_db - 1;
5222 temperature = pi_lcn->lcnphy_lastsensed_temperature;
5224 if ((temperature - 15) < -30) {
5226 input_power_db + (((temperature - 10 - 25) * 286) >> 12) -
5228 } else if ((temperature - 15) < 4) {
5230 input_power_db + (((temperature - 10 - 25) * 286) >> 12) -
5234 input_power_db + (((temperature - 10 - 25) * 286) >> 12);
5237 wlc_lcnphy_rx_gain_override_enable(pi, 0);
5239 return input_power_db;
5243 wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm, s16 filt_type)
5245 s16 filt_index = -1;
5287 for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_CCK; j++) {
5288 if (filt_type == LCNPHY_txdigfiltcoeffs_cck[j][0]) {
5289 filt_index = (s16) j;
5294 if (filt_index == -1) {
5297 for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++) {
5298 write_phy_reg(pi, addr[j],
5299 LCNPHY_txdigfiltcoeffs_cck
5300 [filt_index][j + 1]);
5304 for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_OFDM; j++) {
5305 if (filt_type == LCNPHY_txdigfiltcoeffs_ofdm[j][0]) {
5306 filt_index = (s16) j;
5311 if (filt_index == -1) {
5314 for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++) {
5315 write_phy_reg(pi, addr_ofdm[j],
5316 LCNPHY_txdigfiltcoeffs_ofdm
5317 [filt_index][j + 1]);
5322 return (filt_index != -1) ? 0 : -1;