2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/kernel.h>
21 #include <linux/string.h>
28 #include <bcmendian.h>
32 #include <bcmsrom_tbl.h>
44 #include <sbsdpcmdev.h>
47 #include <proto/ethernet.h> /* for sprom content groking */
49 #define BS_ERROR(args)
51 #define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \
52 (((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \
53 ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \
54 ((u8 *)curmap + PCI_BAR0_SPROM_OFFSET))
57 #define WRITE_ENABLE_DELAY 500 /* 500 ms after write enable/disable toggle */
58 #define WRITE_WORD_DELAY 20 /* 20 ms between each word write */
61 typedef struct varbuf {
62 char *base; /* pointer to buffer base */
63 char *buf; /* pointer to current position */
64 unsigned int size; /* current (residual) size in bytes */
69 #define SROM_CIS_SINGLE 1
71 static int initvars_srom_si(si_t *sih, osl_t *osh, void *curmap, char **vars,
73 static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off,
75 static int initvars_srom_pci(si_t *sih, void *curmap, char **vars,
77 static int initvars_flash_si(si_t *sih, char **vars, uint *count);
79 static int initvars_cis_sdio(osl_t *osh, char **vars, uint *count);
80 static int sprom_cmd_sdio(osl_t *osh, u8 cmd);
81 static int sprom_read_sdio(osl_t *osh, u16 addr, u16 *data);
83 static int sprom_read_pci(osl_t *osh, si_t *sih, u16 *sprom, uint wordoff,
84 u16 *buf, uint nwords, bool check_crc);
85 #if defined(BCMNVRAMR)
86 static int otp_read_pci(osl_t *osh, si_t *sih, u16 *buf, uint bufsz);
88 static u16 srom_cc_cmd(si_t *sih, osl_t *osh, void *ccregs, u32 cmd,
89 uint wordoff, u16 data);
91 static int initvars_table(osl_t *osh, char *start, char *end, char **vars,
93 static int initvars_flash(si_t *sih, osl_t *osh, char **vp, uint len);
95 /* Initialization of varbuf structure */
96 static void BCMATTACHFN(varbuf_init) (varbuf_t *b, char *buf, uint size)
99 b->base = b->buf = buf;
102 /* append a null terminated var=value string */
103 static int BCMATTACHFN(varbuf_append) (varbuf_t *b, const char *fmt, ...)
114 r = vsnprintf(b->buf, b->size, fmt, ap);
117 /* C99 snprintf behavior returns r >= size on overflow,
118 * others return -1 on overflow.
119 * All return -1 on format error.
120 * We need to leave room for 2 null terminations, one for the current var
121 * string, and one for final null of the var table. So check that the
122 * strlen written, r, leaves room for 2 chars.
124 if ((r == -1) || (r > (int)(b->size - 2))) {
129 /* Remove any earlier occurrence of the same variable */
130 s = strchr(b->buf, '=');
132 len = (size_t) (s - b->buf);
133 for (s = b->base; s < b->buf;) {
134 if ((bcmp(s, b->buf, len) == 0) && s[len] == '=') {
136 memmove(s, (s + len),
137 ((b->buf + r + 1) - (s + len)));
139 b->size += (unsigned int)len;
148 /* skip over this string's null termination */
157 * Initialize local vars from the right source for this platform.
158 * Return 0 on success, nonzero on error.
161 BCMATTACHFN(srom_var_init) (si_t *sih, uint bustype, void *curmap, osl_t *osh,
162 char **vars, uint *count) {
167 ASSERT(bustype == BUSTYPE(bustype));
168 if (vars == NULL || count == NULL)
174 switch (BUSTYPE(bustype)) {
177 return initvars_srom_si(sih, osh, curmap, vars, count);
180 ASSERT(curmap != NULL);
184 return initvars_srom_pci(sih, curmap, vars, count);
188 return initvars_cis_sdio(osh, vars, count);
197 /* support only 16-bit word read from srom */
199 srom_read(si_t *sih, uint bustype, void *curmap, osl_t *osh,
200 uint byteoff, uint nbytes, u16 *buf, bool check_crc)
207 ASSERT(bustype == BUSTYPE(bustype));
209 /* check input - 16-bit access only */
210 if (byteoff & 1 || nbytes & 1 || (byteoff + nbytes) > SROM_MAX)
216 if (BUSTYPE(bustype) == PCI_BUS) {
220 if (si_is_sprom_available(sih)) {
223 srom = (u16 *) SROM_OFFSET(sih);
228 (osh, sih, srom, off, buf, nw, check_crc))
231 #if defined(BCMNVRAMR)
233 if (otp_read_pci(osh, sih, buf, SROM_MAX))
238 } else if (BUSTYPE(bustype) == SDIO_BUS) {
241 for (i = 0; i < nw; i++) {
243 (osh, (u16) (off + i), (u16 *) (buf + i)))
247 } else if (BUSTYPE(bustype) == SI_BUS) {
256 static const char vstr_manf[] = "manf=%s";
257 static const char vstr_productname[] = "productname=%s";
258 static const char vstr_manfid[] = "manfid=0x%x";
259 static const char vstr_prodid[] = "prodid=0x%x";
261 static const char vstr_sdmaxspeed[] = "sdmaxspeed=%d";
262 static const char vstr_sdmaxblk[][13] = {
263 "sdmaxblk0=%d", "sdmaxblk1=%d", "sdmaxblk2=%d"};
265 static const char vstr_regwindowsz[] = "regwindowsz=%d";
266 static const char vstr_sromrev[] = "sromrev=%d";
267 static const char vstr_chiprev[] = "chiprev=%d";
268 static const char vstr_subvendid[] = "subvendid=0x%x";
269 static const char vstr_subdevid[] = "subdevid=0x%x";
270 static const char vstr_boardrev[] = "boardrev=0x%x";
271 static const char vstr_aa2g[] = "aa2g=0x%x";
272 static const char vstr_aa5g[] = "aa5g=0x%x";
273 static const char vstr_ag[] = "ag%d=0x%x";
274 static const char vstr_cc[] = "cc=%d";
275 static const char vstr_opo[] = "opo=%d";
276 static const char vstr_pa0b[][9] = {
277 "pa0b0=%d", "pa0b1=%d", "pa0b2=%d"};
279 static const char vstr_pa0itssit[] = "pa0itssit=%d";
280 static const char vstr_pa0maxpwr[] = "pa0maxpwr=%d";
281 static const char vstr_pa1b[][9] = {
282 "pa1b0=%d", "pa1b1=%d", "pa1b2=%d"};
284 static const char vstr_pa1lob[][11] = {
285 "pa1lob0=%d", "pa1lob1=%d", "pa1lob2=%d"};
287 static const char vstr_pa1hib[][11] = {
288 "pa1hib0=%d", "pa1hib1=%d", "pa1hib2=%d"};
290 static const char vstr_pa1itssit[] = "pa1itssit=%d";
291 static const char vstr_pa1maxpwr[] = "pa1maxpwr=%d";
292 static const char vstr_pa1lomaxpwr[] = "pa1lomaxpwr=%d";
293 static const char vstr_pa1himaxpwr[] = "pa1himaxpwr=%d";
294 static const char vstr_oem[] =
295 "oem=%02x%02x%02x%02x%02x%02x%02x%02x";
296 static const char vstr_boardflags[] = "boardflags=0x%x";
297 static const char vstr_boardflags2[] = "boardflags2=0x%x";
298 static const char vstr_ledbh[] = "ledbh%d=0x%x";
299 static const char vstr_noccode[] = "ccode=0x0";
300 static const char vstr_ccode[] = "ccode=%c%c";
301 static const char vstr_cctl[] = "cctl=0x%x";
302 static const char vstr_cckpo[] = "cckpo=0x%x";
303 static const char vstr_ofdmpo[] = "ofdmpo=0x%x";
304 static const char vstr_rdlid[] = "rdlid=0x%x";
305 static const char vstr_rdlrndis[] = "rdlrndis=%d";
306 static const char vstr_rdlrwu[] = "rdlrwu=%d";
307 static const char vstr_usbfs[] = "usbfs=%d";
308 static const char vstr_wpsgpio[] = "wpsgpio=%d";
309 static const char vstr_wpsled[] = "wpsled=%d";
310 static const char vstr_rdlsn[] = "rdlsn=%d";
311 static const char vstr_rssismf2g[] = "rssismf2g=%d";
312 static const char vstr_rssismc2g[] = "rssismc2g=%d";
313 static const char vstr_rssisav2g[] = "rssisav2g=%d";
314 static const char vstr_bxa2g[] = "bxa2g=%d";
315 static const char vstr_rssismf5g[] = "rssismf5g=%d";
316 static const char vstr_rssismc5g[] = "rssismc5g=%d";
317 static const char vstr_rssisav5g[] = "rssisav5g=%d";
318 static const char vstr_bxa5g[] = "bxa5g=%d";
319 static const char vstr_tri2g[] = "tri2g=%d";
320 static const char vstr_tri5gl[] = "tri5gl=%d";
321 static const char vstr_tri5g[] = "tri5g=%d";
322 static const char vstr_tri5gh[] = "tri5gh=%d";
323 static const char vstr_rxpo2g[] = "rxpo2g=%d";
324 static const char vstr_rxpo5g[] = "rxpo5g=%d";
325 static const char vstr_boardtype[] = "boardtype=0x%x";
326 static const char vstr_leddc[] = "leddc=0x%04x";
327 static const char vstr_vendid[] = "vendid=0x%x";
328 static const char vstr_devid[] = "devid=0x%x";
329 static const char vstr_xtalfreq[] = "xtalfreq=%d";
330 static const char vstr_txchain[] = "txchain=0x%x";
331 static const char vstr_rxchain[] = "rxchain=0x%x";
332 static const char vstr_antswitch[] = "antswitch=0x%x";
333 static const char vstr_regrev[] = "regrev=0x%x";
334 static const char vstr_antswctl2g[] = "antswctl2g=0x%x";
335 static const char vstr_triso2g[] = "triso2g=0x%x";
336 static const char vstr_pdetrange2g[] = "pdetrange2g=0x%x";
337 static const char vstr_extpagain2g[] = "extpagain2g=0x%x";
338 static const char vstr_tssipos2g[] = "tssipos2g=0x%x";
339 static const char vstr_antswctl5g[] = "antswctl5g=0x%x";
340 static const char vstr_triso5g[] = "triso5g=0x%x";
341 static const char vstr_pdetrange5g[] = "pdetrange5g=0x%x";
342 static const char vstr_extpagain5g[] = "extpagain5g=0x%x";
343 static const char vstr_tssipos5g[] = "tssipos5g=0x%x";
344 static const char vstr_maxp2ga0[] = "maxp2ga0=0x%x";
345 static const char vstr_itt2ga0[] = "itt2ga0=0x%x";
346 static const char vstr_pa[] = "pa%dgw%da%d=0x%x";
347 static const char vstr_pahl[] = "pa%dg%cw%da%d=0x%x";
348 static const char vstr_maxp5ga0[] = "maxp5ga0=0x%x";
349 static const char vstr_itt5ga0[] = "itt5ga0=0x%x";
350 static const char vstr_maxp5gha0[] = "maxp5gha0=0x%x";
351 static const char vstr_maxp5gla0[] = "maxp5gla0=0x%x";
352 static const char vstr_maxp2ga1[] = "maxp2ga1=0x%x";
353 static const char vstr_itt2ga1[] = "itt2ga1=0x%x";
354 static const char vstr_maxp5ga1[] = "maxp5ga1=0x%x";
355 static const char vstr_itt5ga1[] = "itt5ga1=0x%x";
356 static const char vstr_maxp5gha1[] = "maxp5gha1=0x%x";
357 static const char vstr_maxp5gla1[] = "maxp5gla1=0x%x";
358 static const char vstr_cck2gpo[] = "cck2gpo=0x%x";
359 static const char vstr_ofdm2gpo[] = "ofdm2gpo=0x%x";
360 static const char vstr_ofdm5gpo[] = "ofdm5gpo=0x%x";
361 static const char vstr_ofdm5glpo[] = "ofdm5glpo=0x%x";
362 static const char vstr_ofdm5ghpo[] = "ofdm5ghpo=0x%x";
363 static const char vstr_cddpo[] = "cddpo=0x%x";
364 static const char vstr_stbcpo[] = "stbcpo=0x%x";
365 static const char vstr_bw40po[] = "bw40po=0x%x";
366 static const char vstr_bwduppo[] = "bwduppo=0x%x";
367 static const char vstr_mcspo[] = "mcs%dgpo%d=0x%x";
368 static const char vstr_mcspohl[] = "mcs%dg%cpo%d=0x%x";
369 static const char vstr_custom[] = "customvar%d=0x%x";
370 static const char vstr_cckdigfilttype[] = "cckdigfilttype=%d";
371 static const char vstr_boardnum[] = "boardnum=%d";
372 static const char vstr_macaddr[] = "macaddr=%s";
373 static const char vstr_usbepnum[] = "usbepnum=0x%x";
374 static const char vstr_end[] = "END\0";
378 /* For dongle HW, accept partial calibration parameters */
379 #define BCMDONGLECASE(n)
382 BCMATTACHFN(srom_parsecis) (osl_t *osh, u8 *pcis[], uint ciscnt,
383 char **vars, uint *count)
388 u8 *cis, tup, tlen, sromrev = 1;
390 bool ag_init = FALSE;
398 ASSERT(vars != NULL);
399 ASSERT(count != NULL);
403 base = MALLOC(osh, MAXSZ_NVRAM_VARS);
404 ASSERT(base != NULL);
408 varbuf_init(&b, base, MAXSZ_NVRAM_VARS);
409 bzero(base, MAXSZ_NVRAM_VARS);
411 for (cisnum = 0; cisnum < ciscnt; cisnum++) {
419 if (tup == CISTPL_NULL || tup == CISTPL_END)
424 if (cis[i] == CISTPL_NULL
425 || cis[i] == CISTPL_END) {
430 tup = CISTPL_BRCM_HNBU;
434 if ((i + tlen) >= CIS_SIZE)
439 /* assume the strings are good if the version field checks out */
440 if (((cis[i + 1] << 8) + cis[i]) >= 0x0008) {
441 varbuf_append(&b, vstr_manf,
443 varbuf_append(&b, vstr_productname,
452 varbuf_append(&b, vstr_manfid,
453 (cis[i + 1] << 8) + cis[i]);
454 varbuf_append(&b, vstr_prodid,
455 (cis[i + 3] << 8) + cis[i + 2]);
464 case CISTPL_FID_SDIO:
468 static int base[] = {
469 -1, 10, 12, 13, 15, 20,
471 35, 40, 45, 50, 55, 60,
474 static int mult[] = {
475 10, 100, 1000, 10000,
478 ASSERT((mult[spd & 0x7] != -1)
481 [(spd >> 3) & 0x0f]));
491 } else if (cis[i] == 1) {
502 /* set macaddr if HNBU_MACADDR not seen yet */
505 && !(ETHER_ISNULLADDR(&cis[i + 2]))
506 && !(ETHER_ISMULTI(&cis[i + 2]))) {
510 (struct ether_addr *)
514 /* set boardnum if HNBU_BOARDNUM not seen yet */
525 varbuf_append(&b, vstr_regwindowsz,
526 (cis[i + 7] << 8) | cis[i + 6]);
529 case CISTPL_BRCM_HNBU:
532 sromrev = cis[i + 1];
533 varbuf_append(&b, vstr_sromrev,
538 varbuf_append(&b, vstr_xtalfreq,
546 varbuf_append(&b, vstr_vendid,
549 varbuf_append(&b, vstr_devid,
553 varbuf_append(&b, vstr_chiprev,
564 varbuf_append(&b, vstr_subdevid,
567 /* subdevid doubles for boardtype */
577 (cis[i + 2] << 8) + cis[i + 1];
585 /* retrieve the patch pairs
586 * from tlen/6; where 6 is
587 * sizeof(patch addr(2)) +
588 * sizeof(patch data(4)).
590 patch_pair = tlen / 6;
592 for (j = 0; j < patch_pair; j++) {
647 varbuf_append(&b, vstr_boardrev,
650 varbuf_append(&b, vstr_boardrev,
655 case HNBU_BOARDFLAGS:
656 w32 = (cis[i + 2] << 8) + cis[i + 1];
659 ((cis[i + 4] << 24) +
661 varbuf_append(&b, vstr_boardflags, w32);
665 (cis[i + 6] << 8) + cis[i +
680 varbuf_append(&b, vstr_usbfs,
685 varbuf_append(&b, vstr_boardtype,
692 * what follows is a nonstandard HNBU CIS
693 * that lacks CISTPL_BRCM_HNBU tags
695 * skip 0xff (end of standard CIS)
699 standard_cis = FALSE;
703 varbuf_append(&b, vstr_usbepnum,
704 (cis[i + 2] << 8) | cis[i
710 varbuf_append(&b, vstr_aa2g,
713 varbuf_append(&b, vstr_aa5g,
718 varbuf_append(&b, vstr_ag, 0,
721 varbuf_append(&b, vstr_ag, 1,
724 varbuf_append(&b, vstr_ag, 2,
727 varbuf_append(&b, vstr_ag, 3,
733 varbuf_append(&b, vstr_aa5g,
735 varbuf_append(&b, vstr_ag, 1,
740 ASSERT(sromrev == 1);
741 varbuf_append(&b, vstr_cc, cis[i + 1]);
747 ASSERT(sromrev == 1);
753 ASSERT(sromrev >= 2);
754 varbuf_append(&b, vstr_opo,
768 for (j = 0; j < 3; j++) {
793 ASSERT((sromrev == 2)
813 for (j = 0; j < 3; j++) {
828 for (j = 3; j < 6; j++) {
843 for (j = 6; j < 9; j++) {
860 ASSERT((tlen == 19) ||
868 ASSERT(sromrev == 1);
869 varbuf_append(&b, vstr_oem,
870 cis[i + 1], cis[i + 2],
871 cis[i + 3], cis[i + 4],
872 cis[i + 5], cis[i + 6],
873 cis[i + 7], cis[i + 8]);
877 for (j = 1; j <= 4; j++) {
878 if (cis[i + j] != 0xff) {
890 if ((cis[i + 1] == 0)
891 || (cis[i + 2] == 0))
892 varbuf_append(&b, vstr_noccode);
894 varbuf_append(&b, vstr_ccode,
897 varbuf_append(&b, vstr_cctl,
903 varbuf_append(&b, vstr_cckpo,
904 (cis[i + 2] << 8) | cis[i
911 varbuf_append(&b, vstr_ofdmpo,
919 varbuf_append(&b, vstr_wpsgpio,
922 varbuf_append(&b, vstr_wpsled,
926 case HNBU_RSSISMBXA2G:
927 ASSERT(sromrev == 3);
928 varbuf_append(&b, vstr_rssismf2g,
930 varbuf_append(&b, vstr_rssismc2g,
931 (cis[i + 1] >> 4) & 0xf);
932 varbuf_append(&b, vstr_rssisav2g,
934 varbuf_append(&b, vstr_bxa2g,
935 (cis[i + 2] >> 3) & 0x3);
938 case HNBU_RSSISMBXA5G:
939 ASSERT(sromrev == 3);
940 varbuf_append(&b, vstr_rssismf5g,
942 varbuf_append(&b, vstr_rssismc5g,
943 (cis[i + 1] >> 4) & 0xf);
944 varbuf_append(&b, vstr_rssisav5g,
946 varbuf_append(&b, vstr_bxa5g,
947 (cis[i + 2] >> 3) & 0x3);
951 ASSERT(sromrev == 3);
952 varbuf_append(&b, vstr_tri2g,
957 ASSERT(sromrev == 3);
958 varbuf_append(&b, vstr_tri5gl,
960 varbuf_append(&b, vstr_tri5g,
962 varbuf_append(&b, vstr_tri5gh,
967 ASSERT(sromrev == 3);
968 varbuf_append(&b, vstr_rxpo2g,
973 ASSERT(sromrev == 3);
974 varbuf_append(&b, vstr_rxpo5g,
979 if (!(ETHER_ISNULLADDR(&cis[i + 1])) &&
980 !(ETHER_ISMULTI(&cis[i + 1]))) {
982 (struct ether_addr *)
986 /* set boardnum if HNBU_BOARDNUM not seen yet */
995 /* CIS leddc only has 16bits, convert it to 32bits */
996 w32 = ((cis[i + 2] << 24) | /* oncount */
997 (cis[i + 1] << 8)); /* offcount */
998 varbuf_append(&b, vstr_leddc, w32);
1001 case HNBU_CHAINSWITCH:
1002 varbuf_append(&b, vstr_txchain,
1004 varbuf_append(&b, vstr_rxchain,
1006 varbuf_append(&b, vstr_antswitch,
1012 varbuf_append(&b, vstr_regrev,
1018 (cis[i + 2] << 8) + cis[i +
1023 SROM8_FEM_ANTSWLUT_MASK)
1025 SROM8_FEM_ANTSWLUT_SHIFT);
1026 varbuf_append(&b, vstr_triso2g,
1028 SROM8_FEM_TR_ISO_MASK)
1030 SROM8_FEM_TR_ISO_SHIFT);
1034 SROM8_FEM_PDET_RANGE_MASK)
1036 SROM8_FEM_PDET_RANGE_SHIFT);
1040 SROM8_FEM_EXTPA_GAIN_MASK)
1042 SROM8_FEM_EXTPA_GAIN_SHIFT);
1046 SROM8_FEM_TSSIPOS_MASK)
1048 SROM8_FEM_TSSIPOS_SHIFT);
1053 (cis[i + 4] << 8) + cis[i +
1058 SROM8_FEM_ANTSWLUT_MASK)
1060 SROM8_FEM_ANTSWLUT_SHIFT);
1061 varbuf_append(&b, vstr_triso5g,
1063 SROM8_FEM_TR_ISO_MASK)
1065 SROM8_FEM_TR_ISO_SHIFT);
1069 SROM8_FEM_PDET_RANGE_MASK)
1071 SROM8_FEM_PDET_RANGE_SHIFT);
1075 SROM8_FEM_EXTPA_GAIN_MASK)
1077 SROM8_FEM_EXTPA_GAIN_SHIFT);
1081 SROM8_FEM_TSSIPOS_MASK)
1083 SROM8_FEM_TSSIPOS_SHIFT);
1087 case HNBU_PAPARMS_C0:
1088 varbuf_append(&b, vstr_maxp2ga0,
1090 varbuf_append(&b, vstr_itt2ga0,
1092 varbuf_append(&b, vstr_pa, 2, 0, 0,
1095 varbuf_append(&b, vstr_pa, 2, 1, 0,
1098 varbuf_append(&b, vstr_pa, 2, 2, 0,
1104 varbuf_append(&b, vstr_maxp5ga0,
1106 varbuf_append(&b, vstr_itt5ga0,
1108 varbuf_append(&b, vstr_maxp5gha0,
1110 varbuf_append(&b, vstr_maxp5gla0,
1112 varbuf_append(&b, vstr_pa, 5, 0, 0,
1113 (cis[i + 14] << 8) +
1115 varbuf_append(&b, vstr_pa, 5, 1, 0,
1116 (cis[i + 16] << 8) +
1118 varbuf_append(&b, vstr_pa, 5, 2, 0,
1119 (cis[i + 18] << 8) +
1121 varbuf_append(&b, vstr_pahl, 5, 'l', 0,
1123 (cis[i + 20] << 8) +
1125 varbuf_append(&b, vstr_pahl, 5, 'l', 1,
1127 (cis[i + 22] << 8) +
1129 varbuf_append(&b, vstr_pahl, 5, 'l', 2,
1131 (cis[i + 24] << 8) +
1133 varbuf_append(&b, vstr_pahl, 5, 'h', 0,
1135 (cis[i + 26] << 8) +
1137 varbuf_append(&b, vstr_pahl, 5, 'h', 1,
1139 (cis[i + 28] << 8) +
1141 varbuf_append(&b, vstr_pahl, 5, 'h', 2,
1143 (cis[i + 30] << 8) +
1147 case HNBU_PAPARMS_C1:
1148 varbuf_append(&b, vstr_maxp2ga1,
1150 varbuf_append(&b, vstr_itt2ga1,
1152 varbuf_append(&b, vstr_pa, 2, 0, 1,
1155 varbuf_append(&b, vstr_pa, 2, 1, 1,
1158 varbuf_append(&b, vstr_pa, 2, 2, 1,
1164 varbuf_append(&b, vstr_maxp5ga1,
1166 varbuf_append(&b, vstr_itt5ga1,
1168 varbuf_append(&b, vstr_maxp5gha1,
1170 varbuf_append(&b, vstr_maxp5gla1,
1172 varbuf_append(&b, vstr_pa, 5, 0, 1,
1173 (cis[i + 14] << 8) +
1175 varbuf_append(&b, vstr_pa, 5, 1, 1,
1176 (cis[i + 16] << 8) +
1178 varbuf_append(&b, vstr_pa, 5, 2, 1,
1179 (cis[i + 18] << 8) +
1181 varbuf_append(&b, vstr_pahl, 5, 'l', 0,
1183 (cis[i + 20] << 8) +
1185 varbuf_append(&b, vstr_pahl, 5, 'l', 1,
1187 (cis[i + 22] << 8) +
1189 varbuf_append(&b, vstr_pahl, 5, 'l', 2,
1191 (cis[i + 24] << 8) +
1193 varbuf_append(&b, vstr_pahl, 5, 'h', 0,
1195 (cis[i + 26] << 8) +
1197 varbuf_append(&b, vstr_pahl, 5, 'h', 1,
1199 (cis[i + 28] << 8) +
1201 varbuf_append(&b, vstr_pahl, 5, 'h', 2,
1203 (cis[i + 30] << 8) +
1207 case HNBU_PO_CCKOFDM:
1208 varbuf_append(&b, vstr_cck2gpo,
1211 varbuf_append(&b, vstr_ofdm2gpo,
1212 (cis[i + 6] << 24) +
1213 (cis[i + 5] << 16) +
1219 varbuf_append(&b, vstr_ofdm5gpo,
1220 (cis[i + 10] << 24) +
1221 (cis[i + 9] << 16) +
1224 varbuf_append(&b, vstr_ofdm5glpo,
1225 (cis[i + 14] << 24) +
1226 (cis[i + 13] << 16) +
1227 (cis[i + 12] << 8) +
1229 varbuf_append(&b, vstr_ofdm5ghpo,
1230 (cis[i + 18] << 24) +
1231 (cis[i + 17] << 16) +
1232 (cis[i + 16] << 8) +
1237 for (j = 0; j <= (tlen / 2); j++) {
1238 varbuf_append(&b, vstr_mcspo, 2,
1248 case HNBU_PO_MCS5GM:
1249 for (j = 0; j <= (tlen / 2); j++) {
1250 varbuf_append(&b, vstr_mcspo, 5,
1260 case HNBU_PO_MCS5GLH:
1261 for (j = 0; j <= (tlen / 4); j++) {
1262 varbuf_append(&b, vstr_mcspohl,
1271 for (j = 0; j <= (tlen / 4); j++) {
1272 varbuf_append(&b, vstr_mcspohl,
1287 varbuf_append(&b, vstr_cddpo,
1293 varbuf_append(&b, vstr_stbcpo,
1299 varbuf_append(&b, vstr_bw40po,
1304 case HNBU_PO_40MDUP:
1305 varbuf_append(&b, vstr_bwduppo,
1311 varbuf_append(&b, vstr_ofdm5gpo,
1312 (cis[i + 4] << 24) +
1313 (cis[i + 3] << 16) +
1316 varbuf_append(&b, vstr_ofdm5glpo,
1317 (cis[i + 8] << 24) +
1318 (cis[i + 7] << 16) +
1321 varbuf_append(&b, vstr_ofdm5ghpo,
1322 (cis[i + 12] << 24) +
1323 (cis[i + 11] << 16) +
1324 (cis[i + 10] << 8) +
1329 varbuf_append(&b, vstr_custom, 1,
1330 ((cis[i + 4] << 24) +
1331 (cis[i + 3] << 16) +
1336 #if defined(BCMSDIO)
1337 case HNBU_SROM3SWRGN:
1340 u8 srev = cis[i + 1 + 70];
1342 /* make tuple value 16-bit aligned and parse it */
1343 bcopy(&cis[i + 1], srom,
1345 _initvars_srom_pci(srev, srom,
1348 /* 2.4G antenna gain is included in SROM */
1350 /* Ethernet MAC address is included in SROM */
1354 /* create extra variables */
1356 varbuf_append(&b, vstr_vendid,
1362 varbuf_append(&b, vstr_devid,
1368 varbuf_append(&b, vstr_xtalfreq,
1374 #endif /* defined(BCMSDIO) */
1376 case HNBU_CCKFILTTYPE:
1377 varbuf_append(&b, vstr_cckdigfilttype,
1385 } while (tup != CISTPL_END);
1388 if (boardnum != -1) {
1389 varbuf_append(&b, vstr_boardnum, boardnum);
1393 varbuf_append(&b, vstr_macaddr, eabuf);
1396 /* if there is no antenna gain field, set default */
1397 if (getvar(NULL, "ag0") == NULL && ag_init == FALSE) {
1398 varbuf_append(&b, vstr_ag, 0, 0xff);
1401 /* final nullbyte terminator */
1402 ASSERT(b.size >= 1);
1405 ASSERT(b.buf - base <= MAXSZ_NVRAM_VARS);
1406 err = initvars_table(osh, base, b.buf, vars, count);
1408 MFREE(osh, base, MAXSZ_NVRAM_VARS);
1412 /* In chips with chipcommon rev 32 and later, the srom is in chipcommon,
1413 * not in the bus cores.
1416 srom_cc_cmd(si_t *sih, osl_t *osh, void *ccregs, u32 cmd, uint wordoff,
1419 chipcregs_t *cc = (chipcregs_t *) ccregs;
1420 uint wait_cnt = 1000;
1422 if ((cmd == SRC_OP_READ) || (cmd == SRC_OP_WRITE)) {
1423 W_REG(osh, &cc->sromaddress, wordoff * 2);
1424 if (cmd == SRC_OP_WRITE)
1425 W_REG(osh, &cc->sromdata, data);
1428 W_REG(osh, &cc->sromcontrol, SRC_START | cmd);
1430 while (wait_cnt--) {
1431 if ((R_REG(osh, &cc->sromcontrol) & SRC_BUSY) == 0)
1436 BS_ERROR(("%s: Command 0x%x timed out\n", __func__, cmd));
1439 if (cmd == SRC_OP_READ)
1440 return (u16) R_REG(osh, &cc->sromdata);
1446 * Read in and validate sprom.
1447 * Return 0 on success, nonzero on error.
1450 sprom_read_pci(osl_t *osh, si_t *sih, u16 *sprom, uint wordoff,
1451 u16 *buf, uint nwords, bool check_crc)
1455 void *ccregs = NULL;
1457 /* read the sprom */
1458 for (i = 0; i < nwords; i++) {
1460 if (sih->ccrev > 31 && ISSIM_ENAB(sih)) {
1461 /* use indirect since direct is too slow on QT */
1462 if ((sih->cccaps & CC_CAP_SROM) == 0)
1465 ccregs = (void *)((u8 *) sprom - CC_SROM_OTP);
1467 srom_cc_cmd(sih, osh, ccregs, SRC_OP_READ,
1471 if (ISSIM_ENAB(sih))
1472 buf[i] = R_REG(osh, &sprom[wordoff + i]);
1474 buf[i] = R_REG(osh, &sprom[wordoff + i]);
1479 /* bypass crc checking for simulation to allow srom hack */
1480 if (ISSIM_ENAB(sih))
1485 if (buf[0] == 0xffff) {
1486 /* The hardware thinks that an srom that starts with 0xffff
1487 * is blank, regardless of the rest of the content, so declare
1490 BS_ERROR(("%s: buf[0] = 0x%x, returning bad-crc\n",
1495 /* fixup the endianness so crc8 will pass */
1496 htol16_buf(buf, nwords * 2);
1497 if (hndcrc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) !=
1499 /* DBG only pci always read srom4 first, then srom8/9 */
1500 /* BS_ERROR(("%s: bad crc\n", __func__)); */
1503 /* now correct the endianness of the byte array */
1504 ltoh16_buf(buf, nwords * 2);
1509 #if defined(BCMNVRAMR)
1510 static int otp_read_pci(osl_t *osh, si_t *sih, u16 *buf, uint bufsz)
1513 uint sz = OTP_SZ_MAX / 2; /* size in words */
1516 ASSERT(bufsz <= OTP_SZ_MAX);
1518 otp = MALLOC(osh, OTP_SZ_MAX);
1523 bzero(otp, OTP_SZ_MAX);
1525 err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz);
1527 bcopy(otp, buf, bufsz);
1530 MFREE(osh, otp, OTP_SZ_MAX);
1533 if (buf[0] == 0xffff) {
1534 /* The hardware thinks that an srom that starts with 0xffff
1535 * is blank, regardless of the rest of the content, so declare
1538 BS_ERROR(("%s: buf[0] = 0x%x, returning bad-crc\n", __func__,
1543 /* fixup the endianness so crc8 will pass */
1544 htol16_buf(buf, bufsz);
1545 if (hndcrc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) !=
1547 BS_ERROR(("%s: bad crc\n", __func__));
1550 /* now correct the endianness of the byte array */
1551 ltoh16_buf(buf, bufsz);
1555 #endif /* defined(BCMNVRAMR) */
1557 * Create variable table from memory.
1558 * Return 0 on success, nonzero on error.
1561 BCMATTACHFN(initvars_table) (osl_t *osh, char *start, char *end, char **vars,
1563 int c = (int)(end - start);
1565 /* do it only when there is more than just the null string */
1567 char *vp = MALLOC(osh, c);
1571 bcopy(start, vp, c);
1583 * Find variables with <devpath> from flash. 'base' points to the beginning
1584 * of the table upon enter and to the end of the table upon exit when success.
1585 * Return 0 on success, nonzero on error.
1588 BCMATTACHFN(initvars_flash) (si_t *sih, osl_t *osh, char **base, uint len)
1594 uint l, dl, copy_len;
1595 char devpath[SI_DEVPATH_BUFSZ];
1597 /* allocate memory and read in flash */
1598 flash = MALLOC(osh, NVRAM_SPACE);
1601 err = nvram_getall(flash, NVRAM_SPACE);
1605 si_devpath(sih, devpath, sizeof(devpath));
1607 /* grab vars with the <devpath> prefix in name */
1608 dl = strlen(devpath);
1609 for (s = flash; s && *s; s += l + 1) {
1612 /* skip non-matching variable */
1613 if (strncmp(s, devpath, dl))
1616 /* is there enough room to copy? */
1617 copy_len = l - dl + 1;
1618 if (len < copy_len) {
1619 err = BCME_BUFTOOSHORT;
1623 /* no prefix, just the name=value */
1624 strncpy(vp, &s[dl], copy_len);
1629 /* add null string as terminator */
1631 err = BCME_BUFTOOSHORT;
1638 exit: MFREE(osh, flash, NVRAM_SPACE);
1643 * Initialize nonvolatile variable table from flash.
1644 * Return 0 on success, nonzero on error.
1647 BCMATTACHFN(initvars_flash_si) (si_t *sih, char **vars, uint *count)
1649 osl_t *osh = si_osh(sih);
1653 ASSERT(vars != NULL);
1654 ASSERT(count != NULL);
1656 base = vp = MALLOC(osh, MAXSZ_NVRAM_VARS);
1661 err = initvars_flash(sih, osh, &vp, MAXSZ_NVRAM_VARS);
1663 err = initvars_table(osh, base, vp, vars, count);
1665 MFREE(osh, base, MAXSZ_NVRAM_VARS);
1670 /* Parse SROM and create name=value pairs. 'srom' points to
1671 * the SROM word array. 'off' specifies the offset of the
1672 * first word 'srom' points to, which should be either 0 or
1673 * SROM3_SWRG_OFF (full SROM or software region).
1676 static uint mask_shift(u16 mask)
1679 for (i = 0; i < (sizeof(mask) << 3); i++) {
1680 if (mask & (1 << i))
1687 static uint mask_width(u16 mask)
1690 for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) {
1691 if (mask & (1 << i))
1692 return (uint) (i - mask_shift(mask) + 1);
1699 static bool mask_valid(u16 mask)
1701 uint shift = mask_shift(mask);
1702 uint width = mask_width(mask);
1703 return mask == ((~0 << shift) & ~(~0 << (shift + width)));
1708 BCMATTACHFN(_initvars_srom_pci) (u8 sromrev, u16 *srom, uint off,
1712 const sromvar_t *srv;
1715 u32 sr = (1 << sromrev);
1717 varbuf_append(b, "sromrev=%d", sromrev);
1719 for (srv = pci_sromvars; srv->name != NULL; srv++) {
1722 if ((srv->revmask & sr) == 0)
1731 /* This entry is for mfgc only. Don't generate param for it, */
1732 if (flags & SRFL_NOVAR)
1735 if (flags & SRFL_ETHADDR) {
1736 char eabuf[ETHER_ADDR_STR_LEN];
1737 struct ether_addr ea;
1739 ea.octet[0] = (srom[srv->off - off] >> 8) & 0xff;
1740 ea.octet[1] = srom[srv->off - off] & 0xff;
1741 ea.octet[2] = (srom[srv->off + 1 - off] >> 8) & 0xff;
1742 ea.octet[3] = srom[srv->off + 1 - off] & 0xff;
1743 ea.octet[4] = (srom[srv->off + 2 - off] >> 8) & 0xff;
1744 ea.octet[5] = srom[srv->off + 2 - off] & 0xff;
1745 bcm_ether_ntoa(&ea, eabuf);
1747 varbuf_append(b, "%s=%s", name, eabuf);
1749 ASSERT(mask_valid(srv->mask));
1750 ASSERT(mask_width(srv->mask));
1752 w = srom[srv->off - off];
1753 val = (w & srv->mask) >> mask_shift(srv->mask);
1754 width = mask_width(srv->mask);
1756 while (srv->flags & SRFL_MORE) {
1758 ASSERT(srv->name != NULL);
1760 if (srv->off == 0 || srv->off < off)
1763 ASSERT(mask_valid(srv->mask));
1764 ASSERT(mask_width(srv->mask));
1766 w = srom[srv->off - off];
1768 ((w & srv->mask) >> mask_shift(srv->
1771 width += mask_width(srv->mask);
1774 if ((flags & SRFL_NOFFS)
1775 && ((int)val == (1 << width) - 1))
1778 if (flags & SRFL_CCODE) {
1780 varbuf_append(b, "ccode=");
1782 varbuf_append(b, "ccode=%c%c",
1783 (val >> 8), (val & 0xff));
1785 /* LED Powersave duty cycle has to be scaled:
1786 *(oncount >> 24) (offcount >> 8)
1788 else if (flags & SRFL_LEDDC) {
1789 u32 w32 = (((val >> 8) & 0xff) << 24) | /* oncount */
1790 (((val & 0xff)) << 8); /* offcount */
1791 varbuf_append(b, "leddc=%d", w32);
1792 } else if (flags & SRFL_PRHEX)
1793 varbuf_append(b, "%s=0x%x", name, val);
1794 else if ((flags & SRFL_PRSIGN)
1795 && (val & (1 << (width - 1))))
1796 varbuf_append(b, "%s=%d", name,
1797 (int)(val | (~0 << width)));
1799 varbuf_append(b, "%s=%u", name, val);
1804 /* Do per-path variables */
1809 psz = SROM8_PATH1 - SROM8_PATH0;
1812 psz = SROM4_PATH1 - SROM4_PATH0;
1815 for (p = 0; p < MAX_PATH_SROM; p++) {
1816 for (srv = perpath_pci_sromvars; srv->name != NULL;
1818 if ((srv->revmask & sr) == 0)
1821 if (pb + srv->off < off)
1824 /* This entry is for mfgc only. Don't generate param for it, */
1825 if (srv->flags & SRFL_NOVAR)
1828 w = srom[pb + srv->off - off];
1830 ASSERT(mask_valid(srv->mask));
1831 val = (w & srv->mask) >> mask_shift(srv->mask);
1832 width = mask_width(srv->mask);
1834 /* Cheating: no per-path var is more than 1 word */
1836 if ((srv->flags & SRFL_NOFFS)
1837 && ((int)val == (1 << width) - 1))
1840 if (srv->flags & SRFL_PRHEX)
1841 varbuf_append(b, "%s%d=0x%x", srv->name,
1844 varbuf_append(b, "%s%d=%d", srv->name,
1853 * Initialize nonvolatile variable table from sprom.
1854 * Return 0 on success, nonzero on error.
1857 BCMATTACHFN(initvars_srom_pci) (si_t *sih, void *curmap, char **vars,
1859 u16 *srom, *sromwindow;
1863 char *vp, *base = NULL;
1864 osl_t *osh = si_osh(sih);
1869 * Apply CRC over SROM content regardless SROM is present or not,
1870 * and use variable <devpath>sromrev's existance in flash to decide
1871 * if we should return an error when CRC fails or read SROM variables
1874 srom = MALLOC(osh, SROM_MAX);
1875 ASSERT(srom != NULL);
1879 sromwindow = (u16 *) SROM_OFFSET(sih);
1880 if (si_is_sprom_available(sih)) {
1882 sprom_read_pci(osh, sih, sromwindow, 0, srom, SROM_WORDS,
1885 if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) ||
1886 (((sih->buscoretype == PCIE_CORE_ID)
1887 && (sih->buscorerev >= 6))
1888 || ((sih->buscoretype == PCI_CORE_ID)
1889 && (sih->buscorerev >= 0xe)))) {
1890 /* sromrev >= 4, read more */
1892 sprom_read_pci(osh, sih, sromwindow, 0, srom,
1894 sromrev = srom[SROM4_CRCREV] & 0xff;
1896 BS_ERROR(("%s: srom %d, bad crc\n", __func__,
1899 } else if (err == 0) {
1900 /* srom is good and is rev < 4 */
1901 /* top word of sprom contains version and crc8 */
1902 sromrev = srom[SROM_CRCREV] & 0xff;
1903 /* bcm4401 sroms misprogrammed */
1904 if (sromrev == 0x10)
1908 #if defined(BCMNVRAMR)
1909 /* Use OTP if SPROM not available */
1910 else if ((err = otp_read_pci(osh, sih, srom, SROM_MAX)) == 0) {
1911 /* OTP only contain SROM rev8/rev9 for now */
1912 sromrev = srom[SROM4_CRCREV] & 0xff;
1917 BS_ERROR(("Neither SPROM nor OTP has valid image\n"));
1920 /* We want internal/wltest driver to come up with default sromvars so we can
1921 * program a blank SPROM/OTP.
1928 value = si_getdevpathvar(sih, "sromrev");
1930 sromrev = (u8) simple_strtoul(value, NULL, 0);
1935 BS_ERROR(("%s, SROM CRC Error\n", __func__));
1937 value = si_getnvramflvar(sih, "sromrev");
1950 /* Bitmask for the sromrev */
1953 /* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */
1954 if ((sr & 0x33e) == 0) {
1959 ASSERT(vars != NULL);
1960 ASSERT(count != NULL);
1962 base = vp = MALLOC(osh, MAXSZ_NVRAM_VARS);
1969 /* read variables from flash */
1971 err = initvars_flash(sih, osh, &vp, MAXSZ_NVRAM_VARS);
1977 varbuf_init(&b, base, MAXSZ_NVRAM_VARS);
1979 /* parse SROM into name=value pairs. */
1980 _initvars_srom_pci(sromrev, srom, 0, &b);
1982 /* final nullbyte terminator */
1983 ASSERT(b.size >= 1);
1987 ASSERT((vp - base) <= MAXSZ_NVRAM_VARS);
1990 err = initvars_table(osh, base, vp, vars, count);
1994 MFREE(osh, base, MAXSZ_NVRAM_VARS);
1996 MFREE(osh, srom, SROM_MAX);
2002 * Read the SDIO cis and call parsecis to initialize the vars.
2003 * Return 0 on success, nonzero on error.
2006 BCMATTACHFN(initvars_cis_sdio) (osl_t *osh, char **vars, uint *count)
2008 u8 *cis[SBSDIO_NUM_FUNCTION + 1];
2012 numfn = bcmsdh_query_iofnum(NULL);
2013 ASSERT(numfn <= SDIOD_MAX_IOFUNCS);
2015 for (fn = 0; fn <= numfn; fn++) {
2016 cis[fn] = MALLOC(osh, SBSDIO_CIS_SIZE_LIMIT)
2017 if (cis[fn] == NULL) {
2022 bzero(cis[fn], SBSDIO_CIS_SIZE_LIMIT);
2024 if (bcmsdh_cis_read(NULL, fn, cis[fn], SBSDIO_CIS_SIZE_LIMIT) !=
2026 MFREE(osh, cis[fn], SBSDIO_CIS_SIZE_LIMIT);
2033 rc = srom_parsecis(osh, cis, fn, vars, count);
2036 MFREE(osh, cis[fn], SBSDIO_CIS_SIZE_LIMIT);
2041 /* set SDIO sprom command register */
2042 static int BCMATTACHFN(sprom_cmd_sdio) (osl_t *osh, u8 cmd)
2045 uint wait_cnt = 1000;
2047 /* write sprom command register */
2048 bcmsdh_cfg_write(NULL, SDIO_FUNC_1, SBSDIO_SPROM_CS, cmd, NULL);
2051 while (wait_cnt--) {
2053 bcmsdh_cfg_read(NULL, SDIO_FUNC_1, SBSDIO_SPROM_CS, NULL);
2054 if (status & SBSDIO_SPROM_DONE)
2061 /* read a word from the SDIO srom */
2062 static int sprom_read_sdio(osl_t *osh, u16 addr, u16 *data)
2064 u8 addr_l, addr_h, data_l, data_h;
2066 addr_l = (u8) ((addr * 2) & 0xff);
2067 addr_h = (u8) (((addr * 2) >> 8) & 0xff);
2070 bcmsdh_cfg_write(NULL, SDIO_FUNC_1, SBSDIO_SPROM_ADDR_HIGH, addr_h,
2072 bcmsdh_cfg_write(NULL, SDIO_FUNC_1, SBSDIO_SPROM_ADDR_LOW, addr_l,
2076 if (sprom_cmd_sdio(osh, SBSDIO_SPROM_READ))
2081 bcmsdh_cfg_read(NULL, SDIO_FUNC_1, SBSDIO_SPROM_DATA_HIGH, NULL);
2083 bcmsdh_cfg_read(NULL, SDIO_FUNC_1, SBSDIO_SPROM_DATA_LOW, NULL);
2085 *data = (data_h << 8) | data_l;
2088 #endif /* BCMSDIO */
2091 BCMATTACHFN(initvars_srom_si) (si_t *sih, osl_t *osh, void *curmap,
2092 char **vars, uint *varsz) {
2093 /* Search flash nvram section for srom variables */
2094 return initvars_flash_si(sih, vars, varsz);