drivers/staging/ccree/ssi_buffer_mgr.c

   1 /*
   2  * Copyright (C) 2012-2017 ARM Limited or its affiliates.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  15  */
  16
  17 #include <linux/crypto.h>
  18 #include <linux/version.h>
  19 #include <crypto/algapi.h>
  20 #include <crypto/internal/aead.h>
  21 #include <crypto/hash.h>
  22 #include <crypto/authenc.h>
  23 #include <crypto/scatterwalk.h>
  24 #include <linux/dmapool.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/crypto.h>
  27 #include <linux/module.h>
  28 #include <linux/platform_device.h>
  29
  30 #include "ssi_buffer_mgr.h"
  31 #include "cc_lli_defs.h"
  32 #include "ssi_cipher.h"
  33 #include "ssi_hash.h"
  34 #include "ssi_aead.h"
  35
  36 #define LLI_MAX_NUM_OF_DATA_ENTRIES 128
  37 #define LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES 4
  38 #define MLLI_TABLE_MIN_ALIGNMENT 4 /*Force the MLLI table to be align to uint32 */
  39 #define MAX_NUM_OF_BUFFERS_IN_MLLI 4
  40 #define MAX_NUM_OF_TOTAL_MLLI_ENTRIES (2*LLI_MAX_NUM_OF_DATA_ENTRIES + \
  41                                         LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES )
  42
  43 #ifdef CC_DEBUG
  44 #define DUMP_SGL(sg) \
  45         while (sg) { \
  46                 SSI_LOG_DEBUG("page=%lu offset=%u length=%u (dma_len=%u) " \
  47                              "dma_addr=%08x\n", (sg)->page_link, (sg)->offset, \
  48                         (sg)->length, sg_dma_len(sg), (sg)->dma_address); \
  49                 (sg) = sg_next(sg); \
  50         }
  51 #define DUMP_MLLI_TABLE(mlli_p, nents) \
  52         do { \
  53                 SSI_LOG_DEBUG("mlli=%pK nents=%u\n", (mlli_p), (nents)); \
  54                 while((nents)--) { \
  55                         SSI_LOG_DEBUG("addr=0x%08X size=0x%08X\n", \
  56                              (mlli_p)[LLI_WORD0_OFFSET], \
  57                              (mlli_p)[LLI_WORD1_OFFSET]); \
  58                         (mlli_p) += LLI_ENTRY_WORD_SIZE; \
  59                 } \
  60         } while (0)
  61 #define GET_DMA_BUFFER_TYPE(buff_type) ( \
  62         ((buff_type) == SSI_DMA_BUF_NULL) ? "BUF_NULL" : \
  63         ((buff_type) == SSI_DMA_BUF_DLLI) ? "BUF_DLLI" : \
  64         ((buff_type) == SSI_DMA_BUF_MLLI) ? "BUF_MLLI" : "BUF_INVALID")
  65 #else
  66 #define DX_BUFFER_MGR_DUMP_SGL(sg)
  67 #define DX_BUFFER_MGR_DUMP_MLLI_TABLE(mlli_p, nents)
  68 #define GET_DMA_BUFFER_TYPE(buff_type)
  69 #endif
  70
  71
  72 enum dma_buffer_type {
  73         DMA_NULL_TYPE = -1,
  74         DMA_SGL_TYPE = 1,
  75         DMA_BUFF_TYPE = 2,
  76 };
  77
  78 struct buff_mgr_handle {
  79         struct dma_pool *mlli_buffs_pool;
  80 };
  81
  82 union buffer_array_entry {
  83         struct scatterlist *sgl;
  84         dma_addr_t buffer_dma;
  85 };
  86
  87 struct buffer_array {
  88         unsigned int num_of_buffers;
  89         union buffer_array_entry entry[MAX_NUM_OF_BUFFERS_IN_MLLI];
  90         unsigned int offset[MAX_NUM_OF_BUFFERS_IN_MLLI];
  91         int nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
  92         int total_data_len[MAX_NUM_OF_BUFFERS_IN_MLLI];
  93         enum dma_buffer_type type[MAX_NUM_OF_BUFFERS_IN_MLLI];
  94         bool is_last[MAX_NUM_OF_BUFFERS_IN_MLLI];
  95         uint32_t * mlli_nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
  96 };
  97
  98 #ifdef CC_DMA_48BIT_SIM
  99 dma_addr_t ssi_buff_mgr_update_dma_addr(dma_addr_t orig_addr, uint32_t data_len)
 100 {
 101         dma_addr_t tmp_dma_addr;
 102 #ifdef CC_DMA_48BIT_SIM_FULL
 103         /* With this code all addresses will be switched to 48 bits. */
 104         /* The if condition protects from double expention */
 105         if((((orig_addr >> 16) & 0xFFFF) != 0xFFFF) &&
 106                 (data_len <= CC_MAX_MLLI_ENTRY_SIZE)) {
 107 #else
 108         if((!(((orig_addr >> 16) & 0xFF) % 2)) &&
 109                 (data_len <= CC_MAX_MLLI_ENTRY_SIZE)) {
 110 #endif
 111                 tmp_dma_addr = ((orig_addr<<16) | 0xFFFF0000 |
 112                                 (orig_addr & UINT16_MAX));
 113                         SSI_LOG_DEBUG("MAP DMA: orig address=0x%llX "
 114                                     "dma_address=0x%llX\n",
 115                                      orig_addr, tmp_dma_addr);
 116                         return tmp_dma_addr;
 117         }
 118         return orig_addr;
 119 }
 120
 121 dma_addr_t ssi_buff_mgr_restore_dma_addr(dma_addr_t orig_addr)
 122 {
 123         dma_addr_t tmp_dma_addr;
 124 #ifdef CC_DMA_48BIT_SIM_FULL
 125         /* With this code all addresses will be restored from 48 bits. */
 126         /* The if condition protects from double restoring */
 127         if((orig_addr >> 32) & 0xFFFF ) {
 128 #else
 129         if(((orig_addr >> 32) & 0xFFFF) &&
 130                 !(((orig_addr >> 32) & 0xFF) % 2) ) {
 131 #endif
 132                 /*return high 16 bits*/
 133                 tmp_dma_addr = ((orig_addr >> 16));
 134                 /*clean the 0xFFFF in the lower bits (set in the add expansion)*/
 135                 tmp_dma_addr &= 0xFFFF0000;
 136                 /* Set the original 16 bits */
 137                 tmp_dma_addr |= (orig_addr & UINT16_MAX);
 138                 SSI_LOG_DEBUG("Release DMA: orig address=0x%llX "
 139                              "dma_address=0x%llX\n",
 140                              orig_addr, tmp_dma_addr);
 141                         return tmp_dma_addr;
 142         }
 143         return orig_addr;
 144 }
 145 #endif
 146 /**
 147  * ssi_buffer_mgr_get_sgl_nents() - Get scatterlist number of entries.
 148  *
 149  * @sg_list: SG list
 150  * @nbytes: [IN] Total SGL data bytes.
 151  * @lbytes: [OUT] Returns the amount of bytes at the last entry
 152  */
 153 static unsigned int ssi_buffer_mgr_get_sgl_nents(
 154         struct scatterlist *sg_list, unsigned int nbytes, uint32_t *lbytes, bool *is_chained)
 155 {
 156         unsigned int nents = 0;
 157         while (nbytes != 0) {
 158                 if (sg_is_chain(sg_list)) {
 159                         SSI_LOG_ERR("Unexpected chanined entry "
 160                                    "in sg (entry =0x%X) \n", nents);
 161                         BUG();
 162                 }
 163                 if (sg_list->length != 0) {
 164                         nents++;
 165                         /* get the number of bytes in the last entry */
 166                         *lbytes = nbytes;
 167                         nbytes -= ( sg_list->length > nbytes ) ? nbytes : sg_list->length;
 168                         sg_list = sg_next(sg_list);
 169                 } else {
 170                         sg_list = (struct scatterlist *)sg_page(sg_list);
 171                         if (is_chained != NULL) {
 172                                 *is_chained = true;
 173                         }
 174                 }
 175         }
 176         SSI_LOG_DEBUG("nents %d last bytes %d\n",nents, *lbytes);
 177         return nents;
 178 }
 179
 180 /**
 181  * ssi_buffer_mgr_zero_sgl() - Zero scatter scatter list data.
 182  *
 183  * @sgl:
 184  */
 185 void ssi_buffer_mgr_zero_sgl(struct scatterlist *sgl, uint32_t data_len)
 186 {
 187         struct scatterlist *current_sg = sgl;
 188         int sg_index = 0;
 189
 190         while (sg_index <= data_len) {
 191                 if (current_sg == NULL) {
 192                         /* reached the end of the sgl --> just return back */
 193                         return;
 194                 }
 195                 memset(sg_virt(current_sg), 0, current_sg->length);
 196                 sg_index += current_sg->length;
 197                 current_sg = sg_next(current_sg);
 198         }
 199 }
 200
 201 /**
 202  * ssi_buffer_mgr_copy_scatterlist_portion() - Copy scatter list data,
 203  * from to_skip to end, to dest and vice versa
 204  *
 205  * @dest:
 206  * @sg:
 207  * @to_skip:
 208  * @end:
 209  * @direct:
 210  */
 211 void ssi_buffer_mgr_copy_scatterlist_portion(
 212         u8 *dest, struct scatterlist *sg,
 213         uint32_t to_skip,  uint32_t end,
 214         enum ssi_sg_cpy_direct direct)
 215 {
 216         uint32_t nents, lbytes;
 217
 218         nents = ssi_buffer_mgr_get_sgl_nents(sg, end, &lbytes, NULL);
 219         sg_copy_buffer(sg, nents, (void *)dest, (end - to_skip), 0, (direct == SSI_SG_TO_BUF));
 220 }
 221
 222 static inline int ssi_buffer_mgr_render_buff_to_mlli(
 223         dma_addr_t buff_dma, uint32_t buff_size, uint32_t *curr_nents,
 224         uint32_t **mlli_entry_pp)
 225 {
 226         uint32_t *mlli_entry_p = *mlli_entry_pp;
 227         uint32_t new_nents;;
 228
 229         /* Verify there is no memory overflow*/
 230         new_nents = (*curr_nents + buff_size/CC_MAX_MLLI_ENTRY_SIZE + 1);
 231         if (new_nents > MAX_NUM_OF_TOTAL_MLLI_ENTRIES ) {
 232                 return -ENOMEM;
 233         }
 234
 235         /*handle buffer longer than 64 kbytes */
 236         while (buff_size > CC_MAX_MLLI_ENTRY_SIZE ) {
 237                 SSI_UPDATE_DMA_ADDR_TO_48BIT(buff_dma, CC_MAX_MLLI_ENTRY_SIZE);
 238                 LLI_SET_ADDR(mlli_entry_p,buff_dma);
 239                 LLI_SET_SIZE(mlli_entry_p, CC_MAX_MLLI_ENTRY_SIZE);
 240                 SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n",*curr_nents,
 241                            mlli_entry_p[LLI_WORD0_OFFSET],
 242                            mlli_entry_p[LLI_WORD1_OFFSET]);
 243                 SSI_RESTORE_DMA_ADDR_TO_48BIT(buff_dma);
 244                 buff_dma += CC_MAX_MLLI_ENTRY_SIZE;
 245                 buff_size -= CC_MAX_MLLI_ENTRY_SIZE;
 246                 mlli_entry_p = mlli_entry_p + 2;
 247                 (*curr_nents)++;
 248         }
 249         /*Last entry */
 250         SSI_UPDATE_DMA_ADDR_TO_48BIT(buff_dma, buff_size);
 251         LLI_SET_ADDR(mlli_entry_p,buff_dma);
 252         LLI_SET_SIZE(mlli_entry_p, buff_size);
 253         SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n",*curr_nents,
 254                    mlli_entry_p[LLI_WORD0_OFFSET],
 255                    mlli_entry_p[LLI_WORD1_OFFSET]);
 256         mlli_entry_p = mlli_entry_p + 2;
 257         *mlli_entry_pp = mlli_entry_p;
 258         (*curr_nents)++;
 259         return 0;
 260 }
 261
 262
 263 static inline int ssi_buffer_mgr_render_scatterlist_to_mlli(
 264         struct scatterlist *sgl, uint32_t sgl_data_len, uint32_t sglOffset, uint32_t *curr_nents,
 265         uint32_t **mlli_entry_pp)
 266 {
 267         struct scatterlist *curr_sgl = sgl;
 268         uint32_t *mlli_entry_p = *mlli_entry_pp;
 269         int32_t rc = 0;
 270
 271         for ( ; (curr_sgl != NULL) && (sgl_data_len != 0);
 272               curr_sgl = sg_next(curr_sgl)) {
 273                 uint32_t entry_data_len =
 274                         (sgl_data_len > sg_dma_len(curr_sgl) - sglOffset) ?
 275                                 sg_dma_len(curr_sgl) - sglOffset : sgl_data_len ;
 276                 sgl_data_len -= entry_data_len;
 277                 rc = ssi_buffer_mgr_render_buff_to_mlli(
 278                         sg_dma_address(curr_sgl) + sglOffset, entry_data_len, curr_nents,
 279                         &mlli_entry_p);
 280                 if(rc != 0) {
 281                         return rc;
 282                 }
 283                 sglOffset=0;
 284         }
 285         *mlli_entry_pp = mlli_entry_p;
 286         return 0;
 287 }
 288
 289 static int ssi_buffer_mgr_generate_mlli(
 290         struct device *dev,
 291         struct buffer_array *sg_data,
 292         struct mlli_params *mlli_params)
 293 {
 294         uint32_t *mlli_p;
 295         uint32_t total_nents = 0,prev_total_nents = 0;
 296         int rc = 0, i;
 297
 298         SSI_LOG_DEBUG("NUM of SG's = %d\n", sg_data->num_of_buffers);
 299
 300         /* Allocate memory from the pointed pool */
 301         mlli_params->mlli_virt_addr = dma_pool_alloc(
 302                         mlli_params->curr_pool, GFP_KERNEL,
 303                         &(mlli_params->mlli_dma_addr));
 304         if (unlikely(mlli_params->mlli_virt_addr == NULL)) {
 305                 SSI_LOG_ERR("dma_pool_alloc() failed\n");
 306                 rc =-ENOMEM;
 307                 goto build_mlli_exit;
 308         }
 309         SSI_UPDATE_DMA_ADDR_TO_48BIT(mlli_params->mlli_dma_addr,
 310                                                 (MAX_NUM_OF_TOTAL_MLLI_ENTRIES*
 311                                                 LLI_ENTRY_BYTE_SIZE));
 312         /* Point to start of MLLI */
 313         mlli_p = (uint32_t *)mlli_params->mlli_virt_addr;
 314         /* go over all SG's and link it to one MLLI table */
 315         for (i = 0; i < sg_data->num_of_buffers; i++) {
 316                 if (sg_data->type[i] == DMA_SGL_TYPE)
 317                         rc = ssi_buffer_mgr_render_scatterlist_to_mlli(
 318                                 sg_data->entry[i].sgl,
 319                                 sg_data->total_data_len[i], sg_data->offset[i], &total_nents,
 320                                 &mlli_p);
 321                 else /*DMA_BUFF_TYPE*/
 322                         rc = ssi_buffer_mgr_render_buff_to_mlli(
 323                                 sg_data->entry[i].buffer_dma,
 324                                 sg_data->total_data_len[i], &total_nents,
 325                                 &mlli_p);
 326                 if(rc != 0) {
 327                         return rc;
 328                 }
 329
 330                 /* set last bit in the current table */
 331                 if (sg_data->mlli_nents[i] != NULL) {
 332                         /*Calculate the current MLLI table length for the
 333                         length field in the descriptor*/
 334                         *(sg_data->mlli_nents[i]) +=
 335                                 (total_nents - prev_total_nents);
 336                         prev_total_nents = total_nents;
 337                 }
 338         }
 339
 340         /* Set MLLI size for the bypass operation */
 341         mlli_params->mlli_len = (total_nents * LLI_ENTRY_BYTE_SIZE);
 342
 343         SSI_LOG_DEBUG("MLLI params: "
 344                      "virt_addr=%pK dma_addr=0x%llX mlli_len=0x%X\n",
 345                    mlli_params->mlli_virt_addr,
 346                    (unsigned long long)mlli_params->mlli_dma_addr,
 347                    mlli_params->mlli_len);
 348
 349 build_mlli_exit:
 350         return rc;
 351 }
 352
 353 static inline void ssi_buffer_mgr_add_buffer_entry(
 354         struct buffer_array *sgl_data,
 355         dma_addr_t buffer_dma, unsigned int buffer_len,
 356         bool is_last_entry, uint32_t *mlli_nents)
 357 {
 358         unsigned int index = sgl_data->num_of_buffers;
 359
 360         SSI_LOG_DEBUG("index=%u single_buff=0x%llX "
 361                      "buffer_len=0x%08X is_last=%d\n",
 362                      index, (unsigned long long)buffer_dma, buffer_len, is_last_entry);
 363         sgl_data->nents[index] = 1;
 364         sgl_data->entry[index].buffer_dma = buffer_dma;
 365         sgl_data->offset[index] = 0;
 366         sgl_data->total_data_len[index] = buffer_len;
 367         sgl_data->type[index] = DMA_BUFF_TYPE;
 368         sgl_data->is_last[index] = is_last_entry;
 369         sgl_data->mlli_nents[index] = mlli_nents;
 370         if (sgl_data->mlli_nents[index] != NULL)
 371                 *sgl_data->mlli_nents[index] = 0;
 372         sgl_data->num_of_buffers++;
 373 }
 374
 375 static inline void ssi_buffer_mgr_add_scatterlist_entry(
 376         struct buffer_array *sgl_data,
 377         unsigned int nents,
 378         struct scatterlist *sgl,
 379         unsigned int data_len,
 380         unsigned int data_offset,
 381         bool is_last_table,
 382         uint32_t *mlli_nents)
 383 {
 384         unsigned int index = sgl_data->num_of_buffers;
 385
 386         SSI_LOG_DEBUG("index=%u nents=%u sgl=%pK data_len=0x%08X is_last=%d\n",
 387                      index, nents, sgl, data_len, is_last_table);
 388         sgl_data->nents[index] = nents;
 389         sgl_data->entry[index].sgl = sgl;
 390         sgl_data->offset[index] = data_offset;
 391         sgl_data->total_data_len[index] = data_len;
 392         sgl_data->type[index] = DMA_SGL_TYPE;
 393         sgl_data->is_last[index] = is_last_table;
 394         sgl_data->mlli_nents[index] = mlli_nents;
 395         if (sgl_data->mlli_nents[index] != NULL)
 396                 *sgl_data->mlli_nents[index] = 0;
 397         sgl_data->num_of_buffers++;
 398 }
 399
 400 static int
 401 ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, uint32_t nents,
 402                          enum dma_data_direction direction)
 403 {
 404         uint32_t i , j;
 405         struct scatterlist *l_sg = sg;
 406         for (i = 0; i < nents; i++) {
 407                 if (l_sg == NULL) {
 408                         break;
 409                 }
 410                 if (unlikely(dma_map_sg(dev, l_sg, 1, direction) != 1)){
 411                         SSI_LOG_ERR("dma_map_page() sg buffer failed\n");
 412                         goto err;
 413                 }
 414                 l_sg = sg_next(l_sg);
 415         }
 416         return nents;
 417
 418 err:
 419         /* Restore mapped parts */
 420         for (j = 0; j < i; j++) {
 421                 if (sg == NULL) {
 422                         break;
 423                 }
 424                 dma_unmap_sg(dev,sg,1,direction);
 425                 sg = sg_next(sg);
 426         }
 427         return 0;
 428 }
 429
 430 static int ssi_buffer_mgr_map_scatterlist(
 431         struct device *dev, struct scatterlist *sg,
 432         unsigned int nbytes, int direction,
 433         uint32_t *nents, uint32_t max_sg_nents,
 434         uint32_t *lbytes, uint32_t *mapped_nents)
 435 {
 436         bool is_chained = false;
 437
 438         if (sg_is_last(sg)) {
 439                 /* One entry only case -set to DLLI */
 440                 if (unlikely(dma_map_sg(dev, sg, 1, direction) != 1)) {
 441                         SSI_LOG_ERR("dma_map_sg() single buffer failed\n");
 442                         return -ENOMEM;
 443                 }
 444                 SSI_LOG_DEBUG("Mapped sg: dma_address=0x%llX "
 445                              "page_link=0x%08lX addr=%pK offset=%u "
 446                              "length=%u\n",
 447                              (unsigned long long)sg_dma_address(sg),
 448                              sg->page_link,
 449                              sg_virt(sg),
 450                              sg->offset, sg->length);
 451                 *lbytes = nbytes;
 452                 *nents = 1;
 453                 *mapped_nents = 1;
 454                 SSI_UPDATE_DMA_ADDR_TO_48BIT(sg_dma_address(sg), sg_dma_len(sg));
 455         } else {  /*sg_is_last*/
 456                 *nents = ssi_buffer_mgr_get_sgl_nents(sg, nbytes, lbytes,
 457                                                      &is_chained);
 458                 if (*nents > max_sg_nents) {
 459                         *nents = 0;
 460                         SSI_LOG_ERR("Too many fragments. current %d max %d\n",
 461                                    *nents, max_sg_nents);
 462                         return -ENOMEM;
 463                 }
 464                 if (!is_chained) {
 465                         /* In case of mmu the number of mapped nents might
 466                         be changed from the original sgl nents */
 467                         *mapped_nents = dma_map_sg(dev, sg, *nents, direction);
 468                         if (unlikely(*mapped_nents == 0)){
 469                                 *nents = 0;
 470                                 SSI_LOG_ERR("dma_map_sg() sg buffer failed\n");
 471                                 return -ENOMEM;
 472                         }
 473                 } else {
 474                         /*In this case the driver maps entry by entry so it
 475                         must have the same nents before and after map */
 476                         *mapped_nents = ssi_buffer_mgr_dma_map_sg(dev,
 477                                                                  sg,
 478                                                                  *nents,
 479                                                                  direction);
 480                         if (unlikely(*mapped_nents != *nents)){
 481                                 *nents = *mapped_nents;
 482                                 SSI_LOG_ERR("dma_map_sg() sg buffer failed\n");
 483                                 return -ENOMEM;
 484                         }
 485                 }
 486         }
 487
 488         return 0;
 489 }
 490
 491 static inline int
 492 ssi_aead_handle_config_buf(struct device *dev,
 493         struct aead_req_ctx *areq_ctx,
 494         uint8_t* config_data,
 495         struct buffer_array *sg_data,
 496         unsigned int assoclen)
 497 {
 498         SSI_LOG_DEBUG(" handle additional data config set to   DLLI \n");
 499         /* create sg for the current buffer */
 500         sg_init_one(&areq_ctx->ccm_adata_sg, config_data, AES_BLOCK_SIZE + areq_ctx->ccm_hdr_size);
 501         if (unlikely(dma_map_sg(dev, &areq_ctx->ccm_adata_sg, 1,
 502                                 DMA_TO_DEVICE) != 1)) {
 503                         SSI_LOG_ERR("dma_map_sg() "
 504                            "config buffer failed\n");
 505                         return -ENOMEM;
 506         }
 507         SSI_LOG_DEBUG("Mapped curr_buff: dma_address=0x%llX "
 508                      "page_link=0x%08lX addr=%pK "
 509                      "offset=%u length=%u\n",
 510                      (unsigned long long)sg_dma_address(&areq_ctx->ccm_adata_sg),
 511                      areq_ctx->ccm_adata_sg.page_link,
 512                      sg_virt(&areq_ctx->ccm_adata_sg),
 513                      areq_ctx->ccm_adata_sg.offset,
 514                      areq_ctx->ccm_adata_sg.length);
 515         /* prepare for case of MLLI */
 516         if (assoclen > 0) {
 517                 ssi_buffer_mgr_add_scatterlist_entry(sg_data, 1,
 518                                                     &areq_ctx->ccm_adata_sg,
 519                                                     (AES_BLOCK_SIZE +
 520                                                     areq_ctx->ccm_hdr_size), 0,
 521                                                     false, NULL);
 522         }
 523         return 0;
 524 }
 525
 526
 527 static inline int ssi_ahash_handle_curr_buf(struct device *dev,
 528                                            struct ahash_req_ctx *areq_ctx,
 529                                            uint8_t* curr_buff,
 530                                            uint32_t curr_buff_cnt,
 531                                            struct buffer_array *sg_data)
 532 {
 533         SSI_LOG_DEBUG(" handle curr buff %x set to   DLLI \n", curr_buff_cnt);
 534         /* create sg for the current buffer */
 535         sg_init_one(areq_ctx->buff_sg,curr_buff, curr_buff_cnt);
 536         if (unlikely(dma_map_sg(dev, areq_ctx->buff_sg, 1,
 537                                 DMA_TO_DEVICE) != 1)) {
 538                         SSI_LOG_ERR("dma_map_sg() "
 539                            "src buffer failed\n");
 540                         return -ENOMEM;
 541         }
 542         SSI_LOG_DEBUG("Mapped curr_buff: dma_address=0x%llX "
 543                      "page_link=0x%08lX addr=%pK "
 544                      "offset=%u length=%u\n",
 545                      (unsigned long long)sg_dma_address(areq_ctx->buff_sg),
 546                      areq_ctx->buff_sg->page_link,
 547                      sg_virt(areq_ctx->buff_sg),
 548                      areq_ctx->buff_sg->offset,
 549                      areq_ctx->buff_sg->length);
 550         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
 551         areq_ctx->curr_sg = areq_ctx->buff_sg;
 552         areq_ctx->in_nents = 0;
 553         /* prepare for case of MLLI */
 554         ssi_buffer_mgr_add_scatterlist_entry(sg_data, 1, areq_ctx->buff_sg,
 555                                 curr_buff_cnt, 0, false, NULL);
 556         return 0;
 557 }
 558
 559 void ssi_buffer_mgr_unmap_blkcipher_request(
 560         struct device *dev,
 561         void *ctx,
 562         unsigned int ivsize,
 563         struct scatterlist *src,
 564         struct scatterlist *dst)
 565 {
 566         struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx;
 567
 568         if (likely(req_ctx->gen_ctx.iv_dma_addr != 0)) {
 569                 SSI_LOG_DEBUG("Unmapped iv: iv_dma_addr=0x%llX iv_size=%u\n",
 570                         (unsigned long long)req_ctx->gen_ctx.iv_dma_addr,
 571                         ivsize);
 572                 SSI_RESTORE_DMA_ADDR_TO_48BIT(req_ctx->gen_ctx.iv_dma_addr);
 573                 dma_unmap_single(dev, req_ctx->gen_ctx.iv_dma_addr,
 574                                  ivsize,
 575                                  req_ctx->is_giv ? DMA_BIDIRECTIONAL :
 576                                  DMA_TO_DEVICE);
 577         }
 578         /* Release pool */
 579         if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) {
 580                 SSI_RESTORE_DMA_ADDR_TO_48BIT(req_ctx->mlli_params.mlli_dma_addr);
 581                 dma_pool_free(req_ctx->mlli_params.curr_pool,
 582                               req_ctx->mlli_params.mlli_virt_addr,
 583                               req_ctx->mlli_params.mlli_dma_addr);
 584         }
 585
 586         SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(src));
 587         dma_unmap_sg(dev, src, req_ctx->in_nents,
 588                 DMA_BIDIRECTIONAL);
 589         SSI_LOG_DEBUG("Unmapped req->src=%pK\n",
 590                      sg_virt(src));
 591
 592         if (src != dst) {
 593                 SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(dst));
 594                 dma_unmap_sg(dev, dst, req_ctx->out_nents,
 595                         DMA_BIDIRECTIONAL);
 596                 SSI_LOG_DEBUG("Unmapped req->dst=%pK\n",
 597                         sg_virt(dst));
 598         }
 599 }
 600
 601 int ssi_buffer_mgr_map_blkcipher_request(
 602         struct ssi_drvdata *drvdata,
 603         void *ctx,
 604         unsigned int ivsize,
 605         unsigned int nbytes,
 606         void *info,
 607         struct scatterlist *src,
 608         struct scatterlist *dst)
 609 {
 610         struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx;
 611         struct mlli_params *mlli_params = &req_ctx->mlli_params;
 612         struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
 613         struct device *dev = &drvdata->plat_dev->dev;
 614         struct buffer_array sg_data;
 615         uint32_t dummy = 0;
 616         int rc = 0;
 617         uint32_t mapped_nents = 0;
 618
 619         req_ctx->dma_buf_type = SSI_DMA_BUF_DLLI;
 620         mlli_params->curr_pool = NULL;
 621         sg_data.num_of_buffers = 0;
 622
 623         /* Map IV buffer */
 624         if (likely(ivsize != 0) ) {
 625                 dump_byte_array("iv", (uint8_t *)info, ivsize);
 626                 req_ctx->gen_ctx.iv_dma_addr =
 627                         dma_map_single(dev, (void *)info,
 628                                        ivsize,
 629                                        req_ctx->is_giv ? DMA_BIDIRECTIONAL:
 630                                        DMA_TO_DEVICE);
 631                 if (unlikely(dma_mapping_error(dev,
 632                                         req_ctx->gen_ctx.iv_dma_addr))) {
 633                         SSI_LOG_ERR("Mapping iv %u B at va=%pK "
 634                                    "for DMA failed\n", ivsize, info);
 635                         return -ENOMEM;
 636                 }
 637                 SSI_UPDATE_DMA_ADDR_TO_48BIT(req_ctx->gen_ctx.iv_dma_addr,
 638                                                                 ivsize);
 639                 SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=0x%llX\n",
 640                         ivsize, info,
 641                         (unsigned long long)req_ctx->gen_ctx.iv_dma_addr);
 642         } else
 643                 req_ctx->gen_ctx.iv_dma_addr = 0;
 644
 645         /* Map the src SGL */
 646         rc = ssi_buffer_mgr_map_scatterlist(dev, src,
 647                 nbytes, DMA_BIDIRECTIONAL, &req_ctx->in_nents,
 648                 LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents);
 649         if (unlikely(rc != 0)) {
 650                 rc = -ENOMEM;
 651                 goto ablkcipher_exit;
 652         }
 653         if (mapped_nents > 1)
 654                 req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI;
 655
 656         if (unlikely(src == dst)) {
 657                 /* Handle inplace operation */
 658                 if (unlikely(req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI)) {
 659                         req_ctx->out_nents = 0;
 660                         ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
 661                                 req_ctx->in_nents, src,
 662                                 nbytes, 0, true, &req_ctx->in_mlli_nents);
 663                 }
 664         } else {
 665                 /* Map the dst sg */
 666                 if (unlikely(ssi_buffer_mgr_map_scatterlist(
 667                         dev,dst, nbytes,
 668                         DMA_BIDIRECTIONAL, &req_ctx->out_nents,
 669                         LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy,
 670                         &mapped_nents))){
 671                         rc = -ENOMEM;
 672                         goto ablkcipher_exit;
 673                 }
 674                 if (mapped_nents > 1)
 675                         req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI;
 676
 677                 if (unlikely((req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI))) {
 678                         ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
 679                                 req_ctx->in_nents, src,
 680                                 nbytes, 0, true,
 681                                 &req_ctx->in_mlli_nents);
 682                         ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
 683                                 req_ctx->out_nents, dst,
 684                                 nbytes, 0, true,
 685                                 &req_ctx->out_mlli_nents);
 686                 }
 687         }
 688
 689         if (unlikely(req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI)) {
 690                 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
 691                 rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
 692                 if (unlikely(rc!= 0))
 693                         goto ablkcipher_exit;
 694
 695         }
 696
 697         SSI_LOG_DEBUG("areq_ctx->dma_buf_type = %s\n",
 698                 GET_DMA_BUFFER_TYPE(req_ctx->dma_buf_type));
 699
 700         return 0;
 701
 702 ablkcipher_exit:
 703         ssi_buffer_mgr_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst);
 704         return rc;
 705 }
 706
 707 void ssi_buffer_mgr_unmap_aead_request(
 708         struct device *dev, struct aead_request *req)
 709 {
 710         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
 711         unsigned int hw_iv_size = areq_ctx->hw_iv_size;
 712         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
 713         uint32_t dummy;
 714         bool chained;
 715         uint32_t size_to_unmap = 0;
 716
 717         if (areq_ctx->mac_buf_dma_addr != 0) {
 718                 SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->mac_buf_dma_addr);
 719                 dma_unmap_single(dev, areq_ctx->mac_buf_dma_addr,
 720                         MAX_MAC_SIZE, DMA_BIDIRECTIONAL);
 721         }
 722
 723 #if SSI_CC_HAS_AES_GCM
 724         if (areq_ctx->cipher_mode == DRV_CIPHER_GCTR) {
 725                 if (areq_ctx->hkey_dma_addr != 0) {
 726                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->hkey_dma_addr);
 727                         dma_unmap_single(dev, areq_ctx->hkey_dma_addr,
 728                                          AES_BLOCK_SIZE, DMA_BIDIRECTIONAL);
 729                 }
 730
 731                 if (areq_ctx->gcm_block_len_dma_addr != 0) {
 732                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_block_len_dma_addr);
 733                         dma_unmap_single(dev, areq_ctx->gcm_block_len_dma_addr,
 734                                          AES_BLOCK_SIZE, DMA_TO_DEVICE);
 735                 }
 736
 737                 if (areq_ctx->gcm_iv_inc1_dma_addr != 0) {
 738                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_iv_inc1_dma_addr);
 739                         dma_unmap_single(dev, areq_ctx->gcm_iv_inc1_dma_addr,
 740                                 AES_BLOCK_SIZE, DMA_TO_DEVICE);
 741                 }
 742
 743                 if (areq_ctx->gcm_iv_inc2_dma_addr != 0) {
 744                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_iv_inc2_dma_addr);
 745                         dma_unmap_single(dev, areq_ctx->gcm_iv_inc2_dma_addr,
 746                                 AES_BLOCK_SIZE, DMA_TO_DEVICE);
 747                 }
 748         }
 749 #endif
 750
 751         if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
 752                 if (areq_ctx->ccm_iv0_dma_addr != 0) {
 753                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->ccm_iv0_dma_addr);
 754                         dma_unmap_single(dev, areq_ctx->ccm_iv0_dma_addr,
 755                                 AES_BLOCK_SIZE, DMA_TO_DEVICE);
 756                 }
 757
 758                 dma_unmap_sg(dev, &areq_ctx->ccm_adata_sg, 1, DMA_TO_DEVICE);
 759         }
 760         if (areq_ctx->gen_ctx.iv_dma_addr != 0) {
 761                 SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->gen_ctx.iv_dma_addr);
 762                 dma_unmap_single(dev, areq_ctx->gen_ctx.iv_dma_addr,
 763                                  hw_iv_size, DMA_BIDIRECTIONAL);
 764         }
 765
 766         /*In case a pool was set, a table was
 767           allocated and should be released */
 768         if (areq_ctx->mlli_params.curr_pool != NULL) {
 769                 SSI_LOG_DEBUG("free MLLI buffer: dma=0x%08llX virt=%pK\n",
 770                         (unsigned long long)areq_ctx->mlli_params.mlli_dma_addr,
 771                         areq_ctx->mlli_params.mlli_virt_addr);
 772                 SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->mlli_params.mlli_dma_addr);
 773                 dma_pool_free(areq_ctx->mlli_params.curr_pool,
 774                               areq_ctx->mlli_params.mlli_virt_addr,
 775                               areq_ctx->mlli_params.mlli_dma_addr);
 776         }
 777
 778         SSI_LOG_DEBUG("Unmapping src sgl: req->src=%pK areq_ctx->src.nents=%u areq_ctx->assoc.nents=%u assoclen:%u cryptlen=%u\n", sg_virt(req->src),areq_ctx->src.nents,areq_ctx->assoc.nents,req->assoclen,req->cryptlen);
 779         SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(req->src));
 780         size_to_unmap = req->assoclen+req->cryptlen;
 781         if(areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT){
 782                 size_to_unmap += areq_ctx->req_authsize;
 783         }
 784         if (areq_ctx->is_gcm4543)
 785                 size_to_unmap += crypto_aead_ivsize(tfm);
 786
 787         dma_unmap_sg(dev, req->src, ssi_buffer_mgr_get_sgl_nents(req->src,size_to_unmap,&dummy,&chained) , DMA_BIDIRECTIONAL);
 788         if (unlikely(req->src != req->dst)) {
 789                 SSI_LOG_DEBUG("Unmapping dst sgl: req->dst=%pK\n",
 790                         sg_virt(req->dst));
 791                 SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(req->dst));
 792                 dma_unmap_sg(dev, req->dst, ssi_buffer_mgr_get_sgl_nents(req->dst,size_to_unmap,&dummy,&chained),
 793                         DMA_BIDIRECTIONAL);
 794         }
 795 #if DX_HAS_ACP
 796         if ((areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) &&
 797             likely(req->src == req->dst))
 798         {
 799                 uint32_t size_to_skip = req->assoclen;
 800                 if (areq_ctx->is_gcm4543) {
 801                         size_to_skip += crypto_aead_ivsize(tfm);
 802                 }
 803                 /* copy mac to a temporary location to deal with possible
 804                   data memory overriding that caused by cache coherence problem. */
 805                 ssi_buffer_mgr_copy_scatterlist_portion(
 806                         areq_ctx->backup_mac, req->src,
 807                         size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
 808                         size_to_skip+ req->cryptlen, SSI_SG_FROM_BUF);
 809         }
 810 #endif
 811 }
 812
 813 static inline int ssi_buffer_mgr_get_aead_icv_nents(
 814         struct scatterlist *sgl,
 815         unsigned int sgl_nents,
 816         unsigned int authsize,
 817         uint32_t last_entry_data_size,
 818         bool *is_icv_fragmented)
 819 {
 820         unsigned int icv_max_size = 0;
 821         unsigned int icv_required_size = authsize > last_entry_data_size ? (authsize - last_entry_data_size) : authsize;
 822         unsigned int nents;
 823         unsigned int i;
 824
 825         if (sgl_nents < MAX_ICV_NENTS_SUPPORTED) {
 826                 *is_icv_fragmented = false;
 827                 return 0;
 828         }
 829
 830         for( i = 0 ; i < (sgl_nents - MAX_ICV_NENTS_SUPPORTED) ; i++) {
 831                 if (sgl == NULL) {
 832                         break;
 833                 }
 834                 sgl = sg_next(sgl);
 835         }
 836
 837         if (sgl != NULL) {
 838                 icv_max_size = sgl->length;
 839         }
 840
 841         if (last_entry_data_size > authsize) {
 842                 nents = 0; /* ICV attached to data in last entry (not fragmented!) */
 843                 *is_icv_fragmented = false;
 844         } else if (last_entry_data_size == authsize) {
 845                 nents = 1; /* ICV placed in whole last entry (not fragmented!) */
 846                 *is_icv_fragmented = false;
 847         } else if (icv_max_size > icv_required_size) {
 848                 nents = 1;
 849                 *is_icv_fragmented = true;
 850         } else if (icv_max_size == icv_required_size) {
 851                 nents = 2;
 852                 *is_icv_fragmented = true;
 853         } else {
 854                 SSI_LOG_ERR("Unsupported num. of ICV fragments (> %d)\n",
 855                         MAX_ICV_NENTS_SUPPORTED);
 856                 nents = -1; /*unsupported*/
 857         }
 858         SSI_LOG_DEBUG("is_frag=%s icv_nents=%u\n",
 859                 (*is_icv_fragmented ? "true" : "false"), nents);
 860
 861         return nents;
 862 }
 863
 864 static inline int ssi_buffer_mgr_aead_chain_iv(
 865         struct ssi_drvdata *drvdata,
 866         struct aead_request *req,
 867         struct buffer_array *sg_data,
 868         bool is_last, bool do_chain)
 869 {
 870         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
 871         unsigned int hw_iv_size = areq_ctx->hw_iv_size;
 872         struct device *dev = &drvdata->plat_dev->dev;
 873         int rc = 0;
 874
 875         if (unlikely(req->iv == NULL)) {
 876                 areq_ctx->gen_ctx.iv_dma_addr = 0;
 877                 goto chain_iv_exit;
 878         }
 879
 880         areq_ctx->gen_ctx.iv_dma_addr = dma_map_single(dev, req->iv,
 881                 hw_iv_size, DMA_BIDIRECTIONAL);
 882         if (unlikely(dma_mapping_error(dev, areq_ctx->gen_ctx.iv_dma_addr))) {
 883                 SSI_LOG_ERR("Mapping iv %u B at va=%pK for DMA failed\n",
 884                         hw_iv_size, req->iv);
 885                 rc = -ENOMEM;
 886                 goto chain_iv_exit;
 887         }
 888         SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->gen_ctx.iv_dma_addr, hw_iv_size);
 889
 890         SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=0x%llX\n",
 891                 hw_iv_size, req->iv,
 892                 (unsigned long long)areq_ctx->gen_ctx.iv_dma_addr);
 893         if (do_chain == true && areq_ctx->plaintext_authenticate_only == true){  // TODO: what about CTR?? ask Ron
 894                 struct crypto_aead *tfm = crypto_aead_reqtfm(req);
 895                 unsigned int iv_size_to_authenc = crypto_aead_ivsize(tfm);
 896                 unsigned int iv_ofs = GCM_BLOCK_RFC4_IV_OFFSET;
 897                 /* Chain to given list */
 898                 ssi_buffer_mgr_add_buffer_entry(
 899                         sg_data, areq_ctx->gen_ctx.iv_dma_addr + iv_ofs,
 900                         iv_size_to_authenc, is_last,
 901                         &areq_ctx->assoc.mlli_nents);
 902                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
 903         }
 904
 905 chain_iv_exit:
 906         return rc;
 907 }
 908
 909 static inline int ssi_buffer_mgr_aead_chain_assoc(
 910         struct ssi_drvdata *drvdata,
 911         struct aead_request *req,
 912         struct buffer_array *sg_data,
 913         bool is_last, bool do_chain)
 914 {
 915         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
 916         int rc = 0;
 917         uint32_t mapped_nents = 0;
 918         struct scatterlist *current_sg = req->src;
 919         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
 920         unsigned int sg_index = 0;
 921         uint32_t size_of_assoc = req->assoclen;
 922
 923         if (areq_ctx->is_gcm4543) {
 924                 size_of_assoc += crypto_aead_ivsize(tfm);
 925         }
 926
 927         if (sg_data == NULL) {
 928                 rc = -EINVAL;
 929                 goto chain_assoc_exit;
 930         }
 931
 932         if (unlikely(req->assoclen == 0)) {
 933                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_NULL;
 934                 areq_ctx->assoc.nents = 0;
 935                 areq_ctx->assoc.mlli_nents = 0;
 936                 SSI_LOG_DEBUG("Chain assoc of length 0: buff_type=%s nents=%u\n",
 937                         GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type),
 938                         areq_ctx->assoc.nents);
 939                 goto chain_assoc_exit;
 940         }
 941
 942         //iterate over the sgl to see how many entries are for associated data
 943         //it is assumed that if we reach here , the sgl is already mapped
 944         sg_index = current_sg->length;
 945         if (sg_index > size_of_assoc) { //the first entry in the scatter list contains all the associated data
 946                 mapped_nents++;
 947         }
 948         else{
 949                 while (sg_index <= size_of_assoc) {
 950                         current_sg = sg_next(current_sg);
 951                         //if have reached the end of the sgl, then this is unexpected
 952                         if (current_sg == NULL) {
 953                                 SSI_LOG_ERR("reached end of sg list. unexpected \n");
 954                                 BUG();
 955                         }
 956                         sg_index += current_sg->length;
 957                         mapped_nents++;
 958                 }
 959         }
 960         if (unlikely(mapped_nents > LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) {
 961                 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
 962                             mapped_nents, LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES);
 963                 return -ENOMEM;
 964         }
 965         areq_ctx->assoc.nents = mapped_nents;
 966
 967         /* in CCM case we have additional entry for
 968         *  ccm header configurations */
 969         if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
 970                 if (unlikely((mapped_nents + 1) >
 971                         LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) {
 972
 973                         SSI_LOG_ERR("CCM case.Too many fragments. "
 974                                 "Current %d max %d\n",
 975                                 (areq_ctx->assoc.nents + 1),
 976                                 LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES);
 977                         rc = -ENOMEM;
 978                         goto chain_assoc_exit;
 979                 }
 980         }
 981
 982         if (likely(mapped_nents == 1) &&
 983             (areq_ctx->ccm_hdr_size == ccm_header_size_null))
 984                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_DLLI;
 985         else
 986                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
 987
 988         if (unlikely((do_chain == true) ||
 989                 (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI))) {
 990
 991                 SSI_LOG_DEBUG("Chain assoc: buff_type=%s nents=%u\n",
 992                         GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type),
 993                         areq_ctx->assoc.nents);
 994                 ssi_buffer_mgr_add_scatterlist_entry(
 995                         sg_data, areq_ctx->assoc.nents,
 996                         req->src, req->assoclen, 0, is_last,
 997                         &areq_ctx->assoc.mlli_nents);
 998                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
 999         }
1000
1001 chain_assoc_exit:
1002         return rc;
1003 }
1004
1005 static inline void ssi_buffer_mgr_prepare_aead_data_dlli(
1006         struct aead_request *req,
1007         uint32_t *src_last_bytes, uint32_t *dst_last_bytes)
1008 {
1009         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1010         enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
1011         unsigned int authsize = areq_ctx->req_authsize;
1012
1013         areq_ctx->is_icv_fragmented = false;
1014         if (likely(req->src == req->dst)) {
1015                 /*INPLACE*/
1016                 areq_ctx->icv_dma_addr = sg_dma_address(
1017                         areq_ctx->srcSgl)+
1018                         (*src_last_bytes - authsize);
1019                 areq_ctx->icv_virt_addr = sg_virt(
1020                         areq_ctx->srcSgl) +
1021                         (*src_last_bytes - authsize);
1022         } else if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
1023                 /*NON-INPLACE and DECRYPT*/
1024                 areq_ctx->icv_dma_addr = sg_dma_address(
1025                         areq_ctx->srcSgl) +
1026                         (*src_last_bytes - authsize);
1027                 areq_ctx->icv_virt_addr = sg_virt(
1028                         areq_ctx->srcSgl) +
1029                         (*src_last_bytes - authsize);
1030         } else {
1031                 /*NON-INPLACE and ENCRYPT*/
1032                 areq_ctx->icv_dma_addr = sg_dma_address(
1033                         areq_ctx->dstSgl) +
1034                         (*dst_last_bytes - authsize);
1035                 areq_ctx->icv_virt_addr = sg_virt(
1036                         areq_ctx->dstSgl)+
1037                         (*dst_last_bytes - authsize);
1038         }
1039 }
1040
1041 static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
1042         struct ssi_drvdata *drvdata,
1043         struct aead_request *req,
1044         struct buffer_array *sg_data,
1045         uint32_t *src_last_bytes, uint32_t *dst_last_bytes,
1046         bool is_last_table)
1047 {
1048         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1049         enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
1050         unsigned int authsize = areq_ctx->req_authsize;
1051         int rc = 0, icv_nents;
1052         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
1053
1054         if (likely(req->src == req->dst)) {
1055                 /*INPLACE*/
1056                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1057                         areq_ctx->src.nents, areq_ctx->srcSgl,
1058                         areq_ctx->cryptlen,areq_ctx->srcOffset, is_last_table,
1059                         &areq_ctx->src.mlli_nents);
1060
1061                 icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->srcSgl,
1062                         areq_ctx->src.nents, authsize, *src_last_bytes,
1063                         &areq_ctx->is_icv_fragmented);
1064                 if (unlikely(icv_nents < 0)) {
1065                         rc = -ENOTSUPP;
1066                         goto prepare_data_mlli_exit;
1067                 }
1068
1069                 if (unlikely(areq_ctx->is_icv_fragmented == true)) {
1070                         /* Backup happens only when ICV is fragmented, ICV
1071                            verification is made by CPU compare in order to simplify
1072                            MAC verification upon request completion */
1073                         if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
1074 #if !DX_HAS_ACP
1075                                 /* In ACP platform we already copying ICV
1076                                    for any INPLACE-DECRYPT operation, hence
1077                                    we must neglect this code. */
1078                                 uint32_t size_to_skip = req->assoclen;
1079                                 if (areq_ctx->is_gcm4543) {
1080                                         size_to_skip += crypto_aead_ivsize(tfm);
1081                                 }
1082                                 ssi_buffer_mgr_copy_scatterlist_portion(
1083                                         areq_ctx->backup_mac, req->src,
1084                                         size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
1085                                         size_to_skip+ req->cryptlen, SSI_SG_TO_BUF);
1086 #endif
1087                                 areq_ctx->icv_virt_addr = areq_ctx->backup_mac;
1088                         } else {
1089                                 areq_ctx->icv_virt_addr = areq_ctx->mac_buf;
1090                                 areq_ctx->icv_dma_addr = areq_ctx->mac_buf_dma_addr;
1091                         }
1092                 } else { /* Contig. ICV */
1093                         /*Should hanlde if the sg is not contig.*/
1094                         areq_ctx->icv_dma_addr = sg_dma_address(
1095                                 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1096                                 (*src_last_bytes - authsize);
1097                         areq_ctx->icv_virt_addr = sg_virt(
1098                                 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1099                                 (*src_last_bytes - authsize);
1100                 }
1101
1102         } else if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
1103                 /*NON-INPLACE and DECRYPT*/
1104                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1105                         areq_ctx->src.nents, areq_ctx->srcSgl,
1106                         areq_ctx->cryptlen, areq_ctx->srcOffset,is_last_table,
1107                         &areq_ctx->src.mlli_nents);
1108                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1109                         areq_ctx->dst.nents, areq_ctx->dstSgl,
1110                         areq_ctx->cryptlen,areq_ctx->dstOffset, is_last_table,
1111                         &areq_ctx->dst.mlli_nents);
1112
1113                 icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->srcSgl,
1114                         areq_ctx->src.nents, authsize, *src_last_bytes,
1115                         &areq_ctx->is_icv_fragmented);
1116                 if (unlikely(icv_nents < 0)) {
1117                         rc = -ENOTSUPP;
1118                         goto prepare_data_mlli_exit;
1119                 }
1120
1121                 if (unlikely(areq_ctx->is_icv_fragmented == true)) {
1122                         /* Backup happens only when ICV is fragmented, ICV
1123                            verification is made by CPU compare in order to simplify
1124                            MAC verification upon request completion */
1125                           uint32_t size_to_skip = req->assoclen;
1126                           if (areq_ctx->is_gcm4543) {
1127                                   size_to_skip += crypto_aead_ivsize(tfm);
1128                           }
1129                           ssi_buffer_mgr_copy_scatterlist_portion(
1130                                   areq_ctx->backup_mac, req->src,
1131                                   size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
1132                                   size_to_skip+ req->cryptlen, SSI_SG_TO_BUF);
1133                         areq_ctx->icv_virt_addr = areq_ctx->backup_mac;
1134                 } else { /* Contig. ICV */
1135                         /*Should hanlde if the sg is not contig.*/
1136                         areq_ctx->icv_dma_addr = sg_dma_address(
1137                                 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1138                                 (*src_last_bytes - authsize);
1139                         areq_ctx->icv_virt_addr = sg_virt(
1140                                 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1141                                 (*src_last_bytes - authsize);
1142                 }
1143
1144         } else {
1145                 /*NON-INPLACE and ENCRYPT*/
1146                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1147                         areq_ctx->dst.nents, areq_ctx->dstSgl,
1148                         areq_ctx->cryptlen,areq_ctx->dstOffset, is_last_table,
1149                         &areq_ctx->dst.mlli_nents);
1150                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1151                         areq_ctx->src.nents, areq_ctx->srcSgl,
1152                         areq_ctx->cryptlen, areq_ctx->srcOffset,is_last_table,
1153                         &areq_ctx->src.mlli_nents);
1154
1155                 icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->dstSgl,
1156                         areq_ctx->dst.nents, authsize, *dst_last_bytes,
1157                         &areq_ctx->is_icv_fragmented);
1158                 if (unlikely(icv_nents < 0)) {
1159                         rc = -ENOTSUPP;
1160                         goto prepare_data_mlli_exit;
1161                 }
1162
1163                 if (likely(areq_ctx->is_icv_fragmented == false)) {
1164                         /* Contig. ICV */
1165                         areq_ctx->icv_dma_addr = sg_dma_address(
1166                                 &areq_ctx->dstSgl[areq_ctx->dst.nents - 1]) +
1167                                 (*dst_last_bytes - authsize);
1168                         areq_ctx->icv_virt_addr = sg_virt(
1169                                 &areq_ctx->dstSgl[areq_ctx->dst.nents - 1]) +
1170                                 (*dst_last_bytes - authsize);
1171                 } else {
1172                         areq_ctx->icv_dma_addr = areq_ctx->mac_buf_dma_addr;
1173                         areq_ctx->icv_virt_addr = areq_ctx->mac_buf;
1174                 }
1175         }
1176
1177 prepare_data_mlli_exit:
1178         return rc;
1179 }
1180
1181 static inline int ssi_buffer_mgr_aead_chain_data(
1182         struct ssi_drvdata *drvdata,
1183         struct aead_request *req,
1184         struct buffer_array *sg_data,
1185         bool is_last_table, bool do_chain)
1186 {
1187         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1188         struct device *dev = &drvdata->plat_dev->dev;
1189         enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
1190         unsigned int authsize = areq_ctx->req_authsize;
1191         int src_last_bytes = 0, dst_last_bytes = 0;
1192         int rc = 0;
1193         uint32_t src_mapped_nents = 0, dst_mapped_nents = 0;
1194         uint32_t offset = 0;
1195         unsigned int size_for_map = req->assoclen +req->cryptlen; /*non-inplace mode*/
1196         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
1197         uint32_t sg_index = 0;
1198         bool chained = false;
1199         bool is_gcm4543 = areq_ctx->is_gcm4543;
1200         uint32_t size_to_skip = req->assoclen;
1201         if (is_gcm4543) {
1202                 size_to_skip += crypto_aead_ivsize(tfm);
1203         }
1204         offset = size_to_skip;
1205
1206         if (sg_data == NULL) {
1207                 rc = -EINVAL;
1208                 goto chain_data_exit;
1209         }
1210         areq_ctx->srcSgl = req->src;
1211         areq_ctx->dstSgl = req->dst;
1212
1213         if (is_gcm4543) {
1214                 size_for_map += crypto_aead_ivsize(tfm);
1215         }
1216
1217         size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize:0;
1218         src_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->src,size_for_map,&src_last_bytes, &chained);
1219         sg_index = areq_ctx->srcSgl->length;
1220         //check where the data starts
1221         while (sg_index <= size_to_skip) {
1222                 offset -= areq_ctx->srcSgl->length;
1223                 areq_ctx->srcSgl = sg_next(areq_ctx->srcSgl);
1224                 //if have reached the end of the sgl, then this is unexpected
1225                 if (areq_ctx->srcSgl == NULL) {
1226                         SSI_LOG_ERR("reached end of sg list. unexpected \n");
1227                         BUG();
1228                 }
1229                 sg_index += areq_ctx->srcSgl->length;
1230                 src_mapped_nents--;
1231         }
1232         if (unlikely(src_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES))
1233         {
1234                 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
1235                                 src_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES);
1236                         return -ENOMEM;
1237         }
1238
1239         areq_ctx->src.nents = src_mapped_nents;
1240
1241         areq_ctx->srcOffset = offset;
1242
1243         if (req->src != req->dst) {
1244                 size_for_map = req->assoclen +req->cryptlen;
1245                 size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0;
1246                 if (is_gcm4543) {
1247                         size_for_map += crypto_aead_ivsize(tfm);
1248                 }
1249
1250                 rc = ssi_buffer_mgr_map_scatterlist(dev, req->dst, size_for_map,
1251                          DMA_BIDIRECTIONAL, &(areq_ctx->dst.nents),
1252                          LLI_MAX_NUM_OF_DATA_ENTRIES, &dst_last_bytes,
1253                                                    &dst_mapped_nents);
1254                 if (unlikely(rc != 0)) {
1255                         rc = -ENOMEM;
1256                         goto chain_data_exit;
1257                 }
1258         }
1259
1260         dst_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->dst,size_for_map,&dst_last_bytes, &chained);
1261         sg_index = areq_ctx->dstSgl->length;
1262         offset = size_to_skip;
1263
1264         //check where the data starts
1265         while (sg_index <= size_to_skip) {
1266
1267                 offset -= areq_ctx->dstSgl->length;
1268                 areq_ctx->dstSgl = sg_next(areq_ctx->dstSgl);
1269                 //if have reached the end of the sgl, then this is unexpected
1270                 if (areq_ctx->dstSgl == NULL) {
1271                         SSI_LOG_ERR("reached end of sg list. unexpected \n");
1272                         BUG();
1273                 }
1274                 sg_index += areq_ctx->dstSgl->length;
1275                 dst_mapped_nents--;
1276         }
1277         if (unlikely(dst_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES))
1278         {
1279                 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
1280                             dst_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES);
1281                 return -ENOMEM;
1282         }
1283         areq_ctx->dst.nents = dst_mapped_nents;
1284         areq_ctx->dstOffset = offset;
1285         if ((src_mapped_nents > 1) ||
1286             (dst_mapped_nents  > 1) ||
1287             (do_chain == true)) {
1288                 areq_ctx->data_buff_type = SSI_DMA_BUF_MLLI;
1289                 rc = ssi_buffer_mgr_prepare_aead_data_mlli(drvdata, req, sg_data,
1290                         &src_last_bytes, &dst_last_bytes, is_last_table);
1291         } else {
1292                 areq_ctx->data_buff_type = SSI_DMA_BUF_DLLI;
1293                 ssi_buffer_mgr_prepare_aead_data_dlli(
1294                                 req, &src_last_bytes, &dst_last_bytes);
1295         }
1296
1297 chain_data_exit:
1298         return rc;
1299 }
1300
1301 static void ssi_buffer_mgr_update_aead_mlli_nents( struct ssi_drvdata *drvdata,
1302                                            struct aead_request *req)
1303 {
1304         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1305         uint32_t curr_mlli_size = 0;
1306
1307         if (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) {
1308                 areq_ctx->assoc.sram_addr = drvdata->mlli_sram_addr;
1309                 curr_mlli_size = areq_ctx->assoc.mlli_nents *
1310                                                 LLI_ENTRY_BYTE_SIZE;
1311         }
1312
1313         if (areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI) {
1314                 /*Inplace case dst nents equal to src nents*/
1315                 if (req->src == req->dst) {
1316                         areq_ctx->dst.mlli_nents = areq_ctx->src.mlli_nents;
1317                         areq_ctx->src.sram_addr = drvdata->mlli_sram_addr +
1318                                                                 curr_mlli_size;
1319                         areq_ctx->dst.sram_addr = areq_ctx->src.sram_addr;
1320                         if (areq_ctx->is_single_pass == false)
1321                                 areq_ctx->assoc.mlli_nents +=
1322                                         areq_ctx->src.mlli_nents;
1323                 } else {
1324                         if (areq_ctx->gen_ctx.op_type ==
1325                                         DRV_CRYPTO_DIRECTION_DECRYPT) {
1326                                 areq_ctx->src.sram_addr =
1327                                                 drvdata->mlli_sram_addr +
1328                                                                 curr_mlli_size;
1329                                 areq_ctx->dst.sram_addr =
1330                                                 areq_ctx->src.sram_addr +
1331                                                 areq_ctx->src.mlli_nents *
1332                                                 LLI_ENTRY_BYTE_SIZE;
1333                                 if (areq_ctx->is_single_pass == false)
1334                                         areq_ctx->assoc.mlli_nents +=
1335                                                 areq_ctx->src.mlli_nents;
1336                         } else {
1337                                 areq_ctx->dst.sram_addr =
1338                                                 drvdata->mlli_sram_addr +
1339                                                                 curr_mlli_size;
1340                                 areq_ctx->src.sram_addr =
1341                                                 areq_ctx->dst.sram_addr +
1342                                                 areq_ctx->dst.mlli_nents *
1343                                                 LLI_ENTRY_BYTE_SIZE;
1344                                 if (areq_ctx->is_single_pass == false)
1345                                         areq_ctx->assoc.mlli_nents +=
1346                                                 areq_ctx->dst.mlli_nents;
1347                         }
1348                 }
1349         }
1350 }
1351
1352 int ssi_buffer_mgr_map_aead_request(
1353         struct ssi_drvdata *drvdata, struct aead_request *req)
1354 {
1355         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1356         struct mlli_params *mlli_params = &areq_ctx->mlli_params;
1357         struct device *dev = &drvdata->plat_dev->dev;
1358         struct buffer_array sg_data;
1359         unsigned int authsize = areq_ctx->req_authsize;
1360         struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
1361         int rc = 0;
1362         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
1363         bool is_gcm4543 = areq_ctx->is_gcm4543;
1364
1365         uint32_t mapped_nents = 0;
1366         uint32_t dummy = 0; /*used for the assoc data fragments */
1367         uint32_t size_to_map = 0;
1368
1369         mlli_params->curr_pool = NULL;
1370         sg_data.num_of_buffers = 0;
1371
1372 #if DX_HAS_ACP
1373         if ((areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) &&
1374             likely(req->src == req->dst))
1375         {
1376                 uint32_t size_to_skip = req->assoclen;
1377                 if (is_gcm4543) {
1378                         size_to_skip += crypto_aead_ivsize(tfm);
1379                 }
1380                 /* copy mac to a temporary location to deal with possible
1381                    data memory overriding that caused by cache coherence problem. */
1382                 ssi_buffer_mgr_copy_scatterlist_portion(
1383                         areq_ctx->backup_mac, req->src,
1384                         size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
1385                         size_to_skip+ req->cryptlen, SSI_SG_TO_BUF);
1386         }
1387 #endif
1388
1389         /* cacluate the size for cipher remove ICV in decrypt*/
1390         areq_ctx->cryptlen = (areq_ctx->gen_ctx.op_type ==
1391                                  DRV_CRYPTO_DIRECTION_ENCRYPT) ?
1392                                 req->cryptlen :
1393                                 (req->cryptlen - authsize);
1394
1395         areq_ctx->mac_buf_dma_addr = dma_map_single(dev,
1396                 areq_ctx->mac_buf, MAX_MAC_SIZE, DMA_BIDIRECTIONAL);
1397         if (unlikely(dma_mapping_error(dev, areq_ctx->mac_buf_dma_addr))) {
1398                 SSI_LOG_ERR("Mapping mac_buf %u B at va=%pK for DMA failed\n",
1399                         MAX_MAC_SIZE, areq_ctx->mac_buf);
1400                 rc = -ENOMEM;
1401                 goto aead_map_failure;
1402         }
1403         SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->mac_buf_dma_addr, MAX_MAC_SIZE);
1404
1405         if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
1406                 areq_ctx->ccm_iv0_dma_addr = dma_map_single(dev,
1407                         (areq_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET),
1408                         AES_BLOCK_SIZE, DMA_TO_DEVICE);
1409
1410                 if (unlikely(dma_mapping_error(dev, areq_ctx->ccm_iv0_dma_addr))) {
1411                         SSI_LOG_ERR("Mapping mac_buf %u B at va=%pK "
1412                         "for DMA failed\n", AES_BLOCK_SIZE,
1413                         (areq_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET));
1414                         areq_ctx->ccm_iv0_dma_addr = 0;
1415                         rc = -ENOMEM;
1416                         goto aead_map_failure;
1417                 }
1418                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->ccm_iv0_dma_addr,
1419                                                                 AES_BLOCK_SIZE);
1420                 if (ssi_aead_handle_config_buf(dev, areq_ctx,
1421                         areq_ctx->ccm_config, &sg_data, req->assoclen) != 0) {
1422                         rc = -ENOMEM;
1423                         goto aead_map_failure;
1424                 }
1425         }
1426
1427 #if SSI_CC_HAS_AES_GCM
1428         if (areq_ctx->cipher_mode == DRV_CIPHER_GCTR) {
1429                 areq_ctx->hkey_dma_addr = dma_map_single(dev,
1430                         areq_ctx->hkey, AES_BLOCK_SIZE, DMA_BIDIRECTIONAL);
1431                 if (unlikely(dma_mapping_error(dev, areq_ctx->hkey_dma_addr))) {
1432                         SSI_LOG_ERR("Mapping hkey %u B at va=%pK for DMA failed\n",
1433                                 AES_BLOCK_SIZE, areq_ctx->hkey);
1434                         rc = -ENOMEM;
1435                         goto aead_map_failure;
1436                 }
1437                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->hkey_dma_addr, AES_BLOCK_SIZE);
1438
1439                 areq_ctx->gcm_block_len_dma_addr = dma_map_single(dev,
1440                         &areq_ctx->gcm_len_block, AES_BLOCK_SIZE, DMA_TO_DEVICE);
1441                 if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_block_len_dma_addr))) {
1442                         SSI_LOG_ERR("Mapping gcm_len_block %u B at va=%pK for DMA failed\n",
1443                                 AES_BLOCK_SIZE, &areq_ctx->gcm_len_block);
1444                         rc = -ENOMEM;
1445                         goto aead_map_failure;
1446                 }
1447                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_block_len_dma_addr, AES_BLOCK_SIZE);
1448
1449                 areq_ctx->gcm_iv_inc1_dma_addr = dma_map_single(dev,
1450                         areq_ctx->gcm_iv_inc1,
1451                         AES_BLOCK_SIZE, DMA_TO_DEVICE);
1452
1453                 if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc1_dma_addr))) {
1454                         SSI_LOG_ERR("Mapping gcm_iv_inc1 %u B at va=%pK "
1455                         "for DMA failed\n", AES_BLOCK_SIZE,
1456                         (areq_ctx->gcm_iv_inc1));
1457                         areq_ctx->gcm_iv_inc1_dma_addr = 0;
1458                         rc = -ENOMEM;
1459                         goto aead_map_failure;
1460                 }
1461                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_iv_inc1_dma_addr,
1462                                                                 AES_BLOCK_SIZE);
1463
1464                 areq_ctx->gcm_iv_inc2_dma_addr = dma_map_single(dev,
1465                         areq_ctx->gcm_iv_inc2,
1466                         AES_BLOCK_SIZE, DMA_TO_DEVICE);
1467
1468                 if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc2_dma_addr))) {
1469                         SSI_LOG_ERR("Mapping gcm_iv_inc2 %u B at va=%pK "
1470                         "for DMA failed\n", AES_BLOCK_SIZE,
1471                         (areq_ctx->gcm_iv_inc2));
1472                         areq_ctx->gcm_iv_inc2_dma_addr = 0;
1473                         rc = -ENOMEM;
1474                         goto aead_map_failure;
1475                 }
1476                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_iv_inc2_dma_addr,
1477                                                                 AES_BLOCK_SIZE);
1478         }
1479 #endif /*SSI_CC_HAS_AES_GCM*/
1480
1481         size_to_map = req->cryptlen + req->assoclen;
1482         if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT) {
1483                 size_to_map += authsize;
1484         }
1485         if (is_gcm4543)
1486                 size_to_map += crypto_aead_ivsize(tfm);
1487         rc = ssi_buffer_mgr_map_scatterlist(dev, req->src,
1488                                             size_to_map, DMA_BIDIRECTIONAL, &(areq_ctx->src.nents),
1489                                             LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES+LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents);
1490         if (unlikely(rc != 0)) {
1491                 rc = -ENOMEM;
1492                 goto aead_map_failure;
1493         }
1494
1495         if (likely(areq_ctx->is_single_pass == true)) {
1496                 /*
1497                 * Create MLLI table for:
1498                 *   (1) Assoc. data
1499                 *   (2) Src/Dst SGLs
1500                 *   Note: IV is contg. buffer (not an SGL)
1501                 */
1502                 rc = ssi_buffer_mgr_aead_chain_assoc(drvdata, req, &sg_data, true, false);
1503                 if (unlikely(rc != 0))
1504                         goto aead_map_failure;
1505                 rc = ssi_buffer_mgr_aead_chain_iv(drvdata, req, &sg_data, true, false);
1506                 if (unlikely(rc != 0))
1507                         goto aead_map_failure;
1508                 rc = ssi_buffer_mgr_aead_chain_data(drvdata, req, &sg_data, true, false);
1509                 if (unlikely(rc != 0))
1510                         goto aead_map_failure;
1511         } else { /* DOUBLE-PASS flow */
1512                 /*
1513                 * Prepare MLLI table(s) in this order:
1514                 *
1515                 * If ENCRYPT/DECRYPT (inplace):
1516                 *   (1) MLLI table for assoc
1517                 *   (2) IV entry (chained right after end of assoc)
1518                 *   (3) MLLI for src/dst (inplace operation)
1519                 *
1520                 * If ENCRYPT (non-inplace)
1521                 *   (1) MLLI table for assoc
1522                 *   (2) IV entry (chained right after end of assoc)
1523                 *   (3) MLLI for dst
1524                 *   (4) MLLI for src
1525                 *
1526                 * If DECRYPT (non-inplace)
1527                 *   (1) MLLI table for assoc
1528                 *   (2) IV entry (chained right after end of assoc)
1529                 *   (3) MLLI for src
1530                 *   (4) MLLI for dst
1531                 */
1532                 rc = ssi_buffer_mgr_aead_chain_assoc(drvdata, req, &sg_data, false, true);
1533                 if (unlikely(rc != 0))
1534                         goto aead_map_failure;
1535                 rc = ssi_buffer_mgr_aead_chain_iv(drvdata, req, &sg_data, false, true);
1536                 if (unlikely(rc != 0))
1537                         goto aead_map_failure;
1538                 rc = ssi_buffer_mgr_aead_chain_data(drvdata, req, &sg_data, true, true);
1539                 if (unlikely(rc != 0))
1540                         goto aead_map_failure;
1541         }
1542
1543         /* Mlli support -start building the MLLI according to the above results */
1544         if (unlikely(
1545                 (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) ||
1546                 (areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI))) {
1547
1548                 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
1549                 rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
1550                 if (unlikely(rc != 0)) {
1551                         goto aead_map_failure;
1552                 }
1553
1554                 ssi_buffer_mgr_update_aead_mlli_nents(drvdata, req);
1555                 SSI_LOG_DEBUG("assoc params mn %d\n",areq_ctx->assoc.mlli_nents);
1556                 SSI_LOG_DEBUG("src params mn %d\n",areq_ctx->src.mlli_nents);
1557                 SSI_LOG_DEBUG("dst params mn %d\n",areq_ctx->dst.mlli_nents);
1558         }
1559         return 0;
1560
1561 aead_map_failure:
1562         ssi_buffer_mgr_unmap_aead_request(dev, req);
1563         return rc;
1564 }
1565
1566 int ssi_buffer_mgr_map_hash_request_final(
1567         struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, bool do_update)
1568 {
1569         struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
1570         struct device *dev = &drvdata->plat_dev->dev;
1571         uint8_t* curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
1572                         areq_ctx->buff0;
1573         uint32_t *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
1574                         &areq_ctx->buff0_cnt;
1575         struct mlli_params *mlli_params = &areq_ctx->mlli_params;
1576         struct buffer_array sg_data;
1577         struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
1578         uint32_t dummy = 0;
1579         uint32_t mapped_nents = 0;
1580
1581         SSI_LOG_DEBUG(" final params : curr_buff=%pK "
1582                      "curr_buff_cnt=0x%X nbytes = 0x%X "
1583                      "src=%pK curr_index=%u\n",
1584                      curr_buff, *curr_buff_cnt, nbytes,
1585                      src, areq_ctx->buff_index);
1586         /* Init the type of the dma buffer */
1587         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL;
1588         mlli_params->curr_pool = NULL;
1589         sg_data.num_of_buffers = 0;
1590         areq_ctx->in_nents = 0;
1591
1592         if (unlikely(nbytes == 0 && *curr_buff_cnt == 0)) {
1593                 /* nothing to do */
1594                 return 0;
1595         }
1596
1597         /*TODO: copy data in case that buffer is enough for operation */
1598         /* map the previous buffer */
1599         if (*curr_buff_cnt != 0 ) {
1600                 if (ssi_ahash_handle_curr_buf(dev, areq_ctx, curr_buff,
1601                                             *curr_buff_cnt, &sg_data) != 0) {
1602                         return -ENOMEM;
1603                 }
1604         }
1605
1606         if (src && (nbytes > 0) && do_update) {
1607                 if ( unlikely( ssi_buffer_mgr_map_scatterlist( dev,src,
1608                                           nbytes,
1609                                           DMA_TO_DEVICE,
1610                                           &areq_ctx->in_nents,
1611                                           LLI_MAX_NUM_OF_DATA_ENTRIES,
1612                                           &dummy, &mapped_nents))){
1613                         goto unmap_curr_buff;
1614                 }
1615                 if ( src && (mapped_nents == 1)
1616                      && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) ) {
1617                         memcpy(areq_ctx->buff_sg,src,
1618                                sizeof(struct scatterlist));
1619                         areq_ctx->buff_sg->length = nbytes;
1620                         areq_ctx->curr_sg = areq_ctx->buff_sg;
1621                         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
1622                 } else {
1623                         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI;
1624                 }
1625
1626         }
1627
1628         /*build mlli */
1629         if (unlikely(areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI)) {
1630                 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
1631                 /* add the src data to the sg_data */
1632                 ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
1633                                         areq_ctx->in_nents,
1634                                         src,
1635                                         nbytes, 0,
1636                                         true, &areq_ctx->mlli_nents);
1637                 if (unlikely(ssi_buffer_mgr_generate_mlli(dev, &sg_data,
1638                                                   mlli_params) != 0)) {
1639                         goto fail_unmap_din;
1640                 }
1641         }
1642         /* change the buffer index for the unmap function */
1643         areq_ctx->buff_index = (areq_ctx->buff_index^1);
1644         SSI_LOG_DEBUG("areq_ctx->data_dma_buf_type = %s\n",
1645                 GET_DMA_BUFFER_TYPE(areq_ctx->data_dma_buf_type));
1646         return 0;
1647
1648 fail_unmap_din:
1649         dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
1650
1651 unmap_curr_buff:
1652         if (*curr_buff_cnt != 0 ) {
1653                 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
1654         }
1655         return -ENOMEM;
1656 }
1657
1658 int ssi_buffer_mgr_map_hash_request_update(
1659         struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, unsigned int block_size)
1660 {
1661         struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
1662         struct device *dev = &drvdata->plat_dev->dev;
1663         uint8_t* curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
1664                         areq_ctx->buff0;
1665         uint32_t *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
1666                         &areq_ctx->buff0_cnt;
1667         uint8_t* next_buff = areq_ctx->buff_index ? areq_ctx->buff0 :
1668                         areq_ctx->buff1;
1669         uint32_t *next_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff0_cnt :
1670                         &areq_ctx->buff1_cnt;
1671         struct mlli_params *mlli_params = &areq_ctx->mlli_params;
1672         unsigned int update_data_len;
1673         uint32_t total_in_len = nbytes + *curr_buff_cnt;
1674         struct buffer_array sg_data;
1675         struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
1676         unsigned int swap_index = 0;
1677         uint32_t dummy = 0;
1678         uint32_t mapped_nents = 0;
1679
1680         SSI_LOG_DEBUG(" update params : curr_buff=%pK "
1681                      "curr_buff_cnt=0x%X nbytes=0x%X "
1682                      "src=%pK curr_index=%u \n",
1683                      curr_buff, *curr_buff_cnt, nbytes,
1684                      src, areq_ctx->buff_index);
1685         /* Init the type of the dma buffer */
1686         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL;
1687         mlli_params->curr_pool = NULL;
1688         areq_ctx->curr_sg = NULL;
1689         sg_data.num_of_buffers = 0;
1690         areq_ctx->in_nents = 0;
1691
1692         if (unlikely(total_in_len < block_size)) {
1693                 SSI_LOG_DEBUG(" less than one block: curr_buff=%pK "
1694                              "*curr_buff_cnt=0x%X copy_to=%pK\n",
1695                         curr_buff, *curr_buff_cnt,
1696                         &curr_buff[*curr_buff_cnt]);
1697                 areq_ctx->in_nents =
1698                         ssi_buffer_mgr_get_sgl_nents(src,
1699                                                     nbytes,
1700                                                     &dummy, NULL);
1701                 sg_copy_to_buffer(src, areq_ctx->in_nents,
1702                                   &curr_buff[*curr_buff_cnt], nbytes);
1703                 *curr_buff_cnt += nbytes;
1704                 return 1;
1705         }
1706
1707         /* Calculate the residue size*/
1708         *next_buff_cnt = total_in_len & (block_size - 1);
1709         /* update data len */
1710         update_data_len = total_in_len - *next_buff_cnt;
1711
1712         SSI_LOG_DEBUG(" temp length : *next_buff_cnt=0x%X "
1713                      "update_data_len=0x%X\n",
1714                 *next_buff_cnt, update_data_len);
1715
1716         /* Copy the new residue to next buffer */
1717         if (*next_buff_cnt != 0) {
1718                 SSI_LOG_DEBUG(" handle residue: next buff %pK skip data %u"
1719                              " residue %u \n", next_buff,
1720                              (update_data_len - *curr_buff_cnt),
1721                              *next_buff_cnt);
1722                 ssi_buffer_mgr_copy_scatterlist_portion(next_buff, src,
1723                              (update_data_len -*curr_buff_cnt),
1724                              nbytes,SSI_SG_TO_BUF);
1725                 /* change the buffer index for next operation */
1726                 swap_index = 1;
1727         }
1728
1729         if (*curr_buff_cnt != 0) {
1730                 if (ssi_ahash_handle_curr_buf(dev, areq_ctx, curr_buff,
1731                                             *curr_buff_cnt, &sg_data) != 0) {
1732                         return -ENOMEM;
1733                 }
1734                 /* change the buffer index for next operation */
1735                 swap_index = 1;
1736         }
1737
1738         if ( update_data_len > *curr_buff_cnt ) {
1739                 if ( unlikely( ssi_buffer_mgr_map_scatterlist( dev,src,
1740                                           (update_data_len -*curr_buff_cnt),
1741                                           DMA_TO_DEVICE,
1742                                           &areq_ctx->in_nents,
1743                                           LLI_MAX_NUM_OF_DATA_ENTRIES,
1744                                           &dummy, &mapped_nents))){
1745                         goto unmap_curr_buff;
1746                 }
1747                 if ( (mapped_nents == 1)
1748                      && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) ) {
1749                         /* only one entry in the SG and no previous data */
1750                         memcpy(areq_ctx->buff_sg,src,
1751                                sizeof(struct scatterlist));
1752                         areq_ctx->buff_sg->length = update_data_len;
1753                         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
1754                         areq_ctx->curr_sg = areq_ctx->buff_sg;
1755                 } else {
1756                         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI;
1757                 }
1758         }
1759
1760         if (unlikely(areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI)) {
1761                 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
1762                 /* add the src data to the sg_data */
1763                 ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
1764                                         areq_ctx->in_nents,
1765                                         src,
1766                                         (update_data_len - *curr_buff_cnt), 0,
1767                                         true, &areq_ctx->mlli_nents);
1768                 if (unlikely(ssi_buffer_mgr_generate_mlli(dev, &sg_data,
1769                                                   mlli_params) != 0)) {
1770                         goto fail_unmap_din;
1771                 }
1772
1773         }
1774         areq_ctx->buff_index = (areq_ctx->buff_index^swap_index);
1775
1776         return 0;
1777
1778 fail_unmap_din:
1779         dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
1780
1781 unmap_curr_buff:
1782         if (*curr_buff_cnt != 0 ) {
1783                 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
1784         }
1785         return -ENOMEM;
1786 }
1787
1788 void ssi_buffer_mgr_unmap_hash_request(
1789         struct device *dev, void *ctx, struct scatterlist *src, bool do_revert)
1790 {
1791         struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
1792         uint32_t *prev_len = areq_ctx->buff_index ?  &areq_ctx->buff0_cnt :
1793                                                 &areq_ctx->buff1_cnt;
1794
1795         /*In case a pool was set, a table was
1796           allocated and should be released */
1797         if (areq_ctx->mlli_params.curr_pool != NULL) {
1798                 SSI_LOG_DEBUG("free MLLI buffer: dma=0x%llX virt=%pK\n",
1799                              (unsigned long long)areq_ctx->mlli_params.mlli_dma_addr,
1800                              areq_ctx->mlli_params.mlli_virt_addr);
1801                 SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->mlli_params.mlli_dma_addr);
1802                 dma_pool_free(areq_ctx->mlli_params.curr_pool,
1803                               areq_ctx->mlli_params.mlli_virt_addr,
1804                               areq_ctx->mlli_params.mlli_dma_addr);
1805         }
1806
1807         if ((src) && likely(areq_ctx->in_nents != 0)) {
1808                 SSI_LOG_DEBUG("Unmapped sg src: virt=%pK dma=0x%llX len=0x%X\n",
1809                              sg_virt(src),
1810                              (unsigned long long)sg_dma_address(src),
1811                              sg_dma_len(src));
1812                 SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(src));
1813                 dma_unmap_sg(dev, src,
1814                              areq_ctx->in_nents, DMA_TO_DEVICE);
1815         }
1816
1817         if (*prev_len != 0) {
1818                 SSI_LOG_DEBUG("Unmapped buffer: areq_ctx->buff_sg=%pK"
1819                              "dma=0x%llX len 0x%X\n",
1820                                 sg_virt(areq_ctx->buff_sg),
1821                                 (unsigned long long)sg_dma_address(areq_ctx->buff_sg),
1822                                 sg_dma_len(areq_ctx->buff_sg));
1823                 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
1824                 if (!do_revert) {
1825                         /* clean the previous data length for update operation */
1826                         *prev_len = 0;
1827                 } else {
1828                         areq_ctx->buff_index ^= 1;
1829                 }
1830         }
1831 }
1832
1833 int ssi_buffer_mgr_init(struct ssi_drvdata *drvdata)
1834 {
1835         struct buff_mgr_handle *buff_mgr_handle;
1836         struct device *dev = &drvdata->plat_dev->dev;
1837
1838         buff_mgr_handle = (struct buff_mgr_handle *)
1839                 kmalloc(sizeof(struct buff_mgr_handle), GFP_KERNEL);
1840         if (buff_mgr_handle == NULL)
1841                 return -ENOMEM;
1842
1843         drvdata->buff_mgr_handle = buff_mgr_handle;
1844
1845         buff_mgr_handle->mlli_buffs_pool = dma_pool_create(
1846                                 "dx_single_mlli_tables", dev,
1847                                 MAX_NUM_OF_TOTAL_MLLI_ENTRIES *
1848                                 LLI_ENTRY_BYTE_SIZE,
1849                                 MLLI_TABLE_MIN_ALIGNMENT, 0);
1850
1851         if (unlikely(buff_mgr_handle->mlli_buffs_pool == NULL))
1852                 goto error;
1853
1854         return 0;
1855
1856 error:
1857         ssi_buffer_mgr_fini(drvdata);
1858         return -ENOMEM;
1859 }
1860
1861 int ssi_buffer_mgr_fini(struct ssi_drvdata *drvdata)
1862 {
1863         struct buff_mgr_handle *buff_mgr_handle = drvdata->buff_mgr_handle;
1864
1865         if (buff_mgr_handle  != NULL) {
1866                 dma_pool_destroy(buff_mgr_handle->mlli_buffs_pool);
1867                 kfree(drvdata->buff_mgr_handle);
1868                 drvdata->buff_mgr_handle = NULL;
1869
1870         }
1871         return 0;
1872 }
1873