3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
8 * Tel: +19(0)7223/9493-0
9 * Fax: +49(0)7223/9493-92
10 * http://www.addi-data.com
13 * This program is free software; you can redistribute it and/or modify it under
14 * the terms of the GNU General Public License as published by the Free Software
15 * Foundation; either version 2 of the License, or (at your option) any later
18 * This program is distributed in the hope that it will be useful, but WITHOUT
19 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
20 * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/interrupt.h>
27 #include <linux/sched.h>
29 #include "../comedidev.h"
30 #include "comedi_fc.h"
31 #include "amcc_s5933.h"
32 #include "addi_watchdog.h"
34 struct apci1564_private {
35 unsigned int amcc_iobase; /* base of AMCC I/O registers */
36 unsigned int mode1; /* riding-edge/high level channels */
37 unsigned int mode2; /* falling-edge/low level channels */
38 unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */
39 unsigned char timer_select_mode;
40 unsigned char mode_select_register;
41 struct task_struct *tsk_current;
44 #include "addi-data/hwdrv_apci1564.c"
46 static int apci1564_reset(struct comedi_device *dev)
48 struct apci1564_private *devpriv = dev->private;
50 /* Disable the input interrupts and reset status register */
51 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);
52 inl(devpriv->amcc_iobase + APCI1564_DI_INT_STATUS_REG);
53 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE1_REG);
54 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);
56 /* Reset the output channels and disable interrupts */
57 outl(0x0, devpriv->amcc_iobase + APCI1564_DO_REG);
58 outl(0x0, devpriv->amcc_iobase + APCI1564_DO_INT_CTRL_REG);
60 /* Reset the watchdog registers */
61 addi_watchdog_reset(devpriv->amcc_iobase + APCI1564_WDOG_REG);
63 /* Reset the timer registers */
64 outl(0x0, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);
65 outl(0x0, devpriv->amcc_iobase + APCI1564_TIMER_RELOAD_REG);
67 /* Reset the counter registers */
68 outl(0x0, dev->iobase + APCI1564_COUNTER_CTRL_REG(0));
69 outl(0x0, dev->iobase + APCI1564_COUNTER_CTRL_REG(1));
70 outl(0x0, dev->iobase + APCI1564_COUNTER_CTRL_REG(2));
71 outl(0x0, dev->iobase + APCI1564_COUNTER_CTRL_REG(3));
76 static irqreturn_t apci1564_interrupt(int irq, void *d)
78 struct comedi_device *dev = d;
79 struct apci1564_private *devpriv = dev->private;
80 struct comedi_subdevice *s = dev->read_subdev;
85 /* check interrupt is from this device */
86 if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) &
87 INTCSR_INTR_ASSERTED) == 0)
90 status = inl(devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);
91 if (status & APCI1564_DI_INT_ENABLE) {
92 /* disable the interrupt */
93 outl(status & APCI1564_DI_INT_DISABLE,
94 devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);
96 s->state = inl(dev->iobase + APCI1564_DI_INT_STATUS_REG)
98 comedi_buf_write_samples(s, &s->state, 1);
99 comedi_handle_events(dev, s);
101 /* enable the interrupt */
102 outl(status, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);
105 status = inl(devpriv->amcc_iobase + APCI1564_TIMER_IRQ_REG);
107 /* Disable Timer Interrupt */
108 ctrl = inl(devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);
109 outl(0x0, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);
111 /* Send a signal to from kernel to user space */
112 send_sig(SIGIO, devpriv->tsk_current, 0);
114 /* Enable Timer Interrupt */
115 outl(ctrl, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);
118 for (chan = 0; chan < 4; chan++) {
119 status = inl(dev->iobase + APCI1564_COUNTER_IRQ_REG(chan));
121 /* Disable Counter Interrupt */
122 ctrl = inl(dev->iobase +
123 APCI1564_COUNTER_CTRL_REG(chan));
124 outl(0x0, dev->iobase +
125 APCI1564_COUNTER_CTRL_REG(chan));
127 /* Send a signal to from kernel to user space */
128 send_sig(SIGIO, devpriv->tsk_current, 0);
130 /* Enable Counter Interrupt */
131 outl(ctrl, dev->iobase +
132 APCI1564_COUNTER_CTRL_REG(chan));
139 static int apci1564_di_insn_bits(struct comedi_device *dev,
140 struct comedi_subdevice *s,
141 struct comedi_insn *insn,
144 struct apci1564_private *devpriv = dev->private;
146 data[1] = inl(devpriv->amcc_iobase + APCI1564_DI_REG);
151 static int apci1564_do_insn_bits(struct comedi_device *dev,
152 struct comedi_subdevice *s,
153 struct comedi_insn *insn,
156 struct apci1564_private *devpriv = dev->private;
158 s->state = inl(devpriv->amcc_iobase + APCI1564_DO_REG);
160 if (comedi_dio_update_state(s, data))
161 outl(s->state, devpriv->amcc_iobase + APCI1564_DO_REG);
168 static int apci1564_diag_insn_bits(struct comedi_device *dev,
169 struct comedi_subdevice *s,
170 struct comedi_insn *insn,
173 struct apci1564_private *devpriv = dev->private;
175 data[1] = inl(devpriv->amcc_iobase + APCI1564_DO_INT_STATUS_REG) & 3;
181 * Change-Of-State (COS) interrupt configuration
183 * Channels 0 to 15 are interruptible. These channels can be configured
184 * to generate interrupts based on AND/OR logic for the desired channels.
187 * - reacts to rising or falling edges
188 * - interrupt is generated when any enabled channel
189 * meet the desired interrupt condition
192 * - reacts to changes in level of the selected inputs
193 * - interrupt is generated when all enabled channels
194 * meet the desired interrupt condition
195 * - after an interrupt, a change in level must occur on
196 * the selected inputs to release the IRQ logic
198 * The COS interrupt must be configured before it can be enabled.
200 * data[0] : INSN_CONFIG_DIGITAL_TRIG
201 * data[1] : trigger number (= 0)
202 * data[2] : configuration operation:
203 * COMEDI_DIGITAL_TRIG_DISABLE = no interrupts
204 * COMEDI_DIGITAL_TRIG_ENABLE_EDGES = OR (edge) interrupts
205 * COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = AND (level) interrupts
206 * data[3] : left-shift for data[4] and data[5]
207 * data[4] : rising-edge/high level channels
208 * data[5] : falling-edge/low level channels
210 static int apci1564_cos_insn_config(struct comedi_device *dev,
211 struct comedi_subdevice *s,
212 struct comedi_insn *insn,
215 struct apci1564_private *devpriv = dev->private;
216 unsigned int shift, oldmask;
219 case INSN_CONFIG_DIGITAL_TRIG:
223 oldmask = (1U << shift) - 1;
225 case COMEDI_DIGITAL_TRIG_DISABLE:
229 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);
230 inl(devpriv->amcc_iobase + APCI1564_DI_INT_STATUS_REG);
231 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE1_REG);
232 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);
234 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
235 if (devpriv->ctrl != (APCI1564_DI_INT_ENABLE |
236 APCI1564_DI_INT_OR)) {
237 /* switching to 'OR' mode */
238 devpriv->ctrl = APCI1564_DI_INT_ENABLE |
240 /* wipe old channels */
244 /* preserve unspecified channels */
245 devpriv->mode1 &= oldmask;
246 devpriv->mode2 &= oldmask;
248 /* configure specified channels */
249 devpriv->mode1 |= data[4] << shift;
250 devpriv->mode2 |= data[5] << shift;
252 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
253 if (devpriv->ctrl != (APCI1564_DI_INT_ENABLE |
254 APCI1564_DI_INT_AND)) {
255 /* switching to 'AND' mode */
256 devpriv->ctrl = APCI1564_DI_INT_ENABLE |
258 /* wipe old channels */
262 /* preserve unspecified channels */
263 devpriv->mode1 &= oldmask;
264 devpriv->mode2 &= oldmask;
266 /* configure specified channels */
267 devpriv->mode1 |= data[4] << shift;
268 devpriv->mode2 |= data[5] << shift;
280 static int apci1564_cos_insn_bits(struct comedi_device *dev,
281 struct comedi_subdevice *s,
282 struct comedi_insn *insn,
290 static int apci1564_cos_cmdtest(struct comedi_device *dev,
291 struct comedi_subdevice *s,
292 struct comedi_cmd *cmd)
296 /* Step 1 : check if triggers are trivially valid */
298 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
299 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
300 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
301 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
302 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
307 /* Step 2a : make sure trigger sources are unique */
308 /* Step 2b : and mutually compatible */
310 /* Step 3: check if arguments are trivially valid */
312 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
313 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
314 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
315 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
316 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
321 /* Step 4: fix up any arguments */
323 /* Step 5: check channel list if it exists */
329 * Change-Of-State (COS) 'do_cmd' operation
331 * Enable the COS interrupt as configured by apci1564_cos_insn_config().
333 static int apci1564_cos_cmd(struct comedi_device *dev,
334 struct comedi_subdevice *s)
336 struct apci1564_private *devpriv = dev->private;
338 if (!devpriv->ctrl) {
339 dev_warn(dev->class_dev,
340 "Interrupts disabled due to mode configuration!\n");
344 outl(devpriv->mode1, devpriv->amcc_iobase + APCI1564_DI_INT_MODE1_REG);
345 outl(devpriv->mode2, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);
346 outl(devpriv->ctrl, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);
351 static int apci1564_cos_cancel(struct comedi_device *dev,
352 struct comedi_subdevice *s)
354 struct apci1564_private *devpriv = dev->private;
356 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);
357 inl(devpriv->amcc_iobase + APCI1564_DI_INT_STATUS_REG);
358 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE1_REG);
359 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);
364 static int apci1564_auto_attach(struct comedi_device *dev,
365 unsigned long context_unused)
367 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
368 struct apci1564_private *devpriv;
369 struct comedi_subdevice *s;
372 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
376 ret = comedi_pci_enable(dev);
380 dev->iobase = pci_resource_start(pcidev, 1);
381 devpriv->amcc_iobase = pci_resource_start(pcidev, 0);
385 if (pcidev->irq > 0) {
386 ret = request_irq(pcidev->irq, apci1564_interrupt, IRQF_SHARED,
387 dev->board_name, dev);
389 dev->irq = pcidev->irq;
392 ret = comedi_alloc_subdevices(dev, 6);
396 /* Allocate and Initialise DI Subdevice Structures */
397 s = &dev->subdevices[0];
398 s->type = COMEDI_SUBD_DI;
399 s->subdev_flags = SDF_READABLE;
402 s->range_table = &range_digital;
403 s->insn_bits = apci1564_di_insn_bits;
405 /* Allocate and Initialise DO Subdevice Structures */
406 s = &dev->subdevices[1];
407 s->type = COMEDI_SUBD_DO;
408 s->subdev_flags = SDF_WRITEABLE;
411 s->range_table = &range_digital;
412 s->insn_bits = apci1564_do_insn_bits;
414 /* Change-Of-State (COS) interrupt subdevice */
415 s = &dev->subdevices[2];
417 dev->read_subdev = s;
418 s->type = COMEDI_SUBD_DI;
419 s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
422 s->range_table = &range_digital;
424 s->insn_config = apci1564_cos_insn_config;
425 s->insn_bits = apci1564_cos_insn_bits;
426 s->do_cmdtest = apci1564_cos_cmdtest;
427 s->do_cmd = apci1564_cos_cmd;
428 s->cancel = apci1564_cos_cancel;
430 s->type = COMEDI_SUBD_UNUSED;
433 /* Allocate and Initialise Timer Subdevice Structures */
434 s = &dev->subdevices[3];
435 s->type = COMEDI_SUBD_TIMER;
436 s->subdev_flags = SDF_WRITEABLE;
440 s->range_table = &range_digital;
441 s->insn_write = apci1564_timer_write;
442 s->insn_read = apci1564_timer_read;
443 s->insn_config = apci1564_timer_config;
445 /* Initialize the watchdog subdevice */
446 s = &dev->subdevices[4];
447 ret = addi_watchdog_init(s, devpriv->amcc_iobase + APCI1564_WDOG_REG);
451 /* Initialize the diagnostic status subdevice */
452 s = &dev->subdevices[5];
453 s->type = COMEDI_SUBD_DI;
454 s->subdev_flags = SDF_READABLE;
457 s->range_table = &range_digital;
458 s->insn_bits = apci1564_diag_insn_bits;
463 static void apci1564_detach(struct comedi_device *dev)
467 comedi_pci_detach(dev);
470 static struct comedi_driver apci1564_driver = {
471 .driver_name = "addi_apci_1564",
472 .module = THIS_MODULE,
473 .auto_attach = apci1564_auto_attach,
474 .detach = apci1564_detach,
477 static int apci1564_pci_probe(struct pci_dev *dev,
478 const struct pci_device_id *id)
480 return comedi_pci_auto_config(dev, &apci1564_driver, id->driver_data);
483 static const struct pci_device_id apci1564_pci_table[] = {
484 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1006) },
487 MODULE_DEVICE_TABLE(pci, apci1564_pci_table);
489 static struct pci_driver apci1564_pci_driver = {
490 .name = "addi_apci_1564",
491 .id_table = apci1564_pci_table,
492 .probe = apci1564_pci_probe,
493 .remove = comedi_pci_auto_unconfig,
495 module_comedi_pci_driver(apci1564_driver, apci1564_pci_driver);
497 MODULE_AUTHOR("Comedi http://www.comedi.org");
498 MODULE_DESCRIPTION("ADDI-DATA APCI-1564, 32 channel DI / 32 channel DO boards");
499 MODULE_LICENSE("GPL");