3 comedi/drivers/adl_pci9111.c
5 Hardware driver for PCI9111 ADLink cards:
9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 Description: Adlink PCI-9111HR
29 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
30 Devices: [ADLink] PCI-9111HR (adl_pci9111)
39 - ai_do_cmd mode with the following sources:
42 - scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT
43 - convert_src TRIG_TIMER TRIG_EXT
44 - scan_end_src TRIG_COUNT
45 - stop_src TRIG_COUNT TRIG_NONE
47 The scanned channels must be consecutive and start from 0. They must
48 all have the same range and aref.
50 Configuration options:
52 [0] - PCI bus number (optional)
53 [1] - PCI slot number (optional)
55 If bus/slot is not specified, the first available PCI
63 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
64 a multiple of chanlist_len*convert_arg.
65 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
66 2002/02/18 Added external trigger support for analog input.
70 - Really test implemented functionality.
71 - Add support for the PCI-9111DG with a probe routine to identify
72 the card type (perhaps with the help of the channel number readback
73 of the A/D Data register).
74 - Add external multiplexer support.
78 #include "../comedidev.h"
80 #include <linux/delay.h>
81 #include <linux/interrupt.h>
84 #include "comedi_pci.h"
85 #include "comedi_fc.h"
87 #define PCI9111_DRIVER_NAME "adl_pci9111"
88 #define PCI9111_HR_DEVICE_ID 0x9111
90 /* TODO: Add other pci9111 board id */
92 #define PCI9111_IO_RANGE 0x0100
94 #define PCI9111_FIFO_HALF_SIZE 512
96 #define PCI9111_AI_CHANNEL_NBR 16
98 #define PCI9111_AI_RESOLUTION 12
99 #define PCI9111_AI_RESOLUTION_MASK 0x0FFF
100 #define PCI9111_AI_RESOLUTION_2_CMP_BIT 0x0800
102 #define PCI9111_HR_AI_RESOLUTION 16
103 #define PCI9111_HR_AI_RESOLUTION_MASK 0xFFFF
104 #define PCI9111_HR_AI_RESOLUTION_2_CMP_BIT 0x8000
106 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000
107 #define PCI9111_AO_CHANNEL_NBR 1
108 #define PCI9111_AO_RESOLUTION 12
109 #define PCI9111_AO_RESOLUTION_MASK 0x0FFF
110 #define PCI9111_DI_CHANNEL_NBR 16
111 #define PCI9111_DO_CHANNEL_NBR 16
112 #define PCI9111_DO_MASK 0xFFFF
114 #define PCI9111_RANGE_SETTING_DELAY 10
115 #define PCI9111_AI_INSTANT_READ_UDELAY_US 2
116 #define PCI9111_AI_INSTANT_READ_TIMEOUT 100
118 #define PCI9111_8254_CLOCK_PERIOD_NS 500
120 #define PCI9111_8254_COUNTER_0 0x00
121 #define PCI9111_8254_COUNTER_1 0x40
122 #define PCI9111_8254_COUNTER_2 0x80
123 #define PCI9111_8254_COUNTER_LATCH 0x00
124 #define PCI9111_8254_READ_LOAD_LSB_ONLY 0x10
125 #define PCI9111_8254_READ_LOAD_MSB_ONLY 0x20
126 #define PCI9111_8254_READ_LOAD_LSB_MSB 0x30
127 #define PCI9111_8254_MODE_0 0x00
128 #define PCI9111_8254_MODE_1 0x02
129 #define PCI9111_8254_MODE_2 0x04
130 #define PCI9111_8254_MODE_3 0x06
131 #define PCI9111_8254_MODE_4 0x08
132 #define PCI9111_8254_MODE_5 0x0A
133 #define PCI9111_8254_BINARY_COUNTER 0x00
134 #define PCI9111_8254_BCD_COUNTER 0x01
138 #define PCI9111_REGISTER_AD_FIFO_VALUE 0x00 /* AD Data stored
140 #define PCI9111_REGISTER_DA_OUTPUT 0x00
141 #define PCI9111_REGISTER_DIGITAL_IO 0x02
142 #define PCI9111_REGISTER_EXTENDED_IO_PORTS 0x04
143 #define PCI9111_REGISTER_AD_CHANNEL_CONTROL 0x06 /* Channel
145 #define PCI9111_REGISTER_AD_CHANNEL_READBACK 0x06
146 #define PCI9111_REGISTER_INPUT_SIGNAL_RANGE 0x08
147 #define PCI9111_REGISTER_RANGE_STATUS_READBACK 0x08
148 #define PCI9111_REGISTER_TRIGGER_MODE_CONTROL 0x0A
149 #define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK 0x0A
150 #define PCI9111_REGISTER_SOFTWARE_TRIGGER 0x0E
151 #define PCI9111_REGISTER_INTERRUPT_CONTROL 0x0C
152 #define PCI9111_REGISTER_8254_COUNTER_0 0x40
153 #define PCI9111_REGISTER_8254_COUNTER_1 0x42
154 #define PCI9111_REGISTER_8254_COUNTER_2 0X44
155 #define PCI9111_REGISTER_8254_CONTROL 0x46
156 #define PCI9111_REGISTER_INTERRUPT_CLEAR 0x48
158 #define PCI9111_TRIGGER_MASK 0x0F
159 #define PCI9111_PTRG_OFF (0 << 3)
160 #define PCI9111_PTRG_ON (1 << 3)
161 #define PCI9111_EITS_EXTERNAL (1 << 2)
162 #define PCI9111_EITS_INTERNAL (0 << 2)
163 #define PCI9111_TPST_SOFTWARE_TRIGGER (0 << 1)
164 #define PCI9111_TPST_TIMER_PACER (1 << 1)
165 #define PCI9111_ASCAN_ON (1 << 0)
166 #define PCI9111_ASCAN_OFF (0 << 0)
168 #define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0)
169 #define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL (1 << 0)
170 #define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK (0 << 1)
171 #define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG (1 << 1)
172 #define PCI9111_FFEN_SET_FIFO_ENABLE (0 << 2)
173 #define PCI9111_FFEN_SET_FIFO_DISABLE (1 << 2)
175 #define PCI9111_CHANNEL_MASK 0x0F
177 #define PCI9111_RANGE_MASK 0x07
178 #define PCI9111_FIFO_EMPTY_MASK 0x10
179 #define PCI9111_FIFO_HALF_FULL_MASK 0x20
180 #define PCI9111_FIFO_FULL_MASK 0x40
181 #define PCI9111_AD_BUSY_MASK 0x80
183 #define PCI9111_IO_BASE (dev->iobase)
186 * Define inlined function
189 #define pci9111_trigger_and_autoscan_get() \
190 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
192 #define pci9111_trigger_and_autoscan_set(flags) \
193 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
195 #define pci9111_interrupt_and_fifo_get() \
196 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \
199 #define pci9111_interrupt_and_fifo_set(flags) \
200 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL)
202 #define pci9111_interrupt_clear() \
203 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR)
205 #define pci9111_software_trigger() \
206 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER)
208 #define pci9111_fifo_reset() do { \
209 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
210 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
211 outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
212 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
213 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
214 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
217 #define pci9111_is_fifo_full() \
218 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
219 PCI9111_FIFO_FULL_MASK) == 0)
221 #define pci9111_is_fifo_half_full() \
222 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
223 PCI9111_FIFO_HALF_FULL_MASK) == 0)
225 #define pci9111_is_fifo_empty() \
226 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
227 PCI9111_FIFO_EMPTY_MASK) == 0)
229 #define pci9111_ai_channel_set(channel) \
230 outb((channel)&PCI9111_CHANNEL_MASK, \
231 PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL)
233 #define pci9111_ai_channel_get() \
234 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK) \
235 &PCI9111_CHANNEL_MASK)
237 #define pci9111_ai_range_set(range) \
238 outb((range)&PCI9111_RANGE_MASK, \
239 PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE)
241 #define pci9111_ai_range_get() \
242 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK) \
245 #define pci9111_ai_get_data() \
246 (((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4) \
247 &PCI9111_AI_RESOLUTION_MASK) \
248 ^ PCI9111_AI_RESOLUTION_2_CMP_BIT)
250 #define pci9111_hr_ai_get_data() \
251 ((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) \
252 &PCI9111_HR_AI_RESOLUTION_MASK) \
253 ^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT)
255 #define pci9111_ao_set_data(data) \
256 outw(data&PCI9111_AO_RESOLUTION_MASK, \
257 PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT)
259 #define pci9111_di_get_bits() \
260 inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
262 #define pci9111_do_set_bits(bits) \
263 outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
265 #define pci9111_8254_control_set(flags) \
266 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL)
268 #define pci9111_8254_counter_0_set(data) \
271 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
272 outb((data >> 8) & 0xFF, \
273 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
276 #define pci9111_8254_counter_1_set(data) \
279 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
280 outb((data >> 8) & 0xFF, \
281 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
284 #define pci9111_8254_counter_2_set(data) \
287 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
288 outb((data >> 8) & 0xFF, \
289 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
292 /* Function prototypes */
294 static int pci9111_attach(struct comedi_device *dev,
295 struct comedi_devconfig *it);
296 static int pci9111_detach(struct comedi_device *dev);
297 static void pci9111_ai_munge(struct comedi_device *dev,
298 struct comedi_subdevice *s, void *data,
299 unsigned int num_bytes,
300 unsigned int start_chan_index);
302 static const struct comedi_lrange pci9111_hr_ai_range = {
313 static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = {
314 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
315 /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
319 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
322 /* Board specification structure */
325 struct pci9111_board {
326 const char *name; /* driver name */
328 int ai_channel_nbr; /* num of A/D chans */
329 int ao_channel_nbr; /* num of D/A chans */
330 int ai_resolution; /* resolution of A/D */
331 int ai_resolution_mask;
332 int ao_resolution; /* resolution of D/A */
333 int ao_resolution_mask;
334 const struct comedi_lrange *ai_range_list; /* rangelist for A/D */
335 const struct comedi_lrange *ao_range_list; /* rangelist for D/A */
336 unsigned int ai_acquisition_period_min_ns;
339 static const struct pci9111_board pci9111_boards[] = {
341 .name = "pci9111_hr",
342 .device_id = PCI9111_HR_DEVICE_ID,
343 .ai_channel_nbr = PCI9111_AI_CHANNEL_NBR,
344 .ao_channel_nbr = PCI9111_AO_CHANNEL_NBR,
345 .ai_resolution = PCI9111_HR_AI_RESOLUTION,
346 .ai_resolution_mask = PCI9111_HR_AI_RESOLUTION_MASK,
347 .ao_resolution = PCI9111_AO_RESOLUTION,
348 .ao_resolution_mask = PCI9111_AO_RESOLUTION_MASK,
349 .ai_range_list = &pci9111_hr_ai_range,
350 .ao_range_list = &range_bipolar10,
351 .ai_acquisition_period_min_ns = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS}
354 #define pci9111_board_nbr \
355 (sizeof(pci9111_boards)/sizeof(struct pci9111_board))
357 static struct comedi_driver pci9111_driver = {
358 .driver_name = PCI9111_DRIVER_NAME,
359 .module = THIS_MODULE,
360 .attach = pci9111_attach,
361 .detach = pci9111_detach,
364 static int __devinit pci9111_driver_pci_probe(struct pci_dev *dev,
365 const struct pci_device_id *ent)
367 return comedi_pci_auto_config(dev, &pci9111_driver);
370 static void __devexit pci9111_driver_pci_remove(struct pci_dev *dev)
372 comedi_pci_auto_unconfig(dev);
375 static struct pci_driver pci9111_driver_pci_driver = {
376 .id_table = pci9111_pci_table,
377 .probe = &pci9111_driver_pci_probe,
378 .remove = __devexit_p(&pci9111_driver_pci_remove)
381 static int __init pci9111_driver_init_module(void)
385 retval = comedi_driver_register(&pci9111_driver);
389 pci9111_driver_pci_driver.name = (char *)pci9111_driver.driver_name;
390 return pci_register_driver(&pci9111_driver_pci_driver);
393 static void __exit pci9111_driver_cleanup_module(void)
395 pci_unregister_driver(&pci9111_driver_pci_driver);
396 comedi_driver_unregister(&pci9111_driver);
399 module_init(pci9111_driver_init_module);
400 module_exit(pci9111_driver_cleanup_module);
402 /* Private data structure */
404 struct pci9111_private_data {
405 struct pci_dev *pci_device;
406 unsigned long io_range; /* PCI6503 io range */
408 unsigned long lcr_io_base; /* Local configuration register base
410 unsigned long lcr_io_range;
415 unsigned int scan_delay;
416 unsigned int chanlist_len;
417 unsigned int chunk_counter;
418 unsigned int chunk_num_samples;
420 int ao_readback; /* Last written analog output data */
422 unsigned int timer_divisor_1; /* Divisor values for the 8254 timer
424 unsigned int timer_divisor_2;
426 int is_valid; /* Is device valid */
428 short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
431 #define dev_private ((struct pci9111_private_data *)dev->private)
433 /* ------------------------------------------------------------------ */
434 /* PLX9050 SECTION */
435 /* ------------------------------------------------------------------ */
437 #define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c
439 #define PLX9050_LINTI1_ENABLE (1 << 0)
440 #define PLX9050_LINTI1_ACTIVE_HIGH (1 << 1)
441 #define PLX9050_LINTI1_STATUS (1 << 2)
442 #define PLX9050_LINTI2_ENABLE (1 << 3)
443 #define PLX9050_LINTI2_ACTIVE_HIGH (1 << 4)
444 #define PLX9050_LINTI2_STATUS (1 << 5)
445 #define PLX9050_PCI_INTERRUPT_ENABLE (1 << 6)
446 #define PLX9050_SOFTWARE_INTERRUPT (1 << 7)
448 static void plx9050_interrupt_control(unsigned long io_base,
450 bool LINTi1_active_high,
452 bool LINTi2_active_high,
453 bool interrupt_enable)
458 flags |= PLX9050_LINTI1_ENABLE;
459 if (LINTi1_active_high)
460 flags |= PLX9050_LINTI1_ACTIVE_HIGH;
462 flags |= PLX9050_LINTI2_ENABLE;
463 if (LINTi2_active_high)
464 flags |= PLX9050_LINTI2_ACTIVE_HIGH;
466 if (interrupt_enable)
467 flags |= PLX9050_PCI_INTERRUPT_ENABLE;
469 outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL);
472 /* ------------------------------------------------------------------ */
473 /* MISCELLANEOUS SECTION */
474 /* ------------------------------------------------------------------ */
478 static void pci9111_timer_set(struct comedi_device *dev)
480 pci9111_8254_control_set(PCI9111_8254_COUNTER_0 |
481 PCI9111_8254_READ_LOAD_LSB_MSB |
482 PCI9111_8254_MODE_0 |
483 PCI9111_8254_BINARY_COUNTER);
485 pci9111_8254_control_set(PCI9111_8254_COUNTER_1 |
486 PCI9111_8254_READ_LOAD_LSB_MSB |
487 PCI9111_8254_MODE_2 |
488 PCI9111_8254_BINARY_COUNTER);
490 pci9111_8254_control_set(PCI9111_8254_COUNTER_2 |
491 PCI9111_8254_READ_LOAD_LSB_MSB |
492 PCI9111_8254_MODE_2 |
493 PCI9111_8254_BINARY_COUNTER);
497 pci9111_8254_counter_2_set(dev_private->timer_divisor_2);
498 pci9111_8254_counter_1_set(dev_private->timer_divisor_1);
501 enum pci9111_trigger_sources {
507 static void pci9111_trigger_source_set(struct comedi_device *dev,
508 enum pci9111_trigger_sources source)
512 flags = pci9111_trigger_and_autoscan_get() & 0x09;
516 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER;
520 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER;
524 flags |= PCI9111_EITS_EXTERNAL;
528 pci9111_trigger_and_autoscan_set(flags);
531 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
535 flags = pci9111_trigger_and_autoscan_get() & 0x07;
538 flags |= PCI9111_PTRG_ON;
540 pci9111_trigger_and_autoscan_set(flags);
543 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
547 flags = pci9111_trigger_and_autoscan_get() & 0x0e;
550 flags |= PCI9111_ASCAN_ON;
552 pci9111_trigger_and_autoscan_set(flags);
555 enum pci9111_ISC0_sources {
557 irq_on_fifo_half_full
560 enum pci9111_ISC1_sources {
562 irq_on_external_trigger
565 static void pci9111_interrupt_source_set(struct comedi_device *dev,
566 enum pci9111_ISC0_sources irq_0_source,
567 enum pci9111_ISC1_sources irq_1_source)
571 flags = pci9111_interrupt_and_fifo_get() & 0x04;
573 if (irq_0_source == irq_on_fifo_half_full)
574 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL;
576 if (irq_1_source == irq_on_external_trigger)
577 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG;
579 pci9111_interrupt_and_fifo_set(flags);
582 /* ------------------------------------------------------------------ */
583 /* HARDWARE TRIGGERED ANALOG INPUT SECTION */
584 /* ------------------------------------------------------------------ */
586 /* Cancel analog input autoscan */
588 #undef AI_DO_CMD_DEBUG
590 static int pci9111_ai_cancel(struct comedi_device *dev,
591 struct comedi_subdevice *s)
593 /* Disable interrupts */
595 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
598 pci9111_trigger_source_set(dev, software);
600 pci9111_autoscan_set(dev, false);
602 pci9111_fifo_reset();
604 #ifdef AI_DO_CMD_DEBUG
605 printk(PCI9111_DRIVER_NAME ": ai_cancel\n");
611 /* Test analog input command */
613 #define pci9111_check_trigger_src(src, flags) do { \
616 if (!src || tmp != src) \
621 pci9111_ai_do_cmd_test(struct comedi_device *dev,
622 struct comedi_subdevice *s, struct comedi_cmd *cmd)
626 int range, reference;
628 struct pci9111_board *board = (struct pci9111_board *)dev->board_ptr;
630 /* Step 1 : check if trigger are trivialy valid */
632 pci9111_check_trigger_src(cmd->start_src, TRIG_NOW);
633 pci9111_check_trigger_src(cmd->scan_begin_src,
634 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
635 pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT);
636 pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT);
637 pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE);
642 /* step 2 : make sure trigger sources are unique and mutually
645 if (cmd->start_src != TRIG_NOW)
648 if ((cmd->scan_begin_src != TRIG_TIMER) &&
649 (cmd->scan_begin_src != TRIG_FOLLOW) &&
650 (cmd->scan_begin_src != TRIG_EXT))
653 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT))
655 if ((cmd->convert_src == TRIG_TIMER) &&
656 !((cmd->scan_begin_src == TRIG_TIMER) ||
657 (cmd->scan_begin_src == TRIG_FOLLOW)))
659 if ((cmd->convert_src == TRIG_EXT) &&
660 !((cmd->scan_begin_src == TRIG_EXT) ||
661 (cmd->scan_begin_src == TRIG_FOLLOW)))
665 if (cmd->scan_end_src != TRIG_COUNT)
667 if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE))
673 /* Step 3 : make sure arguments are trivialy compatible */
675 if (cmd->chanlist_len < 1) {
676 cmd->chanlist_len = 1;
680 if (cmd->chanlist_len > board->ai_channel_nbr) {
681 cmd->chanlist_len = board->ai_channel_nbr;
685 if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) {
690 if ((cmd->convert_src == TRIG_TIMER) &&
691 (cmd->convert_arg < board->ai_acquisition_period_min_ns)) {
692 cmd->convert_arg = board->ai_acquisition_period_min_ns;
695 if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) {
696 cmd->convert_arg = 0;
700 if ((cmd->scan_begin_src == TRIG_TIMER) &&
701 (cmd->scan_begin_arg < board->ai_acquisition_period_min_ns)) {
702 cmd->scan_begin_arg = board->ai_acquisition_period_min_ns;
705 if ((cmd->scan_begin_src == TRIG_FOLLOW)
706 && (cmd->scan_begin_arg != 0)) {
707 cmd->scan_begin_arg = 0;
710 if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) {
711 cmd->scan_begin_arg = 0;
715 if ((cmd->scan_end_src == TRIG_COUNT) &&
716 (cmd->scan_end_arg != cmd->chanlist_len)) {
717 cmd->scan_end_arg = cmd->chanlist_len;
721 if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) {
725 if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) {
733 /* Step 4 : fix up any arguments */
735 if (cmd->convert_src == TRIG_TIMER) {
736 tmp = cmd->convert_arg;
737 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
738 &(dev_private->timer_divisor_1),
739 &(dev_private->timer_divisor_2),
741 cmd->flags & TRIG_ROUND_MASK);
742 if (tmp != cmd->convert_arg)
745 /* There's only one timer on this card, so the scan_begin timer must */
746 /* be a multiple of chanlist_len*convert_arg */
748 if (cmd->scan_begin_src == TRIG_TIMER) {
750 unsigned int scan_begin_min;
751 unsigned int scan_begin_arg;
752 unsigned int scan_factor;
754 scan_begin_min = cmd->chanlist_len * cmd->convert_arg;
756 if (cmd->scan_begin_arg != scan_begin_min) {
757 if (scan_begin_min < cmd->scan_begin_arg) {
759 cmd->scan_begin_arg / scan_begin_min;
760 scan_begin_arg = scan_factor * scan_begin_min;
761 if (cmd->scan_begin_arg != scan_begin_arg) {
762 cmd->scan_begin_arg = scan_begin_arg;
766 cmd->scan_begin_arg = scan_begin_min;
775 /* Step 5 : check channel list */
779 range = CR_RANGE(cmd->chanlist[0]);
780 reference = CR_AREF(cmd->chanlist[0]);
782 if (cmd->chanlist_len > 1) {
783 for (i = 0; i < cmd->chanlist_len; i++) {
784 if (CR_CHAN(cmd->chanlist[i]) != i) {
786 "entries in chanlist must be consecutive "
787 "channels,counting upwards from 0\n");
790 if (CR_RANGE(cmd->chanlist[i]) != range) {
792 "entries in chanlist must all have the same gain\n");
795 if (CR_AREF(cmd->chanlist[i]) != reference) {
797 "entries in chanlist must all have the same reference\n");
802 if ((CR_CHAN(cmd->chanlist[0]) >
803 (board->ai_channel_nbr - 1))
804 || (CR_CHAN(cmd->chanlist[0]) < 0)) {
806 "channel number is out of limits\n");
819 /* Analog input command */
821 static int pci9111_ai_do_cmd(struct comedi_device *dev,
822 struct comedi_subdevice *subdevice)
824 struct comedi_cmd *async_cmd = &subdevice->async->cmd;
828 "no irq assigned for PCI9111, cannot do hardware conversion");
831 /* Set channel scan limit */
832 /* PCI9111 allows only scanning from channel 0 to channel n */
833 /* TODO: handle the case of an external multiplexer */
835 if (async_cmd->chanlist_len > 1) {
836 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1);
837 pci9111_autoscan_set(dev, true);
839 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0]));
840 pci9111_autoscan_set(dev, false);
844 /* This is the same gain on every channel */
846 pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0]));
850 switch (async_cmd->stop_src) {
852 dev_private->stop_counter =
853 async_cmd->stop_arg * async_cmd->chanlist_len;
854 dev_private->stop_is_none = 0;
858 dev_private->stop_counter = 0;
859 dev_private->stop_is_none = 1;
863 comedi_error(dev, "Invalid stop trigger");
867 /* Set timer pacer */
869 dev_private->scan_delay = 0;
870 switch (async_cmd->convert_src) {
872 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
873 &(dev_private->timer_divisor_1),
874 &(dev_private->timer_divisor_2),
875 &(async_cmd->convert_arg),
877 flags & TRIG_ROUND_MASK);
878 #ifdef AI_DO_CMD_DEBUG
879 printk(PCI9111_DRIVER_NAME ": divisors = %d, %d\n",
880 dev_private->timer_divisor_1,
881 dev_private->timer_divisor_2);
884 pci9111_trigger_source_set(dev, software);
885 pci9111_timer_set(dev);
886 pci9111_fifo_reset();
887 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
889 pci9111_trigger_source_set(dev, timer_pacer);
890 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
893 if (async_cmd->scan_begin_src == TRIG_TIMER) {
894 dev_private->scan_delay =
895 (async_cmd->scan_begin_arg /
896 (async_cmd->convert_arg *
897 async_cmd->chanlist_len)) - 1;
904 pci9111_trigger_source_set(dev, external);
905 pci9111_fifo_reset();
906 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
908 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
914 comedi_error(dev, "Invalid convert trigger");
918 dev_private->stop_counter *= (1 + dev_private->scan_delay);
919 dev_private->chanlist_len = async_cmd->chanlist_len;
920 dev_private->chunk_counter = 0;
921 dev_private->chunk_num_samples =
922 dev_private->chanlist_len * (1 + dev_private->scan_delay);
924 #ifdef AI_DO_CMD_DEBUG
925 printk(PCI9111_DRIVER_NAME ": start interruptions!\n");
926 printk(PCI9111_DRIVER_NAME ": trigger source = %2x\n",
927 pci9111_trigger_and_autoscan_get());
928 printk(PCI9111_DRIVER_NAME ": irq source = %2x\n",
929 pci9111_interrupt_and_fifo_get());
930 printk(PCI9111_DRIVER_NAME ": ai_do_cmd\n");
931 printk(PCI9111_DRIVER_NAME ": stop counter = %d\n",
932 dev_private->stop_counter);
933 printk(PCI9111_DRIVER_NAME ": scan delay = %d\n",
934 dev_private->scan_delay);
935 printk(PCI9111_DRIVER_NAME ": chanlist_len = %d\n",
936 dev_private->chanlist_len);
937 printk(PCI9111_DRIVER_NAME ": chunk num samples = %d\n",
938 dev_private->chunk_num_samples);
944 static void pci9111_ai_munge(struct comedi_device *dev,
945 struct comedi_subdevice *s, void *data,
946 unsigned int num_bytes,
947 unsigned int start_chan_index)
949 unsigned int i, num_samples = num_bytes / sizeof(short);
952 ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
954 for (i = 0; i < num_samples; i++) {
955 if (resolution == PCI9111_HR_AI_RESOLUTION)
957 (array[i] & PCI9111_HR_AI_RESOLUTION_MASK) ^
958 PCI9111_HR_AI_RESOLUTION_2_CMP_BIT;
961 ((array[i] >> 4) & PCI9111_AI_RESOLUTION_MASK) ^
962 PCI9111_AI_RESOLUTION_2_CMP_BIT;
966 /* ------------------------------------------------------------------ */
967 /* INTERRUPT SECTION */
968 /* ------------------------------------------------------------------ */
970 #undef INTERRUPT_DEBUG
972 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
974 struct comedi_device *dev = p_device;
975 struct comedi_subdevice *subdevice = dev->read_subdev;
976 struct comedi_async *async;
977 unsigned long irq_flags;
978 unsigned char intcsr;
980 if (!dev->attached) {
981 /* Ignore interrupt before device fully attached. */
982 /* Might not even have allocated subdevices yet! */
986 async = subdevice->async;
988 spin_lock_irqsave(&dev->spinlock, irq_flags);
990 /* Check if we are source of interrupt */
991 intcsr = inb(dev_private->lcr_io_base +
992 PLX9050_REGISTER_INTERRUPT_CONTROL);
993 if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0)
994 && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
995 == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
996 || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))
997 == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) {
998 /* Not the source of the interrupt. */
999 /* (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */
1000 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
1004 if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) ==
1005 (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) {
1006 /* Interrupt comes from fifo_half-full signal */
1008 if (pci9111_is_fifo_full()) {
1009 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
1010 comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
1011 pci9111_interrupt_clear();
1012 pci9111_ai_cancel(dev, subdevice);
1013 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1014 comedi_event(dev, subdevice);
1019 if (pci9111_is_fifo_half_full()) {
1020 unsigned int num_samples;
1021 unsigned int bytes_written = 0;
1023 #ifdef INTERRUPT_DEBUG
1024 printk(PCI9111_DRIVER_NAME ": fifo is half full\n");
1028 PCI9111_FIFO_HALF_SIZE >
1029 dev_private->stop_counter
1031 stop_is_none ? dev_private->stop_counter :
1032 PCI9111_FIFO_HALF_SIZE;
1033 insw(PCI9111_IO_BASE + PCI9111_REGISTER_AD_FIFO_VALUE,
1034 dev_private->ai_bounce_buffer, num_samples);
1036 if (dev_private->scan_delay < 1) {
1038 cfc_write_array_to_buffer(subdevice,
1047 while (position < num_samples) {
1048 if (dev_private->chunk_counter <
1049 dev_private->chanlist_len) {
1051 dev_private->chanlist_len -
1052 dev_private->chunk_counter;
1055 num_samples - position)
1061 cfc_write_array_to_buffer
1063 dev_private->ai_bounce_buffer
1065 to_read * sizeof(short));
1068 dev_private->chunk_num_samples
1070 dev_private->chunk_counter;
1072 num_samples - position)
1078 sizeof(short) * to_read;
1081 position += to_read;
1082 dev_private->chunk_counter += to_read;
1084 if (dev_private->chunk_counter >=
1085 dev_private->chunk_num_samples)
1086 dev_private->chunk_counter = 0;
1090 dev_private->stop_counter -=
1091 bytes_written / sizeof(short);
1095 if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) {
1096 async->events |= COMEDI_CB_EOA;
1097 pci9111_ai_cancel(dev, subdevice);
1100 /* Very important, otherwise another interrupt request will be inserted
1101 * and will cause driver hangs on processing interrupt event. */
1103 pci9111_interrupt_clear();
1105 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
1107 comedi_event(dev, subdevice);
1112 /* ------------------------------------------------------------------ */
1113 /* INSTANT ANALOG INPUT OUTPUT SECTION */
1114 /* ------------------------------------------------------------------ */
1116 /* analog instant input */
1118 #undef AI_INSN_DEBUG
1120 static int pci9111_ai_insn_read(struct comedi_device *dev,
1121 struct comedi_subdevice *subdevice,
1122 struct comedi_insn *insn, unsigned int *data)
1125 ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
1129 #ifdef AI_INSN_DEBUG
1130 printk(PCI9111_DRIVER_NAME ": ai_insn set c/r/n = %2x/%2x/%2x\n",
1131 CR_CHAN((&insn->chanspec)[0]),
1132 CR_RANGE((&insn->chanspec)[0]), insn->n);
1135 pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0]));
1137 if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0]))
1138 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0]));
1140 pci9111_fifo_reset();
1142 for (i = 0; i < insn->n; i++) {
1143 pci9111_software_trigger();
1145 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT;
1148 if (!pci9111_is_fifo_empty())
1149 goto conversion_done;
1152 comedi_error(dev, "A/D read timeout");
1154 pci9111_fifo_reset();
1159 if (resolution == PCI9111_HR_AI_RESOLUTION)
1160 data[i] = pci9111_hr_ai_get_data();
1162 data[i] = pci9111_ai_get_data();
1165 #ifdef AI_INSN_DEBUG
1166 printk(PCI9111_DRIVER_NAME ": ai_insn get c/r/t = %2x/%2x/%2x\n",
1167 pci9111_ai_channel_get(),
1168 pci9111_ai_range_get(), pci9111_trigger_and_autoscan_get());
1174 /* Analog instant output */
1177 pci9111_ao_insn_write(struct comedi_device *dev,
1178 struct comedi_subdevice *s, struct comedi_insn *insn,
1183 for (i = 0; i < insn->n; i++) {
1184 pci9111_ao_set_data(data[i]);
1185 dev_private->ao_readback = data[i];
1191 /* Analog output readback */
1193 static int pci9111_ao_insn_read(struct comedi_device *dev,
1194 struct comedi_subdevice *s,
1195 struct comedi_insn *insn, unsigned int *data)
1199 for (i = 0; i < insn->n; i++)
1200 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK;
1205 /* ------------------------------------------------------------------ */
1206 /* DIGITAL INPUT OUTPUT SECTION */
1207 /* ------------------------------------------------------------------ */
1209 /* Digital inputs */
1211 static int pci9111_di_insn_bits(struct comedi_device *dev,
1212 struct comedi_subdevice *subdevice,
1213 struct comedi_insn *insn, unsigned int *data)
1217 bits = pci9111_di_get_bits();
1223 /* Digital outputs */
1225 static int pci9111_do_insn_bits(struct comedi_device *dev,
1226 struct comedi_subdevice *subdevice,
1227 struct comedi_insn *insn, unsigned int *data)
1231 /* Only set bits that have been masked */
1232 /* data[0] = mask */
1233 /* data[1] = bit state */
1235 data[0] &= PCI9111_DO_MASK;
1237 bits = subdevice->state;
1239 bits |= data[0] & data[1];
1240 subdevice->state = bits;
1242 pci9111_do_set_bits(bits);
1249 /* ------------------------------------------------------------------ */
1250 /* INITIALISATION SECTION */
1251 /* ------------------------------------------------------------------ */
1255 static int pci9111_reset(struct comedi_device *dev)
1257 /* Set trigger source to software */
1259 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
1262 pci9111_trigger_source_set(dev, software);
1263 pci9111_pretrigger_set(dev, false);
1264 pci9111_autoscan_set(dev, false);
1266 /* Reset 8254 chip */
1268 dev_private->timer_divisor_1 = 0;
1269 dev_private->timer_divisor_2 = 0;
1271 pci9111_timer_set(dev);
1277 /* - Register PCI device */
1278 /* - Declare device driver capability */
1280 static int pci9111_attach(struct comedi_device *dev,
1281 struct comedi_devconfig *it)
1283 struct comedi_subdevice *subdevice;
1284 unsigned long io_base, io_range, lcr_io_base, lcr_io_range;
1285 struct pci_dev *pci_device = NULL;
1287 const struct pci9111_board *board;
1289 if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0)
1291 /* Probe the device to determine what device in the series it is. */
1293 printk(KERN_ERR "comedi%d: " PCI9111_DRIVER_NAME " driver\n",
1296 for_each_pci_dev(pci_device) {
1297 if (pci_device->vendor == PCI_VENDOR_ID_ADLINK) {
1298 for (i = 0; i < pci9111_board_nbr; i++) {
1299 if (pci9111_boards[i].device_id ==
1300 pci_device->device) {
1301 /* was a particular bus/slot
1303 if ((it->options[0] != 0)
1304 || (it->options[1] != 0)) {
1305 /* are we on the wrong
1307 if (pci_device->bus->number !=
1310 PCI_SLOT(pci_device->devfn)
1311 != it->options[1]) {
1316 dev->board_ptr = pci9111_boards + i;
1318 (struct pci9111_board *)
1320 dev_private->pci_device = pci_device;
1328 "comedi%d: no supported board found! (req. bus/slot : %d/%d)\n",
1329 dev->minor, it->options[0], it->options[1]);
1334 printk(KERN_ERR "comedi%d: found %s (b:s:f=%d:%d:%d) , irq=%d\n",
1336 pci9111_boards[i].name,
1337 pci_device->bus->number,
1338 PCI_SLOT(pci_device->devfn),
1339 PCI_FUNC(pci_device->devfn), pci_device->irq);
1341 /* TODO: Warn about non-tested boards. */
1343 /* Read local configuration register base address
1344 * [PCI_BASE_ADDRESS #1]. */
1346 lcr_io_base = pci_resource_start(pci_device, 1);
1347 lcr_io_range = pci_resource_len(pci_device, 1);
1350 ("comedi%d: local configuration registers at address 0x%4lx [0x%4lx]\n",
1351 dev->minor, lcr_io_base, lcr_io_range);
1353 /* Enable PCI device and request regions */
1354 if (comedi_pci_enable(pci_device, PCI9111_DRIVER_NAME) < 0) {
1356 ("comedi%d: Failed to enable PCI device and request regions\n",
1360 /* Read PCI6308 register base address [PCI_BASE_ADDRESS #2]. */
1362 io_base = pci_resource_start(pci_device, 2);
1363 io_range = pci_resource_len(pci_device, 2);
1365 printk(KERN_ERR "comedi%d: 6503 registers at address 0x%4lx [0x%4lx]\n",
1366 dev->minor, io_base, io_range);
1368 dev->iobase = io_base;
1369 dev->board_name = board->name;
1370 dev_private->io_range = io_range;
1371 dev_private->is_valid = 0;
1372 dev_private->lcr_io_base = lcr_io_base;
1373 dev_private->lcr_io_range = lcr_io_range;
1380 if (pci_device->irq > 0) {
1381 if (request_irq(pci_device->irq, pci9111_interrupt,
1382 IRQF_SHARED, PCI9111_DRIVER_NAME, dev) != 0) {
1384 "comedi%d: unable to allocate irq %u\n",
1385 dev->minor, pci_device->irq);
1389 dev->irq = pci_device->irq;
1391 /* TODO: Add external multiplexer setup (according to option[2]). */
1393 error = alloc_subdevices(dev, 4);
1397 subdevice = dev->subdevices + 0;
1398 dev->read_subdev = subdevice;
1400 subdevice->type = COMEDI_SUBD_AI;
1401 subdevice->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ;
1403 /* TODO: Add external multiplexer data */
1404 /* if (devpriv->usemux) { subdevice->n_chan = devpriv->usemux; } */
1405 /* else { subdevice->n_chan = this_board->n_aichan; } */
1407 subdevice->n_chan = board->ai_channel_nbr;
1408 subdevice->maxdata = board->ai_resolution_mask;
1409 subdevice->len_chanlist = board->ai_channel_nbr;
1410 subdevice->range_table = board->ai_range_list;
1411 subdevice->cancel = pci9111_ai_cancel;
1412 subdevice->insn_read = pci9111_ai_insn_read;
1413 subdevice->do_cmdtest = pci9111_ai_do_cmd_test;
1414 subdevice->do_cmd = pci9111_ai_do_cmd;
1415 subdevice->munge = pci9111_ai_munge;
1417 subdevice = dev->subdevices + 1;
1418 subdevice->type = COMEDI_SUBD_AO;
1419 subdevice->subdev_flags = SDF_WRITABLE | SDF_COMMON;
1420 subdevice->n_chan = board->ao_channel_nbr;
1421 subdevice->maxdata = board->ao_resolution_mask;
1422 subdevice->len_chanlist = board->ao_channel_nbr;
1423 subdevice->range_table = board->ao_range_list;
1424 subdevice->insn_write = pci9111_ao_insn_write;
1425 subdevice->insn_read = pci9111_ao_insn_read;
1427 subdevice = dev->subdevices + 2;
1428 subdevice->type = COMEDI_SUBD_DI;
1429 subdevice->subdev_flags = SDF_READABLE;
1430 subdevice->n_chan = PCI9111_DI_CHANNEL_NBR;
1431 subdevice->maxdata = 1;
1432 subdevice->range_table = &range_digital;
1433 subdevice->insn_bits = pci9111_di_insn_bits;
1435 subdevice = dev->subdevices + 3;
1436 subdevice->type = COMEDI_SUBD_DO;
1437 subdevice->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1438 subdevice->n_chan = PCI9111_DO_CHANNEL_NBR;
1439 subdevice->maxdata = 1;
1440 subdevice->range_table = &range_digital;
1441 subdevice->insn_bits = pci9111_do_insn_bits;
1443 dev_private->is_valid = 1;
1450 static int pci9111_detach(struct comedi_device *dev)
1454 if (dev->private != NULL) {
1455 if (dev_private->is_valid)
1459 /* Release previously allocated irq */
1462 free_irq(dev->irq, dev);
1464 if (dev_private != NULL && dev_private->pci_device != NULL) {
1466 comedi_pci_disable(dev_private->pci_device);
1467 pci_dev_put(dev_private->pci_device);
1473 MODULE_AUTHOR("Comedi http://www.comedi.org");
1474 MODULE_DESCRIPTION("Comedi low-level driver");
1475 MODULE_LICENSE("GPL");