3 comedi/drivers/adl_pci9111.c
5 Hardware driver for PCI9111 ADLink cards:
9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 Description: Adlink PCI-9111HR
29 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
30 Devices: [ADLink] PCI-9111HR (adl_pci9111)
39 - ai_do_cmd mode with the following sources:
42 - scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT
43 - convert_src TRIG_TIMER TRIG_EXT
44 - scan_end_src TRIG_COUNT
45 - stop_src TRIG_COUNT TRIG_NONE
47 The scanned channels must be consecutive and start from 0. They must
48 all have the same range and aref.
50 Configuration options:
52 [0] - PCI bus number (optional)
53 [1] - PCI slot number (optional)
55 If bus/slot is not specified, the first available PCI
63 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
64 a multiple of chanlist_len*convert_arg.
65 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
66 2002/02/18 Added external trigger support for analog input.
70 - Really test implemented functionality.
71 - Add support for the PCI-9111DG with a probe routine to identify
72 the card type (perhaps with the help of the channel number readback
73 of the A/D Data register).
74 - Add external multiplexer support.
78 #include "../comedidev.h"
80 #include <linux/delay.h>
81 #include <linux/interrupt.h>
84 #include "comedi_fc.h"
86 #define PCI9111_DRIVER_NAME "adl_pci9111"
87 #define PCI9111_HR_DEVICE_ID 0x9111
89 /* TODO: Add other pci9111 board id */
91 #define PCI9111_IO_RANGE 0x0100
93 #define PCI9111_FIFO_HALF_SIZE 512
95 #define PCI9111_AI_CHANNEL_NBR 16
97 #define PCI9111_AI_RESOLUTION 12
98 #define PCI9111_AI_RESOLUTION_MASK 0x0FFF
99 #define PCI9111_AI_RESOLUTION_2_CMP_BIT 0x0800
101 #define PCI9111_HR_AI_RESOLUTION 16
102 #define PCI9111_HR_AI_RESOLUTION_MASK 0xFFFF
103 #define PCI9111_HR_AI_RESOLUTION_2_CMP_BIT 0x8000
105 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000
106 #define PCI9111_AO_CHANNEL_NBR 1
107 #define PCI9111_AO_RESOLUTION 12
108 #define PCI9111_AO_RESOLUTION_MASK 0x0FFF
109 #define PCI9111_DI_CHANNEL_NBR 16
110 #define PCI9111_DO_CHANNEL_NBR 16
111 #define PCI9111_DO_MASK 0xFFFF
113 #define PCI9111_RANGE_SETTING_DELAY 10
114 #define PCI9111_AI_INSTANT_READ_UDELAY_US 2
115 #define PCI9111_AI_INSTANT_READ_TIMEOUT 100
117 #define PCI9111_8254_CLOCK_PERIOD_NS 500
119 #define PCI9111_8254_COUNTER_0 0x00
120 #define PCI9111_8254_COUNTER_1 0x40
121 #define PCI9111_8254_COUNTER_2 0x80
122 #define PCI9111_8254_COUNTER_LATCH 0x00
123 #define PCI9111_8254_READ_LOAD_LSB_ONLY 0x10
124 #define PCI9111_8254_READ_LOAD_MSB_ONLY 0x20
125 #define PCI9111_8254_READ_LOAD_LSB_MSB 0x30
126 #define PCI9111_8254_MODE_0 0x00
127 #define PCI9111_8254_MODE_1 0x02
128 #define PCI9111_8254_MODE_2 0x04
129 #define PCI9111_8254_MODE_3 0x06
130 #define PCI9111_8254_MODE_4 0x08
131 #define PCI9111_8254_MODE_5 0x0A
132 #define PCI9111_8254_BINARY_COUNTER 0x00
133 #define PCI9111_8254_BCD_COUNTER 0x01
137 #define PCI9111_REGISTER_AD_FIFO_VALUE 0x00 /* AD Data stored
139 #define PCI9111_REGISTER_DA_OUTPUT 0x00
140 #define PCI9111_REGISTER_DIGITAL_IO 0x02
141 #define PCI9111_REGISTER_EXTENDED_IO_PORTS 0x04
142 #define PCI9111_REGISTER_AD_CHANNEL_CONTROL 0x06 /* Channel
144 #define PCI9111_REGISTER_AD_CHANNEL_READBACK 0x06
145 #define PCI9111_REGISTER_INPUT_SIGNAL_RANGE 0x08
146 #define PCI9111_REGISTER_RANGE_STATUS_READBACK 0x08
147 #define PCI9111_REGISTER_TRIGGER_MODE_CONTROL 0x0A
148 #define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK 0x0A
149 #define PCI9111_REGISTER_SOFTWARE_TRIGGER 0x0E
150 #define PCI9111_REGISTER_INTERRUPT_CONTROL 0x0C
151 #define PCI9111_REGISTER_8254_COUNTER_0 0x40
152 #define PCI9111_REGISTER_8254_COUNTER_1 0x42
153 #define PCI9111_REGISTER_8254_COUNTER_2 0X44
154 #define PCI9111_REGISTER_8254_CONTROL 0x46
155 #define PCI9111_REGISTER_INTERRUPT_CLEAR 0x48
157 #define PCI9111_TRIGGER_MASK 0x0F
158 #define PCI9111_PTRG_OFF (0 << 3)
159 #define PCI9111_PTRG_ON (1 << 3)
160 #define PCI9111_EITS_EXTERNAL (1 << 2)
161 #define PCI9111_EITS_INTERNAL (0 << 2)
162 #define PCI9111_TPST_SOFTWARE_TRIGGER (0 << 1)
163 #define PCI9111_TPST_TIMER_PACER (1 << 1)
164 #define PCI9111_ASCAN_ON (1 << 0)
165 #define PCI9111_ASCAN_OFF (0 << 0)
167 #define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0)
168 #define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL (1 << 0)
169 #define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK (0 << 1)
170 #define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG (1 << 1)
171 #define PCI9111_FFEN_SET_FIFO_ENABLE (0 << 2)
172 #define PCI9111_FFEN_SET_FIFO_DISABLE (1 << 2)
174 #define PCI9111_CHANNEL_MASK 0x0F
176 #define PCI9111_RANGE_MASK 0x07
177 #define PCI9111_FIFO_EMPTY_MASK 0x10
178 #define PCI9111_FIFO_HALF_FULL_MASK 0x20
179 #define PCI9111_FIFO_FULL_MASK 0x40
180 #define PCI9111_AD_BUSY_MASK 0x80
182 #define PCI9111_IO_BASE (dev->iobase)
185 * Define inlined function
188 #define pci9111_trigger_and_autoscan_get() \
189 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
191 #define pci9111_trigger_and_autoscan_set(flags) \
192 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
194 #define pci9111_interrupt_and_fifo_get() \
195 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \
198 #define pci9111_interrupt_and_fifo_set(flags) \
199 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL)
201 #define pci9111_interrupt_clear() \
202 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR)
204 #define pci9111_software_trigger() \
205 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER)
207 #define pci9111_fifo_reset() do { \
208 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
209 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
210 outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
211 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
212 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
213 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
216 #define pci9111_is_fifo_full() \
217 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
218 PCI9111_FIFO_FULL_MASK) == 0)
220 #define pci9111_is_fifo_half_full() \
221 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
222 PCI9111_FIFO_HALF_FULL_MASK) == 0)
224 #define pci9111_is_fifo_empty() \
225 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
226 PCI9111_FIFO_EMPTY_MASK) == 0)
228 #define pci9111_ai_channel_set(channel) \
229 outb((channel)&PCI9111_CHANNEL_MASK, \
230 PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL)
232 #define pci9111_ai_channel_get() \
233 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK) \
234 &PCI9111_CHANNEL_MASK)
236 #define pci9111_ai_range_set(range) \
237 outb((range)&PCI9111_RANGE_MASK, \
238 PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE)
240 #define pci9111_ai_range_get() \
241 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK) \
244 #define pci9111_ai_get_data() \
245 (((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4) \
246 &PCI9111_AI_RESOLUTION_MASK) \
247 ^ PCI9111_AI_RESOLUTION_2_CMP_BIT)
249 #define pci9111_hr_ai_get_data() \
250 ((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) \
251 &PCI9111_HR_AI_RESOLUTION_MASK) \
252 ^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT)
254 #define pci9111_ao_set_data(data) \
255 outw(data&PCI9111_AO_RESOLUTION_MASK, \
256 PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT)
258 #define pci9111_di_get_bits() \
259 inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
261 #define pci9111_do_set_bits(bits) \
262 outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
264 #define pci9111_8254_control_set(flags) \
265 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL)
267 #define pci9111_8254_counter_0_set(data) \
270 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
271 outb((data >> 8) & 0xFF, \
272 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
275 #define pci9111_8254_counter_1_set(data) \
278 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
279 outb((data >> 8) & 0xFF, \
280 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
283 #define pci9111_8254_counter_2_set(data) \
286 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
287 outb((data >> 8) & 0xFF, \
288 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
291 static const struct comedi_lrange pci9111_hr_ai_range = {
303 /* Board specification structure */
306 struct pci9111_board {
307 const char *name; /* driver name */
309 int ai_channel_nbr; /* num of A/D chans */
310 int ao_channel_nbr; /* num of D/A chans */
311 int ai_resolution; /* resolution of A/D */
312 int ai_resolution_mask;
313 int ao_resolution; /* resolution of D/A */
314 int ao_resolution_mask;
315 const struct comedi_lrange *ai_range_list; /* rangelist for A/D */
316 const struct comedi_lrange *ao_range_list; /* rangelist for D/A */
317 unsigned int ai_acquisition_period_min_ns;
320 static const struct pci9111_board pci9111_boards[] = {
322 .name = "pci9111_hr",
323 .device_id = PCI9111_HR_DEVICE_ID,
324 .ai_channel_nbr = PCI9111_AI_CHANNEL_NBR,
325 .ao_channel_nbr = PCI9111_AO_CHANNEL_NBR,
326 .ai_resolution = PCI9111_HR_AI_RESOLUTION,
327 .ai_resolution_mask = PCI9111_HR_AI_RESOLUTION_MASK,
328 .ao_resolution = PCI9111_AO_RESOLUTION,
329 .ao_resolution_mask = PCI9111_AO_RESOLUTION_MASK,
330 .ai_range_list = &pci9111_hr_ai_range,
331 .ao_range_list = &range_bipolar10,
332 .ai_acquisition_period_min_ns = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS}
335 #define pci9111_board_nbr \
336 (sizeof(pci9111_boards)/sizeof(struct pci9111_board))
338 /* Private data structure */
340 struct pci9111_private_data {
341 unsigned long io_range; /* PCI6503 io range */
343 unsigned long lcr_io_base; /* Local configuration register base
345 unsigned long lcr_io_range;
350 unsigned int scan_delay;
351 unsigned int chanlist_len;
352 unsigned int chunk_counter;
353 unsigned int chunk_num_samples;
355 int ao_readback; /* Last written analog output data */
357 unsigned int timer_divisor_1; /* Divisor values for the 8254 timer
359 unsigned int timer_divisor_2;
361 int is_valid; /* Is device valid */
363 short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
366 #define dev_private ((struct pci9111_private_data *)dev->private)
368 /* ------------------------------------------------------------------ */
369 /* PLX9050 SECTION */
370 /* ------------------------------------------------------------------ */
372 #define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c
374 #define PLX9050_LINTI1_ENABLE (1 << 0)
375 #define PLX9050_LINTI1_ACTIVE_HIGH (1 << 1)
376 #define PLX9050_LINTI1_STATUS (1 << 2)
377 #define PLX9050_LINTI2_ENABLE (1 << 3)
378 #define PLX9050_LINTI2_ACTIVE_HIGH (1 << 4)
379 #define PLX9050_LINTI2_STATUS (1 << 5)
380 #define PLX9050_PCI_INTERRUPT_ENABLE (1 << 6)
381 #define PLX9050_SOFTWARE_INTERRUPT (1 << 7)
383 static void plx9050_interrupt_control(unsigned long io_base,
385 bool LINTi1_active_high,
387 bool LINTi2_active_high,
388 bool interrupt_enable)
393 flags |= PLX9050_LINTI1_ENABLE;
394 if (LINTi1_active_high)
395 flags |= PLX9050_LINTI1_ACTIVE_HIGH;
397 flags |= PLX9050_LINTI2_ENABLE;
398 if (LINTi2_active_high)
399 flags |= PLX9050_LINTI2_ACTIVE_HIGH;
401 if (interrupt_enable)
402 flags |= PLX9050_PCI_INTERRUPT_ENABLE;
404 outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL);
407 /* ------------------------------------------------------------------ */
408 /* MISCELLANEOUS SECTION */
409 /* ------------------------------------------------------------------ */
413 static void pci9111_timer_set(struct comedi_device *dev)
415 pci9111_8254_control_set(PCI9111_8254_COUNTER_0 |
416 PCI9111_8254_READ_LOAD_LSB_MSB |
417 PCI9111_8254_MODE_0 |
418 PCI9111_8254_BINARY_COUNTER);
420 pci9111_8254_control_set(PCI9111_8254_COUNTER_1 |
421 PCI9111_8254_READ_LOAD_LSB_MSB |
422 PCI9111_8254_MODE_2 |
423 PCI9111_8254_BINARY_COUNTER);
425 pci9111_8254_control_set(PCI9111_8254_COUNTER_2 |
426 PCI9111_8254_READ_LOAD_LSB_MSB |
427 PCI9111_8254_MODE_2 |
428 PCI9111_8254_BINARY_COUNTER);
432 pci9111_8254_counter_2_set(dev_private->timer_divisor_2);
433 pci9111_8254_counter_1_set(dev_private->timer_divisor_1);
436 enum pci9111_trigger_sources {
442 static void pci9111_trigger_source_set(struct comedi_device *dev,
443 enum pci9111_trigger_sources source)
447 flags = pci9111_trigger_and_autoscan_get() & 0x09;
451 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER;
455 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER;
459 flags |= PCI9111_EITS_EXTERNAL;
463 pci9111_trigger_and_autoscan_set(flags);
466 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
470 flags = pci9111_trigger_and_autoscan_get() & 0x07;
473 flags |= PCI9111_PTRG_ON;
475 pci9111_trigger_and_autoscan_set(flags);
478 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
482 flags = pci9111_trigger_and_autoscan_get() & 0x0e;
485 flags |= PCI9111_ASCAN_ON;
487 pci9111_trigger_and_autoscan_set(flags);
490 enum pci9111_ISC0_sources {
492 irq_on_fifo_half_full
495 enum pci9111_ISC1_sources {
497 irq_on_external_trigger
500 static void pci9111_interrupt_source_set(struct comedi_device *dev,
501 enum pci9111_ISC0_sources irq_0_source,
502 enum pci9111_ISC1_sources irq_1_source)
506 flags = pci9111_interrupt_and_fifo_get() & 0x04;
508 if (irq_0_source == irq_on_fifo_half_full)
509 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL;
511 if (irq_1_source == irq_on_external_trigger)
512 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG;
514 pci9111_interrupt_and_fifo_set(flags);
517 /* ------------------------------------------------------------------ */
518 /* HARDWARE TRIGGERED ANALOG INPUT SECTION */
519 /* ------------------------------------------------------------------ */
521 /* Cancel analog input autoscan */
523 #undef AI_DO_CMD_DEBUG
525 static int pci9111_ai_cancel(struct comedi_device *dev,
526 struct comedi_subdevice *s)
528 /* Disable interrupts */
530 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
533 pci9111_trigger_source_set(dev, software);
535 pci9111_autoscan_set(dev, false);
537 pci9111_fifo_reset();
539 #ifdef AI_DO_CMD_DEBUG
540 printk(PCI9111_DRIVER_NAME ": ai_cancel\n");
546 /* Test analog input command */
548 #define pci9111_check_trigger_src(src, flags) do { \
551 if (!src || tmp != src) \
556 pci9111_ai_do_cmd_test(struct comedi_device *dev,
557 struct comedi_subdevice *s, struct comedi_cmd *cmd)
561 int range, reference;
563 struct pci9111_board *board = (struct pci9111_board *)dev->board_ptr;
565 /* Step 1 : check if trigger are trivialy valid */
567 pci9111_check_trigger_src(cmd->start_src, TRIG_NOW);
568 pci9111_check_trigger_src(cmd->scan_begin_src,
569 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
570 pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT);
571 pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT);
572 pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE);
577 /* step 2 : make sure trigger sources are unique and mutually
580 if (cmd->start_src != TRIG_NOW)
583 if ((cmd->scan_begin_src != TRIG_TIMER) &&
584 (cmd->scan_begin_src != TRIG_FOLLOW) &&
585 (cmd->scan_begin_src != TRIG_EXT))
588 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT))
590 if ((cmd->convert_src == TRIG_TIMER) &&
591 !((cmd->scan_begin_src == TRIG_TIMER) ||
592 (cmd->scan_begin_src == TRIG_FOLLOW)))
594 if ((cmd->convert_src == TRIG_EXT) &&
595 !((cmd->scan_begin_src == TRIG_EXT) ||
596 (cmd->scan_begin_src == TRIG_FOLLOW)))
600 if (cmd->scan_end_src != TRIG_COUNT)
602 if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE))
608 /* Step 3 : make sure arguments are trivialy compatible */
610 if (cmd->chanlist_len < 1) {
611 cmd->chanlist_len = 1;
615 if (cmd->chanlist_len > board->ai_channel_nbr) {
616 cmd->chanlist_len = board->ai_channel_nbr;
620 if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) {
625 if ((cmd->convert_src == TRIG_TIMER) &&
626 (cmd->convert_arg < board->ai_acquisition_period_min_ns)) {
627 cmd->convert_arg = board->ai_acquisition_period_min_ns;
630 if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) {
631 cmd->convert_arg = 0;
635 if ((cmd->scan_begin_src == TRIG_TIMER) &&
636 (cmd->scan_begin_arg < board->ai_acquisition_period_min_ns)) {
637 cmd->scan_begin_arg = board->ai_acquisition_period_min_ns;
640 if ((cmd->scan_begin_src == TRIG_FOLLOW)
641 && (cmd->scan_begin_arg != 0)) {
642 cmd->scan_begin_arg = 0;
645 if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) {
646 cmd->scan_begin_arg = 0;
650 if ((cmd->scan_end_src == TRIG_COUNT) &&
651 (cmd->scan_end_arg != cmd->chanlist_len)) {
652 cmd->scan_end_arg = cmd->chanlist_len;
656 if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) {
660 if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) {
668 /* Step 4 : fix up any arguments */
670 if (cmd->convert_src == TRIG_TIMER) {
671 tmp = cmd->convert_arg;
672 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
673 &(dev_private->timer_divisor_1),
674 &(dev_private->timer_divisor_2),
676 cmd->flags & TRIG_ROUND_MASK);
677 if (tmp != cmd->convert_arg)
680 /* There's only one timer on this card, so the scan_begin timer must */
681 /* be a multiple of chanlist_len*convert_arg */
683 if (cmd->scan_begin_src == TRIG_TIMER) {
685 unsigned int scan_begin_min;
686 unsigned int scan_begin_arg;
687 unsigned int scan_factor;
689 scan_begin_min = cmd->chanlist_len * cmd->convert_arg;
691 if (cmd->scan_begin_arg != scan_begin_min) {
692 if (scan_begin_min < cmd->scan_begin_arg) {
694 cmd->scan_begin_arg / scan_begin_min;
695 scan_begin_arg = scan_factor * scan_begin_min;
696 if (cmd->scan_begin_arg != scan_begin_arg) {
697 cmd->scan_begin_arg = scan_begin_arg;
701 cmd->scan_begin_arg = scan_begin_min;
710 /* Step 5 : check channel list */
714 range = CR_RANGE(cmd->chanlist[0]);
715 reference = CR_AREF(cmd->chanlist[0]);
717 if (cmd->chanlist_len > 1) {
718 for (i = 0; i < cmd->chanlist_len; i++) {
719 if (CR_CHAN(cmd->chanlist[i]) != i) {
721 "entries in chanlist must be consecutive "
722 "channels,counting upwards from 0\n");
725 if (CR_RANGE(cmd->chanlist[i]) != range) {
727 "entries in chanlist must all have the same gain\n");
730 if (CR_AREF(cmd->chanlist[i]) != reference) {
732 "entries in chanlist must all have the same reference\n");
737 if ((CR_CHAN(cmd->chanlist[0]) >
738 (board->ai_channel_nbr - 1))
739 || (CR_CHAN(cmd->chanlist[0]) < 0)) {
741 "channel number is out of limits\n");
754 /* Analog input command */
756 static int pci9111_ai_do_cmd(struct comedi_device *dev,
757 struct comedi_subdevice *subdevice)
759 struct comedi_cmd *async_cmd = &subdevice->async->cmd;
763 "no irq assigned for PCI9111, cannot do hardware conversion");
766 /* Set channel scan limit */
767 /* PCI9111 allows only scanning from channel 0 to channel n */
768 /* TODO: handle the case of an external multiplexer */
770 if (async_cmd->chanlist_len > 1) {
771 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1);
772 pci9111_autoscan_set(dev, true);
774 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0]));
775 pci9111_autoscan_set(dev, false);
779 /* This is the same gain on every channel */
781 pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0]));
785 switch (async_cmd->stop_src) {
787 dev_private->stop_counter =
788 async_cmd->stop_arg * async_cmd->chanlist_len;
789 dev_private->stop_is_none = 0;
793 dev_private->stop_counter = 0;
794 dev_private->stop_is_none = 1;
798 comedi_error(dev, "Invalid stop trigger");
802 /* Set timer pacer */
804 dev_private->scan_delay = 0;
805 switch (async_cmd->convert_src) {
807 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS,
808 &(dev_private->timer_divisor_1),
809 &(dev_private->timer_divisor_2),
810 &(async_cmd->convert_arg),
812 flags & TRIG_ROUND_MASK);
813 #ifdef AI_DO_CMD_DEBUG
814 printk(PCI9111_DRIVER_NAME ": divisors = %d, %d\n",
815 dev_private->timer_divisor_1,
816 dev_private->timer_divisor_2);
819 pci9111_trigger_source_set(dev, software);
820 pci9111_timer_set(dev);
821 pci9111_fifo_reset();
822 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
824 pci9111_trigger_source_set(dev, timer_pacer);
825 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
828 if (async_cmd->scan_begin_src == TRIG_TIMER) {
829 dev_private->scan_delay =
830 (async_cmd->scan_begin_arg /
831 (async_cmd->convert_arg *
832 async_cmd->chanlist_len)) - 1;
839 pci9111_trigger_source_set(dev, external);
840 pci9111_fifo_reset();
841 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
843 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
849 comedi_error(dev, "Invalid convert trigger");
853 dev_private->stop_counter *= (1 + dev_private->scan_delay);
854 dev_private->chanlist_len = async_cmd->chanlist_len;
855 dev_private->chunk_counter = 0;
856 dev_private->chunk_num_samples =
857 dev_private->chanlist_len * (1 + dev_private->scan_delay);
859 #ifdef AI_DO_CMD_DEBUG
860 printk(PCI9111_DRIVER_NAME ": start interruptions!\n");
861 printk(PCI9111_DRIVER_NAME ": trigger source = %2x\n",
862 pci9111_trigger_and_autoscan_get());
863 printk(PCI9111_DRIVER_NAME ": irq source = %2x\n",
864 pci9111_interrupt_and_fifo_get());
865 printk(PCI9111_DRIVER_NAME ": ai_do_cmd\n");
866 printk(PCI9111_DRIVER_NAME ": stop counter = %d\n",
867 dev_private->stop_counter);
868 printk(PCI9111_DRIVER_NAME ": scan delay = %d\n",
869 dev_private->scan_delay);
870 printk(PCI9111_DRIVER_NAME ": chanlist_len = %d\n",
871 dev_private->chanlist_len);
872 printk(PCI9111_DRIVER_NAME ": chunk num samples = %d\n",
873 dev_private->chunk_num_samples);
879 static void pci9111_ai_munge(struct comedi_device *dev,
880 struct comedi_subdevice *s, void *data,
881 unsigned int num_bytes,
882 unsigned int start_chan_index)
884 unsigned int i, num_samples = num_bytes / sizeof(short);
887 ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
889 for (i = 0; i < num_samples; i++) {
890 if (resolution == PCI9111_HR_AI_RESOLUTION)
892 (array[i] & PCI9111_HR_AI_RESOLUTION_MASK) ^
893 PCI9111_HR_AI_RESOLUTION_2_CMP_BIT;
896 ((array[i] >> 4) & PCI9111_AI_RESOLUTION_MASK) ^
897 PCI9111_AI_RESOLUTION_2_CMP_BIT;
901 /* ------------------------------------------------------------------ */
902 /* INTERRUPT SECTION */
903 /* ------------------------------------------------------------------ */
905 #undef INTERRUPT_DEBUG
907 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
909 struct comedi_device *dev = p_device;
910 struct comedi_subdevice *subdevice = dev->read_subdev;
911 struct comedi_async *async;
912 unsigned long irq_flags;
913 unsigned char intcsr;
915 if (!dev->attached) {
916 /* Ignore interrupt before device fully attached. */
917 /* Might not even have allocated subdevices yet! */
921 async = subdevice->async;
923 spin_lock_irqsave(&dev->spinlock, irq_flags);
925 /* Check if we are source of interrupt */
926 intcsr = inb(dev_private->lcr_io_base +
927 PLX9050_REGISTER_INTERRUPT_CONTROL);
928 if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0)
929 && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
930 == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS))
931 || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))
932 == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) {
933 /* Not the source of the interrupt. */
934 /* (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */
935 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
939 if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) ==
940 (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) {
941 /* Interrupt comes from fifo_half-full signal */
943 if (pci9111_is_fifo_full()) {
944 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
945 comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
946 pci9111_interrupt_clear();
947 pci9111_ai_cancel(dev, subdevice);
948 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
949 comedi_event(dev, subdevice);
954 if (pci9111_is_fifo_half_full()) {
955 unsigned int num_samples;
956 unsigned int bytes_written = 0;
958 #ifdef INTERRUPT_DEBUG
959 printk(PCI9111_DRIVER_NAME ": fifo is half full\n");
963 PCI9111_FIFO_HALF_SIZE >
964 dev_private->stop_counter
966 stop_is_none ? dev_private->stop_counter :
967 PCI9111_FIFO_HALF_SIZE;
968 insw(PCI9111_IO_BASE + PCI9111_REGISTER_AD_FIFO_VALUE,
969 dev_private->ai_bounce_buffer, num_samples);
971 if (dev_private->scan_delay < 1) {
973 cfc_write_array_to_buffer(subdevice,
982 while (position < num_samples) {
983 if (dev_private->chunk_counter <
984 dev_private->chanlist_len) {
986 dev_private->chanlist_len -
987 dev_private->chunk_counter;
990 num_samples - position)
996 cfc_write_array_to_buffer
998 dev_private->ai_bounce_buffer
1000 to_read * sizeof(short));
1003 dev_private->chunk_num_samples
1005 dev_private->chunk_counter;
1007 num_samples - position)
1013 sizeof(short) * to_read;
1016 position += to_read;
1017 dev_private->chunk_counter += to_read;
1019 if (dev_private->chunk_counter >=
1020 dev_private->chunk_num_samples)
1021 dev_private->chunk_counter = 0;
1025 dev_private->stop_counter -=
1026 bytes_written / sizeof(short);
1030 if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) {
1031 async->events |= COMEDI_CB_EOA;
1032 pci9111_ai_cancel(dev, subdevice);
1035 /* Very important, otherwise another interrupt request will be inserted
1036 * and will cause driver hangs on processing interrupt event. */
1038 pci9111_interrupt_clear();
1040 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
1042 comedi_event(dev, subdevice);
1047 /* ------------------------------------------------------------------ */
1048 /* INSTANT ANALOG INPUT OUTPUT SECTION */
1049 /* ------------------------------------------------------------------ */
1051 /* analog instant input */
1053 #undef AI_INSN_DEBUG
1055 static int pci9111_ai_insn_read(struct comedi_device *dev,
1056 struct comedi_subdevice *subdevice,
1057 struct comedi_insn *insn, unsigned int *data)
1060 ((struct pci9111_board *)dev->board_ptr)->ai_resolution;
1064 #ifdef AI_INSN_DEBUG
1065 printk(PCI9111_DRIVER_NAME ": ai_insn set c/r/n = %2x/%2x/%2x\n",
1066 CR_CHAN((&insn->chanspec)[0]),
1067 CR_RANGE((&insn->chanspec)[0]), insn->n);
1070 pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0]));
1072 if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0]))
1073 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0]));
1075 pci9111_fifo_reset();
1077 for (i = 0; i < insn->n; i++) {
1078 pci9111_software_trigger();
1080 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT;
1083 if (!pci9111_is_fifo_empty())
1084 goto conversion_done;
1087 comedi_error(dev, "A/D read timeout");
1089 pci9111_fifo_reset();
1094 if (resolution == PCI9111_HR_AI_RESOLUTION)
1095 data[i] = pci9111_hr_ai_get_data();
1097 data[i] = pci9111_ai_get_data();
1100 #ifdef AI_INSN_DEBUG
1101 printk(PCI9111_DRIVER_NAME ": ai_insn get c/r/t = %2x/%2x/%2x\n",
1102 pci9111_ai_channel_get(),
1103 pci9111_ai_range_get(), pci9111_trigger_and_autoscan_get());
1109 /* Analog instant output */
1112 pci9111_ao_insn_write(struct comedi_device *dev,
1113 struct comedi_subdevice *s, struct comedi_insn *insn,
1118 for (i = 0; i < insn->n; i++) {
1119 pci9111_ao_set_data(data[i]);
1120 dev_private->ao_readback = data[i];
1126 /* Analog output readback */
1128 static int pci9111_ao_insn_read(struct comedi_device *dev,
1129 struct comedi_subdevice *s,
1130 struct comedi_insn *insn, unsigned int *data)
1134 for (i = 0; i < insn->n; i++)
1135 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK;
1140 /* ------------------------------------------------------------------ */
1141 /* DIGITAL INPUT OUTPUT SECTION */
1142 /* ------------------------------------------------------------------ */
1144 /* Digital inputs */
1146 static int pci9111_di_insn_bits(struct comedi_device *dev,
1147 struct comedi_subdevice *subdevice,
1148 struct comedi_insn *insn, unsigned int *data)
1152 bits = pci9111_di_get_bits();
1158 /* Digital outputs */
1160 static int pci9111_do_insn_bits(struct comedi_device *dev,
1161 struct comedi_subdevice *subdevice,
1162 struct comedi_insn *insn, unsigned int *data)
1166 /* Only set bits that have been masked */
1167 /* data[0] = mask */
1168 /* data[1] = bit state */
1170 data[0] &= PCI9111_DO_MASK;
1172 bits = subdevice->state;
1174 bits |= data[0] & data[1];
1175 subdevice->state = bits;
1177 pci9111_do_set_bits(bits);
1184 /* ------------------------------------------------------------------ */
1185 /* INITIALISATION SECTION */
1186 /* ------------------------------------------------------------------ */
1190 static int pci9111_reset(struct comedi_device *dev)
1192 /* Set trigger source to software */
1194 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
1197 pci9111_trigger_source_set(dev, software);
1198 pci9111_pretrigger_set(dev, false);
1199 pci9111_autoscan_set(dev, false);
1201 /* Reset 8254 chip */
1203 dev_private->timer_divisor_1 = 0;
1204 dev_private->timer_divisor_2 = 0;
1206 pci9111_timer_set(dev);
1211 static struct pci_dev *pci9111_find_pci(struct comedi_device *dev,
1212 struct comedi_devconfig *it)
1214 struct pci_dev *pcidev = NULL;
1215 int bus = it->options[0];
1216 int slot = it->options[1];
1219 for_each_pci_dev(pcidev) {
1220 if (pcidev->vendor != PCI_VENDOR_ID_ADLINK)
1222 for (i = 0; i < pci9111_board_nbr; i++) {
1223 if (pcidev->device != pci9111_boards[i].device_id)
1226 /* requested particular bus/slot */
1227 if (pcidev->bus->number != bus ||
1228 PCI_SLOT(pcidev->devfn) != slot)
1231 dev->board_ptr = pci9111_boards + i;
1233 "comedi%d: found %s (b:s:f=%d:%d:%d), irq=%d\n",
1234 dev->minor, pci9111_boards[i].name,
1235 pcidev->bus->number, PCI_SLOT(pcidev->devfn),
1236 PCI_FUNC(pcidev->devfn), pcidev->irq);
1241 "comedi%d: no supported board found! (req. bus/slot : %d/%d)\n",
1242 dev->minor, bus, slot);
1246 static int pci9111_attach(struct comedi_device *dev,
1247 struct comedi_devconfig *it)
1249 struct pci_dev *pcidev;
1250 struct comedi_subdevice *subdevice;
1251 unsigned long io_base, io_range, lcr_io_base, lcr_io_range;
1253 const struct pci9111_board *board;
1255 if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0)
1257 /* Probe the device to determine what device in the series it is. */
1259 printk(KERN_ERR "comedi%d: " PCI9111_DRIVER_NAME " driver\n",
1262 pcidev = pci9111_find_pci(dev, it);
1265 comedi_set_hw_dev(dev, &pcidev->dev);
1266 board = (struct pci9111_board *)dev->board_ptr;
1268 /* TODO: Warn about non-tested boards. */
1270 /* Read local configuration register base address
1271 * [PCI_BASE_ADDRESS #1]. */
1273 lcr_io_base = pci_resource_start(pcidev, 1);
1274 lcr_io_range = pci_resource_len(pcidev, 1);
1277 ("comedi%d: local configuration registers at address 0x%4lx [0x%4lx]\n",
1278 dev->minor, lcr_io_base, lcr_io_range);
1280 /* Enable PCI device and request regions */
1281 if (comedi_pci_enable(pcidev, PCI9111_DRIVER_NAME) < 0) {
1283 ("comedi%d: Failed to enable PCI device and request regions\n",
1287 /* Read PCI6308 register base address [PCI_BASE_ADDRESS #2]. */
1289 io_base = pci_resource_start(pcidev, 2);
1290 io_range = pci_resource_len(pcidev, 2);
1292 printk(KERN_ERR "comedi%d: 6503 registers at address 0x%4lx [0x%4lx]\n",
1293 dev->minor, io_base, io_range);
1295 dev->iobase = io_base;
1296 dev->board_name = board->name;
1297 dev_private->io_range = io_range;
1298 dev_private->is_valid = 0;
1299 dev_private->lcr_io_base = lcr_io_base;
1300 dev_private->lcr_io_range = lcr_io_range;
1307 if (pcidev->irq > 0) {
1308 dev->irq = pcidev->irq;
1310 if (request_irq(dev->irq, pci9111_interrupt,
1311 IRQF_SHARED, PCI9111_DRIVER_NAME, dev) != 0) {
1313 "comedi%d: unable to allocate irq %u\n",
1314 dev->minor, dev->irq);
1319 /* TODO: Add external multiplexer setup (according to option[2]). */
1321 error = comedi_alloc_subdevices(dev, 4);
1325 subdevice = dev->subdevices + 0;
1326 dev->read_subdev = subdevice;
1328 subdevice->type = COMEDI_SUBD_AI;
1329 subdevice->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ;
1331 /* TODO: Add external multiplexer data */
1332 /* if (devpriv->usemux) { subdevice->n_chan = devpriv->usemux; } */
1333 /* else { subdevice->n_chan = this_board->n_aichan; } */
1335 subdevice->n_chan = board->ai_channel_nbr;
1336 subdevice->maxdata = board->ai_resolution_mask;
1337 subdevice->len_chanlist = board->ai_channel_nbr;
1338 subdevice->range_table = board->ai_range_list;
1339 subdevice->cancel = pci9111_ai_cancel;
1340 subdevice->insn_read = pci9111_ai_insn_read;
1341 subdevice->do_cmdtest = pci9111_ai_do_cmd_test;
1342 subdevice->do_cmd = pci9111_ai_do_cmd;
1343 subdevice->munge = pci9111_ai_munge;
1345 subdevice = dev->subdevices + 1;
1346 subdevice->type = COMEDI_SUBD_AO;
1347 subdevice->subdev_flags = SDF_WRITABLE | SDF_COMMON;
1348 subdevice->n_chan = board->ao_channel_nbr;
1349 subdevice->maxdata = board->ao_resolution_mask;
1350 subdevice->len_chanlist = board->ao_channel_nbr;
1351 subdevice->range_table = board->ao_range_list;
1352 subdevice->insn_write = pci9111_ao_insn_write;
1353 subdevice->insn_read = pci9111_ao_insn_read;
1355 subdevice = dev->subdevices + 2;
1356 subdevice->type = COMEDI_SUBD_DI;
1357 subdevice->subdev_flags = SDF_READABLE;
1358 subdevice->n_chan = PCI9111_DI_CHANNEL_NBR;
1359 subdevice->maxdata = 1;
1360 subdevice->range_table = &range_digital;
1361 subdevice->insn_bits = pci9111_di_insn_bits;
1363 subdevice = dev->subdevices + 3;
1364 subdevice->type = COMEDI_SUBD_DO;
1365 subdevice->subdev_flags = SDF_READABLE | SDF_WRITABLE;
1366 subdevice->n_chan = PCI9111_DO_CHANNEL_NBR;
1367 subdevice->maxdata = 1;
1368 subdevice->range_table = &range_digital;
1369 subdevice->insn_bits = pci9111_do_insn_bits;
1371 dev_private->is_valid = 1;
1376 static void pci9111_detach(struct comedi_device *dev)
1378 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1380 if (dev->private != NULL) {
1381 if (dev_private->is_valid)
1385 free_irq(dev->irq, dev);
1388 comedi_pci_disable(pcidev);
1389 pci_dev_put(pcidev);
1393 static struct comedi_driver adl_pci9111_driver = {
1394 .driver_name = "adl_pci9111",
1395 .module = THIS_MODULE,
1396 .attach = pci9111_attach,
1397 .detach = pci9111_detach,
1400 static int __devinit pci9111_pci_probe(struct pci_dev *dev,
1401 const struct pci_device_id *ent)
1403 return comedi_pci_auto_config(dev, &adl_pci9111_driver);
1406 static void __devexit pci9111_pci_remove(struct pci_dev *dev)
1408 comedi_pci_auto_unconfig(dev);
1411 static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = {
1412 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
1413 /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
1416 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
1418 static struct pci_driver adl_pci9111_pci_driver = {
1419 .name = "adl_pci9111",
1420 .id_table = pci9111_pci_table,
1421 .probe = pci9111_pci_probe,
1422 .remove = __devexit_p(pci9111_pci_remove),
1424 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
1426 MODULE_AUTHOR("Comedi http://www.comedi.org");
1427 MODULE_DESCRIPTION("Comedi low-level driver");
1428 MODULE_LICENSE("GPL");