2 comedi/drivers/gsc_hpdi.c
3 This is a driver for the General Standards Corporation High
4 Speed Parallel Digital Interface rs485 boards.
6 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
7 Copyright (C) 2003 Coherent Imaging Systems
9 COMEDI - Linux Control and Measurement Device Interface
10 Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 ************************************************************************/
31 Description: General Standards Corporation High
32 Speed Parallel Digital Interface rs485 boards
33 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
34 Status: only receive mode works, transmit not supported
36 Devices: [General Standards Corporation] PCI-HPDI32 (gsc_hpdi),
39 Configuration options:
40 [0] - PCI bus of device (optional)
41 [1] - PCI slot of device (optional)
43 There are some additional hpdi models available from GSC for which
44 support could be added to this driver.
48 #include <linux/interrupt.h>
49 #include "../comedidev.h"
50 #include <linux/delay.h>
53 #include "comedi_fc.h"
55 static void abort_dma(struct comedi_device *dev, unsigned int channel);
56 static int hpdi_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
57 static int hpdi_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
58 struct comedi_cmd *cmd);
59 static int hpdi_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
60 static irqreturn_t handle_interrupt(int irq, void *d);
61 static int dio_config_block_size(struct comedi_device *dev, unsigned int *data);
63 #undef HPDI_DEBUG /* disable debugging messages */
64 /* #define HPDI_DEBUG enable debugging code */
67 #define DEBUG_PRINT(format, args...) printk(format , ## args)
69 #define DEBUG_PRINT(format, args...)
72 #define TIMER_BASE 50 /* 20MHz master clock */
73 #define DMA_BUFFER_SIZE 0x10000
74 #define NUM_DMA_BUFFERS 4
75 #define NUM_DMA_DESCRIPTORS 256
77 /* indices of base address regions */
78 enum base_address_regions {
79 PLX9080_BADDRINDEX = 0,
84 FIRMWARE_REV_REG = 0x0,
85 BOARD_CONTROL_REG = 0x4,
86 BOARD_STATUS_REG = 0x8,
87 TX_PROG_ALMOST_REG = 0xc,
88 RX_PROG_ALMOST_REG = 0x10,
91 TX_STATUS_COUNT_REG = 0x1c,
92 TX_LINE_VALID_COUNT_REG = 0x20,
93 TX_LINE_INVALID_COUNT_REG = 0x24,
94 RX_STATUS_COUNT_REG = 0x28,
95 RX_LINE_COUNT_REG = 0x2c,
96 INTERRUPT_CONTROL_REG = 0x30,
97 INTERRUPT_STATUS_REG = 0x34,
98 TX_CLOCK_DIVIDER_REG = 0x38,
99 TX_FIFO_SIZE_REG = 0x40,
100 RX_FIFO_SIZE_REG = 0x44,
101 TX_FIFO_WORDS_REG = 0x48,
102 RX_FIFO_WORDS_REG = 0x4c,
103 INTERRUPT_EDGE_LEVEL_REG = 0x50,
104 INTERRUPT_POLARITY_REG = 0x54,
107 int command_channel_valid(unsigned int channel)
109 if (channel == 0 || channel > 6) {
111 "gsc_hpdi: bug! invalid cable command channel\n");
117 /* bit definitions */
119 enum firmware_revision_bits {
120 FEATURES_REG_PRESENT_BIT = 0x8000,
122 int firmware_revision(uint32_t fwr_bits)
124 return fwr_bits & 0xff;
127 int pcb_revision(uint32_t fwr_bits)
129 return (fwr_bits >> 8) & 0xff;
132 int hpdi_subid(uint32_t fwr_bits)
134 return (fwr_bits >> 16) & 0xff;
137 enum board_control_bits {
138 BOARD_RESET_BIT = 0x1, /* wait 10usec before accessing fifos */
139 TX_FIFO_RESET_BIT = 0x2,
140 RX_FIFO_RESET_BIT = 0x4,
141 TX_ENABLE_BIT = 0x10,
142 RX_ENABLE_BIT = 0x20,
143 DEMAND_DMA_DIRECTION_TX_BIT = 0x40,
144 /* for ch 0, ch 1 can only transmit (when present) */
145 LINE_VALID_ON_STATUS_VALID_BIT = 0x80,
147 CABLE_THROTTLE_ENABLE_BIT = 0x20,
148 TEST_MODE_ENABLE_BIT = 0x80000000,
150 uint32_t command_discrete_output_bits(unsigned int channel, int output,
155 if (command_channel_valid(channel) == 0)
158 bits |= 0x1 << (16 + channel);
160 bits |= 0x1 << (24 + channel);
162 bits |= 0x1 << (24 + channel);
167 enum board_status_bits {
168 COMMAND_LINE_STATUS_MASK = 0x7f,
169 TX_IN_PROGRESS_BIT = 0x80,
170 TX_NOT_EMPTY_BIT = 0x100,
171 TX_NOT_ALMOST_EMPTY_BIT = 0x200,
172 TX_NOT_ALMOST_FULL_BIT = 0x400,
173 TX_NOT_FULL_BIT = 0x800,
174 RX_NOT_EMPTY_BIT = 0x1000,
175 RX_NOT_ALMOST_EMPTY_BIT = 0x2000,
176 RX_NOT_ALMOST_FULL_BIT = 0x4000,
177 RX_NOT_FULL_BIT = 0x8000,
178 BOARD_JUMPER0_INSTALLED_BIT = 0x10000,
179 BOARD_JUMPER1_INSTALLED_BIT = 0x20000,
180 TX_OVERRUN_BIT = 0x200000,
181 RX_UNDERRUN_BIT = 0x400000,
182 RX_OVERRUN_BIT = 0x800000,
185 uint32_t almost_full_bits(unsigned int num_words)
187 /* XXX need to add or subtract one? */
188 return (num_words << 16) & 0xff0000;
191 uint32_t almost_empty_bits(unsigned int num_words)
193 return num_words & 0xffff;
196 unsigned int almost_full_num_words(uint32_t bits)
198 /* XXX need to add or subtract one? */
199 return (bits >> 16) & 0xffff;
202 unsigned int almost_empty_num_words(uint32_t bits)
204 return bits & 0xffff;
208 FIFO_SIZE_PRESENT_BIT = 0x1,
209 FIFO_WORDS_PRESENT_BIT = 0x2,
210 LEVEL_EDGE_INTERRUPTS_PRESENT_BIT = 0x4,
211 GPIO_SUPPORTED_BIT = 0x8,
212 PLX_DMA_CH1_SUPPORTED_BIT = 0x10,
213 OVERRUN_UNDERRUN_SUPPORTED_BIT = 0x20,
216 enum interrupt_sources {
217 FRAME_VALID_START_INTR = 0,
218 FRAME_VALID_END_INTR = 1,
219 TX_FIFO_EMPTY_INTR = 8,
220 TX_FIFO_ALMOST_EMPTY_INTR = 9,
221 TX_FIFO_ALMOST_FULL_INTR = 10,
222 TX_FIFO_FULL_INTR = 11,
224 RX_ALMOST_EMPTY_INTR = 13,
225 RX_ALMOST_FULL_INTR = 14,
228 int command_intr_source(unsigned int channel)
230 if (command_channel_valid(channel) == 0)
235 uint32_t intr_bit(int interrupt_source)
237 return 0x1 << interrupt_source;
240 uint32_t tx_clock_divisor_bits(unsigned int divisor)
242 return divisor & 0xff;
245 unsigned int fifo_size(uint32_t fifo_size_bits)
247 return fifo_size_bits & 0xfffff;
250 unsigned int fifo_words(uint32_t fifo_words_bits)
252 return fifo_words_bits & 0xfffff;
255 uint32_t intr_edge_bit(int interrupt_source)
257 return 0x1 << interrupt_source;
260 uint32_t intr_active_high_bit(int interrupt_source)
262 return 0x1 << interrupt_source;
268 int device_id; /* pci device id */
269 int subdevice_id; /* pci subdevice id */
272 static const struct hpdi_board hpdi_boards[] = {
274 .name = "pci-hpdi32",
275 .device_id = PCI_DEVICE_ID_PLX_9080,
276 .subdevice_id = 0x2400,
280 .name = "pxi-hpdi32",
282 .subdevice_id = 0x2705,
287 static inline struct hpdi_board *board(const struct comedi_device *dev)
289 return (struct hpdi_board *)dev->board_ptr;
292 struct hpdi_private {
294 struct pci_dev *hw_dev; /* pointer to board's pci_dev struct */
295 /* base addresses (physical) */
296 resource_size_t plx9080_phys_iobase;
297 resource_size_t hpdi_phys_iobase;
298 /* base addresses (ioremapped) */
299 void __iomem *plx9080_iobase;
300 void __iomem *hpdi_iobase;
301 uint32_t *dio_buffer[NUM_DMA_BUFFERS]; /* dma buffers */
302 /* physical addresses of dma buffers */
303 dma_addr_t dio_buffer_phys_addr[NUM_DMA_BUFFERS];
304 /* array of dma descriptors read by plx9080, allocated to get proper
306 struct plx_dma_desc *dma_desc;
307 /* physical address of dma descriptor array */
308 dma_addr_t dma_desc_phys_addr;
309 unsigned int num_dma_descriptors;
310 /* pointer to start of buffers indexed by descriptor */
311 uint32_t *desc_dio_buffer[NUM_DMA_DESCRIPTORS];
312 /* index of the dma descriptor that is currently being used */
313 volatile unsigned int dma_desc_index;
314 unsigned int tx_fifo_size;
315 unsigned int rx_fifo_size;
316 volatile unsigned long dio_count;
317 /* software copies of values written to hpdi registers */
318 volatile uint32_t bits[24];
319 /* number of bytes at which to generate COMEDI_CB_BLOCK events */
320 volatile unsigned int block_size;
321 unsigned dio_config_output:1;
324 static inline struct hpdi_private *priv(struct comedi_device *dev)
329 static int dio_config_insn(struct comedi_device *dev,
330 struct comedi_subdevice *s, struct comedi_insn *insn,
334 case INSN_CONFIG_DIO_OUTPUT:
335 priv(dev)->dio_config_output = 1;
338 case INSN_CONFIG_DIO_INPUT:
339 priv(dev)->dio_config_output = 0;
342 case INSN_CONFIG_DIO_QUERY:
344 priv(dev)->dio_config_output ? COMEDI_OUTPUT : COMEDI_INPUT;
347 case INSN_CONFIG_BLOCK_SIZE:
348 return dio_config_block_size(dev, data);
357 static void disable_plx_interrupts(struct comedi_device *dev)
359 writel(0, priv(dev)->plx9080_iobase + PLX_INTRCS_REG);
362 /* initialize plx9080 chip */
363 static void init_plx9080(struct comedi_device *dev)
366 void __iomem *plx_iobase = priv(dev)->plx9080_iobase;
369 DEBUG_PRINT(" plx interrupt status 0x%x\n",
370 readl(plx_iobase + PLX_INTRCS_REG));
371 DEBUG_PRINT(" plx id bits 0x%x\n", readl(plx_iobase + PLX_ID_REG));
372 DEBUG_PRINT(" plx control reg 0x%x\n",
373 readl(priv(dev)->plx9080_iobase + PLX_CONTROL_REG));
375 DEBUG_PRINT(" plx revision 0x%x\n",
376 readl(plx_iobase + PLX_REVISION_REG));
377 DEBUG_PRINT(" plx dma channel 0 mode 0x%x\n",
378 readl(plx_iobase + PLX_DMA0_MODE_REG));
379 DEBUG_PRINT(" plx dma channel 1 mode 0x%x\n",
380 readl(plx_iobase + PLX_DMA1_MODE_REG));
381 DEBUG_PRINT(" plx dma channel 0 pci address 0x%x\n",
382 readl(plx_iobase + PLX_DMA0_PCI_ADDRESS_REG));
383 DEBUG_PRINT(" plx dma channel 0 local address 0x%x\n",
384 readl(plx_iobase + PLX_DMA0_LOCAL_ADDRESS_REG));
385 DEBUG_PRINT(" plx dma channel 0 transfer size 0x%x\n",
386 readl(plx_iobase + PLX_DMA0_TRANSFER_SIZE_REG));
387 DEBUG_PRINT(" plx dma channel 0 descriptor 0x%x\n",
388 readl(plx_iobase + PLX_DMA0_DESCRIPTOR_REG));
389 DEBUG_PRINT(" plx dma channel 0 command status 0x%x\n",
390 readb(plx_iobase + PLX_DMA0_CS_REG));
391 DEBUG_PRINT(" plx dma channel 0 threshold 0x%x\n",
392 readl(plx_iobase + PLX_DMA0_THRESHOLD_REG));
393 DEBUG_PRINT(" plx bigend 0x%x\n", readl(plx_iobase + PLX_BIGEND_REG));
395 bits = BIGEND_DMA0 | BIGEND_DMA1;
399 writel(bits, priv(dev)->plx9080_iobase + PLX_BIGEND_REG);
401 disable_plx_interrupts(dev);
406 /* configure dma0 mode */
408 /* enable ready input */
409 bits |= PLX_DMA_EN_READYIN_BIT;
410 /* enable dma chaining */
411 bits |= PLX_EN_CHAIN_BIT;
412 /* enable interrupt on dma done
413 * (probably don't need this, since chain never finishes) */
414 bits |= PLX_EN_DMA_DONE_INTR_BIT;
415 /* don't increment local address during transfers
416 * (we are transferring from a fixed fifo register) */
417 bits |= PLX_LOCAL_ADDR_CONST_BIT;
418 /* route dma interrupt to pci bus */
419 bits |= PLX_DMA_INTR_PCI_BIT;
420 /* enable demand mode */
421 bits |= PLX_DEMAND_MODE_BIT;
422 /* enable local burst mode */
423 bits |= PLX_DMA_LOCAL_BURST_EN_BIT;
424 bits |= PLX_LOCAL_BUS_32_WIDE_BITS;
425 writel(bits, plx_iobase + PLX_DMA0_MODE_REG);
428 /* Allocate and initialize the subdevice structures.
430 static int setup_subdevices(struct comedi_device *dev)
432 struct comedi_subdevice *s;
435 ret = comedi_alloc_subdevices(dev, 1);
439 s = dev->subdevices + 0;
440 /* analog input subdevice */
441 dev->read_subdev = s;
442 /* dev->write_subdev = s; */
443 s->type = COMEDI_SUBD_DIO;
445 SDF_READABLE | SDF_WRITEABLE | SDF_LSAMPL | SDF_CMD_READ;
447 s->len_chanlist = 32;
449 s->range_table = &range_digital;
450 s->insn_config = dio_config_insn;
451 s->do_cmd = hpdi_cmd;
452 s->do_cmdtest = hpdi_cmd_test;
453 s->cancel = hpdi_cancel;
458 static int init_hpdi(struct comedi_device *dev)
460 uint32_t plx_intcsr_bits;
462 writel(BOARD_RESET_BIT, priv(dev)->hpdi_iobase + BOARD_CONTROL_REG);
465 writel(almost_empty_bits(32) | almost_full_bits(32),
466 priv(dev)->hpdi_iobase + RX_PROG_ALMOST_REG);
467 writel(almost_empty_bits(32) | almost_full_bits(32),
468 priv(dev)->hpdi_iobase + TX_PROG_ALMOST_REG);
470 priv(dev)->tx_fifo_size = fifo_size(readl(priv(dev)->hpdi_iobase +
472 priv(dev)->rx_fifo_size = fifo_size(readl(priv(dev)->hpdi_iobase +
475 writel(0, priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
477 /* enable interrupts */
479 ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE |
481 writel(plx_intcsr_bits, priv(dev)->plx9080_iobase + PLX_INTRCS_REG);
486 /* setup dma descriptors so a link completes every 'transfer_size' bytes */
487 static int setup_dma_descriptors(struct comedi_device *dev,
488 unsigned int transfer_size)
490 unsigned int buffer_index, buffer_offset;
491 uint32_t next_bits = PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
492 PLX_XFER_LOCAL_TO_PCI;
495 if (transfer_size > DMA_BUFFER_SIZE)
496 transfer_size = DMA_BUFFER_SIZE;
497 transfer_size -= transfer_size % sizeof(uint32_t);
498 if (transfer_size == 0)
501 DEBUG_PRINT(" transfer_size %i\n", transfer_size);
502 DEBUG_PRINT(" descriptors at 0x%lx\n",
503 (unsigned long)priv(dev)->dma_desc_phys_addr);
507 for (i = 0; i < NUM_DMA_DESCRIPTORS &&
508 buffer_index < NUM_DMA_BUFFERS; i++) {
509 priv(dev)->dma_desc[i].pci_start_addr =
510 cpu_to_le32(priv(dev)->dio_buffer_phys_addr[buffer_index] +
512 priv(dev)->dma_desc[i].local_start_addr = cpu_to_le32(FIFO_REG);
513 priv(dev)->dma_desc[i].transfer_size =
514 cpu_to_le32(transfer_size);
515 priv(dev)->dma_desc[i].next =
516 cpu_to_le32((priv(dev)->dma_desc_phys_addr + (i +
518 sizeof(priv(dev)->dma_desc[0])) | next_bits);
520 priv(dev)->desc_dio_buffer[i] =
521 priv(dev)->dio_buffer[buffer_index] +
522 (buffer_offset / sizeof(uint32_t));
524 buffer_offset += transfer_size;
525 if (transfer_size + buffer_offset > DMA_BUFFER_SIZE) {
530 DEBUG_PRINT(" desc %i\n", i);
531 DEBUG_PRINT(" start addr virt 0x%p, phys 0x%lx\n",
532 priv(dev)->desc_dio_buffer[i],
533 (unsigned long)priv(dev)->dma_desc[i].
535 DEBUG_PRINT(" next 0x%lx\n",
536 (unsigned long)priv(dev)->dma_desc[i].next);
538 priv(dev)->num_dma_descriptors = i;
539 /* fix last descriptor to point back to first */
540 priv(dev)->dma_desc[i - 1].next =
541 cpu_to_le32(priv(dev)->dma_desc_phys_addr | next_bits);
542 DEBUG_PRINT(" desc %i next fixup 0x%lx\n", i - 1,
543 (unsigned long)priv(dev)->dma_desc[i - 1].next);
545 priv(dev)->block_size = transfer_size;
547 return transfer_size;
550 static int hpdi_attach(struct comedi_device *dev, struct comedi_devconfig *it)
552 struct pci_dev *pcidev;
556 printk(KERN_WARNING "comedi%d: gsc_hpdi\n", dev->minor);
558 if (alloc_private(dev, sizeof(struct hpdi_private)) < 0)
562 for (i = 0; i < ARRAY_SIZE(hpdi_boards) &&
563 dev->board_ptr == NULL; i++) {
565 pcidev = pci_get_subsys(PCI_VENDOR_ID_PLX,
566 hpdi_boards[i].device_id,
568 hpdi_boards[i].subdevice_id,
570 /* was a particular bus/slot requested? */
571 if (it->options[0] || it->options[1]) {
572 /* are we on the wrong bus/slot? */
573 if (pcidev->bus->number != it->options[0] ||
574 PCI_SLOT(pcidev->devfn) != it->options[1])
578 priv(dev)->hw_dev = pcidev;
579 dev->board_ptr = hpdi_boards + i;
582 } while (pcidev != NULL);
584 if (dev->board_ptr == NULL) {
585 printk(KERN_WARNING "gsc_hpdi: no hpdi card found\n");
590 "gsc_hpdi: found %s on bus %i, slot %i\n", board(dev)->name,
591 pcidev->bus->number, PCI_SLOT(pcidev->devfn));
593 if (comedi_pci_enable(pcidev, dev->driver->driver_name)) {
595 " failed enable PCI device and request regions\n");
598 pci_set_master(pcidev);
600 /* Initialize dev->board_name */
601 dev->board_name = board(dev)->name;
603 priv(dev)->plx9080_phys_iobase =
604 pci_resource_start(pcidev, PLX9080_BADDRINDEX);
605 priv(dev)->hpdi_phys_iobase =
606 pci_resource_start(pcidev, HPDI_BADDRINDEX);
608 /* remap, won't work with 2.0 kernels but who cares */
609 priv(dev)->plx9080_iobase = ioremap(priv(dev)->plx9080_phys_iobase,
610 pci_resource_len(pcidev,
611 PLX9080_BADDRINDEX));
612 priv(dev)->hpdi_iobase =
613 ioremap(priv(dev)->hpdi_phys_iobase,
614 pci_resource_len(pcidev, HPDI_BADDRINDEX));
615 if (!priv(dev)->plx9080_iobase || !priv(dev)->hpdi_iobase) {
616 printk(KERN_WARNING " failed to remap io memory\n");
620 DEBUG_PRINT(" plx9080 remapped to 0x%p\n", priv(dev)->plx9080_iobase);
621 DEBUG_PRINT(" hpdi remapped to 0x%p\n", priv(dev)->hpdi_iobase);
626 if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED,
627 dev->driver->driver_name, dev)) {
629 " unable to allocate irq %u\n", pcidev->irq);
632 dev->irq = pcidev->irq;
634 printk(KERN_WARNING " irq %u\n", dev->irq);
636 /* allocate pci dma buffers */
637 for (i = 0; i < NUM_DMA_BUFFERS; i++) {
638 priv(dev)->dio_buffer[i] =
639 pci_alloc_consistent(priv(dev)->hw_dev, DMA_BUFFER_SIZE,
640 &priv(dev)->dio_buffer_phys_addr[i]);
641 DEBUG_PRINT("dio_buffer at virt 0x%p, phys 0x%lx\n",
642 priv(dev)->dio_buffer[i],
643 (unsigned long)priv(dev)->dio_buffer_phys_addr[i]);
645 /* allocate dma descriptors */
646 priv(dev)->dma_desc = pci_alloc_consistent(priv(dev)->hw_dev,
647 sizeof(struct plx_dma_desc) *
651 if (priv(dev)->dma_desc_phys_addr & 0xf) {
653 " dma descriptors not quad-word aligned (bug)\n");
657 retval = setup_dma_descriptors(dev, 0x1000);
661 retval = setup_subdevices(dev);
665 return init_hpdi(dev);
668 static void hpdi_detach(struct comedi_device *dev)
673 free_irq(dev->irq, dev);
674 if ((priv(dev)) && (priv(dev)->hw_dev)) {
675 if (priv(dev)->plx9080_iobase) {
676 disable_plx_interrupts(dev);
677 iounmap(priv(dev)->plx9080_iobase);
679 if (priv(dev)->hpdi_iobase)
680 iounmap(priv(dev)->hpdi_iobase);
681 /* free pci dma buffers */
682 for (i = 0; i < NUM_DMA_BUFFERS; i++) {
683 if (priv(dev)->dio_buffer[i])
684 pci_free_consistent(priv(dev)->hw_dev,
689 (dev)->dio_buffer_phys_addr
692 /* free dma descriptors */
693 if (priv(dev)->dma_desc)
694 pci_free_consistent(priv(dev)->hw_dev,
695 sizeof(struct plx_dma_desc)
696 * NUM_DMA_DESCRIPTORS,
700 if (priv(dev)->hpdi_phys_iobase)
701 comedi_pci_disable(priv(dev)->hw_dev);
702 pci_dev_put(priv(dev)->hw_dev);
706 static int dio_config_block_size(struct comedi_device *dev, unsigned int *data)
708 unsigned int requested_block_size;
711 requested_block_size = data[1];
713 retval = setup_dma_descriptors(dev, requested_block_size);
722 static int di_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
723 struct comedi_cmd *cmd)
729 /* step 1: make sure trigger sources are trivially valid */
731 tmp = cmd->start_src;
732 cmd->start_src &= TRIG_NOW;
733 if (!cmd->start_src || tmp != cmd->start_src)
736 tmp = cmd->scan_begin_src;
737 cmd->scan_begin_src &= TRIG_EXT;
738 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
741 tmp = cmd->convert_src;
742 cmd->convert_src &= TRIG_NOW;
743 if (!cmd->convert_src || tmp != cmd->convert_src)
746 tmp = cmd->scan_end_src;
747 cmd->scan_end_src &= TRIG_COUNT;
748 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
752 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
753 if (!cmd->stop_src || tmp != cmd->stop_src)
759 /* step 2: make sure trigger sources are unique and mutually
762 /* uniqueness check */
763 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
769 /* step 3: make sure arguments are trivially compatible */
771 if (!cmd->chanlist_len) {
772 cmd->chanlist_len = 32;
775 if (cmd->scan_end_arg != cmd->chanlist_len) {
776 cmd->scan_end_arg = cmd->chanlist_len;
780 switch (cmd->stop_src) {
782 if (!cmd->stop_arg) {
788 if (cmd->stop_arg != 0) {
800 /* step 4: fix up any arguments */
808 for (i = 1; i < cmd->chanlist_len; i++) {
809 if (CR_CHAN(cmd->chanlist[i]) != i) {
810 /* XXX could support 8 or 16 channels */
812 "chanlist must be ch 0 to 31 in order");
824 static int hpdi_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
825 struct comedi_cmd *cmd)
827 if (priv(dev)->dio_config_output)
830 return di_cmd_test(dev, s, cmd);
833 static inline void hpdi_writel(struct comedi_device *dev, uint32_t bits,
836 writel(bits | priv(dev)->bits[offset / sizeof(uint32_t)],
837 priv(dev)->hpdi_iobase + offset);
840 static int di_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
844 struct comedi_async *async = s->async;
845 struct comedi_cmd *cmd = &async->cmd;
847 hpdi_writel(dev, RX_FIFO_RESET_BIT, BOARD_CONTROL_REG);
849 DEBUG_PRINT("hpdi: in di_cmd\n");
853 priv(dev)->dma_desc_index = 0;
855 /* These register are supposedly unused during chained dma,
856 * but I have found that left over values from last operation
857 * occasionally cause problems with transfer of first dma
858 * block. Initializing them to zero seems to fix the problem. */
859 writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_TRANSFER_SIZE_REG);
860 writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG);
861 writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_LOCAL_ADDRESS_REG);
862 /* give location of first dma descriptor */
864 priv(dev)->dma_desc_phys_addr | PLX_DESC_IN_PCI_BIT |
865 PLX_INTR_TERM_COUNT | PLX_XFER_LOCAL_TO_PCI;
866 writel(bits, priv(dev)->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG);
868 /* spinlock for plx dma control/status reg */
869 spin_lock_irqsave(&dev->spinlock, flags);
870 /* enable dma transfer */
871 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT,
872 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
873 spin_unlock_irqrestore(&dev->spinlock, flags);
875 if (cmd->stop_src == TRIG_COUNT)
876 priv(dev)->dio_count = cmd->stop_arg;
878 priv(dev)->dio_count = 1;
880 /* clear over/under run status flags */
881 writel(RX_UNDERRUN_BIT | RX_OVERRUN_BIT,
882 priv(dev)->hpdi_iobase + BOARD_STATUS_REG);
883 /* enable interrupts */
884 writel(intr_bit(RX_FULL_INTR),
885 priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
887 DEBUG_PRINT("hpdi: starting rx\n");
888 hpdi_writel(dev, RX_ENABLE_BIT, BOARD_CONTROL_REG);
893 static int hpdi_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
895 if (priv(dev)->dio_config_output)
898 return di_cmd(dev, s);
901 static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
903 struct comedi_async *async = dev->read_subdev->async;
904 uint32_t next_transfer_addr;
907 void __iomem *pci_addr_reg;
911 priv(dev)->plx9080_iobase + PLX_DMA1_PCI_ADDRESS_REG;
914 priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
916 /* loop until we have read all the full buffers */
918 for (next_transfer_addr = readl(pci_addr_reg);
919 (next_transfer_addr <
920 le32_to_cpu(priv(dev)->dma_desc[priv(dev)->dma_desc_index].
922 || next_transfer_addr >=
923 le32_to_cpu(priv(dev)->dma_desc[priv(dev)->dma_desc_index].
924 pci_start_addr) + priv(dev)->block_size)
925 && j < priv(dev)->num_dma_descriptors; j++) {
926 /* transfer data from dma buffer to comedi buffer */
927 num_samples = priv(dev)->block_size / sizeof(uint32_t);
928 if (async->cmd.stop_src == TRIG_COUNT) {
929 if (num_samples > priv(dev)->dio_count)
930 num_samples = priv(dev)->dio_count;
931 priv(dev)->dio_count -= num_samples;
933 cfc_write_array_to_buffer(dev->read_subdev,
934 priv(dev)->desc_dio_buffer[priv(dev)->
936 num_samples * sizeof(uint32_t));
937 priv(dev)->dma_desc_index++;
938 priv(dev)->dma_desc_index %= priv(dev)->num_dma_descriptors;
940 DEBUG_PRINT("next desc addr 0x%lx\n", (unsigned long)
941 priv(dev)->dma_desc[priv(dev)->dma_desc_index].
943 DEBUG_PRINT("pci addr reg 0x%x\n", next_transfer_addr);
945 /* XXX check for buffer overrun somehow */
948 static irqreturn_t handle_interrupt(int irq, void *d)
950 struct comedi_device *dev = d;
951 struct comedi_subdevice *s = dev->read_subdev;
952 struct comedi_async *async = s->async;
953 uint32_t hpdi_intr_status, hpdi_board_status;
956 uint8_t dma0_status, dma1_status;
962 plx_status = readl(priv(dev)->plx9080_iobase + PLX_INTRCS_REG);
963 if ((plx_status & (ICS_DMA0_A | ICS_DMA1_A | ICS_LIA)) == 0)
966 hpdi_intr_status = readl(priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG);
967 hpdi_board_status = readl(priv(dev)->hpdi_iobase + BOARD_STATUS_REG);
971 if (hpdi_intr_status) {
972 DEBUG_PRINT("hpdi: intr status 0x%x, ", hpdi_intr_status);
973 writel(hpdi_intr_status,
974 priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG);
976 /* spin lock makes sure no one else changes plx dma control reg */
977 spin_lock_irqsave(&dev->spinlock, flags);
978 dma0_status = readb(priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
979 if (plx_status & ICS_DMA0_A) { /* dma chan 0 interrupt */
980 writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
981 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
983 DEBUG_PRINT("dma0 status 0x%x\n", dma0_status);
984 if (dma0_status & PLX_DMA_EN_BIT)
985 drain_dma_buffers(dev, 0);
986 DEBUG_PRINT(" cleared dma ch0 interrupt\n");
988 spin_unlock_irqrestore(&dev->spinlock, flags);
990 /* spin lock makes sure no one else changes plx dma control reg */
991 spin_lock_irqsave(&dev->spinlock, flags);
992 dma1_status = readb(priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG);
993 if (plx_status & ICS_DMA1_A) { /* XXX *//* dma chan 1 interrupt */
994 writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
995 priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG);
996 DEBUG_PRINT("dma1 status 0x%x\n", dma1_status);
998 DEBUG_PRINT(" cleared dma ch1 interrupt\n");
1000 spin_unlock_irqrestore(&dev->spinlock, flags);
1002 /* clear possible plx9080 interrupt sources */
1003 if (plx_status & ICS_LDIA) { /* clear local doorbell interrupt */
1004 plx_bits = readl(priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG);
1005 writel(plx_bits, priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG);
1006 DEBUG_PRINT(" cleared local doorbell bits 0x%x\n", plx_bits);
1009 if (hpdi_board_status & RX_OVERRUN_BIT) {
1010 comedi_error(dev, "rx fifo overrun");
1011 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
1012 DEBUG_PRINT("dma0_status 0x%x\n",
1013 (int)readb(priv(dev)->plx9080_iobase +
1017 if (hpdi_board_status & RX_UNDERRUN_BIT) {
1018 comedi_error(dev, "rx fifo underrun");
1019 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
1022 if (priv(dev)->dio_count == 0)
1023 async->events |= COMEDI_CB_EOA;
1025 DEBUG_PRINT("board status 0x%x, ", hpdi_board_status);
1026 DEBUG_PRINT("plx status 0x%x\n", plx_status);
1028 DEBUG_PRINT(" events 0x%x\n", async->events);
1030 cfc_handle_events(dev, s);
1035 static void abort_dma(struct comedi_device *dev, unsigned int channel)
1037 unsigned long flags;
1039 /* spinlock for plx dma control/status reg */
1040 spin_lock_irqsave(&dev->spinlock, flags);
1042 plx9080_abort_dma(priv(dev)->plx9080_iobase, channel);
1044 spin_unlock_irqrestore(&dev->spinlock, flags);
1047 static int hpdi_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1049 hpdi_writel(dev, 0, BOARD_CONTROL_REG);
1051 writel(0, priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
1058 static struct comedi_driver gsc_hpdi_driver = {
1059 .driver_name = "gsc_hpdi",
1060 .module = THIS_MODULE,
1061 .attach = hpdi_attach,
1062 .detach = hpdi_detach,
1065 static int __devinit gsc_hpdi_pci_probe(struct pci_dev *dev,
1066 const struct pci_device_id *ent)
1068 return comedi_pci_auto_config(dev, &gsc_hpdi_driver);
1071 static void __devexit gsc_hpdi_pci_remove(struct pci_dev *dev)
1073 comedi_pci_auto_unconfig(dev);
1076 static DEFINE_PCI_DEVICE_TABLE(gsc_hpdi_pci_table) = {
1077 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9080, PCI_VENDOR_ID_PLX,
1081 MODULE_DEVICE_TABLE(pci, gsc_hpdi_pci_table);
1083 static struct pci_driver gsc_hpdi_pci_driver = {
1085 .id_table = gsc_hpdi_pci_table,
1086 .probe = gsc_hpdi_pci_probe,
1087 .remove = __devexit_p(gsc_hpdi_pci_remove)
1089 module_comedi_pci_driver(gsc_hpdi_driver, gsc_hpdi_pci_driver);
1091 MODULE_AUTHOR("Comedi http://www.comedi.org");
1092 MODULE_DESCRIPTION("Comedi low-level driver");
1093 MODULE_LICENSE("GPL");