2 comedi/drivers/multiq3.c
3 Hardware driver for Quanser Consulting MultiQ-3 board
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1999 Anders Blomdell <anders.blomdell@control.lth.se>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Description: Quanser Consulting MultiQ-3
26 Author: Anders Blomdell <anders.blomdell@control.lth.se>
28 Devices: [Quanser Consulting] MultiQ-3 (multiq3)
32 #include <linux/interrupt.h>
33 #include "../comedidev.h"
35 #include <linux/ioport.h>
37 #define MULTIQ3_SIZE 16
40 * MULTIQ-3 port offsets
42 #define MULTIQ3_DIGIN_PORT 0
43 #define MULTIQ3_DIGOUT_PORT 0
44 #define MULTIQ3_DAC_DATA 2
45 #define MULTIQ3_AD_DATA 4
46 #define MULTIQ3_AD_CS 4
47 #define MULTIQ3_STATUS 6
48 #define MULTIQ3_CONTROL 6
49 #define MULTIQ3_CLK_DATA 8
50 #define MULTIQ3_ENC_DATA 12
51 #define MULTIQ3_ENC_CONTROL 14
54 * flags for CONTROL register
56 #define MULTIQ3_AD_MUX_EN 0x0040
57 #define MULTIQ3_AD_AUTOZ 0x0080
58 #define MULTIQ3_AD_AUTOCAL 0x0100
59 #define MULTIQ3_AD_SH 0x0200
60 #define MULTIQ3_AD_CLOCK_4M 0x0400
61 #define MULTIQ3_DA_LOAD 0x1800
63 #define MULTIQ3_CONTROL_MUST 0x0600
66 * flags for STATUS register
68 #define MULTIQ3_STATUS_EOC 0x008
69 #define MULTIQ3_STATUS_EOC_I 0x010
72 * flags for encoder control
74 #define MULTIQ3_CLOCK_DATA 0x00
75 #define MULTIQ3_CLOCK_SETUP 0x18
76 #define MULTIQ3_INPUT_SETUP 0x41
77 #define MULTIQ3_QUAD_X4 0x38
78 #define MULTIQ3_BP_RESET 0x01
79 #define MULTIQ3_CNTR_RESET 0x02
80 #define MULTIQ3_TRSFRPR_CTR 0x08
81 #define MULTIQ3_TRSFRCNTR_OL 0x10
82 #define MULTIQ3_EFLAG_RESET 0x06
84 #define MULTIQ3_TIMEOUT 30
86 struct multiq3_private {
87 unsigned int ao_readback[2];
90 static int multiq3_ai_insn_read(struct comedi_device *dev,
91 struct comedi_subdevice *s,
92 struct comedi_insn *insn, unsigned int *data)
98 chan = CR_CHAN(insn->chanspec);
99 outw(MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3),
100 dev->iobase + MULTIQ3_CONTROL);
102 for (i = 0; i < MULTIQ3_TIMEOUT; i++) {
103 if (inw(dev->iobase + MULTIQ3_STATUS) & MULTIQ3_STATUS_EOC)
106 if (i == MULTIQ3_TIMEOUT)
109 for (n = 0; n < insn->n; n++) {
110 outw(0, dev->iobase + MULTIQ3_AD_CS);
111 for (i = 0; i < MULTIQ3_TIMEOUT; i++) {
112 if (inw(dev->iobase +
113 MULTIQ3_STATUS) & MULTIQ3_STATUS_EOC_I)
116 if (i == MULTIQ3_TIMEOUT)
119 hi = inb(dev->iobase + MULTIQ3_AD_CS);
120 lo = inb(dev->iobase + MULTIQ3_AD_CS);
121 data[n] = (((hi << 8) | lo) + 0x1000) & 0x1fff;
127 static int multiq3_ao_insn_read(struct comedi_device *dev,
128 struct comedi_subdevice *s,
129 struct comedi_insn *insn, unsigned int *data)
131 struct multiq3_private *devpriv = dev->private;
133 int chan = CR_CHAN(insn->chanspec);
135 for (i = 0; i < insn->n; i++)
136 data[i] = devpriv->ao_readback[chan];
141 static int multiq3_ao_insn_write(struct comedi_device *dev,
142 struct comedi_subdevice *s,
143 struct comedi_insn *insn, unsigned int *data)
145 struct multiq3_private *devpriv = dev->private;
147 int chan = CR_CHAN(insn->chanspec);
149 for (i = 0; i < insn->n; i++) {
150 outw(MULTIQ3_CONTROL_MUST | MULTIQ3_DA_LOAD | chan,
151 dev->iobase + MULTIQ3_CONTROL);
152 outw(data[i], dev->iobase + MULTIQ3_DAC_DATA);
153 outw(MULTIQ3_CONTROL_MUST, dev->iobase + MULTIQ3_CONTROL);
155 devpriv->ao_readback[chan] = data[i];
161 static int multiq3_di_insn_bits(struct comedi_device *dev,
162 struct comedi_subdevice *s,
163 struct comedi_insn *insn, unsigned int *data)
165 data[1] = inw(dev->iobase + MULTIQ3_DIGIN_PORT);
170 static int multiq3_do_insn_bits(struct comedi_device *dev,
171 struct comedi_subdevice *s,
172 struct comedi_insn *insn, unsigned int *data)
174 s->state &= ~data[0];
175 s->state |= (data[0] & data[1]);
176 outw(s->state, dev->iobase + MULTIQ3_DIGOUT_PORT);
183 static int multiq3_encoder_insn_read(struct comedi_device *dev,
184 struct comedi_subdevice *s,
185 struct comedi_insn *insn,
189 int chan = CR_CHAN(insn->chanspec);
190 int control = MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3);
192 for (n = 0; n < insn->n; n++) {
194 outw(control, dev->iobase + MULTIQ3_CONTROL);
195 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CONTROL);
196 outb(MULTIQ3_TRSFRCNTR_OL, dev->iobase + MULTIQ3_ENC_CONTROL);
197 value = inb(dev->iobase + MULTIQ3_ENC_DATA);
198 value |= (inb(dev->iobase + MULTIQ3_ENC_DATA) << 8);
199 value |= (inb(dev->iobase + MULTIQ3_ENC_DATA) << 16);
200 data[n] = (value + 0x800000) & 0xffffff;
206 static void encoder_reset(struct comedi_device *dev)
208 struct comedi_subdevice *s = &dev->subdevices[4];
211 for (chan = 0; chan < s->n_chan; chan++) {
213 MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3);
214 outw(control, dev->iobase + MULTIQ3_CONTROL);
215 outb(MULTIQ3_EFLAG_RESET, dev->iobase + MULTIQ3_ENC_CONTROL);
216 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CONTROL);
217 outb(MULTIQ3_CLOCK_DATA, dev->iobase + MULTIQ3_ENC_DATA);
218 outb(MULTIQ3_CLOCK_SETUP, dev->iobase + MULTIQ3_ENC_CONTROL);
219 outb(MULTIQ3_INPUT_SETUP, dev->iobase + MULTIQ3_ENC_CONTROL);
220 outb(MULTIQ3_QUAD_X4, dev->iobase + MULTIQ3_ENC_CONTROL);
221 outb(MULTIQ3_CNTR_RESET, dev->iobase + MULTIQ3_ENC_CONTROL);
226 options[0] - I/O port
228 options[2] - number of encoder chips installed
231 static int multiq3_attach(struct comedi_device *dev,
232 struct comedi_devconfig *it)
234 struct multiq3_private *devpriv;
236 unsigned long iobase;
238 struct comedi_subdevice *s;
240 iobase = it->options[0];
241 printk(KERN_INFO "comedi%d: multiq3: 0x%04lx ", dev->minor, iobase);
242 if (!request_region(iobase, MULTIQ3_SIZE, "multiq3")) {
243 printk(KERN_ERR "comedi%d: I/O port conflict\n", dev->minor);
247 dev->iobase = iobase;
249 irq = it->options[1];
251 printk(KERN_WARNING "comedi%d: irq = %u ignored\n",
254 printk(KERN_WARNING "comedi%d: no irq\n", dev->minor);
255 dev->board_name = "multiq3";
257 result = comedi_alloc_subdevices(dev, 5);
261 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
264 dev->private = devpriv;
266 s = &dev->subdevices[0];
268 s->type = COMEDI_SUBD_AI;
269 s->subdev_flags = SDF_READABLE | SDF_GROUND;
271 s->insn_read = multiq3_ai_insn_read;
273 s->range_table = &range_bipolar5;
275 s = &dev->subdevices[1];
277 s->type = COMEDI_SUBD_AO;
278 s->subdev_flags = SDF_WRITABLE;
280 s->insn_read = multiq3_ao_insn_read;
281 s->insn_write = multiq3_ao_insn_write;
283 s->range_table = &range_bipolar5;
285 s = &dev->subdevices[2];
287 s->type = COMEDI_SUBD_DI;
288 s->subdev_flags = SDF_READABLE;
290 s->insn_bits = multiq3_di_insn_bits;
292 s->range_table = &range_digital;
294 s = &dev->subdevices[3];
296 s->type = COMEDI_SUBD_DO;
297 s->subdev_flags = SDF_WRITABLE;
299 s->insn_bits = multiq3_do_insn_bits;
301 s->range_table = &range_digital;
304 s = &dev->subdevices[4];
305 /* encoder (counter) subdevice */
306 s->type = COMEDI_SUBD_COUNTER;
307 s->subdev_flags = SDF_READABLE | SDF_LSAMPL;
308 s->n_chan = it->options[2] * 2;
309 s->insn_read = multiq3_encoder_insn_read;
310 s->maxdata = 0xffffff;
311 s->range_table = &range_unknown;
318 static void multiq3_detach(struct comedi_device *dev)
321 release_region(dev->iobase, MULTIQ3_SIZE);
323 free_irq(dev->irq, dev);
326 static struct comedi_driver multiq3_driver = {
327 .driver_name = "multiq3",
328 .module = THIS_MODULE,
329 .attach = multiq3_attach,
330 .detach = multiq3_detach,
332 module_comedi_driver(multiq3_driver);
334 MODULE_AUTHOR("Comedi http://www.comedi.org");
335 MODULE_DESCRIPTION("Comedi low-level driver");
336 MODULE_LICENSE("GPL");