2 * comedi/drivers/ni_labpc.c
3 * Driver for National Instruments Lab-PC series boards and compatibles
4 * Copyright (C) 2001-2003 Frank Mori Hess <fmhess@users.sourceforge.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
19 * Description: National Instruments Lab-PC (& compatibles)
20 * Devices: (National Instruments) Lab-PC-1200 [lab-pc-1200]
21 * (National Instruments) Lab-PC-1200AI [lab-pc-1200ai]
22 * (National Instruments) Lab-PC+ [lab-pc+]
23 * Author: Frank Mori Hess <fmhess@users.sourceforge.net>
26 * Configuration options - ISA boards:
27 * [0] - I/O port base address
28 * [1] - IRQ (optional, required for timed or externally triggered
30 * [2] - DMA channel (optional)
32 * Tested with lab-pc-1200. For the older Lab-PC+, not all input
33 * ranges and analog references will work, the available ranges/arefs
34 * will depend on how you have configured the jumpers on your board
35 * (see your owner's manual).
37 * Kernel-level ISA plug-and-play support for the lab-pc-1200 boards
38 * has not yet been added to the driver, mainly due to the fact that
39 * I don't know the device id numbers. If you have one of these boards,
40 * please file a bug report at http://comedi.org/ so I can get the
41 * necessary information from you.
43 * The 1200 series boards have onboard calibration dacs for correcting
44 * analog input/output offsets and gains. The proper settings for these
45 * caldacs are stored on the board's eeprom. To read the caldac values
46 * from the eeprom and store them into a file that can be then be used
47 * by comedilib, use the comedi_calibrate program.
49 * The Lab-pc+ has quirky chanlist requirements when scanning multiple
50 * channels. Multiple channel scan sequence must start at highest channel,
51 * then decrement down to channel 0. The rest of the cards can scan down
52 * like lab-pc+ or scan up from channel zero. Chanlists consisting of all
53 * one channel are also legal, and allow you to pace conversions in bursts.
56 * 341309a (labpc-1200 register manual)
60 #include <linux/module.h>
61 #include <linux/interrupt.h>
62 #include <linux/slab.h>
64 #include <linux/delay.h>
66 #include "../comedidev.h"
70 #include "comedi_fc.h"
72 #include "ni_labpc_regs.h"
73 #include "ni_labpc_isadma.h"
75 #define LABPC_SIZE 0x20 /* size of ISA io region */
76 #define LABPC_TIMER_BASE 500 /* 2 MHz master clock */
77 #define LABPC_ADC_TIMEOUT 1000
81 MODE_SINGLE_CHAN_INTERVAL,
86 static const struct comedi_lrange range_labpc_plus_ai = {
107 static const struct comedi_lrange range_labpc_1200_ai = {
126 static const struct comedi_lrange range_labpc_ao = {
133 /* functions that do inb/outb and readb/writeb so we can use
134 * function pointers to decide which to use */
135 static inline unsigned int labpc_inb(unsigned long address)
140 static inline void labpc_outb(unsigned int byte, unsigned long address)
145 static inline unsigned int labpc_readb(unsigned long address)
147 return readb((void __iomem *)address);
150 static inline void labpc_writeb(unsigned int byte, unsigned long address)
152 writeb(byte, (void __iomem *)address);
155 #if IS_ENABLED(CONFIG_COMEDI_NI_LABPC_ISA)
156 static const struct labpc_boardinfo labpc_boards[] = {
158 .name = "lab-pc-1200",
164 .name = "lab-pc-1200ai",
176 static int labpc_counter_load(struct comedi_device *dev,
177 unsigned long base_address,
178 unsigned int counter_number,
179 unsigned int count, unsigned int mode)
181 const struct labpc_boardinfo *board = comedi_board(dev);
184 return i8254_mm_load((void __iomem *)base_address, 0,
185 counter_number, count, mode);
187 return i8254_load(base_address, 0, counter_number, count, mode);
190 static int labpc_counter_set_mode(struct comedi_device *dev,
191 unsigned long base_address,
192 unsigned int counter_number,
195 const struct labpc_boardinfo *board = comedi_board(dev);
198 return i8254_mm_set_mode((void __iomem *)base_address, 0,
199 counter_number, mode);
201 return i8254_set_mode(base_address, 0, counter_number, mode);
204 static bool labpc_range_is_unipolar(struct comedi_subdevice *s,
207 return s->range_table->range[range].min >= 0;
210 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
212 struct labpc_private *devpriv = dev->private;
215 spin_lock_irqsave(&dev->spinlock, flags);
216 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
217 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
218 spin_unlock_irqrestore(&dev->spinlock, flags);
221 devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
226 static void labpc_ai_set_chan_and_gain(struct comedi_device *dev,
232 const struct labpc_boardinfo *board = comedi_board(dev);
233 struct labpc_private *devpriv = dev->private;
235 if (board->is_labpc1200) {
237 * The LabPC-1200 boards do not have a gain
238 * of '0x10'. Skip the range values that would
239 * result in this gain.
241 range += (range > 0) + (range > 7);
244 /* munge channel bits for differential/scan disabled mode */
245 if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
248 devpriv->cmd1 = CMD1_MA(chan);
249 devpriv->cmd1 |= CMD1_GAIN(range);
251 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
254 static void labpc_setup_cmd6_reg(struct comedi_device *dev,
255 struct comedi_subdevice *s,
257 enum transfer_type xfer,
262 const struct labpc_boardinfo *board = comedi_board(dev);
263 struct labpc_private *devpriv = dev->private;
265 if (!board->is_labpc1200)
268 /* reference inputs to ground or common? */
269 if (aref != AREF_GROUND)
270 devpriv->cmd6 |= CMD6_NRSE;
272 devpriv->cmd6 &= ~CMD6_NRSE;
274 /* bipolar or unipolar range? */
275 if (labpc_range_is_unipolar(s, range))
276 devpriv->cmd6 |= CMD6_ADCUNI;
278 devpriv->cmd6 &= ~CMD6_ADCUNI;
280 /* interrupt on fifo half full? */
281 if (xfer == fifo_half_full_transfer)
282 devpriv->cmd6 |= CMD6_HFINTEN;
284 devpriv->cmd6 &= ~CMD6_HFINTEN;
286 /* enable interrupt on counter a1 terminal count? */
288 devpriv->cmd6 |= CMD6_DQINTEN;
290 devpriv->cmd6 &= ~CMD6_DQINTEN;
292 /* are we scanning up or down through channels? */
293 if (mode == MODE_MULT_CHAN_UP)
294 devpriv->cmd6 |= CMD6_SCANUP;
296 devpriv->cmd6 &= ~CMD6_SCANUP;
298 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
301 static unsigned int labpc_read_adc_fifo(struct comedi_device *dev)
303 struct labpc_private *devpriv = dev->private;
304 unsigned int lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
305 unsigned int msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
307 return (msb << 8) | lsb;
310 static void labpc_clear_adc_fifo(struct comedi_device *dev)
312 struct labpc_private *devpriv = dev->private;
314 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
315 labpc_read_adc_fifo(dev);
318 static int labpc_ai_wait_for_data(struct comedi_device *dev,
321 struct labpc_private *devpriv = dev->private;
324 for (i = 0; i < timeout; i++) {
325 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
326 if (devpriv->stat1 & STAT1_DAVAIL)
333 static int labpc_ai_insn_read(struct comedi_device *dev,
334 struct comedi_subdevice *s,
335 struct comedi_insn *insn,
338 struct labpc_private *devpriv = dev->private;
339 unsigned int chan = CR_CHAN(insn->chanspec);
340 unsigned int range = CR_RANGE(insn->chanspec);
341 unsigned int aref = CR_AREF(insn->chanspec);
345 /* disable timed conversions, interrupt generation and dma */
346 labpc_cancel(dev, s);
348 labpc_ai_set_chan_and_gain(dev, MODE_SINGLE_CHAN, chan, range, aref);
350 labpc_setup_cmd6_reg(dev, s, MODE_SINGLE_CHAN, fifo_not_empty_transfer,
353 /* setup cmd4 register */
355 devpriv->cmd4 |= CMD4_ECLKRCV;
356 /* single-ended/differential */
357 if (aref == AREF_DIFF)
358 devpriv->cmd4 |= CMD4_SEDIFF;
359 devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
361 /* initialize pacer counter to prevent any problems */
362 ret = labpc_counter_set_mode(dev, dev->iobase + COUNTER_A_BASE_REG,
367 labpc_clear_adc_fifo(dev);
369 for (i = 0; i < insn->n; i++) {
370 /* trigger conversion */
371 devpriv->write_byte(0x1, dev->iobase + ADC_START_CONVERT_REG);
373 ret = labpc_ai_wait_for_data(dev, LABPC_ADC_TIMEOUT);
377 data[i] = labpc_read_adc_fifo(dev);
383 static bool labpc_use_continuous_mode(const struct comedi_cmd *cmd,
386 if (mode == MODE_SINGLE_CHAN || cmd->scan_begin_src == TRIG_FOLLOW)
392 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
395 if (cmd->convert_src != TRIG_TIMER)
398 if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
399 return cmd->scan_begin_arg;
401 return cmd->convert_arg;
404 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
405 enum scan_mode mode, unsigned int ns)
407 if (cmd->convert_src != TRIG_TIMER)
410 if (mode == MODE_SINGLE_CHAN &&
411 cmd->scan_begin_src == TRIG_TIMER) {
412 cmd->scan_begin_arg = ns;
413 if (cmd->convert_arg > cmd->scan_begin_arg)
414 cmd->convert_arg = cmd->scan_begin_arg;
416 cmd->convert_arg = ns;
419 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
422 if (cmd->scan_begin_src != TRIG_TIMER)
425 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
428 return cmd->scan_begin_arg;
431 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
432 enum scan_mode mode, unsigned int ns)
434 if (cmd->scan_begin_src != TRIG_TIMER)
437 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
440 cmd->scan_begin_arg = ns;
443 /* figures out what counter values to use based on command */
444 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
447 struct labpc_private *devpriv = dev->private;
448 /* max value for 16 bit counter in mode 2 */
449 const int max_counter_value = 0x10000;
450 /* min value for 16 bit counter in mode 2 */
451 const int min_counter_value = 2;
452 unsigned int base_period;
453 unsigned int scan_period;
454 unsigned int convert_period;
457 * if both convert and scan triggers are TRIG_TIMER, then they
458 * both rely on counter b0
460 convert_period = labpc_ai_convert_period(cmd, mode);
461 scan_period = labpc_ai_scan_period(cmd, mode);
462 if (convert_period && scan_period) {
464 * pick the lowest b0 divisor value we can (for maximum input
465 * clock speed on convert and scan counters)
467 devpriv->divisor_b0 = (scan_period - 1) /
468 (LABPC_TIMER_BASE * max_counter_value) + 1;
469 if (devpriv->divisor_b0 < min_counter_value)
470 devpriv->divisor_b0 = min_counter_value;
471 if (devpriv->divisor_b0 > max_counter_value)
472 devpriv->divisor_b0 = max_counter_value;
474 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
476 /* set a0 for conversion frequency and b1 for scan frequency */
477 switch (cmd->flags & TRIG_ROUND_MASK) {
479 case TRIG_ROUND_NEAREST:
480 devpriv->divisor_a0 =
481 (convert_period + (base_period / 2)) / base_period;
482 devpriv->divisor_b1 =
483 (scan_period + (base_period / 2)) / base_period;
486 devpriv->divisor_a0 =
487 (convert_period + (base_period - 1)) / base_period;
488 devpriv->divisor_b1 =
489 (scan_period + (base_period - 1)) / base_period;
491 case TRIG_ROUND_DOWN:
492 devpriv->divisor_a0 = convert_period / base_period;
493 devpriv->divisor_b1 = scan_period / base_period;
496 /* make sure a0 and b1 values are acceptable */
497 if (devpriv->divisor_a0 < min_counter_value)
498 devpriv->divisor_a0 = min_counter_value;
499 if (devpriv->divisor_a0 > max_counter_value)
500 devpriv->divisor_a0 = max_counter_value;
501 if (devpriv->divisor_b1 < min_counter_value)
502 devpriv->divisor_b1 = min_counter_value;
503 if (devpriv->divisor_b1 > max_counter_value)
504 devpriv->divisor_b1 = max_counter_value;
505 /* write corrected timings to command */
506 labpc_set_ai_convert_period(cmd, mode,
507 base_period * devpriv->divisor_a0);
508 labpc_set_ai_scan_period(cmd, mode,
509 base_period * devpriv->divisor_b1);
511 * if only one TRIG_TIMER is used, we can employ the generic
512 * cascaded timing functions
514 } else if (scan_period) {
516 * calculate cascaded counter values
517 * that give desired scan timing
519 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
520 &(devpriv->divisor_b1),
521 &(devpriv->divisor_b0),
523 cmd->flags & TRIG_ROUND_MASK);
524 labpc_set_ai_scan_period(cmd, mode, scan_period);
525 } else if (convert_period) {
527 * calculate cascaded counter values
528 * that give desired conversion timing
530 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
531 &(devpriv->divisor_a0),
532 &(devpriv->divisor_b0),
534 cmd->flags & TRIG_ROUND_MASK);
535 labpc_set_ai_convert_period(cmd, mode, convert_period);
539 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
541 if (cmd->chanlist_len == 1)
542 return MODE_SINGLE_CHAN;
544 /* chanlist may be NULL during cmdtest. */
545 if (cmd->chanlist == NULL)
546 return MODE_MULT_CHAN_UP;
548 if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
549 return MODE_SINGLE_CHAN_INTERVAL;
551 if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
552 return MODE_MULT_CHAN_UP;
554 if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
555 return MODE_MULT_CHAN_DOWN;
557 pr_err("ni_labpc: bug! cannot determine AI scan mode\n");
561 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
562 const struct comedi_cmd *cmd,
565 int channel, range, aref, i;
567 if (cmd->chanlist == NULL)
570 if (mode == MODE_SINGLE_CHAN)
573 if (mode == MODE_SINGLE_CHAN_INTERVAL) {
574 if (cmd->chanlist_len > 0xff) {
576 "ni_labpc: chanlist too long for single channel interval mode\n");
581 channel = CR_CHAN(cmd->chanlist[0]);
582 range = CR_RANGE(cmd->chanlist[0]);
583 aref = CR_AREF(cmd->chanlist[0]);
585 for (i = 0; i < cmd->chanlist_len; i++) {
588 case MODE_SINGLE_CHAN_INTERVAL:
589 if (CR_CHAN(cmd->chanlist[i]) != channel) {
591 "channel scanning order specified in chanlist is not supported by hardware.\n");
595 case MODE_MULT_CHAN_UP:
596 if (CR_CHAN(cmd->chanlist[i]) != i) {
598 "channel scanning order specified in chanlist is not supported by hardware.\n");
602 case MODE_MULT_CHAN_DOWN:
603 if (CR_CHAN(cmd->chanlist[i]) !=
604 cmd->chanlist_len - i - 1) {
606 "channel scanning order specified in chanlist is not supported by hardware.\n");
611 dev_err(dev->class_dev,
612 "ni_labpc: bug! in chanlist check\n");
617 if (CR_RANGE(cmd->chanlist[i]) != range) {
619 "entries in chanlist must all have the same range\n");
623 if (CR_AREF(cmd->chanlist[i]) != aref) {
625 "entries in chanlist must all have the same reference\n");
633 static int labpc_ai_cmdtest(struct comedi_device *dev,
634 struct comedi_subdevice *s, struct comedi_cmd *cmd)
636 const struct labpc_boardinfo *board = comedi_board(dev);
639 unsigned int stop_mask;
642 /* Step 1 : check if triggers are trivially valid */
644 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
645 err |= cfc_check_trigger_src(&cmd->scan_begin_src,
646 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
647 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
648 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
650 stop_mask = TRIG_COUNT | TRIG_NONE;
651 if (board->is_labpc1200)
652 stop_mask |= TRIG_EXT;
653 err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
658 /* Step 2a : make sure trigger sources are unique */
660 err |= cfc_check_trigger_is_unique(cmd->start_src);
661 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
662 err |= cfc_check_trigger_is_unique(cmd->convert_src);
663 err |= cfc_check_trigger_is_unique(cmd->stop_src);
665 /* Step 2b : and mutually compatible */
667 /* can't have external stop and start triggers at once */
668 if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
674 /* Step 3: check if arguments are trivially valid */
676 if (cmd->start_arg == TRIG_NOW)
677 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
679 if (!cmd->chanlist_len)
681 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
683 if (cmd->convert_src == TRIG_TIMER)
684 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
687 /* make sure scan timing is not too fast */
688 if (cmd->scan_begin_src == TRIG_TIMER) {
689 if (cmd->convert_src == TRIG_TIMER)
690 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
691 cmd->convert_arg * cmd->chanlist_len);
692 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
693 board->ai_speed * cmd->chanlist_len);
696 switch (cmd->stop_src) {
698 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
701 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
704 * TRIG_EXT doesn't care since it doesn't
705 * trigger off a numbered channel
714 /* step 4: fix up any arguments */
716 tmp = cmd->convert_arg;
717 tmp2 = cmd->scan_begin_arg;
718 mode = labpc_ai_scan_mode(cmd);
719 labpc_adc_timing(dev, cmd, mode);
720 if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
726 if (labpc_ai_chanlist_invalid(dev, cmd, mode))
732 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
734 const struct labpc_boardinfo *board = comedi_board(dev);
735 struct labpc_private *devpriv = dev->private;
736 struct comedi_async *async = s->async;
737 struct comedi_cmd *cmd = &async->cmd;
738 enum scan_mode mode = labpc_ai_scan_mode(cmd);
739 unsigned int chanspec = (mode == MODE_MULT_CHAN_UP)
740 ? cmd->chanlist[cmd->chanlist_len - 1]
742 unsigned int chan = CR_CHAN(chanspec);
743 unsigned int range = CR_RANGE(chanspec);
744 unsigned int aref = CR_AREF(chanspec);
745 enum transfer_type xfer;
749 /* make sure board is disabled before setting up acquisition */
750 labpc_cancel(dev, s);
752 /* initialize software conversion count */
753 if (cmd->stop_src == TRIG_COUNT)
754 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
756 /* setup hardware conversion counter */
757 if (cmd->stop_src == TRIG_EXT) {
759 * load counter a1 with count of 3
760 * (pc+ manual says this is minimum allowed) using mode 0
762 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
765 /* just put counter a1 in mode 0 to set its output low */
766 ret = labpc_counter_set_mode(dev,
767 dev->iobase + COUNTER_A_BASE_REG,
771 comedi_error(dev, "error loading counter a1");
775 /* figure out what method we will use to transfer data */
776 if (labpc_have_dma_chan(dev) &&
777 /* dma unsafe at RT priority,
778 * and too much setup time for TRIG_WAKE_EOS */
779 (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0)
780 xfer = isa_dma_transfer;
781 else if (/* pc-plus has no fifo-half full interrupt */
782 board->is_labpc1200 &&
783 /* wake-end-of-scan should interrupt on fifo not empty */
784 (cmd->flags & TRIG_WAKE_EOS) == 0 &&
785 /* make sure we are taking more than just a few points */
786 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256))
787 xfer = fifo_half_full_transfer;
789 xfer = fifo_not_empty_transfer;
790 devpriv->current_transfer = xfer;
792 labpc_ai_set_chan_and_gain(dev, mode, chan, range, aref);
794 labpc_setup_cmd6_reg(dev, s, mode, xfer, range, aref,
795 (cmd->stop_src == TRIG_EXT));
797 /* manual says to set scan enable bit on second pass */
798 if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
799 devpriv->cmd1 |= CMD1_SCANEN;
800 /* need a brief delay before enabling scan, or scan
801 * list will get screwed when you switch
802 * between scan up to scan down mode - dunno why */
804 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
807 devpriv->write_byte(cmd->chanlist_len,
808 dev->iobase + INTERVAL_COUNT_REG);
810 devpriv->write_byte(0x1, dev->iobase + INTERVAL_STROBE_REG);
812 if (cmd->convert_src == TRIG_TIMER ||
813 cmd->scan_begin_src == TRIG_TIMER) {
815 labpc_adc_timing(dev, cmd, mode);
816 /* load counter b0 in mode 3 */
817 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
818 0, devpriv->divisor_b0, I8254_MODE3);
820 comedi_error(dev, "error loading counter b0");
824 /* set up conversion pacing */
825 if (labpc_ai_convert_period(cmd, mode)) {
826 /* load counter a0 in mode 2 */
827 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
828 0, devpriv->divisor_a0, I8254_MODE2);
830 /* initialize pacer counter to prevent any problems */
831 ret = labpc_counter_set_mode(dev,
832 dev->iobase + COUNTER_A_BASE_REG,
836 comedi_error(dev, "error loading counter a0");
840 /* set up scan pacing */
841 if (labpc_ai_scan_period(cmd, mode)) {
842 /* load counter b1 in mode 2 */
843 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
844 1, devpriv->divisor_b1, I8254_MODE2);
846 comedi_error(dev, "error loading counter b1");
851 labpc_clear_adc_fifo(dev);
853 if (xfer == isa_dma_transfer)
854 labpc_setup_dma(dev, s);
856 /* enable error interrupts */
857 devpriv->cmd3 |= CMD3_ERRINTEN;
858 /* enable fifo not empty interrupt? */
859 if (xfer == fifo_not_empty_transfer)
860 devpriv->cmd3 |= CMD3_FIFOINTEN;
861 devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
863 /* setup any external triggering/pacing (cmd4 register) */
865 if (cmd->convert_src != TRIG_EXT)
866 devpriv->cmd4 |= CMD4_ECLKRCV;
867 /* XXX should discard first scan when using interval scanning
868 * since manual says it is not synced with scan clock */
869 if (!labpc_use_continuous_mode(cmd, mode)) {
870 devpriv->cmd4 |= CMD4_INTSCAN;
871 if (cmd->scan_begin_src == TRIG_EXT)
872 devpriv->cmd4 |= CMD4_EOIRCV;
874 /* single-ended/differential */
875 if (aref == AREF_DIFF)
876 devpriv->cmd4 |= CMD4_SEDIFF;
877 devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
879 /* startup acquisition */
881 spin_lock_irqsave(&dev->spinlock, flags);
883 /* use 2 cascaded counters for pacing */
884 devpriv->cmd2 |= CMD2_TBSEL;
886 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
887 if (cmd->start_src == TRIG_EXT)
888 devpriv->cmd2 |= CMD2_HWTRIG;
890 devpriv->cmd2 |= CMD2_SWTRIG;
891 if (cmd->stop_src == TRIG_EXT)
892 devpriv->cmd2 |= (CMD2_HWTRIG | CMD2_PRETRIG);
894 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
896 spin_unlock_irqrestore(&dev->spinlock, flags);
901 /* read all available samples from ai fifo */
902 static int labpc_drain_fifo(struct comedi_device *dev)
904 struct labpc_private *devpriv = dev->private;
906 struct comedi_async *async = dev->read_subdev->async;
907 const int timeout = 10000;
910 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
912 for (i = 0; (devpriv->stat1 & STAT1_DAVAIL) && i < timeout;
914 /* quit if we have all the data we want */
915 if (async->cmd.stop_src == TRIG_COUNT) {
916 if (devpriv->count == 0)
920 data = labpc_read_adc_fifo(dev);
921 cfc_write_to_buffer(dev->read_subdev, data);
922 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
925 comedi_error(dev, "ai timeout, fifo never empties");
926 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
933 /* makes sure all data acquired by board is transferred to comedi (used
934 * when acquisition is terminated by stop_src == TRIG_EXT). */
935 static void labpc_drain_dregs(struct comedi_device *dev)
937 struct labpc_private *devpriv = dev->private;
939 if (devpriv->current_transfer == isa_dma_transfer)
940 labpc_drain_dma(dev);
942 labpc_drain_fifo(dev);
945 /* interrupt service routine */
946 static irqreturn_t labpc_interrupt(int irq, void *d)
948 struct comedi_device *dev = d;
949 const struct labpc_boardinfo *board = comedi_board(dev);
950 struct labpc_private *devpriv = dev->private;
951 struct comedi_subdevice *s = dev->read_subdev;
952 struct comedi_async *async;
953 struct comedi_cmd *cmd;
955 if (!dev->attached) {
956 comedi_error(dev, "premature interrupt");
964 /* read board status */
965 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
966 if (board->is_labpc1200)
967 devpriv->stat2 = devpriv->read_byte(dev->iobase + STAT2_REG);
969 if ((devpriv->stat1 & (STAT1_GATA0 | STAT1_CNTINT | STAT1_OVERFLOW |
970 STAT1_OVERRUN | STAT1_DAVAIL)) == 0
971 && (devpriv->stat2 & STAT2_OUTA1) == 0
972 && (devpriv->stat2 & STAT2_FIFONHF)) {
976 if (devpriv->stat1 & STAT1_OVERRUN) {
977 /* clear error interrupt */
978 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
979 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
980 comedi_event(dev, s);
981 comedi_error(dev, "overrun");
985 if (devpriv->current_transfer == isa_dma_transfer)
986 labpc_handle_dma_status(dev);
988 labpc_drain_fifo(dev);
990 if (devpriv->stat1 & STAT1_CNTINT) {
991 comedi_error(dev, "handled timer interrupt?");
993 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
996 if (devpriv->stat1 & STAT1_OVERFLOW) {
997 /* clear error interrupt */
998 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
999 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1000 comedi_event(dev, s);
1001 comedi_error(dev, "overflow");
1004 /* handle external stop trigger */
1005 if (cmd->stop_src == TRIG_EXT) {
1006 if (devpriv->stat2 & STAT2_OUTA1) {
1007 labpc_drain_dregs(dev);
1008 labpc_cancel(dev, s);
1009 async->events |= COMEDI_CB_EOA;
1013 /* TRIG_COUNT end of acquisition */
1014 if (cmd->stop_src == TRIG_COUNT) {
1015 if (devpriv->count == 0) {
1016 labpc_cancel(dev, s);
1017 async->events |= COMEDI_CB_EOA;
1021 comedi_event(dev, s);
1025 static int labpc_ao_insn_write(struct comedi_device *dev,
1026 struct comedi_subdevice *s,
1027 struct comedi_insn *insn,
1030 const struct labpc_boardinfo *board = comedi_board(dev);
1031 struct labpc_private *devpriv = dev->private;
1033 unsigned long flags;
1036 channel = CR_CHAN(insn->chanspec);
1038 /* turn off pacing of analog output channel */
1039 /* note: hardware bug in daqcard-1200 means pacing cannot
1040 * be independently enabled/disabled for its the two channels */
1041 spin_lock_irqsave(&dev->spinlock, flags);
1042 devpriv->cmd2 &= ~CMD2_LDAC(channel);
1043 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1044 spin_unlock_irqrestore(&dev->spinlock, flags);
1047 if (board->is_labpc1200) {
1048 range = CR_RANGE(insn->chanspec);
1049 if (labpc_range_is_unipolar(s, range))
1050 devpriv->cmd6 |= CMD6_DACUNI(channel);
1052 devpriv->cmd6 &= ~CMD6_DACUNI(channel);
1053 /* write to register */
1054 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
1057 lsb = data[0] & 0xff;
1058 msb = (data[0] >> 8) & 0xff;
1059 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1060 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1062 /* remember value for readback */
1063 devpriv->ao_value[channel] = data[0];
1068 static int labpc_ao_insn_read(struct comedi_device *dev,
1069 struct comedi_subdevice *s,
1070 struct comedi_insn *insn,
1073 struct labpc_private *devpriv = dev->private;
1075 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1080 static int labpc_8255_mmio(int dir, int port, int data, unsigned long iobase)
1083 writeb(data, (void __iomem *)(iobase + port));
1086 return readb((void __iomem *)(iobase + port));
1090 /* lowlevel write to eeprom/dac */
1091 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1092 unsigned int value_width)
1094 struct labpc_private *devpriv = dev->private;
1097 for (i = 1; i <= value_width; i++) {
1098 /* clear serial clock */
1099 devpriv->cmd5 &= ~CMD5_SCLK;
1100 /* send bits most significant bit first */
1101 if (value & (1 << (value_width - i)))
1102 devpriv->cmd5 |= CMD5_SDATA;
1104 devpriv->cmd5 &= ~CMD5_SDATA;
1106 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1107 /* set clock to load bit */
1108 devpriv->cmd5 |= CMD5_SCLK;
1110 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1114 /* lowlevel read from eeprom */
1115 static unsigned int labpc_serial_in(struct comedi_device *dev)
1117 struct labpc_private *devpriv = dev->private;
1118 unsigned int value = 0;
1120 const int value_width = 8; /* number of bits wide values are */
1122 for (i = 1; i <= value_width; i++) {
1123 /* set serial clock */
1124 devpriv->cmd5 |= CMD5_SCLK;
1126 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1127 /* clear clock bit */
1128 devpriv->cmd5 &= ~CMD5_SCLK;
1130 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1131 /* read bits most significant bit first */
1133 devpriv->stat2 = devpriv->read_byte(dev->iobase + STAT2_REG);
1134 if (devpriv->stat2 & STAT2_PROMOUT)
1135 value |= 1 << (value_width - i);
1141 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1142 unsigned int address)
1144 struct labpc_private *devpriv = dev->private;
1146 /* bits to tell eeprom to expect a read */
1147 const int read_instruction = 0x3;
1148 /* 8 bit write lengths to eeprom */
1149 const int write_length = 8;
1151 /* enable read/write to eeprom */
1152 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1154 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1155 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1157 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1159 /* send read instruction */
1160 labpc_serial_out(dev, read_instruction, write_length);
1161 /* send 8 bit address to read from */
1162 labpc_serial_out(dev, address, write_length);
1164 value = labpc_serial_in(dev);
1166 /* disable read/write to eeprom */
1167 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1169 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1174 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1176 struct labpc_private *devpriv = dev->private;
1178 const int read_status_instruction = 0x5;
1179 const int write_length = 8; /* 8 bit write lengths to eeprom */
1181 /* enable read/write to eeprom */
1182 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1184 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1185 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1187 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1189 /* send read status instruction */
1190 labpc_serial_out(dev, read_status_instruction, write_length);
1192 value = labpc_serial_in(dev);
1194 /* disable read/write to eeprom */
1195 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1197 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1202 static int labpc_eeprom_write(struct comedi_device *dev,
1203 unsigned int address, unsigned int value)
1205 struct labpc_private *devpriv = dev->private;
1206 const int write_enable_instruction = 0x6;
1207 const int write_instruction = 0x2;
1208 const int write_length = 8; /* 8 bit write lengths to eeprom */
1209 const int write_in_progress_bit = 0x1;
1210 const int timeout = 10000;
1213 /* make sure there isn't already a write in progress */
1214 for (i = 0; i < timeout; i++) {
1215 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1220 comedi_error(dev, "eeprom write timed out");
1223 /* update software copy of eeprom */
1224 devpriv->eeprom_data[address] = value;
1226 /* enable read/write to eeprom */
1227 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1229 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1230 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1232 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1234 /* send write_enable instruction */
1235 labpc_serial_out(dev, write_enable_instruction, write_length);
1236 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1238 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1240 /* send write instruction */
1241 devpriv->cmd5 |= CMD5_EEPROMCS;
1243 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1244 labpc_serial_out(dev, write_instruction, write_length);
1245 /* send 8 bit address to write to */
1246 labpc_serial_out(dev, address, write_length);
1248 labpc_serial_out(dev, value, write_length);
1249 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1251 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1253 /* disable read/write to eeprom */
1254 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1256 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1261 /* writes to 8 bit calibration dacs */
1262 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1265 struct labpc_private *devpriv = dev->private;
1267 if (value == devpriv->caldac[channel])
1269 devpriv->caldac[channel] = value;
1271 /* clear caldac load bit and make sure we don't write to eeprom */
1272 devpriv->cmd5 &= ~(CMD5_CALDACLD | CMD5_EEPROMCS | CMD5_WRTPRT);
1274 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1276 /* write 4 bit channel */
1277 labpc_serial_out(dev, channel, 4);
1278 /* write 8 bit caldac value */
1279 labpc_serial_out(dev, value, 8);
1281 /* set and clear caldac bit to load caldac value */
1282 devpriv->cmd5 |= CMD5_CALDACLD;
1284 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1285 devpriv->cmd5 &= ~CMD5_CALDACLD;
1287 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1290 static int labpc_calib_insn_write(struct comedi_device *dev,
1291 struct comedi_subdevice *s,
1292 struct comedi_insn *insn,
1295 unsigned int chan = CR_CHAN(insn->chanspec);
1298 * Only write the last data value to the caldac. Preceding
1299 * data would be overwritten anyway.
1302 write_caldac(dev, chan, data[insn->n - 1]);
1307 static int labpc_calib_insn_read(struct comedi_device *dev,
1308 struct comedi_subdevice *s,
1309 struct comedi_insn *insn,
1312 struct labpc_private *devpriv = dev->private;
1313 unsigned int chan = CR_CHAN(insn->chanspec);
1316 for (i = 0; i < insn->n; i++)
1317 data[i] = devpriv->caldac[chan];
1322 static int labpc_eeprom_insn_write(struct comedi_device *dev,
1323 struct comedi_subdevice *s,
1324 struct comedi_insn *insn,
1327 unsigned int chan = CR_CHAN(insn->chanspec);
1330 /* only allow writes to user area of eeprom */
1331 if (chan < 16 || chan > 127)
1335 * Only write the last data value to the eeprom. Preceding
1336 * data would be overwritten anyway.
1339 ret = labpc_eeprom_write(dev, chan, data[insn->n - 1]);
1347 static int labpc_eeprom_insn_read(struct comedi_device *dev,
1348 struct comedi_subdevice *s,
1349 struct comedi_insn *insn,
1352 struct labpc_private *devpriv = dev->private;
1353 unsigned int chan = CR_CHAN(insn->chanspec);
1356 for (i = 0; i < insn->n; i++)
1357 data[i] = devpriv->eeprom_data[chan];
1362 int labpc_common_attach(struct comedi_device *dev,
1363 unsigned int irq, unsigned long isr_flags)
1365 const struct labpc_boardinfo *board = comedi_board(dev);
1366 struct labpc_private *devpriv = dev->private;
1367 struct comedi_subdevice *s;
1371 if (board->has_mmio) {
1372 devpriv->read_byte = labpc_readb;
1373 devpriv->write_byte = labpc_writeb;
1375 devpriv->read_byte = labpc_inb;
1376 devpriv->write_byte = labpc_outb;
1379 /* initialize board's command registers */
1380 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
1381 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1382 devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
1383 devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
1384 if (board->is_labpc1200) {
1385 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1386 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
1390 ret = request_irq(irq, labpc_interrupt, isr_flags,
1391 dev->board_name, dev);
1396 ret = comedi_alloc_subdevices(dev, 5);
1400 /* analog input subdevice */
1401 s = &dev->subdevices[0];
1402 s->type = COMEDI_SUBD_AI;
1403 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1405 s->len_chanlist = 8;
1406 s->maxdata = 0x0fff;
1407 s->range_table = board->is_labpc1200
1408 ? &range_labpc_1200_ai : &range_labpc_plus_ai;
1409 s->insn_read = labpc_ai_insn_read;
1411 dev->read_subdev = s;
1412 s->subdev_flags |= SDF_CMD_READ;
1413 s->do_cmd = labpc_ai_cmd;
1414 s->do_cmdtest = labpc_ai_cmdtest;
1415 s->cancel = labpc_cancel;
1419 s = &dev->subdevices[1];
1420 if (board->has_ao) {
1421 s->type = COMEDI_SUBD_AO;
1422 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1423 s->n_chan = NUM_AO_CHAN;
1424 s->maxdata = 0x0fff;
1425 s->range_table = &range_labpc_ao;
1426 s->insn_read = labpc_ao_insn_read;
1427 s->insn_write = labpc_ao_insn_write;
1429 /* initialize analog outputs to a known value */
1430 for (i = 0; i < s->n_chan; i++) {
1433 devpriv->ao_value[i] = s->maxdata / 2;
1434 lsb = devpriv->ao_value[i] & 0xff;
1435 msb = (devpriv->ao_value[i] >> 8) & 0xff;
1436 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
1437 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
1440 s->type = COMEDI_SUBD_UNUSED;
1444 s = &dev->subdevices[2];
1445 ret = subdev_8255_init(dev, s,
1446 (board->has_mmio) ? labpc_8255_mmio : NULL,
1447 dev->iobase + DIO_BASE_REG);
1451 /* calibration subdevices for boards that have one */
1452 s = &dev->subdevices[3];
1453 if (board->is_labpc1200) {
1454 s->type = COMEDI_SUBD_CALIB;
1455 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1458 s->insn_read = labpc_calib_insn_read;
1459 s->insn_write = labpc_calib_insn_write;
1461 for (i = 0; i < s->n_chan; i++)
1462 write_caldac(dev, i, s->maxdata / 2);
1464 s->type = COMEDI_SUBD_UNUSED;
1467 s = &dev->subdevices[4];
1468 if (board->is_labpc1200) {
1469 s->type = COMEDI_SUBD_MEMORY;
1470 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1471 s->n_chan = EEPROM_SIZE;
1473 s->insn_read = labpc_eeprom_insn_read;
1474 s->insn_write = labpc_eeprom_insn_write;
1476 for (i = 0; i < s->n_chan; i++)
1477 devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
1479 s->type = COMEDI_SUBD_UNUSED;
1483 EXPORT_SYMBOL_GPL(labpc_common_attach);
1485 #if IS_ENABLED(CONFIG_COMEDI_NI_LABPC_ISA)
1486 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1488 struct labpc_private *devpriv;
1489 unsigned int irq = it->options[1];
1490 unsigned int dma_chan = it->options[2];
1493 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1497 ret = comedi_request_region(dev, it->options[0], LABPC_SIZE);
1501 ret = labpc_common_attach(dev, irq, 0);
1506 labpc_init_dma_chan(dev, dma_chan);
1511 static void labpc_detach(struct comedi_device *dev)
1513 struct labpc_private *devpriv = dev->private;
1516 labpc_free_dma_chan(dev);
1518 comedi_legacy_detach(dev);
1521 static struct comedi_driver labpc_driver = {
1522 .driver_name = "ni_labpc",
1523 .module = THIS_MODULE,
1524 .attach = labpc_attach,
1525 .detach = labpc_detach,
1526 .num_names = ARRAY_SIZE(labpc_boards),
1527 .board_name = &labpc_boards[0].name,
1528 .offset = sizeof(struct labpc_boardinfo),
1530 module_comedi_driver(labpc_driver);
1532 static int __init labpc_common_init(void)
1536 module_init(labpc_common_init);
1538 static void __exit labpc_common_exit(void)
1541 module_exit(labpc_common_exit);
1544 MODULE_AUTHOR("Comedi http://www.comedi.org");
1545 MODULE_DESCRIPTION("Comedi low-level driver");
1546 MODULE_LICENSE("GPL");