drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at http://comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 /* #define LABPC_DEBUG    enable debugging messages */
  78
  79 #include <linux/interrupt.h>
  80 #include <linux/slab.h>
  81 #include <linux/io.h>
  82 #include "../comedidev.h"
  83
  84 #include <linux/delay.h>
  85 #include <asm/dma.h>
  86
  87 #include "8253.h"
  88 #include "8255.h"
  89 #include "mite.h"
  90 #include "comedi_fc.h"
  91 #include "ni_labpc.h"
  92
  93 #define DRV_NAME "ni_labpc"
  94
  95 /* size of io region used by board */
  96 #define LABPC_SIZE           32
  97 /* 2 MHz master clock */
  98 #define LABPC_TIMER_BASE            500
  99
 100 /* Registers for the lab-pc+ */
 101
 102 /* write-only registers */
 103 #define COMMAND1_REG    0x0
 104 #define   ADC_GAIN_MASK (0x7 << 4)
 105 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 106 /* enables multi channel scans */
 107 #define   ADC_SCAN_EN_BIT       0x80
 108 #define COMMAND2_REG    0x1
 109 /* enable pretriggering (used in conjunction with SWTRIG) */
 110 #define   PRETRIG_BIT   0x1
 111 /* enable paced conversions on external trigger */
 112 #define   HWTRIG_BIT    0x2
 113 /* enable paced conversions */
 114 #define   SWTRIG_BIT    0x4
 115 /* use two cascaded counters for pacing */
 116 #define   CASCADE_BIT   0x8
 117 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 118 #define COMMAND3_REG    0x2
 119 /* enable dma transfers */
 120 #define   DMA_EN_BIT    0x1
 121 /* enable interrupts for 8255 */
 122 #define   DIO_INTR_EN_BIT       0x2
 123 /* enable dma terminal count interrupt */
 124 #define   DMATC_INTR_EN_BIT     0x4
 125 /* enable timer interrupt */
 126 #define   TIMER_INTR_EN_BIT     0x8
 127 /* enable error interrupt */
 128 #define   ERR_INTR_EN_BIT       0x10
 129 /* enable fifo not empty interrupt */
 130 #define   ADC_FNE_INTR_EN_BIT   0x20
 131 #define ADC_CONVERT_REG 0x3
 132 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 133 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 134 #define ADC_CLEAR_REG   0x8
 135 #define DMATC_CLEAR_REG 0xa
 136 #define TIMER_CLEAR_REG 0xc
 137 /* 1200 boards only */
 138 #define COMMAND6_REG    0xe
 139 /* select ground or common-mode reference */
 140 #define   ADC_COMMON_BIT        0x1
 141 /*  adc unipolar */
 142 #define   ADC_UNIP_BIT  0x2
 143 /*  dac unipolar */
 144 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
 145 /* enable fifo half full interrupt */
 146 #define   ADC_FHF_INTR_EN_BIT   0x20
 147 /* enable interrupt on end of hardware count */
 148 #define   A1_INTR_EN_BIT        0x40
 149 /* scan up from channel zero instead of down to zero */
 150 #define   ADC_SCAN_UP_BIT 0x80
 151 #define COMMAND4_REG    0xf
 152 /* enables 'interval' scanning */
 153 #define   INTERVAL_SCAN_EN_BIT  0x1
 154 /* enables external signal on counter b1 output to trigger scan */
 155 #define   EXT_SCAN_EN_BIT       0x2
 156 /* chooses direction (output or input) for EXTCONV* line */
 157 #define   EXT_CONVERT_OUT_BIT   0x4
 158 /* chooses differential inputs for adc (in conjunction with board jumper) */
 159 #define   ADC_DIFF_BIT  0x8
 160 #define   EXT_CONVERT_DISABLE_BIT       0x10
 161 /* 1200 boards only, calibration stuff */
 162 #define COMMAND5_REG    0x1c
 163 /* enable eeprom for write */
 164 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
 165 /* enable dithering */
 166 #define   DITHER_EN_BIT 0x8
 167 /* load calibration dac */
 168 #define   CALDAC_LOAD_BIT       0x10
 169 /* serial clock - rising edge writes, falling edge reads */
 170 #define   SCLOCK_BIT    0x20
 171 /* serial data bit for writing to eeprom or calibration dacs */
 172 #define   SDATA_BIT     0x40
 173 /* enable eeprom for read/write */
 174 #define   EEPROM_EN_BIT 0x80
 175 #define INTERVAL_COUNT_REG      0x1e
 176 #define INTERVAL_LOAD_REG       0x1f
 177 #define   INTERVAL_LOAD_BITS    0x1
 178
 179 /* read-only registers */
 180 #define STATUS1_REG     0x0
 181 /* data is available in fifo */
 182 #define   DATA_AVAIL_BIT        0x1
 183 /* overrun has occurred */
 184 #define   OVERRUN_BIT   0x2
 185 /* fifo overflow */
 186 #define   OVERFLOW_BIT  0x4
 187 /* timer interrupt has occurred */
 188 #define   TIMER_BIT     0x8
 189 /* dma terminal count has occurred */
 190 #define   DMATC_BIT     0x10
 191 /* external trigger has occurred */
 192 #define   EXT_TRIG_BIT  0x40
 193 /* 1200 boards only */
 194 #define STATUS2_REG     0x1d
 195 /* programmable eeprom serial output */
 196 #define   EEPROM_OUT_BIT        0x1
 197 /* counter A1 terminal count */
 198 #define   A1_TC_BIT     0x2
 199 /* fifo not half full */
 200 #define   FNHF_BIT      0x4
 201 #define ADC_FIFO_REG    0xa
 202
 203 #define DIO_BASE_REG    0x10
 204 #define COUNTER_A_BASE_REG      0x14
 205 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 206 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
 207 #define   INIT_A0_BITS  0x14
 208 /* put hardware conversion counter output in harmless state (a1 mode 0) */
 209 #define   INIT_A1_BITS  0x70
 210 #define COUNTER_B_BASE_REG      0x18
 211
 212 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
 213 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
 214 static irqreturn_t labpc_interrupt(int irq, void *d);
 215 static int labpc_drain_fifo(struct comedi_device *dev);
 216 #ifdef CONFIG_ISA_DMA_API
 217 static void labpc_drain_dma(struct comedi_device *dev);
 218 static void handle_isa_dma(struct comedi_device *dev);
 219 #endif
 220 static void labpc_drain_dregs(struct comedi_device *dev);
 221 static int labpc_ai_cmdtest(struct comedi_device *dev,
 222                             struct comedi_subdevice *s, struct comedi_cmd *cmd);
 223 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
 224 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 225                           struct comedi_insn *insn, unsigned int *data);
 226 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
 227                           struct comedi_insn *insn, unsigned int *data);
 228 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 229                           struct comedi_insn *insn, unsigned int *data);
 230 static int labpc_calib_read_insn(struct comedi_device *dev,
 231                                  struct comedi_subdevice *s,
 232                                  struct comedi_insn *insn, unsigned int *data);
 233 static int labpc_calib_write_insn(struct comedi_device *dev,
 234                                   struct comedi_subdevice *s,
 235                                   struct comedi_insn *insn, unsigned int *data);
 236 static int labpc_eeprom_read_insn(struct comedi_device *dev,
 237                                   struct comedi_subdevice *s,
 238                                   struct comedi_insn *insn, unsigned int *data);
 239 static int labpc_eeprom_write_insn(struct comedi_device *dev,
 240                                    struct comedi_subdevice *s,
 241                                    struct comedi_insn *insn,
 242                                    unsigned int *data);
 243 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
 244 #ifdef CONFIG_ISA_DMA_API
 245 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
 246 #endif
 247 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 248 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
 249 #endif
 250 static int labpc_dio_mem_callback(int dir, int port, int data,
 251                                   unsigned long arg);
 252 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 253                              unsigned int num_bits);
 254 static unsigned int labpc_serial_in(struct comedi_device *dev);
 255 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
 256                                       unsigned int address);
 257 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
 258 static int labpc_eeprom_write(struct comedi_device *dev,
 259                                        unsigned int address,
 260                                        unsigned int value);
 261 static void write_caldac(struct comedi_device *dev, unsigned int channel,
 262                          unsigned int value);
 263
 264 enum scan_mode {
 265         MODE_SINGLE_CHAN,
 266         MODE_SINGLE_CHAN_INTERVAL,
 267         MODE_MULT_CHAN_UP,
 268         MODE_MULT_CHAN_DOWN,
 269 };
 270
 271 /* analog input ranges */
 272 #define NUM_LABPC_PLUS_AI_RANGES 16
 273 /* indicates unipolar ranges */
 274 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 275         0,
 276         0,
 277         0,
 278         0,
 279         0,
 280         0,
 281         0,
 282         0,
 283         1,
 284         1,
 285         1,
 286         1,
 287         1,
 288         1,
 289         1,
 290         1,
 291 };
 292
 293 /* map range index to gain bits */
 294 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 295         0x00,
 296         0x10,
 297         0x20,
 298         0x30,
 299         0x40,
 300         0x50,
 301         0x60,
 302         0x70,
 303         0x00,
 304         0x10,
 305         0x20,
 306         0x30,
 307         0x40,
 308         0x50,
 309         0x60,
 310         0x70,
 311 };
 312
 313 static const struct comedi_lrange range_labpc_plus_ai = {
 314         NUM_LABPC_PLUS_AI_RANGES,
 315         {
 316          BIP_RANGE(5),
 317          BIP_RANGE(4),
 318          BIP_RANGE(2.5),
 319          BIP_RANGE(1),
 320          BIP_RANGE(0.5),
 321          BIP_RANGE(0.25),
 322          BIP_RANGE(0.1),
 323          BIP_RANGE(0.05),
 324          UNI_RANGE(10),
 325          UNI_RANGE(8),
 326          UNI_RANGE(5),
 327          UNI_RANGE(2),
 328          UNI_RANGE(1),
 329          UNI_RANGE(0.5),
 330          UNI_RANGE(0.2),
 331          UNI_RANGE(0.1),
 332          }
 333 };
 334
 335 #define NUM_LABPC_1200_AI_RANGES 14
 336 /* indicates unipolar ranges */
 337 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 338         0,
 339         0,
 340         0,
 341         0,
 342         0,
 343         0,
 344         0,
 345         1,
 346         1,
 347         1,
 348         1,
 349         1,
 350         1,
 351         1,
 352 };
 353 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);
 354
 355 /* map range index to gain bits */
 356 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 357         0x00,
 358         0x20,
 359         0x30,
 360         0x40,
 361         0x50,
 362         0x60,
 363         0x70,
 364         0x00,
 365         0x20,
 366         0x30,
 367         0x40,
 368         0x50,
 369         0x60,
 370         0x70,
 371 };
 372 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
 373
 374 const struct comedi_lrange range_labpc_1200_ai = {
 375         NUM_LABPC_1200_AI_RANGES,
 376         {
 377          BIP_RANGE(5),
 378          BIP_RANGE(2.5),
 379          BIP_RANGE(1),
 380          BIP_RANGE(0.5),
 381          BIP_RANGE(0.25),
 382          BIP_RANGE(0.1),
 383          BIP_RANGE(0.05),
 384          UNI_RANGE(10),
 385          UNI_RANGE(5),
 386          UNI_RANGE(2),
 387          UNI_RANGE(1),
 388          UNI_RANGE(0.5),
 389          UNI_RANGE(0.2),
 390          UNI_RANGE(0.1),
 391          }
 392 };
 393 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
 394
 395 /* analog output ranges */
 396 #define AO_RANGE_IS_UNIPOLAR 0x1
 397 static const struct comedi_lrange range_labpc_ao = {
 398         2,
 399         {
 400          BIP_RANGE(5),
 401          UNI_RANGE(10),
 402          }
 403 };
 404
 405 /* functions that do inb/outb and readb/writeb so we can use
 406  * function pointers to decide which to use */
 407 static inline unsigned int labpc_inb(unsigned long address)
 408 {
 409         return inb(address);
 410 }
 411
 412 static inline void labpc_outb(unsigned int byte, unsigned long address)
 413 {
 414         outb(byte, address);
 415 }
 416
 417 static inline unsigned int labpc_readb(unsigned long address)
 418 {
 419         return readb((void *)address);
 420 }
 421
 422 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 423 {
 424         writeb(byte, (void *)address);
 425 }
 426
 427 static const struct labpc_board_struct labpc_boards[] = {
 428         {
 429          .name = "lab-pc-1200",
 430          .ai_speed = 10000,
 431          .bustype = isa_bustype,
 432          .register_layout = labpc_1200_layout,
 433          .has_ao = 1,
 434          .ai_range_table = &range_labpc_1200_ai,
 435          .ai_range_code = labpc_1200_ai_gain_bits,
 436          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 437          .ai_scan_up = 1,
 438          .memory_mapped_io = 0,
 439          },
 440         {
 441          .name = "lab-pc-1200ai",
 442          .ai_speed = 10000,
 443          .bustype = isa_bustype,
 444          .register_layout = labpc_1200_layout,
 445          .has_ao = 0,
 446          .ai_range_table = &range_labpc_1200_ai,
 447          .ai_range_code = labpc_1200_ai_gain_bits,
 448          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 449          .ai_scan_up = 1,
 450          .memory_mapped_io = 0,
 451          },
 452         {
 453          .name = "lab-pc+",
 454          .ai_speed = 12000,
 455          .bustype = isa_bustype,
 456          .register_layout = labpc_plus_layout,
 457          .has_ao = 1,
 458          .ai_range_table = &range_labpc_plus_ai,
 459          .ai_range_code = labpc_plus_ai_gain_bits,
 460          .ai_range_is_unipolar = labpc_plus_is_unipolar,
 461          .ai_scan_up = 0,
 462          .memory_mapped_io = 0,
 463          },
 464 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 465         {
 466          .name = "pci-1200",
 467          .device_id = 0x161,
 468          .ai_speed = 10000,
 469          .bustype = pci_bustype,
 470          .register_layout = labpc_1200_layout,
 471          .has_ao = 1,
 472          .ai_range_table = &range_labpc_1200_ai,
 473          .ai_range_code = labpc_1200_ai_gain_bits,
 474          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 475          .ai_scan_up = 1,
 476          .memory_mapped_io = 1,
 477          },
 478 /* dummy entry so pci board works when comedi_config is passed driver name */
 479         {
 480          .name = DRV_NAME,
 481          .bustype = pci_bustype,
 482          },
 483 #endif
 484 };
 485
 486 /*
 487  * Useful for shorthand access to the particular board structure
 488  */
 489 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
 490
 491 /* size in bytes of dma buffer */
 492 static const int dma_buffer_size = 0xff00;
 493 /* 2 bytes per sample */
 494 static const int sample_size = 2;
 495
 496 #define devpriv ((struct labpc_private *)dev->private)
 497
 498 static struct comedi_driver driver_labpc = {
 499         .driver_name = DRV_NAME,
 500         .module = THIS_MODULE,
 501         .attach = labpc_attach,
 502         .detach = labpc_common_detach,
 503         .num_names = ARRAY_SIZE(labpc_boards),
 504         .board_name = &labpc_boards[0].name,
 505         .offset = sizeof(struct labpc_board_struct),
 506 };
 507
 508 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 509 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 510         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161)},
 511         {0}
 512 };
 513
 514 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 515 #endif /* CONFIG_COMEDI_PCI_DRIVERS */
 516
 517 static inline int labpc_counter_load(struct comedi_device *dev,
 518                                      unsigned long base_address,
 519                                      unsigned int counter_number,
 520                                      unsigned int count, unsigned int mode)
 521 {
 522         if (thisboard->memory_mapped_io)
 523                 return i8254_mm_load((void *)base_address, 0, counter_number,
 524                                      count, mode);
 525         else
 526                 return i8254_load(base_address, 0, counter_number, count, mode);
 527 }
 528
 529 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
 530                         unsigned int irq, unsigned int dma_chan)
 531 {
 532         struct comedi_subdevice *s;
 533         int i;
 534         unsigned long isr_flags;
 535 #ifdef CONFIG_ISA_DMA_API
 536         unsigned long dma_flags;
 537 #endif
 538         short lsb, msb;
 539         int ret;
 540
 541         printk(KERN_ERR "comedi%d: ni_labpc: %s, io 0x%lx", dev->minor,
 542                                                                 thisboard->name,
 543                iobase);
 544         if (irq)
 545                 printk(", irq %u", irq);
 546         if (dma_chan)
 547                 printk(", dma %u", dma_chan);
 548         printk("\n");
 549
 550         if (iobase == 0) {
 551                 printk(KERN_ERR "io base address is zero!\n");
 552                 return -EINVAL;
 553         }
 554         /*  request io regions for isa boards */
 555         if (thisboard->bustype == isa_bustype) {
 556                 /* check if io addresses are available */
 557                 if (!request_region(iobase, LABPC_SIZE,
 558                                     driver_labpc.driver_name)) {
 559                         printk(KERN_ERR "I/O port conflict\n");
 560                         return -EIO;
 561                 }
 562         }
 563         dev->iobase = iobase;
 564
 565         if (thisboard->memory_mapped_io) {
 566                 devpriv->read_byte = labpc_readb;
 567                 devpriv->write_byte = labpc_writeb;
 568         } else {
 569                 devpriv->read_byte = labpc_inb;
 570                 devpriv->write_byte = labpc_outb;
 571         }
 572         /* initialize board's command registers */
 573         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 574         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 575         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 576         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 577         if (thisboard->register_layout == labpc_1200_layout) {
 578                 devpriv->write_byte(devpriv->command5_bits,
 579                                     dev->iobase + COMMAND5_REG);
 580                 devpriv->write_byte(devpriv->command6_bits,
 581                                     dev->iobase + COMMAND6_REG);
 582         }
 583
 584         /* grab our IRQ */
 585         if (irq) {
 586                 isr_flags = 0;
 587                 if (thisboard->bustype == pci_bustype
 588                     || thisboard->bustype == pcmcia_bustype)
 589                         isr_flags |= IRQF_SHARED;
 590                 if (request_irq(irq, labpc_interrupt, isr_flags,
 591                                 driver_labpc.driver_name, dev)) {
 592                         printk(KERN_ERR "unable to allocate irq %u\n", irq);
 593                         return -EINVAL;
 594                 }
 595         }
 596         dev->irq = irq;
 597
 598 #ifdef CONFIG_ISA_DMA_API
 599         /* grab dma channel */
 600         if (dma_chan > 3) {
 601                 printk(KERN_ERR " invalid dma channel %u\n", dma_chan);
 602                 return -EINVAL;
 603         } else if (dma_chan) {
 604                 /* allocate dma buffer */
 605                 devpriv->dma_buffer =
 606                     kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 607                 if (devpriv->dma_buffer == NULL) {
 608                         printk(KERN_ERR " failed to allocate dma buffer\n");
 609                         return -ENOMEM;
 610                 }
 611                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 612                         printk(KERN_ERR " failed to allocate dma channel %u\n",
 613                                dma_chan);
 614                         return -EINVAL;
 615                 }
 616                 devpriv->dma_chan = dma_chan;
 617                 dma_flags = claim_dma_lock();
 618                 disable_dma(devpriv->dma_chan);
 619                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 620                 release_dma_lock(dma_flags);
 621         }
 622 #endif
 623
 624         dev->board_name = thisboard->name;
 625
 626         ret = comedi_alloc_subdevices(dev, 5);
 627         if (ret)
 628                 return ret;
 629
 630         /* analog input subdevice */
 631         s = dev->subdevices + 0;
 632         dev->read_subdev = s;
 633         s->type = COMEDI_SUBD_AI;
 634         s->subdev_flags =
 635             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
 636         s->n_chan = 8;
 637         s->len_chanlist = 8;
 638         s->maxdata = (1 << 12) - 1;     /* 12 bit resolution */
 639         s->range_table = thisboard->ai_range_table;
 640         s->do_cmd = labpc_ai_cmd;
 641         s->do_cmdtest = labpc_ai_cmdtest;
 642         s->insn_read = labpc_ai_rinsn;
 643         s->cancel = labpc_cancel;
 644
 645         /* analog output */
 646         s = dev->subdevices + 1;
 647         if (thisboard->has_ao) {
 648                 /*
 649                  * Could provide command support, except it only has a
 650                  * one sample hardware buffer for analog output and no
 651                  * underrun flag.
 652                  */
 653                 s->type = COMEDI_SUBD_AO;
 654                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 655                 s->n_chan = NUM_AO_CHAN;
 656                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 657                 s->range_table = &range_labpc_ao;
 658                 s->insn_read = labpc_ao_rinsn;
 659                 s->insn_write = labpc_ao_winsn;
 660                 /* initialize analog outputs to a known value */
 661                 for (i = 0; i < s->n_chan; i++) {
 662                         devpriv->ao_value[i] = s->maxdata / 2;
 663                         lsb = devpriv->ao_value[i] & 0xff;
 664                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 665                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 666                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 667                 }
 668         } else {
 669                 s->type = COMEDI_SUBD_UNUSED;
 670         }
 671
 672         /* 8255 dio */
 673         s = dev->subdevices + 2;
 674         /*  if board uses io memory we have to give a custom callback
 675          * function to the 8255 driver */
 676         if (thisboard->memory_mapped_io)
 677                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 678                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
 679         else
 680                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 681
 682         /*  calibration subdevices for boards that have one */
 683         s = dev->subdevices + 3;
 684         if (thisboard->register_layout == labpc_1200_layout) {
 685                 s->type = COMEDI_SUBD_CALIB;
 686                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 687                 s->n_chan = 16;
 688                 s->maxdata = 0xff;
 689                 s->insn_read = labpc_calib_read_insn;
 690                 s->insn_write = labpc_calib_write_insn;
 691
 692                 for (i = 0; i < s->n_chan; i++)
 693                         write_caldac(dev, i, s->maxdata / 2);
 694         } else
 695                 s->type = COMEDI_SUBD_UNUSED;
 696
 697         /* EEPROM */
 698         s = dev->subdevices + 4;
 699         if (thisboard->register_layout == labpc_1200_layout) {
 700                 s->type = COMEDI_SUBD_MEMORY;
 701                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 702                 s->n_chan = EEPROM_SIZE;
 703                 s->maxdata = 0xff;
 704                 s->insn_read = labpc_eeprom_read_insn;
 705                 s->insn_write = labpc_eeprom_write_insn;
 706
 707                 for (i = 0; i < EEPROM_SIZE; i++)
 708                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 709 #ifdef LABPC_DEBUG
 710                 printk(KERN_ERR " eeprom:");
 711                 for (i = 0; i < EEPROM_SIZE; i++)
 712                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 713                 printk("\n");
 714 #endif
 715         } else
 716                 s->type = COMEDI_SUBD_UNUSED;
 717
 718         return 0;
 719 }
 720 EXPORT_SYMBOL_GPL(labpc_common_attach);
 721
 722 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 723 {
 724         unsigned long iobase = 0;
 725         unsigned int irq = 0;
 726         unsigned int dma_chan = 0;
 727 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 728         int retval;
 729 #endif
 730
 731         /* allocate and initialize dev->private */
 732         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
 733                 return -ENOMEM;
 734
 735         /* get base address, irq etc. based on bustype */
 736         switch (thisboard->bustype) {
 737         case isa_bustype:
 738 #ifdef CONFIG_ISA_DMA_API
 739                 iobase = it->options[0];
 740                 irq = it->options[1];
 741                 dma_chan = it->options[2];
 742 #else
 743                 printk(KERN_ERR " this driver has not been built with ISA DMA "
 744                                                                 "support.\n");
 745                 return -EINVAL;
 746 #endif
 747                 break;
 748         case pci_bustype:
 749 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 750                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 751                 if (retval < 0)
 752                         return retval;
 753                 retval = mite_setup(devpriv->mite);
 754                 if (retval < 0)
 755                         return retval;
 756                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 757                 irq = mite_irq(devpriv->mite);
 758 #else
 759                 printk(KERN_ERR " this driver has not been built with PCI "
 760                                                                 "support.\n");
 761                 return -EINVAL;
 762 #endif
 763                 break;
 764         case pcmcia_bustype:
 765                 printk
 766                     (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 767                 return -EINVAL;
 768                 break;
 769         default:
 770                 printk(KERN_ERR "bug! couldn't determine board type\n");
 771                 return -EINVAL;
 772                 break;
 773         }
 774
 775         return labpc_common_attach(dev, iobase, irq, dma_chan);
 776 }
 777
 778 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
 779 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 780 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
 781 {
 782         struct mite_struct *mite;
 783         int i;
 784         for (mite = mite_devices; mite; mite = mite->next) {
 785                 if (mite->used)
 786                         continue;
 787 /* if bus/slot are specified then make sure we have the right bus/slot */
 788                 if (bus || slot) {
 789                         if (bus != mite->pcidev->bus->number
 790                             || slot != PCI_SLOT(mite->pcidev->devfn))
 791                                 continue;
 792                 }
 793                 for (i = 0; i < driver_labpc.num_names; i++) {
 794                         if (labpc_boards[i].bustype != pci_bustype)
 795                                 continue;
 796                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 797                                 devpriv->mite = mite;
 798 /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */
 799                                 dev->board_ptr = &labpc_boards[i];
 800                                 return 0;
 801                         }
 802                 }
 803         }
 804         printk(KERN_ERR "no device found\n");
 805         mite_list_devices();
 806         return -EIO;
 807 }
 808 #endif
 809
 810 void labpc_common_detach(struct comedi_device *dev)
 811 {
 812         if (dev->subdevices)
 813                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 814 #ifdef CONFIG_ISA_DMA_API
 815         /* only free stuff if it has been allocated by _attach */
 816         kfree(devpriv->dma_buffer);
 817         if (devpriv->dma_chan)
 818                 free_dma(devpriv->dma_chan);
 819 #endif
 820         if (dev->irq)
 821                 free_irq(dev->irq, dev);
 822         if (thisboard->bustype == isa_bustype && dev->iobase)
 823                 release_region(dev->iobase, LABPC_SIZE);
 824 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 825         if (devpriv->mite)
 826                 mite_unsetup(devpriv->mite);
 827 #endif
 828 };
 829 EXPORT_SYMBOL_GPL(labpc_common_detach);
 830
 831 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 832 {
 833         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 834         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 835         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 836 }
 837
 838 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 839 {
 840         unsigned long flags;
 841
 842         spin_lock_irqsave(&dev->spinlock, flags);
 843         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 844         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 845         spin_unlock_irqrestore(&dev->spinlock, flags);
 846
 847         devpriv->command3_bits = 0;
 848         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 849
 850         return 0;
 851 }
 852
 853 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 854 {
 855         if (cmd->chanlist_len == 1)
 856                 return MODE_SINGLE_CHAN;
 857
 858         /* chanlist may be NULL during cmdtest. */
 859         if (cmd->chanlist == NULL)
 860                 return MODE_MULT_CHAN_UP;
 861
 862         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 863                 return MODE_SINGLE_CHAN_INTERVAL;
 864
 865         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 866                 return MODE_MULT_CHAN_UP;
 867
 868         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 869                 return MODE_MULT_CHAN_DOWN;
 870
 871         printk(KERN_ERR "ni_labpc: bug! this should never happen\n");
 872
 873         return 0;
 874 }
 875
 876 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 877                                      const struct comedi_cmd *cmd)
 878 {
 879         int mode, channel, range, aref, i;
 880
 881         if (cmd->chanlist == NULL)
 882                 return 0;
 883
 884         mode = labpc_ai_scan_mode(cmd);
 885
 886         if (mode == MODE_SINGLE_CHAN)
 887                 return 0;
 888
 889         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 890                 if (cmd->chanlist_len > 0xff) {
 891                         comedi_error(dev,
 892                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 893                         return 1;
 894                 }
 895         }
 896
 897         channel = CR_CHAN(cmd->chanlist[0]);
 898         range = CR_RANGE(cmd->chanlist[0]);
 899         aref = CR_AREF(cmd->chanlist[0]);
 900
 901         for (i = 0; i < cmd->chanlist_len; i++) {
 902
 903                 switch (mode) {
 904                 case MODE_SINGLE_CHAN_INTERVAL:
 905                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 906                                 comedi_error(dev,
 907                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 908                                 return 1;
 909                         }
 910                         break;
 911                 case MODE_MULT_CHAN_UP:
 912                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 913                                 comedi_error(dev,
 914                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 915                                 return 1;
 916                         }
 917                         break;
 918                 case MODE_MULT_CHAN_DOWN:
 919                         if (CR_CHAN(cmd->chanlist[i]) !=
 920                             cmd->chanlist_len - i - 1) {
 921                                 comedi_error(dev,
 922                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 923                                 return 1;
 924                         }
 925                         break;
 926                 default:
 927                         printk(KERN_ERR "ni_labpc: bug! in chanlist check\n");
 928                         return 1;
 929                         break;
 930                 }
 931
 932                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 933                         comedi_error(dev,
 934                                      "entries in chanlist must all have the same range\n");
 935                         return 1;
 936                 }
 937
 938                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 939                         comedi_error(dev,
 940                                      "entries in chanlist must all have the same reference\n");
 941                         return 1;
 942                 }
 943         }
 944
 945         return 0;
 946 }
 947
 948 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
 949 {
 950         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 951                 return 1;
 952
 953         if (cmd->scan_begin_src == TRIG_FOLLOW)
 954                 return 1;
 955
 956         return 0;
 957 }
 958
 959 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
 960 {
 961         if (cmd->convert_src != TRIG_TIMER)
 962                 return 0;
 963
 964         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 965             cmd->scan_begin_src == TRIG_TIMER)
 966                 return cmd->scan_begin_arg;
 967
 968         return cmd->convert_arg;
 969 }
 970
 971 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
 972 {
 973         if (cmd->convert_src != TRIG_TIMER)
 974                 return;
 975
 976         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 977             cmd->scan_begin_src == TRIG_TIMER) {
 978                 cmd->scan_begin_arg = ns;
 979                 if (cmd->convert_arg > cmd->scan_begin_arg)
 980                         cmd->convert_arg = cmd->scan_begin_arg;
 981         } else
 982                 cmd->convert_arg = ns;
 983 }
 984
 985 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
 986 {
 987         if (cmd->scan_begin_src != TRIG_TIMER)
 988                 return 0;
 989
 990         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 991             cmd->convert_src == TRIG_TIMER)
 992                 return 0;
 993
 994         return cmd->scan_begin_arg;
 995 }
 996
 997 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
 998 {
 999         if (cmd->scan_begin_src != TRIG_TIMER)
1000                 return;
1001
1002         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
1003             cmd->convert_src == TRIG_TIMER)
1004                 return;
1005
1006         cmd->scan_begin_arg = ns;
1007 }
1008
1009 static int labpc_ai_cmdtest(struct comedi_device *dev,
1010                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
1011 {
1012         int err = 0;
1013         int tmp, tmp2;
1014         int stop_mask;
1015
1016         /* step 1: make sure trigger sources are trivially valid */
1017
1018         tmp = cmd->start_src;
1019         cmd->start_src &= TRIG_NOW | TRIG_EXT;
1020         if (!cmd->start_src || tmp != cmd->start_src)
1021                 err++;
1022
1023         tmp = cmd->scan_begin_src;
1024         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
1025         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1026                 err++;
1027
1028         tmp = cmd->convert_src;
1029         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
1030         if (!cmd->convert_src || tmp != cmd->convert_src)
1031                 err++;
1032
1033         tmp = cmd->scan_end_src;
1034         cmd->scan_end_src &= TRIG_COUNT;
1035         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1036                 err++;
1037
1038         tmp = cmd->stop_src;
1039         stop_mask = TRIG_COUNT | TRIG_NONE;
1040         if (thisboard->register_layout == labpc_1200_layout)
1041                 stop_mask |= TRIG_EXT;
1042         cmd->stop_src &= stop_mask;
1043         if (!cmd->stop_src || tmp != cmd->stop_src)
1044                 err++;
1045
1046         if (err)
1047                 return 1;
1048
1049         /* step 2: make sure trigger sources are unique and mutually compatible */
1050
1051         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1052                 err++;
1053         if (cmd->scan_begin_src != TRIG_TIMER &&
1054             cmd->scan_begin_src != TRIG_FOLLOW &&
1055             cmd->scan_begin_src != TRIG_EXT)
1056                 err++;
1057         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
1058                 err++;
1059         if (cmd->stop_src != TRIG_COUNT &&
1060             cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
1061                 err++;
1062
1063         /* can't have external stop and start triggers at once */
1064         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1065                 err++;
1066
1067         if (err)
1068                 return 2;
1069
1070         /* step 3: make sure arguments are trivially compatible */
1071
1072         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1073                 cmd->start_arg = 0;
1074                 err++;
1075         }
1076
1077         if (!cmd->chanlist_len)
1078                 err++;
1079
1080         if (cmd->scan_end_arg != cmd->chanlist_len) {
1081                 cmd->scan_end_arg = cmd->chanlist_len;
1082                 err++;
1083         }
1084
1085         if (cmd->convert_src == TRIG_TIMER) {
1086                 if (cmd->convert_arg < thisboard->ai_speed) {
1087                         cmd->convert_arg = thisboard->ai_speed;
1088                         err++;
1089                 }
1090         }
1091         /* make sure scan timing is not too fast */
1092         if (cmd->scan_begin_src == TRIG_TIMER) {
1093                 if (cmd->convert_src == TRIG_TIMER &&
1094                     cmd->scan_begin_arg <
1095                     cmd->convert_arg * cmd->chanlist_len) {
1096                         cmd->scan_begin_arg =
1097                             cmd->convert_arg * cmd->chanlist_len;
1098                         err++;
1099                 }
1100                 if (cmd->scan_begin_arg <
1101                     thisboard->ai_speed * cmd->chanlist_len) {
1102                         cmd->scan_begin_arg =
1103                             thisboard->ai_speed * cmd->chanlist_len;
1104                         err++;
1105                 }
1106         }
1107         /* stop source */
1108         switch (cmd->stop_src) {
1109         case TRIG_COUNT:
1110                 if (!cmd->stop_arg) {
1111                         cmd->stop_arg = 1;
1112                         err++;
1113                 }
1114                 break;
1115         case TRIG_NONE:
1116                 if (cmd->stop_arg != 0) {
1117                         cmd->stop_arg = 0;
1118                         err++;
1119                 }
1120                 break;
1121                 /*
1122                  * TRIG_EXT doesn't care since it doesn't
1123                  * trigger off a numbered channel
1124                  */
1125         default:
1126                 break;
1127         }
1128
1129         if (err)
1130                 return 3;
1131
1132         /* step 4: fix up any arguments */
1133
1134         tmp = cmd->convert_arg;
1135         tmp2 = cmd->scan_begin_arg;
1136         labpc_adc_timing(dev, cmd);
1137         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1138                 err++;
1139
1140         if (err)
1141                 return 4;
1142
1143         if (labpc_ai_chanlist_invalid(dev, cmd))
1144                 return 5;
1145
1146         return 0;
1147 }
1148
1149 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1150 {
1151         int channel, range, aref;
1152 #ifdef CONFIG_ISA_DMA_API
1153         unsigned long irq_flags;
1154 #endif
1155         int ret;
1156         struct comedi_async *async = s->async;
1157         struct comedi_cmd *cmd = &async->cmd;
1158         enum transfer_type xfer;
1159         unsigned long flags;
1160
1161         if (!dev->irq) {
1162                 comedi_error(dev, "no irq assigned, cannot perform command");
1163                 return -1;
1164         }
1165
1166         range = CR_RANGE(cmd->chanlist[0]);
1167         aref = CR_AREF(cmd->chanlist[0]);
1168
1169         /* make sure board is disabled before setting up acquisition */
1170         spin_lock_irqsave(&dev->spinlock, flags);
1171         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1172         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1173         spin_unlock_irqrestore(&dev->spinlock, flags);
1174
1175         devpriv->command3_bits = 0;
1176         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1177
1178         /*  initialize software conversion count */
1179         if (cmd->stop_src == TRIG_COUNT)
1180                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1181
1182         /*  setup hardware conversion counter */
1183         if (cmd->stop_src == TRIG_EXT) {
1184                 /*
1185                  * load counter a1 with count of 3
1186                  * (pc+ manual says this is minimum allowed) using mode 0
1187                  */
1188                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1189                                          1, 3, 0);
1190                 if (ret < 0) {
1191                         comedi_error(dev, "error loading counter a1");
1192                         return -1;
1193                 }
1194         } else                  /*
1195                                  * otherwise, just put a1 in mode 0
1196                                  * with no count to set its output low
1197                                  */
1198                 devpriv->write_byte(INIT_A1_BITS,
1199                                     dev->iobase + COUNTER_A_CONTROL_REG);
1200
1201 #ifdef CONFIG_ISA_DMA_API
1202         /*  figure out what method we will use to transfer data */
1203         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1204                 /*
1205                  * dma unsafe at RT priority,
1206                  * and too much setup time for TRIG_WAKE_EOS for
1207                  */
1208             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1209             /*  only available on the isa boards */
1210             thisboard->bustype == isa_bustype) {
1211                 xfer = isa_dma_transfer;
1212                 /* pc-plus has no fifo-half full interrupt */
1213         } else
1214 #endif
1215         if (thisboard->register_layout == labpc_1200_layout &&
1216                    /*  wake-end-of-scan should interrupt on fifo not empty */
1217                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1218                    /*  make sure we are taking more than just a few points */
1219                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1220                 xfer = fifo_half_full_transfer;
1221         } else
1222                 xfer = fifo_not_empty_transfer;
1223         devpriv->current_transfer = xfer;
1224
1225         /*  setup command6 register for 1200 boards */
1226         if (thisboard->register_layout == labpc_1200_layout) {
1227                 /*  reference inputs to ground or common? */
1228                 if (aref != AREF_GROUND)
1229                         devpriv->command6_bits |= ADC_COMMON_BIT;
1230                 else
1231                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1232                 /*  bipolar or unipolar range? */
1233                 if (thisboard->ai_range_is_unipolar[range])
1234                         devpriv->command6_bits |= ADC_UNIP_BIT;
1235                 else
1236                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1237                 /*  interrupt on fifo half full? */
1238                 if (xfer == fifo_half_full_transfer)
1239                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1240                 else
1241                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1242                 /*  enable interrupt on counter a1 terminal count? */
1243                 if (cmd->stop_src == TRIG_EXT)
1244                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1245                 else
1246                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1247                 /*  are we scanning up or down through channels? */
1248                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1249                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1250                 else
1251                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1252                 /*  write to register */
1253                 devpriv->write_byte(devpriv->command6_bits,
1254                                     dev->iobase + COMMAND6_REG);
1255         }
1256
1257         /* setup channel list, etc (command1 register) */
1258         devpriv->command1_bits = 0;
1259         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1260                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1261         else
1262                 channel = CR_CHAN(cmd->chanlist[0]);
1263         /* munge channel bits for differential / scan disabled mode */
1264         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1265                 channel *= 2;
1266         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1267         devpriv->command1_bits |= thisboard->ai_range_code[range];
1268         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1269         /* manual says to set scan enable bit on second pass */
1270         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1271             labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1272                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1273                 /* need a brief delay before enabling scan, or scan
1274                  * list will get screwed when you switch
1275                  * between scan up to scan down mode - dunno why */
1276                 udelay(1);
1277                 devpriv->write_byte(devpriv->command1_bits,
1278                                     dev->iobase + COMMAND1_REG);
1279         }
1280         /*  setup any external triggering/pacing (command4 register) */
1281         devpriv->command4_bits = 0;
1282         if (cmd->convert_src != TRIG_EXT)
1283                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1284         /* XXX should discard first scan when using interval scanning
1285          * since manual says it is not synced with scan clock */
1286         if (labpc_use_continuous_mode(cmd) == 0) {
1287                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1288                 if (cmd->scan_begin_src == TRIG_EXT)
1289                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1290         }
1291         /*  single-ended/differential */
1292         if (aref == AREF_DIFF)
1293                 devpriv->command4_bits |= ADC_DIFF_BIT;
1294         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1295
1296         devpriv->write_byte(cmd->chanlist_len,
1297                             dev->iobase + INTERVAL_COUNT_REG);
1298         /*  load count */
1299         devpriv->write_byte(INTERVAL_LOAD_BITS,
1300                             dev->iobase + INTERVAL_LOAD_REG);
1301
1302         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1303                 /*  set up pacing */
1304                 labpc_adc_timing(dev, cmd);
1305                 /*  load counter b0 in mode 3 */
1306                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1307                                          0, devpriv->divisor_b0, 3);
1308                 if (ret < 0) {
1309                         comedi_error(dev, "error loading counter b0");
1310                         return -1;
1311                 }
1312         }
1313         /*  set up conversion pacing */
1314         if (labpc_ai_convert_period(cmd)) {
1315                 /*  load counter a0 in mode 2 */
1316                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1317                                          0, devpriv->divisor_a0, 2);
1318                 if (ret < 0) {
1319                         comedi_error(dev, "error loading counter a0");
1320                         return -1;
1321                 }
1322         } else
1323                 devpriv->write_byte(INIT_A0_BITS,
1324                                     dev->iobase + COUNTER_A_CONTROL_REG);
1325
1326         /*  set up scan pacing */
1327         if (labpc_ai_scan_period(cmd)) {
1328                 /*  load counter b1 in mode 2 */
1329                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1330                                          1, devpriv->divisor_b1, 2);
1331                 if (ret < 0) {
1332                         comedi_error(dev, "error loading counter b1");
1333                         return -1;
1334                 }
1335         }
1336
1337         labpc_clear_adc_fifo(dev);
1338
1339 #ifdef CONFIG_ISA_DMA_API
1340         /*  set up dma transfer */
1341         if (xfer == isa_dma_transfer) {
1342                 irq_flags = claim_dma_lock();
1343                 disable_dma(devpriv->dma_chan);
1344                 /* clear flip-flop to make sure 2-byte registers for
1345                  * count and address get set correctly */
1346                 clear_dma_ff(devpriv->dma_chan);
1347                 set_dma_addr(devpriv->dma_chan,
1348                              virt_to_bus(devpriv->dma_buffer));
1349                 /*  set appropriate size of transfer */
1350                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1351                 if (cmd->stop_src == TRIG_COUNT &&
1352                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1353                         devpriv->dma_transfer_size =
1354                             devpriv->count * sample_size;
1355                 }
1356                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1357                 enable_dma(devpriv->dma_chan);
1358                 release_dma_lock(irq_flags);
1359                 /*  enable board's dma */
1360                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1361         } else
1362                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1363 #endif
1364
1365         /*  enable error interrupts */
1366         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1367         /*  enable fifo not empty interrupt? */
1368         if (xfer == fifo_not_empty_transfer)
1369                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1370         else
1371                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1372         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1373
1374         /*  startup acquisition */
1375
1376         /*  command2 reg */
1377         /*  use 2 cascaded counters for pacing */
1378         spin_lock_irqsave(&dev->spinlock, flags);
1379         devpriv->command2_bits |= CASCADE_BIT;
1380         switch (cmd->start_src) {
1381         case TRIG_EXT:
1382                 devpriv->command2_bits |= HWTRIG_BIT;
1383                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1384                 break;
1385         case TRIG_NOW:
1386                 devpriv->command2_bits |= SWTRIG_BIT;
1387                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1388                 break;
1389         default:
1390                 comedi_error(dev, "bug with start_src");
1391                 spin_unlock_irqrestore(&dev->spinlock, flags);
1392                 return -1;
1393                 break;
1394         }
1395         switch (cmd->stop_src) {
1396         case TRIG_EXT:
1397                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1398                 break;
1399         case TRIG_COUNT:
1400         case TRIG_NONE:
1401                 break;
1402         default:
1403                 comedi_error(dev, "bug with stop_src");
1404                 spin_unlock_irqrestore(&dev->spinlock, flags);
1405                 return -1;
1406         }
1407         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1408         spin_unlock_irqrestore(&dev->spinlock, flags);
1409
1410         return 0;
1411 }
1412
1413 /* interrupt service routine */
1414 static irqreturn_t labpc_interrupt(int irq, void *d)
1415 {
1416         struct comedi_device *dev = d;
1417         struct comedi_subdevice *s = dev->read_subdev;
1418         struct comedi_async *async;
1419         struct comedi_cmd *cmd;
1420
1421         if (dev->attached == 0) {
1422                 comedi_error(dev, "premature interrupt");
1423                 return IRQ_HANDLED;
1424         }
1425
1426         async = s->async;
1427         cmd = &async->cmd;
1428         async->events = 0;
1429
1430         /* read board status */
1431         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1432         if (thisboard->register_layout == labpc_1200_layout)
1433                 devpriv->status2_bits =
1434                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1435
1436         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1437                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1438             && (devpriv->status2_bits & A1_TC_BIT) == 0
1439             && (devpriv->status2_bits & FNHF_BIT)) {
1440                 return IRQ_NONE;
1441         }
1442
1443         if (devpriv->status1_bits & OVERRUN_BIT) {
1444                 /* clear error interrupt */
1445                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1446                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1447                 comedi_event(dev, s);
1448                 comedi_error(dev, "overrun");
1449                 return IRQ_HANDLED;
1450         }
1451
1452 #ifdef CONFIG_ISA_DMA_API
1453         if (devpriv->current_transfer == isa_dma_transfer) {
1454                 /*
1455                  * if a dma terminal count of external stop trigger
1456                  * has occurred
1457                  */
1458                 if (devpriv->status1_bits & DMATC_BIT ||
1459                     (thisboard->register_layout == labpc_1200_layout
1460                      && devpriv->status2_bits & A1_TC_BIT)) {
1461                         handle_isa_dma(dev);
1462                 }
1463         } else
1464 #endif
1465                 labpc_drain_fifo(dev);
1466
1467         if (devpriv->status1_bits & TIMER_BIT) {
1468                 comedi_error(dev, "handled timer interrupt?");
1469                 /*  clear it */
1470                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1471         }
1472
1473         if (devpriv->status1_bits & OVERFLOW_BIT) {
1474                 /*  clear error interrupt */
1475                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1476                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1477                 comedi_event(dev, s);
1478                 comedi_error(dev, "overflow");
1479                 return IRQ_HANDLED;
1480         }
1481         /*  handle external stop trigger */
1482         if (cmd->stop_src == TRIG_EXT) {
1483                 if (devpriv->status2_bits & A1_TC_BIT) {
1484                         labpc_drain_dregs(dev);
1485                         labpc_cancel(dev, s);
1486                         async->events |= COMEDI_CB_EOA;
1487                 }
1488         }
1489
1490         /* TRIG_COUNT end of acquisition */
1491         if (cmd->stop_src == TRIG_COUNT) {
1492                 if (devpriv->count == 0) {
1493                         labpc_cancel(dev, s);
1494                         async->events |= COMEDI_CB_EOA;
1495                 }
1496         }
1497
1498         comedi_event(dev, s);
1499         return IRQ_HANDLED;
1500 }
1501
1502 /* read all available samples from ai fifo */
1503 static int labpc_drain_fifo(struct comedi_device *dev)
1504 {
1505         unsigned int lsb, msb;
1506         short data;
1507         struct comedi_async *async = dev->read_subdev->async;
1508         const int timeout = 10000;
1509         unsigned int i;
1510
1511         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1512
1513         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1514              i++) {
1515                 /*  quit if we have all the data we want */
1516                 if (async->cmd.stop_src == TRIG_COUNT) {
1517                         if (devpriv->count == 0)
1518                                 break;
1519                         devpriv->count--;
1520                 }
1521                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1522                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1523                 data = (msb << 8) | lsb;
1524                 cfc_write_to_buffer(dev->read_subdev, data);
1525                 devpriv->status1_bits =
1526                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1527         }
1528         if (i == timeout) {
1529                 comedi_error(dev, "ai timeout, fifo never empties");
1530                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1531                 return -1;
1532         }
1533
1534         return 0;
1535 }
1536
1537 #ifdef CONFIG_ISA_DMA_API
1538 static void labpc_drain_dma(struct comedi_device *dev)
1539 {
1540         struct comedi_subdevice *s = dev->read_subdev;
1541         struct comedi_async *async = s->async;
1542         int status;
1543         unsigned long flags;
1544         unsigned int max_points, num_points, residue, leftover;
1545         int i;
1546
1547         status = devpriv->status1_bits;
1548
1549         flags = claim_dma_lock();
1550         disable_dma(devpriv->dma_chan);
1551         /* clear flip-flop to make sure 2-byte registers for
1552          * count and address get set correctly */
1553         clear_dma_ff(devpriv->dma_chan);
1554
1555         /*  figure out how many points to read */
1556         max_points = devpriv->dma_transfer_size / sample_size;
1557         /* residue is the number of points left to be done on the dma
1558          * transfer.  It should always be zero at this point unless
1559          * the stop_src is set to external triggering.
1560          */
1561         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1562         num_points = max_points - residue;
1563         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1564                 num_points = devpriv->count;
1565
1566         /*  figure out how many points will be stored next time */
1567         leftover = 0;
1568         if (async->cmd.stop_src != TRIG_COUNT) {
1569                 leftover = devpriv->dma_transfer_size / sample_size;
1570         } else if (devpriv->count > num_points) {
1571                 leftover = devpriv->count - num_points;
1572                 if (leftover > max_points)
1573                         leftover = max_points;
1574         }
1575
1576         /* write data to comedi buffer */
1577         for (i = 0; i < num_points; i++)
1578                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1579
1580         if (async->cmd.stop_src == TRIG_COUNT)
1581                 devpriv->count -= num_points;
1582
1583         /*  set address and count for next transfer */
1584         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1585         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1586         release_dma_lock(flags);
1587
1588         async->events |= COMEDI_CB_BLOCK;
1589 }
1590
1591 static void handle_isa_dma(struct comedi_device *dev)
1592 {
1593         labpc_drain_dma(dev);
1594
1595         enable_dma(devpriv->dma_chan);
1596
1597         /*  clear dma tc interrupt */
1598         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1599 }
1600 #endif
1601
1602 /* makes sure all data acquired by board is transferred to comedi (used
1603  * when acquisition is terminated by stop_src == TRIG_EXT). */
1604 static void labpc_drain_dregs(struct comedi_device *dev)
1605 {
1606 #ifdef CONFIG_ISA_DMA_API
1607         if (devpriv->current_transfer == isa_dma_transfer)
1608                 labpc_drain_dma(dev);
1609 #endif
1610
1611         labpc_drain_fifo(dev);
1612 }
1613
1614 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1615                           struct comedi_insn *insn, unsigned int *data)
1616 {
1617         int i, n;
1618         int chan, range;
1619         int lsb, msb;
1620         int timeout = 1000;
1621         unsigned long flags;
1622
1623         /*  disable timed conversions */
1624         spin_lock_irqsave(&dev->spinlock, flags);
1625         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1626         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1627         spin_unlock_irqrestore(&dev->spinlock, flags);
1628
1629         /*  disable interrupt generation and dma */
1630         devpriv->command3_bits = 0;
1631         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1632
1633         /* set gain and channel */
1634         devpriv->command1_bits = 0;
1635         chan = CR_CHAN(insn->chanspec);
1636         range = CR_RANGE(insn->chanspec);
1637         devpriv->command1_bits |= thisboard->ai_range_code[range];
1638         /* munge channel bits for differential/scan disabled mode */
1639         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1640                 chan *= 2;
1641         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1642         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1643
1644         /* setup command6 register for 1200 boards */
1645         if (thisboard->register_layout == labpc_1200_layout) {
1646                 /*  reference inputs to ground or common? */
1647                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1648                         devpriv->command6_bits |= ADC_COMMON_BIT;
1649                 else
1650                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1651                 /* bipolar or unipolar range? */
1652                 if (thisboard->ai_range_is_unipolar[range])
1653                         devpriv->command6_bits |= ADC_UNIP_BIT;
1654                 else
1655                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1656                 /* don't interrupt on fifo half full */
1657                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1658                 /* don't enable interrupt on counter a1 terminal count? */
1659                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1660                 /* write to register */
1661                 devpriv->write_byte(devpriv->command6_bits,
1662                                     dev->iobase + COMMAND6_REG);
1663         }
1664         /* setup command4 register */
1665         devpriv->command4_bits = 0;
1666         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1667         /* single-ended/differential */
1668         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1669                 devpriv->command4_bits |= ADC_DIFF_BIT;
1670         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1671
1672         /*
1673          * initialize pacer counter output to make sure it doesn't
1674          * cause any problems
1675          */
1676         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1677
1678         labpc_clear_adc_fifo(dev);
1679
1680         for (n = 0; n < insn->n; n++) {
1681                 /* trigger conversion */
1682                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1683
1684                 for (i = 0; i < timeout; i++) {
1685                         if (devpriv->read_byte(dev->iobase +
1686                                                STATUS1_REG) & DATA_AVAIL_BIT)
1687                                 break;
1688                         udelay(1);
1689                 }
1690                 if (i == timeout) {
1691                         comedi_error(dev, "timeout");
1692                         return -ETIME;
1693                 }
1694                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1695                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1696                 data[n] = (msb << 8) | lsb;
1697         }
1698
1699         return n;
1700 }
1701
1702 /* analog output insn */
1703 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1704                           struct comedi_insn *insn, unsigned int *data)
1705 {
1706         int channel, range;
1707         unsigned long flags;
1708         int lsb, msb;
1709
1710         channel = CR_CHAN(insn->chanspec);
1711
1712         /* turn off pacing of analog output channel */
1713         /* note: hardware bug in daqcard-1200 means pacing cannot
1714          * be independently enabled/disabled for its the two channels */
1715         spin_lock_irqsave(&dev->spinlock, flags);
1716         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1717         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1718         spin_unlock_irqrestore(&dev->spinlock, flags);
1719
1720         /* set range */
1721         if (thisboard->register_layout == labpc_1200_layout) {
1722                 range = CR_RANGE(insn->chanspec);
1723                 if (range & AO_RANGE_IS_UNIPOLAR)
1724                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1725                 else
1726                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1727                 /*  write to register */
1728                 devpriv->write_byte(devpriv->command6_bits,
1729                                     dev->iobase + COMMAND6_REG);
1730         }
1731         /* send data */
1732         lsb = data[0] & 0xff;
1733         msb = (data[0] >> 8) & 0xff;
1734         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1735         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1736
1737         /* remember value for readback */
1738         devpriv->ao_value[channel] = data[0];
1739
1740         return 1;
1741 }
1742
1743 /* analog output readback insn */
1744 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1745                           struct comedi_insn *insn, unsigned int *data)
1746 {
1747         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1748
1749         return 1;
1750 }
1751
1752 static int labpc_calib_read_insn(struct comedi_device *dev,
1753                                  struct comedi_subdevice *s,
1754                                  struct comedi_insn *insn, unsigned int *data)
1755 {
1756         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1757
1758         return 1;
1759 }
1760
1761 static int labpc_calib_write_insn(struct comedi_device *dev,
1762                                   struct comedi_subdevice *s,
1763                                   struct comedi_insn *insn, unsigned int *data)
1764 {
1765         int channel = CR_CHAN(insn->chanspec);
1766
1767         write_caldac(dev, channel, data[0]);
1768         return 1;
1769 }
1770
1771 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1772                                   struct comedi_subdevice *s,
1773                                   struct comedi_insn *insn, unsigned int *data)
1774 {
1775         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1776
1777         return 1;
1778 }
1779
1780 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1781                                    struct comedi_subdevice *s,
1782                                    struct comedi_insn *insn, unsigned int *data)
1783 {
1784         int channel = CR_CHAN(insn->chanspec);
1785         int ret;
1786
1787         /*  only allow writes to user area of eeprom */
1788         if (channel < 16 || channel > 127) {
1789                 printk
1790                     ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1791                 return -EINVAL;
1792         }
1793
1794         ret = labpc_eeprom_write(dev, channel, data[0]);
1795         if (ret < 0)
1796                 return ret;
1797
1798         return 1;
1799 }
1800
1801 #ifdef CONFIG_ISA_DMA_API
1802 /* utility function that suggests a dma transfer size in bytes */
1803 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1804 {
1805         unsigned int size;
1806         unsigned int freq;
1807
1808         if (cmd.convert_src == TRIG_TIMER)
1809                 freq = 1000000000 / cmd.convert_arg;
1810         /* return some default value */
1811         else
1812                 freq = 0xffffffff;
1813
1814         /* make buffer fill in no more than 1/3 second */
1815         size = (freq / 3) * sample_size;
1816
1817         /* set a minimum and maximum size allowed */
1818         if (size > dma_buffer_size)
1819                 size = dma_buffer_size - dma_buffer_size % sample_size;
1820         else if (size < sample_size)
1821                 size = sample_size;
1822
1823         return size;
1824 }
1825 #endif
1826
1827 /* figures out what counter values to use based on command */
1828 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1829 {
1830         /* max value for 16 bit counter in mode 2 */
1831         const int max_counter_value = 0x10000;
1832         /* min value for 16 bit counter in mode 2 */
1833         const int min_counter_value = 2;
1834         unsigned int base_period;
1835
1836         /*
1837          * if both convert and scan triggers are TRIG_TIMER, then they
1838          * both rely on counter b0
1839          */
1840         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1841                 /*
1842                  * pick the lowest b0 divisor value we can (for maximum input
1843                  * clock speed on convert and scan counters)
1844                  */
1845                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1846                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1847                 if (devpriv->divisor_b0 < min_counter_value)
1848                         devpriv->divisor_b0 = min_counter_value;
1849                 if (devpriv->divisor_b0 > max_counter_value)
1850                         devpriv->divisor_b0 = max_counter_value;
1851
1852                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1853
1854                 /*  set a0 for conversion frequency and b1 for scan frequency */
1855                 switch (cmd->flags & TRIG_ROUND_MASK) {
1856                 default:
1857                 case TRIG_ROUND_NEAREST:
1858                         devpriv->divisor_a0 =
1859                             (labpc_ai_convert_period(cmd) +
1860                              (base_period / 2)) / base_period;
1861                         devpriv->divisor_b1 =
1862                             (labpc_ai_scan_period(cmd) +
1863                              (base_period / 2)) / base_period;
1864                         break;
1865                 case TRIG_ROUND_UP:
1866                         devpriv->divisor_a0 =
1867                             (labpc_ai_convert_period(cmd) + (base_period -
1868                                                              1)) / base_period;
1869                         devpriv->divisor_b1 =
1870                             (labpc_ai_scan_period(cmd) + (base_period -
1871                                                           1)) / base_period;
1872                         break;
1873                 case TRIG_ROUND_DOWN:
1874                         devpriv->divisor_a0 =
1875                             labpc_ai_convert_period(cmd) / base_period;
1876                         devpriv->divisor_b1 =
1877                             labpc_ai_scan_period(cmd) / base_period;
1878                         break;
1879                 }
1880                 /*  make sure a0 and b1 values are acceptable */
1881                 if (devpriv->divisor_a0 < min_counter_value)
1882                         devpriv->divisor_a0 = min_counter_value;
1883                 if (devpriv->divisor_a0 > max_counter_value)
1884                         devpriv->divisor_a0 = max_counter_value;
1885                 if (devpriv->divisor_b1 < min_counter_value)
1886                         devpriv->divisor_b1 = min_counter_value;
1887                 if (devpriv->divisor_b1 > max_counter_value)
1888                         devpriv->divisor_b1 = max_counter_value;
1889                 /*  write corrected timings to command */
1890                 labpc_set_ai_convert_period(cmd,
1891                                             base_period * devpriv->divisor_a0);
1892                 labpc_set_ai_scan_period(cmd,
1893                                          base_period * devpriv->divisor_b1);
1894                 /*
1895                  * if only one TRIG_TIMER is used, we can employ the generic
1896                  * cascaded timing functions
1897                  */
1898         } else if (labpc_ai_scan_period(cmd)) {
1899                 unsigned int scan_period;
1900
1901                 scan_period = labpc_ai_scan_period(cmd);
1902                 /*
1903                  * calculate cascaded counter values
1904                  * that give desired scan timing
1905                  */
1906                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1907                                                &(devpriv->divisor_b1),
1908                                                &(devpriv->divisor_b0),
1909                                                &scan_period,
1910                                                cmd->flags & TRIG_ROUND_MASK);
1911                 labpc_set_ai_scan_period(cmd, scan_period);
1912         } else if (labpc_ai_convert_period(cmd)) {
1913                 unsigned int convert_period;
1914
1915                 convert_period = labpc_ai_convert_period(cmd);
1916                 /*
1917                  * calculate cascaded counter values
1918                  * that give desired conversion timing
1919                  */
1920                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1921                                                &(devpriv->divisor_a0),
1922                                                &(devpriv->divisor_b0),
1923                                                &convert_period,
1924                                                cmd->flags & TRIG_ROUND_MASK);
1925                 labpc_set_ai_convert_period(cmd, convert_period);
1926         }
1927 }
1928
1929 static int labpc_dio_mem_callback(int dir, int port, int data,
1930                                   unsigned long iobase)
1931 {
1932         if (dir) {
1933                 writeb(data, (void *)(iobase + port));
1934                 return 0;
1935         } else {
1936                 return readb((void *)(iobase + port));
1937         }
1938 }
1939
1940 /* lowlevel write to eeprom/dac */
1941 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1942                              unsigned int value_width)
1943 {
1944         int i;
1945
1946         for (i = 1; i <= value_width; i++) {
1947                 /*  clear serial clock */
1948                 devpriv->command5_bits &= ~SCLOCK_BIT;
1949                 /*  send bits most significant bit first */
1950                 if (value & (1 << (value_width - i)))
1951                         devpriv->command5_bits |= SDATA_BIT;
1952                 else
1953                         devpriv->command5_bits &= ~SDATA_BIT;
1954                 udelay(1);
1955                 devpriv->write_byte(devpriv->command5_bits,
1956                                     dev->iobase + COMMAND5_REG);
1957                 /*  set clock to load bit */
1958                 devpriv->command5_bits |= SCLOCK_BIT;
1959                 udelay(1);
1960                 devpriv->write_byte(devpriv->command5_bits,
1961                                     dev->iobase + COMMAND5_REG);
1962         }
1963 }
1964
1965 /* lowlevel read from eeprom */
1966 static unsigned int labpc_serial_in(struct comedi_device *dev)
1967 {
1968         unsigned int value = 0;
1969         int i;
1970         const int value_width = 8;      /*  number of bits wide values are */
1971
1972         for (i = 1; i <= value_width; i++) {
1973                 /*  set serial clock */
1974                 devpriv->command5_bits |= SCLOCK_BIT;
1975                 udelay(1);
1976                 devpriv->write_byte(devpriv->command5_bits,
1977                                     dev->iobase + COMMAND5_REG);
1978                 /*  clear clock bit */
1979                 devpriv->command5_bits &= ~SCLOCK_BIT;
1980                 udelay(1);
1981                 devpriv->write_byte(devpriv->command5_bits,
1982                                     dev->iobase + COMMAND5_REG);
1983                 /*  read bits most significant bit first */
1984                 udelay(1);
1985                 devpriv->status2_bits =
1986                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1987                 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1988                         value |= 1 << (value_width - i);
1989         }
1990
1991         return value;
1992 }
1993
1994 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1995                                       unsigned int address)
1996 {
1997         unsigned int value;
1998         /*  bits to tell eeprom to expect a read */
1999         const int read_instruction = 0x3;
2000         /*  8 bit write lengths to eeprom */
2001         const int write_length = 8;
2002
2003         /*  enable read/write to eeprom */
2004         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2005         udelay(1);
2006         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2007         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2008         udelay(1);
2009         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2010
2011         /*  send read instruction */
2012         labpc_serial_out(dev, read_instruction, write_length);
2013         /*  send 8 bit address to read from */
2014         labpc_serial_out(dev, address, write_length);
2015         /*  read result */
2016         value = labpc_serial_in(dev);
2017
2018         /*  disable read/write to eeprom */
2019         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2020         udelay(1);
2021         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2022
2023         return value;
2024 }
2025
2026 static int labpc_eeprom_write(struct comedi_device *dev,
2027                                 unsigned int address, unsigned int value)
2028 {
2029         const int write_enable_instruction = 0x6;
2030         const int write_instruction = 0x2;
2031         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2032         const int write_in_progress_bit = 0x1;
2033         const int timeout = 10000;
2034         int i;
2035
2036         /*  make sure there isn't already a write in progress */
2037         for (i = 0; i < timeout; i++) {
2038                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
2039                     0)
2040                         break;
2041         }
2042         if (i == timeout) {
2043                 comedi_error(dev, "eeprom write timed out");
2044                 return -ETIME;
2045         }
2046         /*  update software copy of eeprom */
2047         devpriv->eeprom_data[address] = value;
2048
2049         /*  enable read/write to eeprom */
2050         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2051         udelay(1);
2052         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2053         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2054         udelay(1);
2055         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2056
2057         /*  send write_enable instruction */
2058         labpc_serial_out(dev, write_enable_instruction, write_length);
2059         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2060         udelay(1);
2061         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2062
2063         /*  send write instruction */
2064         devpriv->command5_bits |= EEPROM_EN_BIT;
2065         udelay(1);
2066         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2067         labpc_serial_out(dev, write_instruction, write_length);
2068         /*  send 8 bit address to write to */
2069         labpc_serial_out(dev, address, write_length);
2070         /*  write value */
2071         labpc_serial_out(dev, value, write_length);
2072         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2073         udelay(1);
2074         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2075
2076         /*  disable read/write to eeprom */
2077         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2078         udelay(1);
2079         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2080
2081         return 0;
2082 }
2083
2084 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2085 {
2086         unsigned int value;
2087         const int read_status_instruction = 0x5;
2088         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2089
2090         /*  enable read/write to eeprom */
2091         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2092         udelay(1);
2093         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2094         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2095         udelay(1);
2096         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2097
2098         /*  send read status instruction */
2099         labpc_serial_out(dev, read_status_instruction, write_length);
2100         /*  read result */
2101         value = labpc_serial_in(dev);
2102
2103         /*  disable read/write to eeprom */
2104         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2105         udelay(1);
2106         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2107
2108         return value;
2109 }
2110
2111 /* writes to 8 bit calibration dacs */
2112 static void write_caldac(struct comedi_device *dev, unsigned int channel,
2113                          unsigned int value)
2114 {
2115         if (value == devpriv->caldac[channel])
2116                 return;
2117         devpriv->caldac[channel] = value;
2118
2119         /*  clear caldac load bit and make sure we don't write to eeprom */
2120         devpriv->command5_bits &=
2121             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2122         udelay(1);
2123         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2124
2125         /*  write 4 bit channel */
2126         labpc_serial_out(dev, channel, 4);
2127         /*  write 8 bit caldac value */
2128         labpc_serial_out(dev, value, 8);
2129
2130         /*  set and clear caldac bit to load caldac value */
2131         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2132         udelay(1);
2133         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2134         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2135         udelay(1);
2136         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2137 }
2138
2139 #ifdef CONFIG_COMEDI_PCI_DRIVERS
2140 static int __devinit driver_labpc_pci_probe(struct pci_dev *dev,
2141                                             const struct pci_device_id *ent)
2142 {
2143         return comedi_pci_auto_config(dev, &driver_labpc);
2144 }
2145
2146 static void __devexit driver_labpc_pci_remove(struct pci_dev *dev)
2147 {
2148         comedi_pci_auto_unconfig(dev);
2149 }
2150
2151 static struct pci_driver driver_labpc_pci_driver = {
2152         .id_table = labpc_pci_table,
2153         .probe = &driver_labpc_pci_probe,
2154         .remove = __devexit_p(&driver_labpc_pci_remove)
2155 };
2156
2157 static int __init driver_labpc_init_module(void)
2158 {
2159         int retval;
2160
2161         retval = comedi_driver_register(&driver_labpc);
2162         if (retval < 0)
2163                 return retval;
2164
2165         driver_labpc_pci_driver.name = (char *)driver_labpc.driver_name;
2166         return pci_register_driver(&driver_labpc_pci_driver);
2167 }
2168
2169 static void __exit driver_labpc_cleanup_module(void)
2170 {
2171         pci_unregister_driver(&driver_labpc_pci_driver);
2172         comedi_driver_unregister(&driver_labpc);
2173 }
2174
2175 module_init(driver_labpc_init_module);
2176 module_exit(driver_labpc_cleanup_module);
2177 #else
2178 static int __init driver_labpc_init_module(void)
2179 {
2180         return comedi_driver_register(&driver_labpc);
2181 }
2182
2183 static void __exit driver_labpc_cleanup_module(void)
2184 {
2185         comedi_driver_unregister(&driver_labpc);
2186 }
2187
2188 module_init(driver_labpc_init_module);
2189 module_exit(driver_labpc_cleanup_module);
2190 #endif
2191
2192
2193 MODULE_AUTHOR("Comedi http://www.comedi.org");
2194 MODULE_DESCRIPTION("Comedi low-level driver");
2195 MODULE_LICENSE("GPL");