drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at http://comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #include <linux/interrupt.h>
  77 #include <linux/slab.h>
  78 #include <linux/io.h>
  79 #include "../comedidev.h"
  80
  81 #include <linux/delay.h>
  82 #include <asm/dma.h>
  83
  84 #include "8253.h"
  85 #include "8255.h"
  86 #include "mite.h"
  87 #include "comedi_fc.h"
  88 #include "ni_labpc.h"
  89
  90 #define DRV_NAME "ni_labpc"
  91
  92 /* size of io region used by board */
  93 #define LABPC_SIZE           32
  94 /* 2 MHz master clock */
  95 #define LABPC_TIMER_BASE            500
  96
  97 /* Registers for the lab-pc+ */
  98
  99 /* write-only registers */
 100 #define COMMAND1_REG    0x0
 101 #define   ADC_GAIN_MASK (0x7 << 4)
 102 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 103 /* enables multi channel scans */
 104 #define   ADC_SCAN_EN_BIT       0x80
 105 #define COMMAND2_REG    0x1
 106 /* enable pretriggering (used in conjunction with SWTRIG) */
 107 #define   PRETRIG_BIT   0x1
 108 /* enable paced conversions on external trigger */
 109 #define   HWTRIG_BIT    0x2
 110 /* enable paced conversions */
 111 #define   SWTRIG_BIT    0x4
 112 /* use two cascaded counters for pacing */
 113 #define   CASCADE_BIT   0x8
 114 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 115 #define COMMAND3_REG    0x2
 116 /* enable dma transfers */
 117 #define   DMA_EN_BIT    0x1
 118 /* enable interrupts for 8255 */
 119 #define   DIO_INTR_EN_BIT       0x2
 120 /* enable dma terminal count interrupt */
 121 #define   DMATC_INTR_EN_BIT     0x4
 122 /* enable timer interrupt */
 123 #define   TIMER_INTR_EN_BIT     0x8
 124 /* enable error interrupt */
 125 #define   ERR_INTR_EN_BIT       0x10
 126 /* enable fifo not empty interrupt */
 127 #define   ADC_FNE_INTR_EN_BIT   0x20
 128 #define ADC_CONVERT_REG 0x3
 129 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 130 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 131 #define ADC_CLEAR_REG   0x8
 132 #define DMATC_CLEAR_REG 0xa
 133 #define TIMER_CLEAR_REG 0xc
 134 /* 1200 boards only */
 135 #define COMMAND6_REG    0xe
 136 /* select ground or common-mode reference */
 137 #define   ADC_COMMON_BIT        0x1
 138 /*  adc unipolar */
 139 #define   ADC_UNIP_BIT  0x2
 140 /*  dac unipolar */
 141 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
 142 /* enable fifo half full interrupt */
 143 #define   ADC_FHF_INTR_EN_BIT   0x20
 144 /* enable interrupt on end of hardware count */
 145 #define   A1_INTR_EN_BIT        0x40
 146 /* scan up from channel zero instead of down to zero */
 147 #define   ADC_SCAN_UP_BIT 0x80
 148 #define COMMAND4_REG    0xf
 149 /* enables 'interval' scanning */
 150 #define   INTERVAL_SCAN_EN_BIT  0x1
 151 /* enables external signal on counter b1 output to trigger scan */
 152 #define   EXT_SCAN_EN_BIT       0x2
 153 /* chooses direction (output or input) for EXTCONV* line */
 154 #define   EXT_CONVERT_OUT_BIT   0x4
 155 /* chooses differential inputs for adc (in conjunction with board jumper) */
 156 #define   ADC_DIFF_BIT  0x8
 157 #define   EXT_CONVERT_DISABLE_BIT       0x10
 158 /* 1200 boards only, calibration stuff */
 159 #define COMMAND5_REG    0x1c
 160 /* enable eeprom for write */
 161 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
 162 /* enable dithering */
 163 #define   DITHER_EN_BIT 0x8
 164 /* load calibration dac */
 165 #define   CALDAC_LOAD_BIT       0x10
 166 /* serial clock - rising edge writes, falling edge reads */
 167 #define   SCLOCK_BIT    0x20
 168 /* serial data bit for writing to eeprom or calibration dacs */
 169 #define   SDATA_BIT     0x40
 170 /* enable eeprom for read/write */
 171 #define   EEPROM_EN_BIT 0x80
 172 #define INTERVAL_COUNT_REG      0x1e
 173 #define INTERVAL_LOAD_REG       0x1f
 174 #define   INTERVAL_LOAD_BITS    0x1
 175
 176 /* read-only registers */
 177 #define STATUS1_REG     0x0
 178 /* data is available in fifo */
 179 #define   DATA_AVAIL_BIT        0x1
 180 /* overrun has occurred */
 181 #define   OVERRUN_BIT   0x2
 182 /* fifo overflow */
 183 #define   OVERFLOW_BIT  0x4
 184 /* timer interrupt has occurred */
 185 #define   TIMER_BIT     0x8
 186 /* dma terminal count has occurred */
 187 #define   DMATC_BIT     0x10
 188 /* external trigger has occurred */
 189 #define   EXT_TRIG_BIT  0x40
 190 /* 1200 boards only */
 191 #define STATUS2_REG     0x1d
 192 /* programmable eeprom serial output */
 193 #define   EEPROM_OUT_BIT        0x1
 194 /* counter A1 terminal count */
 195 #define   A1_TC_BIT     0x2
 196 /* fifo not half full */
 197 #define   FNHF_BIT      0x4
 198 #define ADC_FIFO_REG    0xa
 199
 200 #define DIO_BASE_REG    0x10
 201 #define COUNTER_A_BASE_REG      0x14
 202 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 203 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
 204 #define   INIT_A0_BITS  0x14
 205 /* put hardware conversion counter output in harmless state (a1 mode 0) */
 206 #define   INIT_A1_BITS  0x70
 207 #define COUNTER_B_BASE_REG      0x18
 208
 209 enum scan_mode {
 210         MODE_SINGLE_CHAN,
 211         MODE_SINGLE_CHAN_INTERVAL,
 212         MODE_MULT_CHAN_UP,
 213         MODE_MULT_CHAN_DOWN,
 214 };
 215
 216 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
 217 static irqreturn_t labpc_interrupt(int irq, void *d);
 218 static int labpc_drain_fifo(struct comedi_device *dev);
 219 #ifdef CONFIG_ISA_DMA_API
 220 static void labpc_drain_dma(struct comedi_device *dev);
 221 static void handle_isa_dma(struct comedi_device *dev);
 222 #endif
 223 static void labpc_drain_dregs(struct comedi_device *dev);
 224 static int labpc_ai_cmdtest(struct comedi_device *dev,
 225                             struct comedi_subdevice *s, struct comedi_cmd *cmd);
 226 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
 227 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 228                           struct comedi_insn *insn, unsigned int *data);
 229 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
 230                           struct comedi_insn *insn, unsigned int *data);
 231 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 232                           struct comedi_insn *insn, unsigned int *data);
 233 static int labpc_calib_read_insn(struct comedi_device *dev,
 234                                  struct comedi_subdevice *s,
 235                                  struct comedi_insn *insn, unsigned int *data);
 236 static int labpc_calib_write_insn(struct comedi_device *dev,
 237                                   struct comedi_subdevice *s,
 238                                   struct comedi_insn *insn, unsigned int *data);
 239 static int labpc_eeprom_read_insn(struct comedi_device *dev,
 240                                   struct comedi_subdevice *s,
 241                                   struct comedi_insn *insn, unsigned int *data);
 242 static int labpc_eeprom_write_insn(struct comedi_device *dev,
 243                                    struct comedi_subdevice *s,
 244                                    struct comedi_insn *insn,
 245                                    unsigned int *data);
 246 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
 247                              enum scan_mode scan_mode);
 248 #ifdef CONFIG_ISA_DMA_API
 249 static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd);
 250 #endif
 251 static int labpc_dio_mem_callback(int dir, int port, int data,
 252                                   unsigned long arg);
 253 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 254                              unsigned int num_bits);
 255 static unsigned int labpc_serial_in(struct comedi_device *dev);
 256 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
 257                                       unsigned int address);
 258 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
 259 static int labpc_eeprom_write(struct comedi_device *dev,
 260                                        unsigned int address,
 261                                        unsigned int value);
 262 static void write_caldac(struct comedi_device *dev, unsigned int channel,
 263                          unsigned int value);
 264
 265 /* analog input ranges */
 266 #define NUM_LABPC_PLUS_AI_RANGES 16
 267 /* indicates unipolar ranges */
 268 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 269         0,
 270         0,
 271         0,
 272         0,
 273         0,
 274         0,
 275         0,
 276         0,
 277         1,
 278         1,
 279         1,
 280         1,
 281         1,
 282         1,
 283         1,
 284         1,
 285 };
 286
 287 /* map range index to gain bits */
 288 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 289         0x00,
 290         0x10,
 291         0x20,
 292         0x30,
 293         0x40,
 294         0x50,
 295         0x60,
 296         0x70,
 297         0x00,
 298         0x10,
 299         0x20,
 300         0x30,
 301         0x40,
 302         0x50,
 303         0x60,
 304         0x70,
 305 };
 306
 307 static const struct comedi_lrange range_labpc_plus_ai = {
 308         NUM_LABPC_PLUS_AI_RANGES,
 309         {
 310          BIP_RANGE(5),
 311          BIP_RANGE(4),
 312          BIP_RANGE(2.5),
 313          BIP_RANGE(1),
 314          BIP_RANGE(0.5),
 315          BIP_RANGE(0.25),
 316          BIP_RANGE(0.1),
 317          BIP_RANGE(0.05),
 318          UNI_RANGE(10),
 319          UNI_RANGE(8),
 320          UNI_RANGE(5),
 321          UNI_RANGE(2),
 322          UNI_RANGE(1),
 323          UNI_RANGE(0.5),
 324          UNI_RANGE(0.2),
 325          UNI_RANGE(0.1),
 326          }
 327 };
 328
 329 #define NUM_LABPC_1200_AI_RANGES 14
 330 /* indicates unipolar ranges */
 331 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 332         0,
 333         0,
 334         0,
 335         0,
 336         0,
 337         0,
 338         0,
 339         1,
 340         1,
 341         1,
 342         1,
 343         1,
 344         1,
 345         1,
 346 };
 347 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);
 348
 349 /* map range index to gain bits */
 350 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 351         0x00,
 352         0x20,
 353         0x30,
 354         0x40,
 355         0x50,
 356         0x60,
 357         0x70,
 358         0x00,
 359         0x20,
 360         0x30,
 361         0x40,
 362         0x50,
 363         0x60,
 364         0x70,
 365 };
 366 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
 367
 368 const struct comedi_lrange range_labpc_1200_ai = {
 369         NUM_LABPC_1200_AI_RANGES,
 370         {
 371          BIP_RANGE(5),
 372          BIP_RANGE(2.5),
 373          BIP_RANGE(1),
 374          BIP_RANGE(0.5),
 375          BIP_RANGE(0.25),
 376          BIP_RANGE(0.1),
 377          BIP_RANGE(0.05),
 378          UNI_RANGE(10),
 379          UNI_RANGE(5),
 380          UNI_RANGE(2),
 381          UNI_RANGE(1),
 382          UNI_RANGE(0.5),
 383          UNI_RANGE(0.2),
 384          UNI_RANGE(0.1),
 385          }
 386 };
 387 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
 388
 389 /* analog output ranges */
 390 #define AO_RANGE_IS_UNIPOLAR 0x1
 391 static const struct comedi_lrange range_labpc_ao = {
 392         2,
 393         {
 394          BIP_RANGE(5),
 395          UNI_RANGE(10),
 396          }
 397 };
 398
 399 /* functions that do inb/outb and readb/writeb so we can use
 400  * function pointers to decide which to use */
 401 static inline unsigned int labpc_inb(unsigned long address)
 402 {
 403         return inb(address);
 404 }
 405
 406 static inline void labpc_outb(unsigned int byte, unsigned long address)
 407 {
 408         outb(byte, address);
 409 }
 410
 411 static inline unsigned int labpc_readb(unsigned long address)
 412 {
 413         return readb((void __iomem *)address);
 414 }
 415
 416 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 417 {
 418         writeb(byte, (void __iomem *)address);
 419 }
 420
 421 static const struct labpc_board_struct labpc_boards[] = {
 422         {
 423          .name = "lab-pc-1200",
 424          .ai_speed = 10000,
 425          .bustype = isa_bustype,
 426          .register_layout = labpc_1200_layout,
 427          .has_ao = 1,
 428          .ai_range_table = &range_labpc_1200_ai,
 429          .ai_range_code = labpc_1200_ai_gain_bits,
 430          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 431          .ai_scan_up = 1,
 432          .memory_mapped_io = 0,
 433          },
 434         {
 435          .name = "lab-pc-1200ai",
 436          .ai_speed = 10000,
 437          .bustype = isa_bustype,
 438          .register_layout = labpc_1200_layout,
 439          .has_ao = 0,
 440          .ai_range_table = &range_labpc_1200_ai,
 441          .ai_range_code = labpc_1200_ai_gain_bits,
 442          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 443          .ai_scan_up = 1,
 444          .memory_mapped_io = 0,
 445          },
 446         {
 447          .name = "lab-pc+",
 448          .ai_speed = 12000,
 449          .bustype = isa_bustype,
 450          .register_layout = labpc_plus_layout,
 451          .has_ao = 1,
 452          .ai_range_table = &range_labpc_plus_ai,
 453          .ai_range_code = labpc_plus_ai_gain_bits,
 454          .ai_range_is_unipolar = labpc_plus_is_unipolar,
 455          .ai_scan_up = 0,
 456          .memory_mapped_io = 0,
 457          },
 458 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 459         {
 460          .name = "pci-1200",
 461          .device_id = 0x161,
 462          .ai_speed = 10000,
 463          .bustype = pci_bustype,
 464          .register_layout = labpc_1200_layout,
 465          .has_ao = 1,
 466          .ai_range_table = &range_labpc_1200_ai,
 467          .ai_range_code = labpc_1200_ai_gain_bits,
 468          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 469          .ai_scan_up = 1,
 470          .memory_mapped_io = 1,
 471          },
 472 /* dummy entry so pci board works when comedi_config is passed driver name */
 473         {
 474          .name = DRV_NAME,
 475          .bustype = pci_bustype,
 476          },
 477 #endif
 478 };
 479
 480 /*
 481  * Useful for shorthand access to the particular board structure
 482  */
 483 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
 484
 485 /* size in bytes of dma buffer */
 486 static const int dma_buffer_size = 0xff00;
 487 /* 2 bytes per sample */
 488 static const int sample_size = 2;
 489
 490 #define devpriv ((struct labpc_private *)dev->private)
 491
 492 static inline int labpc_counter_load(struct comedi_device *dev,
 493                                      unsigned long base_address,
 494                                      unsigned int counter_number,
 495                                      unsigned int count, unsigned int mode)
 496 {
 497         if (thisboard->memory_mapped_io)
 498                 return i8254_mm_load((void __iomem *)base_address, 0,
 499                                      counter_number, count, mode);
 500         else
 501                 return i8254_load(base_address, 0, counter_number, count, mode);
 502 }
 503
 504 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
 505                         unsigned int irq, unsigned int dma_chan)
 506 {
 507         struct comedi_subdevice *s;
 508         int i;
 509         unsigned long isr_flags;
 510 #ifdef CONFIG_ISA_DMA_API
 511         unsigned long dma_flags;
 512 #endif
 513         short lsb, msb;
 514         int ret;
 515
 516         dev_info(dev->class_dev, "ni_labpc: %s\n", thisboard->name);
 517         if (iobase == 0) {
 518                 dev_err(dev->class_dev, "io base address is zero!\n");
 519                 return -EINVAL;
 520         }
 521         /*  request io regions for isa boards */
 522         if (thisboard->bustype == isa_bustype) {
 523                 /* check if io addresses are available */
 524                 if (!request_region(iobase, LABPC_SIZE, DRV_NAME)) {
 525                         dev_err(dev->class_dev, "I/O port conflict\n");
 526                         return -EIO;
 527                 }
 528         }
 529         dev->iobase = iobase;
 530
 531         if (thisboard->memory_mapped_io) {
 532                 devpriv->read_byte = labpc_readb;
 533                 devpriv->write_byte = labpc_writeb;
 534         } else {
 535                 devpriv->read_byte = labpc_inb;
 536                 devpriv->write_byte = labpc_outb;
 537         }
 538         /* initialize board's command registers */
 539         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 540         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 541         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 542         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 543         if (thisboard->register_layout == labpc_1200_layout) {
 544                 devpriv->write_byte(devpriv->command5_bits,
 545                                     dev->iobase + COMMAND5_REG);
 546                 devpriv->write_byte(devpriv->command6_bits,
 547                                     dev->iobase + COMMAND6_REG);
 548         }
 549
 550         /* grab our IRQ */
 551         if (irq) {
 552                 isr_flags = 0;
 553                 if (thisboard->bustype == pci_bustype
 554                     || thisboard->bustype == pcmcia_bustype)
 555                         isr_flags |= IRQF_SHARED;
 556                 if (request_irq(irq, labpc_interrupt, isr_flags,
 557                                 DRV_NAME, dev)) {
 558                         dev_err(dev->class_dev, "unable to allocate irq %u\n",
 559                                 irq);
 560                         return -EINVAL;
 561                 }
 562         }
 563         dev->irq = irq;
 564
 565 #ifdef CONFIG_ISA_DMA_API
 566         /* grab dma channel */
 567         if (dma_chan > 3) {
 568                 dev_err(dev->class_dev, "invalid dma channel %u\n", dma_chan);
 569                 return -EINVAL;
 570         } else if (dma_chan) {
 571                 /* allocate dma buffer */
 572                 devpriv->dma_buffer =
 573                     kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 574                 if (devpriv->dma_buffer == NULL) {
 575                         dev_err(dev->class_dev,
 576                                 "failed to allocate dma buffer\n");
 577                         return -ENOMEM;
 578                 }
 579                 if (request_dma(dma_chan, DRV_NAME)) {
 580                         dev_err(dev->class_dev,
 581                                 "failed to allocate dma channel %u\n",
 582                                 dma_chan);
 583                         return -EINVAL;
 584                 }
 585                 devpriv->dma_chan = dma_chan;
 586                 dma_flags = claim_dma_lock();
 587                 disable_dma(devpriv->dma_chan);
 588                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 589                 release_dma_lock(dma_flags);
 590         }
 591 #endif
 592
 593         dev->board_name = thisboard->name;
 594
 595         ret = comedi_alloc_subdevices(dev, 5);
 596         if (ret)
 597                 return ret;
 598
 599         /* analog input subdevice */
 600         s = &dev->subdevices[0];
 601         dev->read_subdev = s;
 602         s->type = COMEDI_SUBD_AI;
 603         s->subdev_flags =
 604             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
 605         s->n_chan = 8;
 606         s->len_chanlist = 8;
 607         s->maxdata = (1 << 12) - 1;     /* 12 bit resolution */
 608         s->range_table = thisboard->ai_range_table;
 609         s->do_cmd = labpc_ai_cmd;
 610         s->do_cmdtest = labpc_ai_cmdtest;
 611         s->insn_read = labpc_ai_rinsn;
 612         s->cancel = labpc_cancel;
 613
 614         /* analog output */
 615         s = &dev->subdevices[1];
 616         if (thisboard->has_ao) {
 617                 /*
 618                  * Could provide command support, except it only has a
 619                  * one sample hardware buffer for analog output and no
 620                  * underrun flag.
 621                  */
 622                 s->type = COMEDI_SUBD_AO;
 623                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 624                 s->n_chan = NUM_AO_CHAN;
 625                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 626                 s->range_table = &range_labpc_ao;
 627                 s->insn_read = labpc_ao_rinsn;
 628                 s->insn_write = labpc_ao_winsn;
 629                 /* initialize analog outputs to a known value */
 630                 for (i = 0; i < s->n_chan; i++) {
 631                         devpriv->ao_value[i] = s->maxdata / 2;
 632                         lsb = devpriv->ao_value[i] & 0xff;
 633                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 634                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 635                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 636                 }
 637         } else {
 638                 s->type = COMEDI_SUBD_UNUSED;
 639         }
 640
 641         /* 8255 dio */
 642         s = &dev->subdevices[2];
 643         /*  if board uses io memory we have to give a custom callback
 644          * function to the 8255 driver */
 645         if (thisboard->memory_mapped_io)
 646                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 647                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
 648         else
 649                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 650
 651         /*  calibration subdevices for boards that have one */
 652         s = &dev->subdevices[3];
 653         if (thisboard->register_layout == labpc_1200_layout) {
 654                 s->type = COMEDI_SUBD_CALIB;
 655                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 656                 s->n_chan = 16;
 657                 s->maxdata = 0xff;
 658                 s->insn_read = labpc_calib_read_insn;
 659                 s->insn_write = labpc_calib_write_insn;
 660
 661                 for (i = 0; i < s->n_chan; i++)
 662                         write_caldac(dev, i, s->maxdata / 2);
 663         } else
 664                 s->type = COMEDI_SUBD_UNUSED;
 665
 666         /* EEPROM */
 667         s = &dev->subdevices[4];
 668         if (thisboard->register_layout == labpc_1200_layout) {
 669                 s->type = COMEDI_SUBD_MEMORY;
 670                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 671                 s->n_chan = EEPROM_SIZE;
 672                 s->maxdata = 0xff;
 673                 s->insn_read = labpc_eeprom_read_insn;
 674                 s->insn_write = labpc_eeprom_write_insn;
 675
 676                 for (i = 0; i < EEPROM_SIZE; i++)
 677                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 678         } else
 679                 s->type = COMEDI_SUBD_UNUSED;
 680
 681         return 0;
 682 }
 683 EXPORT_SYMBOL_GPL(labpc_common_attach);
 684
 685 static const struct labpc_board_struct *
 686 labpc_pci_find_boardinfo(struct pci_dev *pcidev)
 687 {
 688         unsigned int device_id = pcidev->device;
 689         unsigned int n;
 690
 691         for (n = 0; n < ARRAY_SIZE(labpc_boards); n++) {
 692                 const struct labpc_board_struct *board = &labpc_boards[n];
 693                 if (board->bustype == pci_bustype &&
 694                     board->device_id == device_id)
 695                         return board;
 696         }
 697         return NULL;
 698 }
 699
 700 static int __devinit labpc_attach_pci(struct comedi_device *dev,
 701                                       struct pci_dev *pcidev)
 702 {
 703         unsigned long iobase;
 704         unsigned int irq;
 705         int ret;
 706
 707         if (!IS_ENABLED(CONFIG_COMEDI_PCI_DRIVERS))
 708                 return -ENODEV;
 709         ret = alloc_private(dev, sizeof(struct labpc_private));
 710         if (ret < 0)
 711                 return ret;
 712         dev->board_ptr = labpc_pci_find_boardinfo(pcidev);
 713         if (!dev->board_ptr)
 714                 return -ENODEV;
 715         devpriv->mite = mite_alloc(pcidev);
 716         if (!devpriv->mite)
 717                 return -ENOMEM;
 718         ret = mite_setup(devpriv->mite);
 719         if (ret < 0)
 720                 return ret;
 721         iobase = (unsigned long)devpriv->mite->daq_io_addr;
 722         irq = mite_irq(devpriv->mite);
 723         return labpc_common_attach(dev, iobase, irq, 0);
 724 }
 725
 726 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 727 {
 728         unsigned long iobase = 0;
 729         unsigned int irq = 0;
 730         unsigned int dma_chan = 0;
 731
 732         /* allocate and initialize dev->private */
 733         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
 734                 return -ENOMEM;
 735
 736         /* get base address, irq etc. based on bustype */
 737         switch (thisboard->bustype) {
 738         case isa_bustype:
 739 #ifdef CONFIG_ISA_DMA_API
 740                 iobase = it->options[0];
 741                 irq = it->options[1];
 742                 dma_chan = it->options[2];
 743 #else
 744                 dev_err(dev->class_dev,
 745                         "ni_labpc driver has not been built with ISA DMA support.\n");
 746                 return -EINVAL;
 747 #endif
 748                 break;
 749         case pci_bustype:
 750 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 751                 dev_err(dev->class_dev,
 752                         "manual configuration of PCI board '%s' is not supported\n",
 753                         thisboard->name);
 754                 return -EINVAL;
 755 #else
 756                 dev_err(dev->class_dev,
 757                         "ni_labpc driver has not been built with PCI support.\n");
 758                 return -EINVAL;
 759 #endif
 760                 break;
 761         default:
 762                 dev_err(dev->class_dev,
 763                         "ni_labpc: bug! couldn't determine board type\n");
 764                 return -EINVAL;
 765                 break;
 766         }
 767
 768         return labpc_common_attach(dev, iobase, irq, dma_chan);
 769 }
 770
 771 void labpc_common_detach(struct comedi_device *dev)
 772 {
 773         struct comedi_subdevice *s;
 774
 775         if (!thisboard)
 776                 return;
 777         if (dev->subdevices) {
 778                 s = &dev->subdevices[2];
 779                 subdev_8255_cleanup(dev, s);
 780         }
 781 #ifdef CONFIG_ISA_DMA_API
 782         /* only free stuff if it has been allocated by _attach */
 783         kfree(devpriv->dma_buffer);
 784         if (devpriv->dma_chan)
 785                 free_dma(devpriv->dma_chan);
 786 #endif
 787         if (dev->irq)
 788                 free_irq(dev->irq, dev);
 789         if (thisboard->bustype == isa_bustype && dev->iobase)
 790                 release_region(dev->iobase, LABPC_SIZE);
 791 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 792         if (devpriv->mite) {
 793                 mite_unsetup(devpriv->mite);
 794                 mite_free(devpriv->mite);
 795         }
 796 #endif
 797 };
 798 EXPORT_SYMBOL_GPL(labpc_common_detach);
 799
 800 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 801 {
 802         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 803         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 804         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 805 }
 806
 807 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 808 {
 809         unsigned long flags;
 810
 811         spin_lock_irqsave(&dev->spinlock, flags);
 812         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 813         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 814         spin_unlock_irqrestore(&dev->spinlock, flags);
 815
 816         devpriv->command3_bits = 0;
 817         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 818
 819         return 0;
 820 }
 821
 822 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 823 {
 824         if (cmd->chanlist_len == 1)
 825                 return MODE_SINGLE_CHAN;
 826
 827         /* chanlist may be NULL during cmdtest. */
 828         if (cmd->chanlist == NULL)
 829                 return MODE_MULT_CHAN_UP;
 830
 831         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 832                 return MODE_SINGLE_CHAN_INTERVAL;
 833
 834         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 835                 return MODE_MULT_CHAN_UP;
 836
 837         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 838                 return MODE_MULT_CHAN_DOWN;
 839
 840         pr_err("ni_labpc: bug! cannot determine AI scan mode\n");
 841         return 0;
 842 }
 843
 844 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 845                                      const struct comedi_cmd *cmd,
 846                                      enum scan_mode mode)
 847 {
 848         int channel, range, aref, i;
 849
 850         if (cmd->chanlist == NULL)
 851                 return 0;
 852
 853         if (mode == MODE_SINGLE_CHAN)
 854                 return 0;
 855
 856         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 857                 if (cmd->chanlist_len > 0xff) {
 858                         comedi_error(dev,
 859                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 860                         return 1;
 861                 }
 862         }
 863
 864         channel = CR_CHAN(cmd->chanlist[0]);
 865         range = CR_RANGE(cmd->chanlist[0]);
 866         aref = CR_AREF(cmd->chanlist[0]);
 867
 868         for (i = 0; i < cmd->chanlist_len; i++) {
 869
 870                 switch (mode) {
 871                 case MODE_SINGLE_CHAN_INTERVAL:
 872                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 873                                 comedi_error(dev,
 874                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 875                                 return 1;
 876                         }
 877                         break;
 878                 case MODE_MULT_CHAN_UP:
 879                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 880                                 comedi_error(dev,
 881                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 882                                 return 1;
 883                         }
 884                         break;
 885                 case MODE_MULT_CHAN_DOWN:
 886                         if (CR_CHAN(cmd->chanlist[i]) !=
 887                             cmd->chanlist_len - i - 1) {
 888                                 comedi_error(dev,
 889                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 890                                 return 1;
 891                         }
 892                         break;
 893                 default:
 894                         dev_err(dev->class_dev,
 895                                 "ni_labpc: bug! in chanlist check\n");
 896                         return 1;
 897                         break;
 898                 }
 899
 900                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 901                         comedi_error(dev,
 902                                      "entries in chanlist must all have the same range\n");
 903                         return 1;
 904                 }
 905
 906                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 907                         comedi_error(dev,
 908                                      "entries in chanlist must all have the same reference\n");
 909                         return 1;
 910                 }
 911         }
 912
 913         return 0;
 914 }
 915
 916 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd,
 917                                      enum scan_mode mode)
 918 {
 919         if (mode == MODE_SINGLE_CHAN)
 920                 return 1;
 921
 922         if (cmd->scan_begin_src == TRIG_FOLLOW)
 923                 return 1;
 924
 925         return 0;
 926 }
 927
 928 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
 929                                             enum scan_mode mode)
 930 {
 931         if (cmd->convert_src != TRIG_TIMER)
 932                 return 0;
 933
 934         if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
 935                 return cmd->scan_begin_arg;
 936
 937         return cmd->convert_arg;
 938 }
 939
 940 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
 941                                         enum scan_mode mode, unsigned int ns)
 942 {
 943         if (cmd->convert_src != TRIG_TIMER)
 944                 return;
 945
 946         if (mode == MODE_SINGLE_CHAN &&
 947             cmd->scan_begin_src == TRIG_TIMER) {
 948                 cmd->scan_begin_arg = ns;
 949                 if (cmd->convert_arg > cmd->scan_begin_arg)
 950                         cmd->convert_arg = cmd->scan_begin_arg;
 951         } else
 952                 cmd->convert_arg = ns;
 953 }
 954
 955 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
 956                                         enum scan_mode mode)
 957 {
 958         if (cmd->scan_begin_src != TRIG_TIMER)
 959                 return 0;
 960
 961         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 962                 return 0;
 963
 964         return cmd->scan_begin_arg;
 965 }
 966
 967 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
 968                                      enum scan_mode mode, unsigned int ns)
 969 {
 970         if (cmd->scan_begin_src != TRIG_TIMER)
 971                 return;
 972
 973         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 974                 return;
 975
 976         cmd->scan_begin_arg = ns;
 977 }
 978
 979 static int labpc_ai_cmdtest(struct comedi_device *dev,
 980                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 981 {
 982         int err = 0;
 983         int tmp, tmp2;
 984         unsigned int stop_mask;
 985         enum scan_mode mode;
 986
 987         /* Step 1 : check if triggers are trivially valid */
 988
 989         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
 990         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
 991                                         TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
 992         err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
 993         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 994
 995         stop_mask = TRIG_COUNT | TRIG_NONE;
 996         if (thisboard->register_layout == labpc_1200_layout)
 997                 stop_mask |= TRIG_EXT;
 998         err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
 999
1000         if (err)
1001                 return 1;
1002
1003         /* Step 2a : make sure trigger sources are unique */
1004
1005         err |= cfc_check_trigger_is_unique(cmd->start_src);
1006         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
1007         err |= cfc_check_trigger_is_unique(cmd->convert_src);
1008         err |= cfc_check_trigger_is_unique(cmd->stop_src);
1009
1010         /* Step 2b : and mutually compatible */
1011
1012         /* can't have external stop and start triggers at once */
1013         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1014                 err++;
1015
1016         if (err)
1017                 return 2;
1018
1019         /* step 3: make sure arguments are trivially compatible */
1020
1021         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1022                 cmd->start_arg = 0;
1023                 err++;
1024         }
1025
1026         if (!cmd->chanlist_len)
1027                 err++;
1028
1029         if (cmd->scan_end_arg != cmd->chanlist_len) {
1030                 cmd->scan_end_arg = cmd->chanlist_len;
1031                 err++;
1032         }
1033
1034         if (cmd->convert_src == TRIG_TIMER) {
1035                 if (cmd->convert_arg < thisboard->ai_speed) {
1036                         cmd->convert_arg = thisboard->ai_speed;
1037                         err++;
1038                 }
1039         }
1040         /* make sure scan timing is not too fast */
1041         if (cmd->scan_begin_src == TRIG_TIMER) {
1042                 if (cmd->convert_src == TRIG_TIMER &&
1043                     cmd->scan_begin_arg <
1044                     cmd->convert_arg * cmd->chanlist_len) {
1045                         cmd->scan_begin_arg =
1046                             cmd->convert_arg * cmd->chanlist_len;
1047                         err++;
1048                 }
1049                 if (cmd->scan_begin_arg <
1050                     thisboard->ai_speed * cmd->chanlist_len) {
1051                         cmd->scan_begin_arg =
1052                             thisboard->ai_speed * cmd->chanlist_len;
1053                         err++;
1054                 }
1055         }
1056         /* stop source */
1057         switch (cmd->stop_src) {
1058         case TRIG_COUNT:
1059                 if (!cmd->stop_arg) {
1060                         cmd->stop_arg = 1;
1061                         err++;
1062                 }
1063                 break;
1064         case TRIG_NONE:
1065                 if (cmd->stop_arg != 0) {
1066                         cmd->stop_arg = 0;
1067                         err++;
1068                 }
1069                 break;
1070                 /*
1071                  * TRIG_EXT doesn't care since it doesn't
1072                  * trigger off a numbered channel
1073                  */
1074         default:
1075                 break;
1076         }
1077
1078         if (err)
1079                 return 3;
1080
1081         /* step 4: fix up any arguments */
1082
1083         tmp = cmd->convert_arg;
1084         tmp2 = cmd->scan_begin_arg;
1085         mode = labpc_ai_scan_mode(cmd);
1086         labpc_adc_timing(dev, cmd, mode);
1087         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1088                 err++;
1089
1090         if (err)
1091                 return 4;
1092
1093         if (labpc_ai_chanlist_invalid(dev, cmd, mode))
1094                 return 5;
1095
1096         return 0;
1097 }
1098
1099 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1100 {
1101         int channel, range, aref;
1102 #ifdef CONFIG_ISA_DMA_API
1103         unsigned long irq_flags;
1104 #endif
1105         int ret;
1106         struct comedi_async *async = s->async;
1107         struct comedi_cmd *cmd = &async->cmd;
1108         enum transfer_type xfer;
1109         enum scan_mode mode;
1110         unsigned long flags;
1111
1112         if (!dev->irq) {
1113                 comedi_error(dev, "no irq assigned, cannot perform command");
1114                 return -1;
1115         }
1116
1117         range = CR_RANGE(cmd->chanlist[0]);
1118         aref = CR_AREF(cmd->chanlist[0]);
1119
1120         /* make sure board is disabled before setting up acquisition */
1121         spin_lock_irqsave(&dev->spinlock, flags);
1122         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1123         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1124         spin_unlock_irqrestore(&dev->spinlock, flags);
1125
1126         devpriv->command3_bits = 0;
1127         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1128
1129         /*  initialize software conversion count */
1130         if (cmd->stop_src == TRIG_COUNT)
1131                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1132
1133         /*  setup hardware conversion counter */
1134         if (cmd->stop_src == TRIG_EXT) {
1135                 /*
1136                  * load counter a1 with count of 3
1137                  * (pc+ manual says this is minimum allowed) using mode 0
1138                  */
1139                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1140                                          1, 3, 0);
1141                 if (ret < 0) {
1142                         comedi_error(dev, "error loading counter a1");
1143                         return -1;
1144                 }
1145         } else                  /*
1146                                  * otherwise, just put a1 in mode 0
1147                                  * with no count to set its output low
1148                                  */
1149                 devpriv->write_byte(INIT_A1_BITS,
1150                                     dev->iobase + COUNTER_A_CONTROL_REG);
1151
1152 #ifdef CONFIG_ISA_DMA_API
1153         /*  figure out what method we will use to transfer data */
1154         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1155                 /*
1156                  * dma unsafe at RT priority,
1157                  * and too much setup time for TRIG_WAKE_EOS for
1158                  */
1159             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1160             /*  only available on the isa boards */
1161             thisboard->bustype == isa_bustype) {
1162                 xfer = isa_dma_transfer;
1163                 /* pc-plus has no fifo-half full interrupt */
1164         } else
1165 #endif
1166         if (thisboard->register_layout == labpc_1200_layout &&
1167                    /*  wake-end-of-scan should interrupt on fifo not empty */
1168                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1169                    /*  make sure we are taking more than just a few points */
1170                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1171                 xfer = fifo_half_full_transfer;
1172         } else
1173                 xfer = fifo_not_empty_transfer;
1174         devpriv->current_transfer = xfer;
1175         mode = labpc_ai_scan_mode(cmd);
1176
1177         /*  setup command6 register for 1200 boards */
1178         if (thisboard->register_layout == labpc_1200_layout) {
1179                 /*  reference inputs to ground or common? */
1180                 if (aref != AREF_GROUND)
1181                         devpriv->command6_bits |= ADC_COMMON_BIT;
1182                 else
1183                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1184                 /*  bipolar or unipolar range? */
1185                 if (thisboard->ai_range_is_unipolar[range])
1186                         devpriv->command6_bits |= ADC_UNIP_BIT;
1187                 else
1188                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1189                 /*  interrupt on fifo half full? */
1190                 if (xfer == fifo_half_full_transfer)
1191                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1192                 else
1193                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1194                 /*  enable interrupt on counter a1 terminal count? */
1195                 if (cmd->stop_src == TRIG_EXT)
1196                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1197                 else
1198                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1199                 /*  are we scanning up or down through channels? */
1200                 if (mode == MODE_MULT_CHAN_UP)
1201                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1202                 else
1203                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1204                 /*  write to register */
1205                 devpriv->write_byte(devpriv->command6_bits,
1206                                     dev->iobase + COMMAND6_REG);
1207         }
1208
1209         /* setup channel list, etc (command1 register) */
1210         devpriv->command1_bits = 0;
1211         if (mode == MODE_MULT_CHAN_UP)
1212                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1213         else
1214                 channel = CR_CHAN(cmd->chanlist[0]);
1215         /* munge channel bits for differential / scan disabled mode */
1216         if (mode != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1217                 channel *= 2;
1218         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1219         devpriv->command1_bits |= thisboard->ai_range_code[range];
1220         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1221         /* manual says to set scan enable bit on second pass */
1222         if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
1223                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1224                 /* need a brief delay before enabling scan, or scan
1225                  * list will get screwed when you switch
1226                  * between scan up to scan down mode - dunno why */
1227                 udelay(1);
1228                 devpriv->write_byte(devpriv->command1_bits,
1229                                     dev->iobase + COMMAND1_REG);
1230         }
1231         /*  setup any external triggering/pacing (command4 register) */
1232         devpriv->command4_bits = 0;
1233         if (cmd->convert_src != TRIG_EXT)
1234                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1235         /* XXX should discard first scan when using interval scanning
1236          * since manual says it is not synced with scan clock */
1237         if (labpc_use_continuous_mode(cmd, mode) == 0) {
1238                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1239                 if (cmd->scan_begin_src == TRIG_EXT)
1240                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1241         }
1242         /*  single-ended/differential */
1243         if (aref == AREF_DIFF)
1244                 devpriv->command4_bits |= ADC_DIFF_BIT;
1245         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1246
1247         devpriv->write_byte(cmd->chanlist_len,
1248                             dev->iobase + INTERVAL_COUNT_REG);
1249         /*  load count */
1250         devpriv->write_byte(INTERVAL_LOAD_BITS,
1251                             dev->iobase + INTERVAL_LOAD_REG);
1252
1253         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1254                 /*  set up pacing */
1255                 labpc_adc_timing(dev, cmd, mode);
1256                 /*  load counter b0 in mode 3 */
1257                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1258                                          0, devpriv->divisor_b0, 3);
1259                 if (ret < 0) {
1260                         comedi_error(dev, "error loading counter b0");
1261                         return -1;
1262                 }
1263         }
1264         /*  set up conversion pacing */
1265         if (labpc_ai_convert_period(cmd, mode)) {
1266                 /*  load counter a0 in mode 2 */
1267                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1268                                          0, devpriv->divisor_a0, 2);
1269                 if (ret < 0) {
1270                         comedi_error(dev, "error loading counter a0");
1271                         return -1;
1272                 }
1273         } else
1274                 devpriv->write_byte(INIT_A0_BITS,
1275                                     dev->iobase + COUNTER_A_CONTROL_REG);
1276
1277         /*  set up scan pacing */
1278         if (labpc_ai_scan_period(cmd, mode)) {
1279                 /*  load counter b1 in mode 2 */
1280                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1281                                          1, devpriv->divisor_b1, 2);
1282                 if (ret < 0) {
1283                         comedi_error(dev, "error loading counter b1");
1284                         return -1;
1285                 }
1286         }
1287
1288         labpc_clear_adc_fifo(dev);
1289
1290 #ifdef CONFIG_ISA_DMA_API
1291         /*  set up dma transfer */
1292         if (xfer == isa_dma_transfer) {
1293                 irq_flags = claim_dma_lock();
1294                 disable_dma(devpriv->dma_chan);
1295                 /* clear flip-flop to make sure 2-byte registers for
1296                  * count and address get set correctly */
1297                 clear_dma_ff(devpriv->dma_chan);
1298                 set_dma_addr(devpriv->dma_chan,
1299                              virt_to_bus(devpriv->dma_buffer));
1300                 /*  set appropriate size of transfer */
1301                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(cmd);
1302                 if (cmd->stop_src == TRIG_COUNT &&
1303                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1304                         devpriv->dma_transfer_size =
1305                             devpriv->count * sample_size;
1306                 }
1307                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1308                 enable_dma(devpriv->dma_chan);
1309                 release_dma_lock(irq_flags);
1310                 /*  enable board's dma */
1311                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1312         } else
1313                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1314 #endif
1315
1316         /*  enable error interrupts */
1317         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1318         /*  enable fifo not empty interrupt? */
1319         if (xfer == fifo_not_empty_transfer)
1320                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1321         else
1322                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1323         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1324
1325         /*  startup acquisition */
1326
1327         /*  command2 reg */
1328         /*  use 2 cascaded counters for pacing */
1329         spin_lock_irqsave(&dev->spinlock, flags);
1330         devpriv->command2_bits |= CASCADE_BIT;
1331         switch (cmd->start_src) {
1332         case TRIG_EXT:
1333                 devpriv->command2_bits |= HWTRIG_BIT;
1334                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1335                 break;
1336         case TRIG_NOW:
1337                 devpriv->command2_bits |= SWTRIG_BIT;
1338                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1339                 break;
1340         default:
1341                 comedi_error(dev, "bug with start_src");
1342                 spin_unlock_irqrestore(&dev->spinlock, flags);
1343                 return -1;
1344                 break;
1345         }
1346         switch (cmd->stop_src) {
1347         case TRIG_EXT:
1348                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1349                 break;
1350         case TRIG_COUNT:
1351         case TRIG_NONE:
1352                 break;
1353         default:
1354                 comedi_error(dev, "bug with stop_src");
1355                 spin_unlock_irqrestore(&dev->spinlock, flags);
1356                 return -1;
1357         }
1358         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1359         spin_unlock_irqrestore(&dev->spinlock, flags);
1360
1361         return 0;
1362 }
1363
1364 /* interrupt service routine */
1365 static irqreturn_t labpc_interrupt(int irq, void *d)
1366 {
1367         struct comedi_device *dev = d;
1368         struct comedi_subdevice *s = dev->read_subdev;
1369         struct comedi_async *async;
1370         struct comedi_cmd *cmd;
1371
1372         if (dev->attached == 0) {
1373                 comedi_error(dev, "premature interrupt");
1374                 return IRQ_HANDLED;
1375         }
1376
1377         async = s->async;
1378         cmd = &async->cmd;
1379         async->events = 0;
1380
1381         /* read board status */
1382         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1383         if (thisboard->register_layout == labpc_1200_layout)
1384                 devpriv->status2_bits =
1385                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1386
1387         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1388                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1389             && (devpriv->status2_bits & A1_TC_BIT) == 0
1390             && (devpriv->status2_bits & FNHF_BIT)) {
1391                 return IRQ_NONE;
1392         }
1393
1394         if (devpriv->status1_bits & OVERRUN_BIT) {
1395                 /* clear error interrupt */
1396                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1397                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1398                 comedi_event(dev, s);
1399                 comedi_error(dev, "overrun");
1400                 return IRQ_HANDLED;
1401         }
1402
1403 #ifdef CONFIG_ISA_DMA_API
1404         if (devpriv->current_transfer == isa_dma_transfer) {
1405                 /*
1406                  * if a dma terminal count of external stop trigger
1407                  * has occurred
1408                  */
1409                 if (devpriv->status1_bits & DMATC_BIT ||
1410                     (thisboard->register_layout == labpc_1200_layout
1411                      && devpriv->status2_bits & A1_TC_BIT)) {
1412                         handle_isa_dma(dev);
1413                 }
1414         } else
1415 #endif
1416                 labpc_drain_fifo(dev);
1417
1418         if (devpriv->status1_bits & TIMER_BIT) {
1419                 comedi_error(dev, "handled timer interrupt?");
1420                 /*  clear it */
1421                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1422         }
1423
1424         if (devpriv->status1_bits & OVERFLOW_BIT) {
1425                 /*  clear error interrupt */
1426                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1427                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1428                 comedi_event(dev, s);
1429                 comedi_error(dev, "overflow");
1430                 return IRQ_HANDLED;
1431         }
1432         /*  handle external stop trigger */
1433         if (cmd->stop_src == TRIG_EXT) {
1434                 if (devpriv->status2_bits & A1_TC_BIT) {
1435                         labpc_drain_dregs(dev);
1436                         labpc_cancel(dev, s);
1437                         async->events |= COMEDI_CB_EOA;
1438                 }
1439         }
1440
1441         /* TRIG_COUNT end of acquisition */
1442         if (cmd->stop_src == TRIG_COUNT) {
1443                 if (devpriv->count == 0) {
1444                         labpc_cancel(dev, s);
1445                         async->events |= COMEDI_CB_EOA;
1446                 }
1447         }
1448
1449         comedi_event(dev, s);
1450         return IRQ_HANDLED;
1451 }
1452
1453 /* read all available samples from ai fifo */
1454 static int labpc_drain_fifo(struct comedi_device *dev)
1455 {
1456         unsigned int lsb, msb;
1457         short data;
1458         struct comedi_async *async = dev->read_subdev->async;
1459         const int timeout = 10000;
1460         unsigned int i;
1461
1462         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1463
1464         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1465              i++) {
1466                 /*  quit if we have all the data we want */
1467                 if (async->cmd.stop_src == TRIG_COUNT) {
1468                         if (devpriv->count == 0)
1469                                 break;
1470                         devpriv->count--;
1471                 }
1472                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1473                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1474                 data = (msb << 8) | lsb;
1475                 cfc_write_to_buffer(dev->read_subdev, data);
1476                 devpriv->status1_bits =
1477                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1478         }
1479         if (i == timeout) {
1480                 comedi_error(dev, "ai timeout, fifo never empties");
1481                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1482                 return -1;
1483         }
1484
1485         return 0;
1486 }
1487
1488 #ifdef CONFIG_ISA_DMA_API
1489 static void labpc_drain_dma(struct comedi_device *dev)
1490 {
1491         struct comedi_subdevice *s = dev->read_subdev;
1492         struct comedi_async *async = s->async;
1493         int status;
1494         unsigned long flags;
1495         unsigned int max_points, num_points, residue, leftover;
1496         int i;
1497
1498         status = devpriv->status1_bits;
1499
1500         flags = claim_dma_lock();
1501         disable_dma(devpriv->dma_chan);
1502         /* clear flip-flop to make sure 2-byte registers for
1503          * count and address get set correctly */
1504         clear_dma_ff(devpriv->dma_chan);
1505
1506         /*  figure out how many points to read */
1507         max_points = devpriv->dma_transfer_size / sample_size;
1508         /* residue is the number of points left to be done on the dma
1509          * transfer.  It should always be zero at this point unless
1510          * the stop_src is set to external triggering.
1511          */
1512         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1513         num_points = max_points - residue;
1514         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1515                 num_points = devpriv->count;
1516
1517         /*  figure out how many points will be stored next time */
1518         leftover = 0;
1519         if (async->cmd.stop_src != TRIG_COUNT) {
1520                 leftover = devpriv->dma_transfer_size / sample_size;
1521         } else if (devpriv->count > num_points) {
1522                 leftover = devpriv->count - num_points;
1523                 if (leftover > max_points)
1524                         leftover = max_points;
1525         }
1526
1527         /* write data to comedi buffer */
1528         for (i = 0; i < num_points; i++)
1529                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1530
1531         if (async->cmd.stop_src == TRIG_COUNT)
1532                 devpriv->count -= num_points;
1533
1534         /*  set address and count for next transfer */
1535         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1536         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1537         release_dma_lock(flags);
1538
1539         async->events |= COMEDI_CB_BLOCK;
1540 }
1541
1542 static void handle_isa_dma(struct comedi_device *dev)
1543 {
1544         labpc_drain_dma(dev);
1545
1546         enable_dma(devpriv->dma_chan);
1547
1548         /*  clear dma tc interrupt */
1549         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1550 }
1551 #endif
1552
1553 /* makes sure all data acquired by board is transferred to comedi (used
1554  * when acquisition is terminated by stop_src == TRIG_EXT). */
1555 static void labpc_drain_dregs(struct comedi_device *dev)
1556 {
1557 #ifdef CONFIG_ISA_DMA_API
1558         if (devpriv->current_transfer == isa_dma_transfer)
1559                 labpc_drain_dma(dev);
1560 #endif
1561
1562         labpc_drain_fifo(dev);
1563 }
1564
1565 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1566                           struct comedi_insn *insn, unsigned int *data)
1567 {
1568         int i, n;
1569         int chan, range;
1570         int lsb, msb;
1571         int timeout = 1000;
1572         unsigned long flags;
1573
1574         /*  disable timed conversions */
1575         spin_lock_irqsave(&dev->spinlock, flags);
1576         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1577         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1578         spin_unlock_irqrestore(&dev->spinlock, flags);
1579
1580         /*  disable interrupt generation and dma */
1581         devpriv->command3_bits = 0;
1582         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1583
1584         /* set gain and channel */
1585         devpriv->command1_bits = 0;
1586         chan = CR_CHAN(insn->chanspec);
1587         range = CR_RANGE(insn->chanspec);
1588         devpriv->command1_bits |= thisboard->ai_range_code[range];
1589         /* munge channel bits for differential/scan disabled mode */
1590         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1591                 chan *= 2;
1592         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1593         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1594
1595         /* setup command6 register for 1200 boards */
1596         if (thisboard->register_layout == labpc_1200_layout) {
1597                 /*  reference inputs to ground or common? */
1598                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1599                         devpriv->command6_bits |= ADC_COMMON_BIT;
1600                 else
1601                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1602                 /* bipolar or unipolar range? */
1603                 if (thisboard->ai_range_is_unipolar[range])
1604                         devpriv->command6_bits |= ADC_UNIP_BIT;
1605                 else
1606                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1607                 /* don't interrupt on fifo half full */
1608                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1609                 /* don't enable interrupt on counter a1 terminal count? */
1610                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1611                 /* write to register */
1612                 devpriv->write_byte(devpriv->command6_bits,
1613                                     dev->iobase + COMMAND6_REG);
1614         }
1615         /* setup command4 register */
1616         devpriv->command4_bits = 0;
1617         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1618         /* single-ended/differential */
1619         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1620                 devpriv->command4_bits |= ADC_DIFF_BIT;
1621         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1622
1623         /*
1624          * initialize pacer counter output to make sure it doesn't
1625          * cause any problems
1626          */
1627         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1628
1629         labpc_clear_adc_fifo(dev);
1630
1631         for (n = 0; n < insn->n; n++) {
1632                 /* trigger conversion */
1633                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1634
1635                 for (i = 0; i < timeout; i++) {
1636                         if (devpriv->read_byte(dev->iobase +
1637                                                STATUS1_REG) & DATA_AVAIL_BIT)
1638                                 break;
1639                         udelay(1);
1640                 }
1641                 if (i == timeout) {
1642                         comedi_error(dev, "timeout");
1643                         return -ETIME;
1644                 }
1645                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1646                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1647                 data[n] = (msb << 8) | lsb;
1648         }
1649
1650         return n;
1651 }
1652
1653 /* analog output insn */
1654 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1655                           struct comedi_insn *insn, unsigned int *data)
1656 {
1657         int channel, range;
1658         unsigned long flags;
1659         int lsb, msb;
1660
1661         channel = CR_CHAN(insn->chanspec);
1662
1663         /* turn off pacing of analog output channel */
1664         /* note: hardware bug in daqcard-1200 means pacing cannot
1665          * be independently enabled/disabled for its the two channels */
1666         spin_lock_irqsave(&dev->spinlock, flags);
1667         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1668         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1669         spin_unlock_irqrestore(&dev->spinlock, flags);
1670
1671         /* set range */
1672         if (thisboard->register_layout == labpc_1200_layout) {
1673                 range = CR_RANGE(insn->chanspec);
1674                 if (range & AO_RANGE_IS_UNIPOLAR)
1675                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1676                 else
1677                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1678                 /*  write to register */
1679                 devpriv->write_byte(devpriv->command6_bits,
1680                                     dev->iobase + COMMAND6_REG);
1681         }
1682         /* send data */
1683         lsb = data[0] & 0xff;
1684         msb = (data[0] >> 8) & 0xff;
1685         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1686         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1687
1688         /* remember value for readback */
1689         devpriv->ao_value[channel] = data[0];
1690
1691         return 1;
1692 }
1693
1694 /* analog output readback insn */
1695 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1696                           struct comedi_insn *insn, unsigned int *data)
1697 {
1698         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1699
1700         return 1;
1701 }
1702
1703 static int labpc_calib_read_insn(struct comedi_device *dev,
1704                                  struct comedi_subdevice *s,
1705                                  struct comedi_insn *insn, unsigned int *data)
1706 {
1707         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1708
1709         return 1;
1710 }
1711
1712 static int labpc_calib_write_insn(struct comedi_device *dev,
1713                                   struct comedi_subdevice *s,
1714                                   struct comedi_insn *insn, unsigned int *data)
1715 {
1716         int channel = CR_CHAN(insn->chanspec);
1717
1718         write_caldac(dev, channel, data[0]);
1719         return 1;
1720 }
1721
1722 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1723                                   struct comedi_subdevice *s,
1724                                   struct comedi_insn *insn, unsigned int *data)
1725 {
1726         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1727
1728         return 1;
1729 }
1730
1731 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1732                                    struct comedi_subdevice *s,
1733                                    struct comedi_insn *insn, unsigned int *data)
1734 {
1735         int channel = CR_CHAN(insn->chanspec);
1736         int ret;
1737
1738         /*  only allow writes to user area of eeprom */
1739         if (channel < 16 || channel > 127) {
1740                 dev_dbg(dev->class_dev,
1741                         "eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)\n");
1742                 return -EINVAL;
1743         }
1744
1745         ret = labpc_eeprom_write(dev, channel, data[0]);
1746         if (ret < 0)
1747                 return ret;
1748
1749         return 1;
1750 }
1751
1752 #ifdef CONFIG_ISA_DMA_API
1753 /* utility function that suggests a dma transfer size in bytes */
1754 static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd)
1755 {
1756         unsigned int size;
1757         unsigned int freq;
1758
1759         if (cmd->convert_src == TRIG_TIMER)
1760                 freq = 1000000000 / cmd->convert_arg;
1761         /* return some default value */
1762         else
1763                 freq = 0xffffffff;
1764
1765         /* make buffer fill in no more than 1/3 second */
1766         size = (freq / 3) * sample_size;
1767
1768         /* set a minimum and maximum size allowed */
1769         if (size > dma_buffer_size)
1770                 size = dma_buffer_size - dma_buffer_size % sample_size;
1771         else if (size < sample_size)
1772                 size = sample_size;
1773
1774         return size;
1775 }
1776 #endif
1777
1778 /* figures out what counter values to use based on command */
1779 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
1780                              enum scan_mode mode)
1781 {
1782         /* max value for 16 bit counter in mode 2 */
1783         const int max_counter_value = 0x10000;
1784         /* min value for 16 bit counter in mode 2 */
1785         const int min_counter_value = 2;
1786         unsigned int base_period;
1787         unsigned int scan_period;
1788         unsigned int convert_period;
1789
1790         /*
1791          * if both convert and scan triggers are TRIG_TIMER, then they
1792          * both rely on counter b0
1793          */
1794         convert_period = labpc_ai_convert_period(cmd, mode);
1795         scan_period = labpc_ai_scan_period(cmd, mode);
1796         if (convert_period && scan_period) {
1797                 /*
1798                  * pick the lowest b0 divisor value we can (for maximum input
1799                  * clock speed on convert and scan counters)
1800                  */
1801                 devpriv->divisor_b0 = (scan_period - 1) /
1802                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1803                 if (devpriv->divisor_b0 < min_counter_value)
1804                         devpriv->divisor_b0 = min_counter_value;
1805                 if (devpriv->divisor_b0 > max_counter_value)
1806                         devpriv->divisor_b0 = max_counter_value;
1807
1808                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1809
1810                 /*  set a0 for conversion frequency and b1 for scan frequency */
1811                 switch (cmd->flags & TRIG_ROUND_MASK) {
1812                 default:
1813                 case TRIG_ROUND_NEAREST:
1814                         devpriv->divisor_a0 =
1815                             (convert_period + (base_period / 2)) / base_period;
1816                         devpriv->divisor_b1 =
1817                             (scan_period + (base_period / 2)) / base_period;
1818                         break;
1819                 case TRIG_ROUND_UP:
1820                         devpriv->divisor_a0 =
1821                             (convert_period + (base_period - 1)) / base_period;
1822                         devpriv->divisor_b1 =
1823                             (scan_period + (base_period - 1)) / base_period;
1824                         break;
1825                 case TRIG_ROUND_DOWN:
1826                         devpriv->divisor_a0 = convert_period / base_period;
1827                         devpriv->divisor_b1 = scan_period / base_period;
1828                         break;
1829                 }
1830                 /*  make sure a0 and b1 values are acceptable */
1831                 if (devpriv->divisor_a0 < min_counter_value)
1832                         devpriv->divisor_a0 = min_counter_value;
1833                 if (devpriv->divisor_a0 > max_counter_value)
1834                         devpriv->divisor_a0 = max_counter_value;
1835                 if (devpriv->divisor_b1 < min_counter_value)
1836                         devpriv->divisor_b1 = min_counter_value;
1837                 if (devpriv->divisor_b1 > max_counter_value)
1838                         devpriv->divisor_b1 = max_counter_value;
1839                 /*  write corrected timings to command */
1840                 labpc_set_ai_convert_period(cmd, mode,
1841                                             base_period * devpriv->divisor_a0);
1842                 labpc_set_ai_scan_period(cmd, mode,
1843                                          base_period * devpriv->divisor_b1);
1844                 /*
1845                  * if only one TRIG_TIMER is used, we can employ the generic
1846                  * cascaded timing functions
1847                  */
1848         } else if (scan_period) {
1849                 /*
1850                  * calculate cascaded counter values
1851                  * that give desired scan timing
1852                  */
1853                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1854                                                &(devpriv->divisor_b1),
1855                                                &(devpriv->divisor_b0),
1856                                                &scan_period,
1857                                                cmd->flags & TRIG_ROUND_MASK);
1858                 labpc_set_ai_scan_period(cmd, mode, scan_period);
1859         } else if (convert_period) {
1860                 /*
1861                  * calculate cascaded counter values
1862                  * that give desired conversion timing
1863                  */
1864                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1865                                                &(devpriv->divisor_a0),
1866                                                &(devpriv->divisor_b0),
1867                                                &convert_period,
1868                                                cmd->flags & TRIG_ROUND_MASK);
1869                 labpc_set_ai_convert_period(cmd, mode, convert_period);
1870         }
1871 }
1872
1873 static int labpc_dio_mem_callback(int dir, int port, int data,
1874                                   unsigned long iobase)
1875 {
1876         if (dir) {
1877                 writeb(data, (void __iomem *)(iobase + port));
1878                 return 0;
1879         } else {
1880                 return readb((void __iomem *)(iobase + port));
1881         }
1882 }
1883
1884 /* lowlevel write to eeprom/dac */
1885 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1886                              unsigned int value_width)
1887 {
1888         int i;
1889
1890         for (i = 1; i <= value_width; i++) {
1891                 /*  clear serial clock */
1892                 devpriv->command5_bits &= ~SCLOCK_BIT;
1893                 /*  send bits most significant bit first */
1894                 if (value & (1 << (value_width - i)))
1895                         devpriv->command5_bits |= SDATA_BIT;
1896                 else
1897                         devpriv->command5_bits &= ~SDATA_BIT;
1898                 udelay(1);
1899                 devpriv->write_byte(devpriv->command5_bits,
1900                                     dev->iobase + COMMAND5_REG);
1901                 /*  set clock to load bit */
1902                 devpriv->command5_bits |= SCLOCK_BIT;
1903                 udelay(1);
1904                 devpriv->write_byte(devpriv->command5_bits,
1905                                     dev->iobase + COMMAND5_REG);
1906         }
1907 }
1908
1909 /* lowlevel read from eeprom */
1910 static unsigned int labpc_serial_in(struct comedi_device *dev)
1911 {
1912         unsigned int value = 0;
1913         int i;
1914         const int value_width = 8;      /*  number of bits wide values are */
1915
1916         for (i = 1; i <= value_width; i++) {
1917                 /*  set serial clock */
1918                 devpriv->command5_bits |= SCLOCK_BIT;
1919                 udelay(1);
1920                 devpriv->write_byte(devpriv->command5_bits,
1921                                     dev->iobase + COMMAND5_REG);
1922                 /*  clear clock bit */
1923                 devpriv->command5_bits &= ~SCLOCK_BIT;
1924                 udelay(1);
1925                 devpriv->write_byte(devpriv->command5_bits,
1926                                     dev->iobase + COMMAND5_REG);
1927                 /*  read bits most significant bit first */
1928                 udelay(1);
1929                 devpriv->status2_bits =
1930                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1931                 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1932                         value |= 1 << (value_width - i);
1933         }
1934
1935         return value;
1936 }
1937
1938 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1939                                       unsigned int address)
1940 {
1941         unsigned int value;
1942         /*  bits to tell eeprom to expect a read */
1943         const int read_instruction = 0x3;
1944         /*  8 bit write lengths to eeprom */
1945         const int write_length = 8;
1946
1947         /*  enable read/write to eeprom */
1948         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1949         udelay(1);
1950         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1951         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1952         udelay(1);
1953         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1954
1955         /*  send read instruction */
1956         labpc_serial_out(dev, read_instruction, write_length);
1957         /*  send 8 bit address to read from */
1958         labpc_serial_out(dev, address, write_length);
1959         /*  read result */
1960         value = labpc_serial_in(dev);
1961
1962         /*  disable read/write to eeprom */
1963         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1964         udelay(1);
1965         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1966
1967         return value;
1968 }
1969
1970 static int labpc_eeprom_write(struct comedi_device *dev,
1971                                 unsigned int address, unsigned int value)
1972 {
1973         const int write_enable_instruction = 0x6;
1974         const int write_instruction = 0x2;
1975         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1976         const int write_in_progress_bit = 0x1;
1977         const int timeout = 10000;
1978         int i;
1979
1980         /*  make sure there isn't already a write in progress */
1981         for (i = 0; i < timeout; i++) {
1982                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1983                     0)
1984                         break;
1985         }
1986         if (i == timeout) {
1987                 comedi_error(dev, "eeprom write timed out");
1988                 return -ETIME;
1989         }
1990         /*  update software copy of eeprom */
1991         devpriv->eeprom_data[address] = value;
1992
1993         /*  enable read/write to eeprom */
1994         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1995         udelay(1);
1996         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1997         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1998         udelay(1);
1999         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2000
2001         /*  send write_enable instruction */
2002         labpc_serial_out(dev, write_enable_instruction, write_length);
2003         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2004         udelay(1);
2005         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2006
2007         /*  send write instruction */
2008         devpriv->command5_bits |= EEPROM_EN_BIT;
2009         udelay(1);
2010         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2011         labpc_serial_out(dev, write_instruction, write_length);
2012         /*  send 8 bit address to write to */
2013         labpc_serial_out(dev, address, write_length);
2014         /*  write value */
2015         labpc_serial_out(dev, value, write_length);
2016         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2017         udelay(1);
2018         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2019
2020         /*  disable read/write to eeprom */
2021         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2022         udelay(1);
2023         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2024
2025         return 0;
2026 }
2027
2028 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2029 {
2030         unsigned int value;
2031         const int read_status_instruction = 0x5;
2032         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2033
2034         /*  enable read/write to eeprom */
2035         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2036         udelay(1);
2037         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2038         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2039         udelay(1);
2040         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2041
2042         /*  send read status instruction */
2043         labpc_serial_out(dev, read_status_instruction, write_length);
2044         /*  read result */
2045         value = labpc_serial_in(dev);
2046
2047         /*  disable read/write to eeprom */
2048         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2049         udelay(1);
2050         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2051
2052         return value;
2053 }
2054
2055 /* writes to 8 bit calibration dacs */
2056 static void write_caldac(struct comedi_device *dev, unsigned int channel,
2057                          unsigned int value)
2058 {
2059         if (value == devpriv->caldac[channel])
2060                 return;
2061         devpriv->caldac[channel] = value;
2062
2063         /*  clear caldac load bit and make sure we don't write to eeprom */
2064         devpriv->command5_bits &=
2065             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2066         udelay(1);
2067         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2068
2069         /*  write 4 bit channel */
2070         labpc_serial_out(dev, channel, 4);
2071         /*  write 8 bit caldac value */
2072         labpc_serial_out(dev, value, 8);
2073
2074         /*  set and clear caldac bit to load caldac value */
2075         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2076         udelay(1);
2077         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2078         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2079         udelay(1);
2080         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2081 }
2082
2083 static struct comedi_driver labpc_driver = {
2084         .driver_name = DRV_NAME,
2085         .module = THIS_MODULE,
2086         .attach = labpc_attach,
2087         .attach_pci = labpc_attach_pci,
2088         .detach = labpc_common_detach,
2089         .num_names = ARRAY_SIZE(labpc_boards),
2090         .board_name = &labpc_boards[0].name,
2091         .offset = sizeof(struct labpc_board_struct),
2092 };
2093
2094 #ifdef CONFIG_COMEDI_PCI_DRIVERS
2095 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
2096         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161)},
2097         {0}
2098 };
2099 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
2100
2101 static int __devinit labpc_pci_probe(struct pci_dev *dev,
2102                                      const struct pci_device_id *ent)
2103 {
2104         return comedi_pci_auto_config(dev, &labpc_driver);
2105 }
2106
2107 static void __devexit labpc_pci_remove(struct pci_dev *dev)
2108 {
2109         comedi_pci_auto_unconfig(dev);
2110 }
2111
2112 static struct pci_driver labpc_pci_driver = {
2113         .name = DRV_NAME,
2114         .id_table = labpc_pci_table,
2115         .probe = labpc_pci_probe,
2116         .remove = __devexit_p(labpc_pci_remove)
2117 };
2118 module_comedi_pci_driver(labpc_driver, labpc_pci_driver);
2119 #else
2120 module_comedi_driver(labpc_driver);
2121 #endif
2122
2123
2124 MODULE_AUTHOR("Comedi http://www.comedi.org");
2125 MODULE_DESCRIPTION("Comedi low-level driver");
2126 MODULE_LICENSE("GPL");