2 * comedi/drivers/ni_labpc.c
3 * Driver for National Instruments Lab-PC series boards and compatibles
4 * Copyright (C) 2001-2003 Frank Mori Hess <fmhess@users.sourceforge.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
19 * Description: National Instruments Lab-PC (& compatibles)
20 * Devices: (National Instruments) Lab-PC-1200 [lab-pc-1200]
21 * (National Instruments) Lab-PC-1200AI [lab-pc-1200ai]
22 * (National Instruments) Lab-PC+ [lab-pc+]
23 * Author: Frank Mori Hess <fmhess@users.sourceforge.net>
26 * Configuration options - ISA boards:
27 * [0] - I/O port base address
28 * [1] - IRQ (optional, required for timed or externally triggered
30 * [2] - DMA channel (optional)
32 * Tested with lab-pc-1200. For the older Lab-PC+, not all input
33 * ranges and analog references will work, the available ranges/arefs
34 * will depend on how you have configured the jumpers on your board
35 * (see your owner's manual).
37 * Kernel-level ISA plug-and-play support for the lab-pc-1200 boards
38 * has not yet been added to the driver, mainly due to the fact that
39 * I don't know the device id numbers. If you have one of these boards,
40 * please file a bug report at http://comedi.org/ so I can get the
41 * necessary information from you.
43 * The 1200 series boards have onboard calibration dacs for correcting
44 * analog input/output offsets and gains. The proper settings for these
45 * caldacs are stored on the board's eeprom. To read the caldac values
46 * from the eeprom and store them into a file that can be then be used
47 * by comedilib, use the comedi_calibrate program.
49 * The Lab-pc+ has quirky chanlist requirements when scanning multiple
50 * channels. Multiple channel scan sequence must start at highest channel,
51 * then decrement down to channel 0. The rest of the cards can scan down
52 * like lab-pc+ or scan up from channel zero. Chanlists consisting of all
53 * one channel are also legal, and allow you to pace conversions in bursts.
56 * 341309a (labpc-1200 register manual)
60 #include <linux/module.h>
61 #include <linux/interrupt.h>
62 #include <linux/slab.h>
64 #include <linux/delay.h>
66 #include "../comedidev.h"
70 #include "comedi_fc.h"
72 #include "ni_labpc_regs.h"
73 #include "ni_labpc_isadma.h"
75 #define LABPC_SIZE 0x20 /* size of ISA io region */
76 #define LABPC_ADC_TIMEOUT 1000
80 MODE_SINGLE_CHAN_INTERVAL,
85 static const struct comedi_lrange range_labpc_plus_ai = {
106 static const struct comedi_lrange range_labpc_1200_ai = {
125 static const struct comedi_lrange range_labpc_ao = {
132 /* functions that do inb/outb and readb/writeb so we can use
133 * function pointers to decide which to use */
134 static inline unsigned int labpc_inb(unsigned long address)
139 static inline void labpc_outb(unsigned int byte, unsigned long address)
144 static inline unsigned int labpc_readb(unsigned long address)
146 return readb((void __iomem *)address);
149 static inline void labpc_writeb(unsigned int byte, unsigned long address)
151 writeb(byte, (void __iomem *)address);
154 #if IS_ENABLED(CONFIG_COMEDI_NI_LABPC_ISA)
155 static const struct labpc_boardinfo labpc_boards[] = {
157 .name = "lab-pc-1200",
163 .name = "lab-pc-1200ai",
175 static int labpc_counter_load(struct comedi_device *dev,
176 unsigned long base_address,
177 unsigned int counter_number,
178 unsigned int count, unsigned int mode)
180 const struct labpc_boardinfo *board = comedi_board(dev);
183 return i8254_mm_load((void __iomem *)base_address, 0,
184 counter_number, count, mode);
186 return i8254_load(base_address, 0, counter_number, count, mode);
189 static int labpc_counter_set_mode(struct comedi_device *dev,
190 unsigned long base_address,
191 unsigned int counter_number,
194 const struct labpc_boardinfo *board = comedi_board(dev);
197 return i8254_mm_set_mode((void __iomem *)base_address, 0,
198 counter_number, mode);
200 return i8254_set_mode(base_address, 0, counter_number, mode);
203 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
205 struct labpc_private *devpriv = dev->private;
208 spin_lock_irqsave(&dev->spinlock, flags);
209 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
210 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
211 spin_unlock_irqrestore(&dev->spinlock, flags);
214 devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
219 static void labpc_ai_set_chan_and_gain(struct comedi_device *dev,
225 const struct labpc_boardinfo *board = comedi_board(dev);
226 struct labpc_private *devpriv = dev->private;
228 if (board->is_labpc1200) {
230 * The LabPC-1200 boards do not have a gain
231 * of '0x10'. Skip the range values that would
232 * result in this gain.
234 range += (range > 0) + (range > 7);
237 /* munge channel bits for differential/scan disabled mode */
238 if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
241 devpriv->cmd1 = CMD1_MA(chan);
242 devpriv->cmd1 |= CMD1_GAIN(range);
244 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
247 static void labpc_setup_cmd6_reg(struct comedi_device *dev,
248 struct comedi_subdevice *s,
250 enum transfer_type xfer,
255 const struct labpc_boardinfo *board = comedi_board(dev);
256 struct labpc_private *devpriv = dev->private;
258 if (!board->is_labpc1200)
261 /* reference inputs to ground or common? */
262 if (aref != AREF_GROUND)
263 devpriv->cmd6 |= CMD6_NRSE;
265 devpriv->cmd6 &= ~CMD6_NRSE;
267 /* bipolar or unipolar range? */
268 if (comedi_range_is_unipolar(s, range))
269 devpriv->cmd6 |= CMD6_ADCUNI;
271 devpriv->cmd6 &= ~CMD6_ADCUNI;
273 /* interrupt on fifo half full? */
274 if (xfer == fifo_half_full_transfer)
275 devpriv->cmd6 |= CMD6_HFINTEN;
277 devpriv->cmd6 &= ~CMD6_HFINTEN;
279 /* enable interrupt on counter a1 terminal count? */
281 devpriv->cmd6 |= CMD6_DQINTEN;
283 devpriv->cmd6 &= ~CMD6_DQINTEN;
285 /* are we scanning up or down through channels? */
286 if (mode == MODE_MULT_CHAN_UP)
287 devpriv->cmd6 |= CMD6_SCANUP;
289 devpriv->cmd6 &= ~CMD6_SCANUP;
291 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
294 static unsigned int labpc_read_adc_fifo(struct comedi_device *dev)
296 struct labpc_private *devpriv = dev->private;
297 unsigned int lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
298 unsigned int msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
300 return (msb << 8) | lsb;
303 static void labpc_clear_adc_fifo(struct comedi_device *dev)
305 struct labpc_private *devpriv = dev->private;
307 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
308 labpc_read_adc_fifo(dev);
311 static int labpc_ai_wait_for_data(struct comedi_device *dev,
314 struct labpc_private *devpriv = dev->private;
317 for (i = 0; i < timeout; i++) {
318 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
319 if (devpriv->stat1 & STAT1_DAVAIL)
326 static int labpc_ai_insn_read(struct comedi_device *dev,
327 struct comedi_subdevice *s,
328 struct comedi_insn *insn,
331 struct labpc_private *devpriv = dev->private;
332 unsigned int chan = CR_CHAN(insn->chanspec);
333 unsigned int range = CR_RANGE(insn->chanspec);
334 unsigned int aref = CR_AREF(insn->chanspec);
338 /* disable timed conversions, interrupt generation and dma */
339 labpc_cancel(dev, s);
341 labpc_ai_set_chan_and_gain(dev, MODE_SINGLE_CHAN, chan, range, aref);
343 labpc_setup_cmd6_reg(dev, s, MODE_SINGLE_CHAN, fifo_not_empty_transfer,
346 /* setup cmd4 register */
348 devpriv->cmd4 |= CMD4_ECLKRCV;
349 /* single-ended/differential */
350 if (aref == AREF_DIFF)
351 devpriv->cmd4 |= CMD4_SEDIFF;
352 devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
354 /* initialize pacer counter to prevent any problems */
355 ret = labpc_counter_set_mode(dev, dev->iobase + COUNTER_A_BASE_REG,
360 labpc_clear_adc_fifo(dev);
362 for (i = 0; i < insn->n; i++) {
363 /* trigger conversion */
364 devpriv->write_byte(0x1, dev->iobase + ADC_START_CONVERT_REG);
366 ret = labpc_ai_wait_for_data(dev, LABPC_ADC_TIMEOUT);
370 data[i] = labpc_read_adc_fifo(dev);
376 static bool labpc_use_continuous_mode(const struct comedi_cmd *cmd,
379 if (mode == MODE_SINGLE_CHAN || cmd->scan_begin_src == TRIG_FOLLOW)
385 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
388 if (cmd->convert_src != TRIG_TIMER)
391 if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
392 return cmd->scan_begin_arg;
394 return cmd->convert_arg;
397 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
398 enum scan_mode mode, unsigned int ns)
400 if (cmd->convert_src != TRIG_TIMER)
403 if (mode == MODE_SINGLE_CHAN &&
404 cmd->scan_begin_src == TRIG_TIMER) {
405 cmd->scan_begin_arg = ns;
406 if (cmd->convert_arg > cmd->scan_begin_arg)
407 cmd->convert_arg = cmd->scan_begin_arg;
409 cmd->convert_arg = ns;
412 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
415 if (cmd->scan_begin_src != TRIG_TIMER)
418 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
421 return cmd->scan_begin_arg;
424 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
425 enum scan_mode mode, unsigned int ns)
427 if (cmd->scan_begin_src != TRIG_TIMER)
430 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
433 cmd->scan_begin_arg = ns;
436 /* figures out what counter values to use based on command */
437 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
440 struct labpc_private *devpriv = dev->private;
441 /* max value for 16 bit counter in mode 2 */
442 const int max_counter_value = 0x10000;
443 /* min value for 16 bit counter in mode 2 */
444 const int min_counter_value = 2;
445 unsigned int base_period;
446 unsigned int scan_period;
447 unsigned int convert_period;
450 * if both convert and scan triggers are TRIG_TIMER, then they
451 * both rely on counter b0
453 convert_period = labpc_ai_convert_period(cmd, mode);
454 scan_period = labpc_ai_scan_period(cmd, mode);
455 if (convert_period && scan_period) {
457 * pick the lowest b0 divisor value we can (for maximum input
458 * clock speed on convert and scan counters)
460 devpriv->divisor_b0 = (scan_period - 1) /
461 (I8254_OSC_BASE_2MHZ * max_counter_value) + 1;
462 if (devpriv->divisor_b0 < min_counter_value)
463 devpriv->divisor_b0 = min_counter_value;
464 if (devpriv->divisor_b0 > max_counter_value)
465 devpriv->divisor_b0 = max_counter_value;
467 base_period = I8254_OSC_BASE_2MHZ * devpriv->divisor_b0;
469 /* set a0 for conversion frequency and b1 for scan frequency */
470 switch (cmd->flags & TRIG_ROUND_MASK) {
472 case TRIG_ROUND_NEAREST:
473 devpriv->divisor_a0 =
474 (convert_period + (base_period / 2)) / base_period;
475 devpriv->divisor_b1 =
476 (scan_period + (base_period / 2)) / base_period;
479 devpriv->divisor_a0 =
480 (convert_period + (base_period - 1)) / base_period;
481 devpriv->divisor_b1 =
482 (scan_period + (base_period - 1)) / base_period;
484 case TRIG_ROUND_DOWN:
485 devpriv->divisor_a0 = convert_period / base_period;
486 devpriv->divisor_b1 = scan_period / base_period;
489 /* make sure a0 and b1 values are acceptable */
490 if (devpriv->divisor_a0 < min_counter_value)
491 devpriv->divisor_a0 = min_counter_value;
492 if (devpriv->divisor_a0 > max_counter_value)
493 devpriv->divisor_a0 = max_counter_value;
494 if (devpriv->divisor_b1 < min_counter_value)
495 devpriv->divisor_b1 = min_counter_value;
496 if (devpriv->divisor_b1 > max_counter_value)
497 devpriv->divisor_b1 = max_counter_value;
498 /* write corrected timings to command */
499 labpc_set_ai_convert_period(cmd, mode,
500 base_period * devpriv->divisor_a0);
501 labpc_set_ai_scan_period(cmd, mode,
502 base_period * devpriv->divisor_b1);
504 * if only one TRIG_TIMER is used, we can employ the generic
505 * cascaded timing functions
507 } else if (scan_period) {
509 * calculate cascaded counter values
510 * that give desired scan timing
512 i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
513 &devpriv->divisor_b1,
514 &devpriv->divisor_b0,
515 &scan_period, cmd->flags);
516 labpc_set_ai_scan_period(cmd, mode, scan_period);
517 } else if (convert_period) {
519 * calculate cascaded counter values
520 * that give desired conversion timing
522 i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
523 &devpriv->divisor_a0,
524 &devpriv->divisor_b0,
525 &convert_period, cmd->flags);
526 labpc_set_ai_convert_period(cmd, mode, convert_period);
530 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
532 if (cmd->chanlist_len == 1)
533 return MODE_SINGLE_CHAN;
535 /* chanlist may be NULL during cmdtest. */
536 if (cmd->chanlist == NULL)
537 return MODE_MULT_CHAN_UP;
539 if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
540 return MODE_SINGLE_CHAN_INTERVAL;
542 if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
543 return MODE_MULT_CHAN_UP;
545 if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
546 return MODE_MULT_CHAN_DOWN;
548 pr_err("ni_labpc: bug! cannot determine AI scan mode\n");
552 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
553 const struct comedi_cmd *cmd,
556 int channel, range, aref, i;
558 if (cmd->chanlist == NULL)
561 if (mode == MODE_SINGLE_CHAN)
564 if (mode == MODE_SINGLE_CHAN_INTERVAL) {
565 if (cmd->chanlist_len > 0xff) {
567 "ni_labpc: chanlist too long for single channel interval mode\n");
572 channel = CR_CHAN(cmd->chanlist[0]);
573 range = CR_RANGE(cmd->chanlist[0]);
574 aref = CR_AREF(cmd->chanlist[0]);
576 for (i = 0; i < cmd->chanlist_len; i++) {
579 case MODE_SINGLE_CHAN_INTERVAL:
580 if (CR_CHAN(cmd->chanlist[i]) != channel) {
582 "channel scanning order specified in chanlist is not supported by hardware.\n");
586 case MODE_MULT_CHAN_UP:
587 if (CR_CHAN(cmd->chanlist[i]) != i) {
589 "channel scanning order specified in chanlist is not supported by hardware.\n");
593 case MODE_MULT_CHAN_DOWN:
594 if (CR_CHAN(cmd->chanlist[i]) !=
595 cmd->chanlist_len - i - 1) {
597 "channel scanning order specified in chanlist is not supported by hardware.\n");
602 dev_err(dev->class_dev,
603 "ni_labpc: bug! in chanlist check\n");
608 if (CR_RANGE(cmd->chanlist[i]) != range) {
610 "entries in chanlist must all have the same range\n");
614 if (CR_AREF(cmd->chanlist[i]) != aref) {
616 "entries in chanlist must all have the same reference\n");
624 static int labpc_ai_cmdtest(struct comedi_device *dev,
625 struct comedi_subdevice *s, struct comedi_cmd *cmd)
627 const struct labpc_boardinfo *board = comedi_board(dev);
630 unsigned int stop_mask;
633 /* Step 1 : check if triggers are trivially valid */
635 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
636 err |= cfc_check_trigger_src(&cmd->scan_begin_src,
637 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
638 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
639 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
641 stop_mask = TRIG_COUNT | TRIG_NONE;
642 if (board->is_labpc1200)
643 stop_mask |= TRIG_EXT;
644 err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
649 /* Step 2a : make sure trigger sources are unique */
651 err |= cfc_check_trigger_is_unique(cmd->start_src);
652 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
653 err |= cfc_check_trigger_is_unique(cmd->convert_src);
654 err |= cfc_check_trigger_is_unique(cmd->stop_src);
656 /* Step 2b : and mutually compatible */
658 /* can't have external stop and start triggers at once */
659 if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
665 /* Step 3: check if arguments are trivially valid */
667 if (cmd->start_arg == TRIG_NOW)
668 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
670 if (!cmd->chanlist_len)
672 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
674 if (cmd->convert_src == TRIG_TIMER)
675 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
678 /* make sure scan timing is not too fast */
679 if (cmd->scan_begin_src == TRIG_TIMER) {
680 if (cmd->convert_src == TRIG_TIMER)
681 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
682 cmd->convert_arg * cmd->chanlist_len);
683 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
684 board->ai_speed * cmd->chanlist_len);
687 switch (cmd->stop_src) {
689 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
692 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
695 * TRIG_EXT doesn't care since it doesn't
696 * trigger off a numbered channel
705 /* step 4: fix up any arguments */
707 tmp = cmd->convert_arg;
708 tmp2 = cmd->scan_begin_arg;
709 mode = labpc_ai_scan_mode(cmd);
710 labpc_adc_timing(dev, cmd, mode);
711 if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
717 if (labpc_ai_chanlist_invalid(dev, cmd, mode))
723 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
725 const struct labpc_boardinfo *board = comedi_board(dev);
726 struct labpc_private *devpriv = dev->private;
727 struct comedi_async *async = s->async;
728 struct comedi_cmd *cmd = &async->cmd;
729 enum scan_mode mode = labpc_ai_scan_mode(cmd);
730 unsigned int chanspec = (mode == MODE_MULT_CHAN_UP)
731 ? cmd->chanlist[cmd->chanlist_len - 1]
733 unsigned int chan = CR_CHAN(chanspec);
734 unsigned int range = CR_RANGE(chanspec);
735 unsigned int aref = CR_AREF(chanspec);
736 enum transfer_type xfer;
740 /* make sure board is disabled before setting up acquisition */
741 labpc_cancel(dev, s);
743 /* initialize software conversion count */
744 if (cmd->stop_src == TRIG_COUNT)
745 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
747 /* setup hardware conversion counter */
748 if (cmd->stop_src == TRIG_EXT) {
750 * load counter a1 with count of 3
751 * (pc+ manual says this is minimum allowed) using mode 0
753 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
756 /* just put counter a1 in mode 0 to set its output low */
757 ret = labpc_counter_set_mode(dev,
758 dev->iobase + COUNTER_A_BASE_REG,
762 comedi_error(dev, "error loading counter a1");
766 /* figure out what method we will use to transfer data */
767 if (labpc_have_dma_chan(dev) &&
768 /* dma unsafe at RT priority,
769 * and too much setup time for TRIG_WAKE_EOS */
770 (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0)
771 xfer = isa_dma_transfer;
772 else if (/* pc-plus has no fifo-half full interrupt */
773 board->is_labpc1200 &&
774 /* wake-end-of-scan should interrupt on fifo not empty */
775 (cmd->flags & TRIG_WAKE_EOS) == 0 &&
776 /* make sure we are taking more than just a few points */
777 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256))
778 xfer = fifo_half_full_transfer;
780 xfer = fifo_not_empty_transfer;
781 devpriv->current_transfer = xfer;
783 labpc_ai_set_chan_and_gain(dev, mode, chan, range, aref);
785 labpc_setup_cmd6_reg(dev, s, mode, xfer, range, aref,
786 (cmd->stop_src == TRIG_EXT));
788 /* manual says to set scan enable bit on second pass */
789 if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
790 devpriv->cmd1 |= CMD1_SCANEN;
791 /* need a brief delay before enabling scan, or scan
792 * list will get screwed when you switch
793 * between scan up to scan down mode - dunno why */
795 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
798 devpriv->write_byte(cmd->chanlist_len,
799 dev->iobase + INTERVAL_COUNT_REG);
801 devpriv->write_byte(0x1, dev->iobase + INTERVAL_STROBE_REG);
803 if (cmd->convert_src == TRIG_TIMER ||
804 cmd->scan_begin_src == TRIG_TIMER) {
806 labpc_adc_timing(dev, cmd, mode);
807 /* load counter b0 in mode 3 */
808 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
809 0, devpriv->divisor_b0, I8254_MODE3);
811 comedi_error(dev, "error loading counter b0");
815 /* set up conversion pacing */
816 if (labpc_ai_convert_period(cmd, mode)) {
817 /* load counter a0 in mode 2 */
818 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
819 0, devpriv->divisor_a0, I8254_MODE2);
821 /* initialize pacer counter to prevent any problems */
822 ret = labpc_counter_set_mode(dev,
823 dev->iobase + COUNTER_A_BASE_REG,
827 comedi_error(dev, "error loading counter a0");
831 /* set up scan pacing */
832 if (labpc_ai_scan_period(cmd, mode)) {
833 /* load counter b1 in mode 2 */
834 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
835 1, devpriv->divisor_b1, I8254_MODE2);
837 comedi_error(dev, "error loading counter b1");
842 labpc_clear_adc_fifo(dev);
844 if (xfer == isa_dma_transfer)
845 labpc_setup_dma(dev, s);
847 /* enable error interrupts */
848 devpriv->cmd3 |= CMD3_ERRINTEN;
849 /* enable fifo not empty interrupt? */
850 if (xfer == fifo_not_empty_transfer)
851 devpriv->cmd3 |= CMD3_FIFOINTEN;
852 devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
854 /* setup any external triggering/pacing (cmd4 register) */
856 if (cmd->convert_src != TRIG_EXT)
857 devpriv->cmd4 |= CMD4_ECLKRCV;
858 /* XXX should discard first scan when using interval scanning
859 * since manual says it is not synced with scan clock */
860 if (!labpc_use_continuous_mode(cmd, mode)) {
861 devpriv->cmd4 |= CMD4_INTSCAN;
862 if (cmd->scan_begin_src == TRIG_EXT)
863 devpriv->cmd4 |= CMD4_EOIRCV;
865 /* single-ended/differential */
866 if (aref == AREF_DIFF)
867 devpriv->cmd4 |= CMD4_SEDIFF;
868 devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
870 /* startup acquisition */
872 spin_lock_irqsave(&dev->spinlock, flags);
874 /* use 2 cascaded counters for pacing */
875 devpriv->cmd2 |= CMD2_TBSEL;
877 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
878 if (cmd->start_src == TRIG_EXT)
879 devpriv->cmd2 |= CMD2_HWTRIG;
881 devpriv->cmd2 |= CMD2_SWTRIG;
882 if (cmd->stop_src == TRIG_EXT)
883 devpriv->cmd2 |= (CMD2_HWTRIG | CMD2_PRETRIG);
885 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
887 spin_unlock_irqrestore(&dev->spinlock, flags);
892 /* read all available samples from ai fifo */
893 static int labpc_drain_fifo(struct comedi_device *dev)
895 struct labpc_private *devpriv = dev->private;
897 struct comedi_async *async = dev->read_subdev->async;
898 const int timeout = 10000;
901 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
903 for (i = 0; (devpriv->stat1 & STAT1_DAVAIL) && i < timeout;
905 /* quit if we have all the data we want */
906 if (async->cmd.stop_src == TRIG_COUNT) {
907 if (devpriv->count == 0)
911 data = labpc_read_adc_fifo(dev);
912 cfc_write_to_buffer(dev->read_subdev, data);
913 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
916 comedi_error(dev, "ai timeout, fifo never empties");
917 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
924 /* makes sure all data acquired by board is transferred to comedi (used
925 * when acquisition is terminated by stop_src == TRIG_EXT). */
926 static void labpc_drain_dregs(struct comedi_device *dev)
928 struct labpc_private *devpriv = dev->private;
930 if (devpriv->current_transfer == isa_dma_transfer)
931 labpc_drain_dma(dev);
933 labpc_drain_fifo(dev);
936 /* interrupt service routine */
937 static irqreturn_t labpc_interrupt(int irq, void *d)
939 struct comedi_device *dev = d;
940 const struct labpc_boardinfo *board = comedi_board(dev);
941 struct labpc_private *devpriv = dev->private;
942 struct comedi_subdevice *s = dev->read_subdev;
943 struct comedi_async *async;
944 struct comedi_cmd *cmd;
946 if (!dev->attached) {
947 comedi_error(dev, "premature interrupt");
955 /* read board status */
956 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
957 if (board->is_labpc1200)
958 devpriv->stat2 = devpriv->read_byte(dev->iobase + STAT2_REG);
960 if ((devpriv->stat1 & (STAT1_GATA0 | STAT1_CNTINT | STAT1_OVERFLOW |
961 STAT1_OVERRUN | STAT1_DAVAIL)) == 0
962 && (devpriv->stat2 & STAT2_OUTA1) == 0
963 && (devpriv->stat2 & STAT2_FIFONHF)) {
967 if (devpriv->stat1 & STAT1_OVERRUN) {
968 /* clear error interrupt */
969 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
970 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
971 comedi_event(dev, s);
972 comedi_error(dev, "overrun");
976 if (devpriv->current_transfer == isa_dma_transfer)
977 labpc_handle_dma_status(dev);
979 labpc_drain_fifo(dev);
981 if (devpriv->stat1 & STAT1_CNTINT) {
982 comedi_error(dev, "handled timer interrupt?");
984 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
987 if (devpriv->stat1 & STAT1_OVERFLOW) {
988 /* clear error interrupt */
989 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
990 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
991 comedi_event(dev, s);
992 comedi_error(dev, "overflow");
995 /* handle external stop trigger */
996 if (cmd->stop_src == TRIG_EXT) {
997 if (devpriv->stat2 & STAT2_OUTA1) {
998 labpc_drain_dregs(dev);
999 labpc_cancel(dev, s);
1000 async->events |= COMEDI_CB_EOA;
1004 /* TRIG_COUNT end of acquisition */
1005 if (cmd->stop_src == TRIG_COUNT) {
1006 if (devpriv->count == 0) {
1007 labpc_cancel(dev, s);
1008 async->events |= COMEDI_CB_EOA;
1012 comedi_event(dev, s);
1016 static int labpc_ao_insn_write(struct comedi_device *dev,
1017 struct comedi_subdevice *s,
1018 struct comedi_insn *insn,
1021 const struct labpc_boardinfo *board = comedi_board(dev);
1022 struct labpc_private *devpriv = dev->private;
1024 unsigned long flags;
1027 channel = CR_CHAN(insn->chanspec);
1029 /* turn off pacing of analog output channel */
1030 /* note: hardware bug in daqcard-1200 means pacing cannot
1031 * be independently enabled/disabled for its the two channels */
1032 spin_lock_irqsave(&dev->spinlock, flags);
1033 devpriv->cmd2 &= ~CMD2_LDAC(channel);
1034 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1035 spin_unlock_irqrestore(&dev->spinlock, flags);
1038 if (board->is_labpc1200) {
1039 range = CR_RANGE(insn->chanspec);
1040 if (comedi_range_is_unipolar(s, range))
1041 devpriv->cmd6 |= CMD6_DACUNI(channel);
1043 devpriv->cmd6 &= ~CMD6_DACUNI(channel);
1044 /* write to register */
1045 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
1048 lsb = data[0] & 0xff;
1049 msb = (data[0] >> 8) & 0xff;
1050 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1051 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1053 /* remember value for readback */
1054 devpriv->ao_value[channel] = data[0];
1059 static int labpc_ao_insn_read(struct comedi_device *dev,
1060 struct comedi_subdevice *s,
1061 struct comedi_insn *insn,
1064 struct labpc_private *devpriv = dev->private;
1066 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1071 static int labpc_8255_mmio(int dir, int port, int data, unsigned long iobase)
1074 writeb(data, (void __iomem *)(iobase + port));
1077 return readb((void __iomem *)(iobase + port));
1081 /* lowlevel write to eeprom/dac */
1082 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1083 unsigned int value_width)
1085 struct labpc_private *devpriv = dev->private;
1088 for (i = 1; i <= value_width; i++) {
1089 /* clear serial clock */
1090 devpriv->cmd5 &= ~CMD5_SCLK;
1091 /* send bits most significant bit first */
1092 if (value & (1 << (value_width - i)))
1093 devpriv->cmd5 |= CMD5_SDATA;
1095 devpriv->cmd5 &= ~CMD5_SDATA;
1097 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1098 /* set clock to load bit */
1099 devpriv->cmd5 |= CMD5_SCLK;
1101 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1105 /* lowlevel read from eeprom */
1106 static unsigned int labpc_serial_in(struct comedi_device *dev)
1108 struct labpc_private *devpriv = dev->private;
1109 unsigned int value = 0;
1111 const int value_width = 8; /* number of bits wide values are */
1113 for (i = 1; i <= value_width; i++) {
1114 /* set serial clock */
1115 devpriv->cmd5 |= CMD5_SCLK;
1117 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1118 /* clear clock bit */
1119 devpriv->cmd5 &= ~CMD5_SCLK;
1121 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1122 /* read bits most significant bit first */
1124 devpriv->stat2 = devpriv->read_byte(dev->iobase + STAT2_REG);
1125 if (devpriv->stat2 & STAT2_PROMOUT)
1126 value |= 1 << (value_width - i);
1132 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1133 unsigned int address)
1135 struct labpc_private *devpriv = dev->private;
1137 /* bits to tell eeprom to expect a read */
1138 const int read_instruction = 0x3;
1139 /* 8 bit write lengths to eeprom */
1140 const int write_length = 8;
1142 /* enable read/write to eeprom */
1143 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1145 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1146 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1148 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1150 /* send read instruction */
1151 labpc_serial_out(dev, read_instruction, write_length);
1152 /* send 8 bit address to read from */
1153 labpc_serial_out(dev, address, write_length);
1155 value = labpc_serial_in(dev);
1157 /* disable read/write to eeprom */
1158 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1160 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1165 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1167 struct labpc_private *devpriv = dev->private;
1169 const int read_status_instruction = 0x5;
1170 const int write_length = 8; /* 8 bit write lengths to eeprom */
1172 /* enable read/write to eeprom */
1173 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1175 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1176 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1178 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1180 /* send read status instruction */
1181 labpc_serial_out(dev, read_status_instruction, write_length);
1183 value = labpc_serial_in(dev);
1185 /* disable read/write to eeprom */
1186 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1188 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1193 static int labpc_eeprom_write(struct comedi_device *dev,
1194 unsigned int address, unsigned int value)
1196 struct labpc_private *devpriv = dev->private;
1197 const int write_enable_instruction = 0x6;
1198 const int write_instruction = 0x2;
1199 const int write_length = 8; /* 8 bit write lengths to eeprom */
1200 const int write_in_progress_bit = 0x1;
1201 const int timeout = 10000;
1204 /* make sure there isn't already a write in progress */
1205 for (i = 0; i < timeout; i++) {
1206 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1211 comedi_error(dev, "eeprom write timed out");
1214 /* update software copy of eeprom */
1215 devpriv->eeprom_data[address] = value;
1217 /* enable read/write to eeprom */
1218 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1220 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1221 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1223 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1225 /* send write_enable instruction */
1226 labpc_serial_out(dev, write_enable_instruction, write_length);
1227 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1229 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1231 /* send write instruction */
1232 devpriv->cmd5 |= CMD5_EEPROMCS;
1234 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1235 labpc_serial_out(dev, write_instruction, write_length);
1236 /* send 8 bit address to write to */
1237 labpc_serial_out(dev, address, write_length);
1239 labpc_serial_out(dev, value, write_length);
1240 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1242 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1244 /* disable read/write to eeprom */
1245 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1247 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1252 /* writes to 8 bit calibration dacs */
1253 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1256 struct labpc_private *devpriv = dev->private;
1258 if (value == devpriv->caldac[channel])
1260 devpriv->caldac[channel] = value;
1262 /* clear caldac load bit and make sure we don't write to eeprom */
1263 devpriv->cmd5 &= ~(CMD5_CALDACLD | CMD5_EEPROMCS | CMD5_WRTPRT);
1265 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1267 /* write 4 bit channel */
1268 labpc_serial_out(dev, channel, 4);
1269 /* write 8 bit caldac value */
1270 labpc_serial_out(dev, value, 8);
1272 /* set and clear caldac bit to load caldac value */
1273 devpriv->cmd5 |= CMD5_CALDACLD;
1275 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1276 devpriv->cmd5 &= ~CMD5_CALDACLD;
1278 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1281 static int labpc_calib_insn_write(struct comedi_device *dev,
1282 struct comedi_subdevice *s,
1283 struct comedi_insn *insn,
1286 unsigned int chan = CR_CHAN(insn->chanspec);
1289 * Only write the last data value to the caldac. Preceding
1290 * data would be overwritten anyway.
1293 write_caldac(dev, chan, data[insn->n - 1]);
1298 static int labpc_calib_insn_read(struct comedi_device *dev,
1299 struct comedi_subdevice *s,
1300 struct comedi_insn *insn,
1303 struct labpc_private *devpriv = dev->private;
1304 unsigned int chan = CR_CHAN(insn->chanspec);
1307 for (i = 0; i < insn->n; i++)
1308 data[i] = devpriv->caldac[chan];
1313 static int labpc_eeprom_insn_write(struct comedi_device *dev,
1314 struct comedi_subdevice *s,
1315 struct comedi_insn *insn,
1318 unsigned int chan = CR_CHAN(insn->chanspec);
1321 /* only allow writes to user area of eeprom */
1322 if (chan < 16 || chan > 127)
1326 * Only write the last data value to the eeprom. Preceding
1327 * data would be overwritten anyway.
1330 ret = labpc_eeprom_write(dev, chan, data[insn->n - 1]);
1338 static int labpc_eeprom_insn_read(struct comedi_device *dev,
1339 struct comedi_subdevice *s,
1340 struct comedi_insn *insn,
1343 struct labpc_private *devpriv = dev->private;
1344 unsigned int chan = CR_CHAN(insn->chanspec);
1347 for (i = 0; i < insn->n; i++)
1348 data[i] = devpriv->eeprom_data[chan];
1353 int labpc_common_attach(struct comedi_device *dev,
1354 unsigned int irq, unsigned long isr_flags)
1356 const struct labpc_boardinfo *board = comedi_board(dev);
1357 struct labpc_private *devpriv = dev->private;
1358 struct comedi_subdevice *s;
1362 if (board->has_mmio) {
1363 devpriv->read_byte = labpc_readb;
1364 devpriv->write_byte = labpc_writeb;
1366 devpriv->read_byte = labpc_inb;
1367 devpriv->write_byte = labpc_outb;
1370 /* initialize board's command registers */
1371 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
1372 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1373 devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
1374 devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
1375 if (board->is_labpc1200) {
1376 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1377 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
1381 ret = request_irq(irq, labpc_interrupt, isr_flags,
1382 dev->board_name, dev);
1387 ret = comedi_alloc_subdevices(dev, 5);
1391 /* analog input subdevice */
1392 s = &dev->subdevices[0];
1393 s->type = COMEDI_SUBD_AI;
1394 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1396 s->len_chanlist = 8;
1397 s->maxdata = 0x0fff;
1398 s->range_table = board->is_labpc1200
1399 ? &range_labpc_1200_ai : &range_labpc_plus_ai;
1400 s->insn_read = labpc_ai_insn_read;
1402 dev->read_subdev = s;
1403 s->subdev_flags |= SDF_CMD_READ;
1404 s->do_cmd = labpc_ai_cmd;
1405 s->do_cmdtest = labpc_ai_cmdtest;
1406 s->cancel = labpc_cancel;
1410 s = &dev->subdevices[1];
1411 if (board->has_ao) {
1412 s->type = COMEDI_SUBD_AO;
1413 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1414 s->n_chan = NUM_AO_CHAN;
1415 s->maxdata = 0x0fff;
1416 s->range_table = &range_labpc_ao;
1417 s->insn_read = labpc_ao_insn_read;
1418 s->insn_write = labpc_ao_insn_write;
1420 /* initialize analog outputs to a known value */
1421 for (i = 0; i < s->n_chan; i++) {
1424 devpriv->ao_value[i] = s->maxdata / 2;
1425 lsb = devpriv->ao_value[i] & 0xff;
1426 msb = (devpriv->ao_value[i] >> 8) & 0xff;
1427 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
1428 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
1431 s->type = COMEDI_SUBD_UNUSED;
1435 s = &dev->subdevices[2];
1436 ret = subdev_8255_init(dev, s,
1437 (board->has_mmio) ? labpc_8255_mmio : NULL,
1438 dev->iobase + DIO_BASE_REG);
1442 /* calibration subdevices for boards that have one */
1443 s = &dev->subdevices[3];
1444 if (board->is_labpc1200) {
1445 s->type = COMEDI_SUBD_CALIB;
1446 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1449 s->insn_read = labpc_calib_insn_read;
1450 s->insn_write = labpc_calib_insn_write;
1452 for (i = 0; i < s->n_chan; i++)
1453 write_caldac(dev, i, s->maxdata / 2);
1455 s->type = COMEDI_SUBD_UNUSED;
1458 s = &dev->subdevices[4];
1459 if (board->is_labpc1200) {
1460 s->type = COMEDI_SUBD_MEMORY;
1461 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1462 s->n_chan = EEPROM_SIZE;
1464 s->insn_read = labpc_eeprom_insn_read;
1465 s->insn_write = labpc_eeprom_insn_write;
1467 for (i = 0; i < s->n_chan; i++)
1468 devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
1470 s->type = COMEDI_SUBD_UNUSED;
1474 EXPORT_SYMBOL_GPL(labpc_common_attach);
1476 #if IS_ENABLED(CONFIG_COMEDI_NI_LABPC_ISA)
1477 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1479 struct labpc_private *devpriv;
1480 unsigned int irq = it->options[1];
1481 unsigned int dma_chan = it->options[2];
1484 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1488 ret = comedi_request_region(dev, it->options[0], LABPC_SIZE);
1492 ret = labpc_common_attach(dev, irq, 0);
1497 labpc_init_dma_chan(dev, dma_chan);
1502 static void labpc_detach(struct comedi_device *dev)
1504 struct labpc_private *devpriv = dev->private;
1507 labpc_free_dma_chan(dev);
1509 comedi_legacy_detach(dev);
1512 static struct comedi_driver labpc_driver = {
1513 .driver_name = "ni_labpc",
1514 .module = THIS_MODULE,
1515 .attach = labpc_attach,
1516 .detach = labpc_detach,
1517 .num_names = ARRAY_SIZE(labpc_boards),
1518 .board_name = &labpc_boards[0].name,
1519 .offset = sizeof(struct labpc_boardinfo),
1521 module_comedi_driver(labpc_driver);
1523 static int __init labpc_common_init(void)
1527 module_init(labpc_common_init);
1529 static void __exit labpc_common_exit(void)
1532 module_exit(labpc_common_exit);
1535 MODULE_AUTHOR("Comedi http://www.comedi.org");
1536 MODULE_DESCRIPTION("Comedi low-level driver");
1537 MODULE_LICENSE("GPL");