drivers/staging/comedi/drivers/ni_labpc_common.c

   1 /*
   2  * comedi/drivers/ni_labpc_common.c
   3  *
   4  * Common support code for "ni_labpc", "ni_labpc_pci" and "ni_labpc_cs".
   5  *
   6  * Copyright (C) 2001-2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/io.h>
  22 #include <linux/delay.h>
  23
  24 #include "../comedidev.h"
  25
  26 #include "8253.h"
  27 #include "8255.h"
  28 #include "comedi_fc.h"
  29 #include "ni_labpc.h"
  30 #include "ni_labpc_regs.h"
  31 #include "ni_labpc_isadma.h"
  32
  33 enum scan_mode {
  34         MODE_SINGLE_CHAN,
  35         MODE_SINGLE_CHAN_INTERVAL,
  36         MODE_MULT_CHAN_UP,
  37         MODE_MULT_CHAN_DOWN,
  38 };
  39
  40 static const struct comedi_lrange range_labpc_plus_ai = {
  41         16, {
  42                 BIP_RANGE(5),
  43                 BIP_RANGE(4),
  44                 BIP_RANGE(2.5),
  45                 BIP_RANGE(1),
  46                 BIP_RANGE(0.5),
  47                 BIP_RANGE(0.25),
  48                 BIP_RANGE(0.1),
  49                 BIP_RANGE(0.05),
  50                 UNI_RANGE(10),
  51                 UNI_RANGE(8),
  52                 UNI_RANGE(5),
  53                 UNI_RANGE(2),
  54                 UNI_RANGE(1),
  55                 UNI_RANGE(0.5),
  56                 UNI_RANGE(0.2),
  57                 UNI_RANGE(0.1)
  58         }
  59 };
  60
  61 static const struct comedi_lrange range_labpc_1200_ai = {
  62         14, {
  63                 BIP_RANGE(5),
  64                 BIP_RANGE(2.5),
  65                 BIP_RANGE(1),
  66                 BIP_RANGE(0.5),
  67                 BIP_RANGE(0.25),
  68                 BIP_RANGE(0.1),
  69                 BIP_RANGE(0.05),
  70                 UNI_RANGE(10),
  71                 UNI_RANGE(5),
  72                 UNI_RANGE(2),
  73                 UNI_RANGE(1),
  74                 UNI_RANGE(0.5),
  75                 UNI_RANGE(0.2),
  76                 UNI_RANGE(0.1)
  77         }
  78 };
  79
  80 static const struct comedi_lrange range_labpc_ao = {
  81         2, {
  82                 BIP_RANGE(5),
  83                 UNI_RANGE(10)
  84         }
  85 };
  86
  87 /* functions that do inb/outb and readb/writeb so we can use
  88  * function pointers to decide which to use */
  89 static unsigned int labpc_inb(struct comedi_device *dev, unsigned long reg)
  90 {
  91         return inb(dev->iobase + reg);
  92 }
  93
  94 static void labpc_outb(struct comedi_device *dev,
  95                        unsigned int byte, unsigned long reg)
  96 {
  97         outb(byte, dev->iobase + reg);
  98 }
  99
 100 static unsigned int labpc_readb(struct comedi_device *dev, unsigned long reg)
 101 {
 102         return readb(dev->mmio + reg);
 103 }
 104
 105 static void labpc_writeb(struct comedi_device *dev,
 106                          unsigned int byte, unsigned long reg)
 107 {
 108         writeb(byte, dev->mmio + reg);
 109 }
 110
 111 static void labpc_counter_load(struct comedi_device *dev,
 112                                unsigned long reg,
 113                                unsigned int counter_number,
 114                                unsigned int count,
 115                                unsigned int mode)
 116 {
 117         if (dev->mmio) {
 118                 i8254_mm_set_mode(dev->mmio + reg, 0, counter_number, mode);
 119                 i8254_mm_write(dev->mmio + reg, 0, counter_number, count);
 120         } else {
 121                 i8254_set_mode(dev->iobase + reg, 0, counter_number, mode);
 122                 i8254_write(dev->iobase + reg, 0, counter_number, count);
 123         }
 124 }
 125
 126 static void labpc_counter_set_mode(struct comedi_device *dev,
 127                                    unsigned long reg,
 128                                    unsigned int counter_number,
 129                                    unsigned int mode)
 130 {
 131         if (dev->mmio)
 132                 i8254_mm_set_mode(dev->mmio + reg, 0, counter_number, mode);
 133         else
 134                 i8254_set_mode(dev->iobase + reg, 0, counter_number, mode);
 135 }
 136
 137 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 138 {
 139         struct labpc_private *devpriv = dev->private;
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&dev->spinlock, flags);
 143         devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
 144         devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
 145         spin_unlock_irqrestore(&dev->spinlock, flags);
 146
 147         devpriv->cmd3 = 0;
 148         devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG);
 149
 150         return 0;
 151 }
 152
 153 static void labpc_ai_set_chan_and_gain(struct comedi_device *dev,
 154                                        enum scan_mode mode,
 155                                        unsigned int chan,
 156                                        unsigned int range,
 157                                        unsigned int aref)
 158 {
 159         const struct labpc_boardinfo *board = dev->board_ptr;
 160         struct labpc_private *devpriv = dev->private;
 161
 162         if (board->is_labpc1200) {
 163                 /*
 164                  * The LabPC-1200 boards do not have a gain
 165                  * of '0x10'. Skip the range values that would
 166                  * result in this gain.
 167                  */
 168                 range += (range > 0) + (range > 7);
 169         }
 170
 171         /* munge channel bits for differential/scan disabled mode */
 172         if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
 173             aref == AREF_DIFF)
 174                 chan *= 2;
 175         devpriv->cmd1 = CMD1_MA(chan);
 176         devpriv->cmd1 |= CMD1_GAIN(range);
 177
 178         devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG);
 179 }
 180
 181 static void labpc_setup_cmd6_reg(struct comedi_device *dev,
 182                                  struct comedi_subdevice *s,
 183                                  enum scan_mode mode,
 184                                  enum transfer_type xfer,
 185                                  unsigned int range,
 186                                  unsigned int aref,
 187                                  bool ena_intr)
 188 {
 189         const struct labpc_boardinfo *board = dev->board_ptr;
 190         struct labpc_private *devpriv = dev->private;
 191
 192         if (!board->is_labpc1200)
 193                 return;
 194
 195         /* reference inputs to ground or common? */
 196         if (aref != AREF_GROUND)
 197                 devpriv->cmd6 |= CMD6_NRSE;
 198         else
 199                 devpriv->cmd6 &= ~CMD6_NRSE;
 200
 201         /* bipolar or unipolar range? */
 202         if (comedi_range_is_unipolar(s, range))
 203                 devpriv->cmd6 |= CMD6_ADCUNI;
 204         else
 205                 devpriv->cmd6 &= ~CMD6_ADCUNI;
 206
 207         /*  interrupt on fifo half full? */
 208         if (xfer == fifo_half_full_transfer)
 209                 devpriv->cmd6 |= CMD6_HFINTEN;
 210         else
 211                 devpriv->cmd6 &= ~CMD6_HFINTEN;
 212
 213         /* enable interrupt on counter a1 terminal count? */
 214         if (ena_intr)
 215                 devpriv->cmd6 |= CMD6_DQINTEN;
 216         else
 217                 devpriv->cmd6 &= ~CMD6_DQINTEN;
 218
 219         /* are we scanning up or down through channels? */
 220         if (mode == MODE_MULT_CHAN_UP)
 221                 devpriv->cmd6 |= CMD6_SCANUP;
 222         else
 223                 devpriv->cmd6 &= ~CMD6_SCANUP;
 224
 225         devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG);
 226 }
 227
 228 static unsigned int labpc_read_adc_fifo(struct comedi_device *dev)
 229 {
 230         struct labpc_private *devpriv = dev->private;
 231         unsigned int lsb = devpriv->read_byte(dev, ADC_FIFO_REG);
 232         unsigned int msb = devpriv->read_byte(dev, ADC_FIFO_REG);
 233
 234         return (msb << 8) | lsb;
 235 }
 236
 237 static void labpc_clear_adc_fifo(struct comedi_device *dev)
 238 {
 239         struct labpc_private *devpriv = dev->private;
 240
 241         devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
 242         labpc_read_adc_fifo(dev);
 243 }
 244
 245 static int labpc_ai_eoc(struct comedi_device *dev,
 246                         struct comedi_subdevice *s,
 247                         struct comedi_insn *insn,
 248                         unsigned long context)
 249 {
 250         struct labpc_private *devpriv = dev->private;
 251
 252         devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
 253         if (devpriv->stat1 & STAT1_DAVAIL)
 254                 return 0;
 255         return -EBUSY;
 256 }
 257
 258 static int labpc_ai_insn_read(struct comedi_device *dev,
 259                               struct comedi_subdevice *s,
 260                               struct comedi_insn *insn,
 261                               unsigned int *data)
 262 {
 263         struct labpc_private *devpriv = dev->private;
 264         unsigned int chan = CR_CHAN(insn->chanspec);
 265         unsigned int range = CR_RANGE(insn->chanspec);
 266         unsigned int aref = CR_AREF(insn->chanspec);
 267         int ret;
 268         int i;
 269
 270         /* disable timed conversions, interrupt generation and dma */
 271         labpc_cancel(dev, s);
 272
 273         labpc_ai_set_chan_and_gain(dev, MODE_SINGLE_CHAN, chan, range, aref);
 274
 275         labpc_setup_cmd6_reg(dev, s, MODE_SINGLE_CHAN, fifo_not_empty_transfer,
 276                              range, aref, false);
 277
 278         /* setup cmd4 register */
 279         devpriv->cmd4 = 0;
 280         devpriv->cmd4 |= CMD4_ECLKRCV;
 281         /* single-ended/differential */
 282         if (aref == AREF_DIFF)
 283                 devpriv->cmd4 |= CMD4_SEDIFF;
 284         devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
 285
 286         /* initialize pacer counter to prevent any problems */
 287         labpc_counter_set_mode(dev, COUNTER_A_BASE_REG, 0, I8254_MODE2);
 288
 289         labpc_clear_adc_fifo(dev);
 290
 291         for (i = 0; i < insn->n; i++) {
 292                 /* trigger conversion */
 293                 devpriv->write_byte(dev, 0x1, ADC_START_CONVERT_REG);
 294
 295                 ret = comedi_timeout(dev, s, insn, labpc_ai_eoc, 0);
 296                 if (ret)
 297                         return ret;
 298
 299                 data[i] = labpc_read_adc_fifo(dev);
 300         }
 301
 302         return insn->n;
 303 }
 304
 305 static bool labpc_use_continuous_mode(const struct comedi_cmd *cmd,
 306                                       enum scan_mode mode)
 307 {
 308         if (mode == MODE_SINGLE_CHAN || cmd->scan_begin_src == TRIG_FOLLOW)
 309                 return true;
 310
 311         return false;
 312 }
 313
 314 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
 315                                             enum scan_mode mode)
 316 {
 317         if (cmd->convert_src != TRIG_TIMER)
 318                 return 0;
 319
 320         if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
 321                 return cmd->scan_begin_arg;
 322
 323         return cmd->convert_arg;
 324 }
 325
 326 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
 327                                         enum scan_mode mode, unsigned int ns)
 328 {
 329         if (cmd->convert_src != TRIG_TIMER)
 330                 return;
 331
 332         if (mode == MODE_SINGLE_CHAN &&
 333             cmd->scan_begin_src == TRIG_TIMER) {
 334                 cmd->scan_begin_arg = ns;
 335                 if (cmd->convert_arg > cmd->scan_begin_arg)
 336                         cmd->convert_arg = cmd->scan_begin_arg;
 337         } else {
 338                 cmd->convert_arg = ns;
 339         }
 340 }
 341
 342 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
 343                                          enum scan_mode mode)
 344 {
 345         if (cmd->scan_begin_src != TRIG_TIMER)
 346                 return 0;
 347
 348         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 349                 return 0;
 350
 351         return cmd->scan_begin_arg;
 352 }
 353
 354 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
 355                                      enum scan_mode mode, unsigned int ns)
 356 {
 357         if (cmd->scan_begin_src != TRIG_TIMER)
 358                 return;
 359
 360         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 361                 return;
 362
 363         cmd->scan_begin_arg = ns;
 364 }
 365
 366 /* figures out what counter values to use based on command */
 367 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
 368                              enum scan_mode mode)
 369 {
 370         struct labpc_private *devpriv = dev->private;
 371         unsigned int base_period;
 372         unsigned int scan_period;
 373         unsigned int convert_period;
 374
 375         /*
 376          * if both convert and scan triggers are TRIG_TIMER, then they
 377          * both rely on counter b0
 378          */
 379         convert_period = labpc_ai_convert_period(cmd, mode);
 380         scan_period = labpc_ai_scan_period(cmd, mode);
 381         if (convert_period && scan_period) {
 382                 /*
 383                  * pick the lowest b0 divisor value we can (for maximum input
 384                  * clock speed on convert and scan counters)
 385                  */
 386                 devpriv->divisor_b0 = (scan_period - 1) /
 387                     (I8254_OSC_BASE_2MHZ * 0x10000) + 1;
 388
 389                 cfc_check_trigger_arg_min(&devpriv->divisor_b0, 2);
 390                 cfc_check_trigger_arg_max(&devpriv->divisor_b0, 0x10000);
 391
 392                 base_period = I8254_OSC_BASE_2MHZ * devpriv->divisor_b0;
 393
 394                 /*  set a0 for conversion frequency and b1 for scan frequency */
 395                 switch (cmd->flags & CMDF_ROUND_MASK) {
 396                 default:
 397                 case CMDF_ROUND_NEAREST:
 398                         devpriv->divisor_a0 = DIV_ROUND_CLOSEST(convert_period,
 399                                                                 base_period);
 400                         devpriv->divisor_b1 = DIV_ROUND_CLOSEST(scan_period,
 401                                                                 base_period);
 402                         break;
 403                 case CMDF_ROUND_UP:
 404                         devpriv->divisor_a0 = DIV_ROUND_UP(convert_period,
 405                                                            base_period);
 406                         devpriv->divisor_b1 = DIV_ROUND_UP(scan_period,
 407                                                            base_period);
 408                         break;
 409                 case CMDF_ROUND_DOWN:
 410                         devpriv->divisor_a0 = convert_period / base_period;
 411                         devpriv->divisor_b1 = scan_period / base_period;
 412                         break;
 413                 }
 414                 /*  make sure a0 and b1 values are acceptable */
 415                 cfc_check_trigger_arg_min(&devpriv->divisor_a0, 2);
 416                 cfc_check_trigger_arg_max(&devpriv->divisor_a0, 0x10000);
 417                 cfc_check_trigger_arg_min(&devpriv->divisor_b1, 2);
 418                 cfc_check_trigger_arg_max(&devpriv->divisor_b1, 0x10000);
 419                 /*  write corrected timings to command */
 420                 labpc_set_ai_convert_period(cmd, mode,
 421                                             base_period * devpriv->divisor_a0);
 422                 labpc_set_ai_scan_period(cmd, mode,
 423                                          base_period * devpriv->divisor_b1);
 424                 /*
 425                  * if only one TRIG_TIMER is used, we can employ the generic
 426                  * cascaded timing functions
 427                  */
 428         } else if (scan_period) {
 429                 /*
 430                  * calculate cascaded counter values
 431                  * that give desired scan timing
 432                  */
 433                 i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
 434                                           &devpriv->divisor_b1,
 435                                           &devpriv->divisor_b0,
 436                                           &scan_period, cmd->flags);
 437                 labpc_set_ai_scan_period(cmd, mode, scan_period);
 438         } else if (convert_period) {
 439                 /*
 440                  * calculate cascaded counter values
 441                  * that give desired conversion timing
 442                  */
 443                 i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
 444                                           &devpriv->divisor_a0,
 445                                           &devpriv->divisor_b0,
 446                                           &convert_period, cmd->flags);
 447                 labpc_set_ai_convert_period(cmd, mode, convert_period);
 448         }
 449 }
 450
 451 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 452 {
 453         unsigned int chan0;
 454         unsigned int chan1;
 455
 456         if (cmd->chanlist_len == 1)
 457                 return MODE_SINGLE_CHAN;
 458
 459         /* chanlist may be NULL during cmdtest */
 460         if (cmd->chanlist == NULL)
 461                 return MODE_MULT_CHAN_UP;
 462
 463         chan0 = CR_CHAN(cmd->chanlist[0]);
 464         chan1 = CR_CHAN(cmd->chanlist[1]);
 465
 466         if (chan0 < chan1)
 467                 return MODE_MULT_CHAN_UP;
 468
 469         if (chan0 > chan1)
 470                 return MODE_MULT_CHAN_DOWN;
 471
 472         return MODE_SINGLE_CHAN_INTERVAL;
 473 }
 474
 475 static int labpc_ai_check_chanlist(struct comedi_device *dev,
 476                                    struct comedi_subdevice *s,
 477                                    struct comedi_cmd *cmd)
 478 {
 479         enum scan_mode mode = labpc_ai_scan_mode(cmd);
 480         unsigned int chan0 = CR_CHAN(cmd->chanlist[0]);
 481         unsigned int range0 = CR_RANGE(cmd->chanlist[0]);
 482         unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
 483         int i;
 484
 485         if (mode == MODE_SINGLE_CHAN)
 486                 return 0;
 487
 488         for (i = 0; i < cmd->chanlist_len; i++) {
 489                 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
 490                 unsigned int range = CR_RANGE(cmd->chanlist[i]);
 491                 unsigned int aref = CR_AREF(cmd->chanlist[i]);
 492
 493                 switch (mode) {
 494                 case MODE_SINGLE_CHAN:
 495                         break;
 496                 case MODE_SINGLE_CHAN_INTERVAL:
 497                         if (chan != chan0) {
 498                                 dev_dbg(dev->class_dev,
 499                                         "channel scanning order specified in chanlist is not supported by hardware\n");
 500                                 return -EINVAL;
 501                         }
 502                         break;
 503                 case MODE_MULT_CHAN_UP:
 504                         if (chan != i) {
 505                                 dev_dbg(dev->class_dev,
 506                                         "channel scanning order specified in chanlist is not supported by hardware\n");
 507                                 return -EINVAL;
 508                         }
 509                         break;
 510                 case MODE_MULT_CHAN_DOWN:
 511                         if (chan != (cmd->chanlist_len - i - 1)) {
 512                                 dev_dbg(dev->class_dev,
 513                                         "channel scanning order specified in chanlist is not supported by hardware\n");
 514                                 return -EINVAL;
 515                         }
 516                         break;
 517                 }
 518
 519                 if (range != range0) {
 520                         dev_dbg(dev->class_dev,
 521                                 "entries in chanlist must all have the same range\n");
 522                         return -EINVAL;
 523                 }
 524
 525                 if (aref != aref0) {
 526                         dev_dbg(dev->class_dev,
 527                                 "entries in chanlist must all have the same reference\n");
 528                         return -EINVAL;
 529                 }
 530         }
 531
 532         return 0;
 533 }
 534
 535 static int labpc_ai_cmdtest(struct comedi_device *dev,
 536                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 537 {
 538         const struct labpc_boardinfo *board = dev->board_ptr;
 539         int err = 0;
 540         int tmp, tmp2;
 541         unsigned int stop_mask;
 542         enum scan_mode mode;
 543
 544         /* Step 1 : check if triggers are trivially valid */
 545
 546         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
 547         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
 548                                         TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
 549         err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
 550         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 551
 552         stop_mask = TRIG_COUNT | TRIG_NONE;
 553         if (board->is_labpc1200)
 554                 stop_mask |= TRIG_EXT;
 555         err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
 556
 557         if (err)
 558                 return 1;
 559
 560         /* Step 2a : make sure trigger sources are unique */
 561
 562         err |= cfc_check_trigger_is_unique(cmd->start_src);
 563         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
 564         err |= cfc_check_trigger_is_unique(cmd->convert_src);
 565         err |= cfc_check_trigger_is_unique(cmd->stop_src);
 566
 567         /* Step 2b : and mutually compatible */
 568
 569         /* can't have external stop and start triggers at once */
 570         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
 571                 err++;
 572
 573         if (err)
 574                 return 2;
 575
 576         /* Step 3: check if arguments are trivially valid */
 577
 578         switch (cmd->start_src) {
 579         case TRIG_NOW:
 580                 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
 581                 break;
 582         case TRIG_EXT:
 583                 /* start_arg value is ignored */
 584                 break;
 585         }
 586
 587         if (!cmd->chanlist_len)
 588                 err |= -EINVAL;
 589         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
 590
 591         if (cmd->convert_src == TRIG_TIMER)
 592                 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
 593                                                  board->ai_speed);
 594
 595         /* make sure scan timing is not too fast */
 596         if (cmd->scan_begin_src == TRIG_TIMER) {
 597                 if (cmd->convert_src == TRIG_TIMER)
 598                         err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 599                                         cmd->convert_arg * cmd->chanlist_len);
 600                 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 601                                 board->ai_speed * cmd->chanlist_len);
 602         }
 603
 604         switch (cmd->stop_src) {
 605         case TRIG_COUNT:
 606                 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
 607                 break;
 608         case TRIG_NONE:
 609                 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
 610                 break;
 611                 /*
 612                  * TRIG_EXT doesn't care since it doesn't
 613                  * trigger off a numbered channel
 614                  */
 615         default:
 616                 break;
 617         }
 618
 619         if (err)
 620                 return 3;
 621
 622         /* step 4: fix up any arguments */
 623
 624         tmp = cmd->convert_arg;
 625         tmp2 = cmd->scan_begin_arg;
 626         mode = labpc_ai_scan_mode(cmd);
 627         labpc_adc_timing(dev, cmd, mode);
 628         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
 629                 err++;
 630
 631         if (err)
 632                 return 4;
 633
 634         /* Step 5: check channel list if it exists */
 635         if (cmd->chanlist && cmd->chanlist_len > 0)
 636                 err |= labpc_ai_check_chanlist(dev, s, cmd);
 637
 638         if (err)
 639                 return 5;
 640
 641         return 0;
 642 }
 643
 644 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 645 {
 646         const struct labpc_boardinfo *board = dev->board_ptr;
 647         struct labpc_private *devpriv = dev->private;
 648         struct comedi_async *async = s->async;
 649         struct comedi_cmd *cmd = &async->cmd;
 650         enum scan_mode mode = labpc_ai_scan_mode(cmd);
 651         unsigned int chanspec = (mode == MODE_MULT_CHAN_UP) ?
 652                                 cmd->chanlist[cmd->chanlist_len - 1] :
 653                                 cmd->chanlist[0];
 654         unsigned int chan = CR_CHAN(chanspec);
 655         unsigned int range = CR_RANGE(chanspec);
 656         unsigned int aref = CR_AREF(chanspec);
 657         enum transfer_type xfer;
 658         unsigned long flags;
 659
 660         /* make sure board is disabled before setting up acquisition */
 661         labpc_cancel(dev, s);
 662
 663         /*  initialize software conversion count */
 664         if (cmd->stop_src == TRIG_COUNT)
 665                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
 666
 667         /*  setup hardware conversion counter */
 668         if (cmd->stop_src == TRIG_EXT) {
 669                 /*
 670                  * load counter a1 with count of 3
 671                  * (pc+ manual says this is minimum allowed) using mode 0
 672                  */
 673                 labpc_counter_load(dev, COUNTER_A_BASE_REG,
 674                                    1, 3, I8254_MODE0);
 675         } else  {
 676                 /* just put counter a1 in mode 0 to set its output low */
 677                 labpc_counter_set_mode(dev, COUNTER_A_BASE_REG, 1, I8254_MODE0);
 678         }
 679
 680         /* figure out what method we will use to transfer data */
 681         if (devpriv->dma &&
 682             /* dma unsafe at RT priority,
 683              * and too much setup time for CMDF_WAKE_EOS */
 684             (cmd->flags & (CMDF_WAKE_EOS | CMDF_PRIORITY)) == 0)
 685                 xfer = isa_dma_transfer;
 686         else if (/* pc-plus has no fifo-half full interrupt */
 687                  board->is_labpc1200 &&
 688                  /* wake-end-of-scan should interrupt on fifo not empty */
 689                  (cmd->flags & CMDF_WAKE_EOS) == 0 &&
 690                  /* make sure we are taking more than just a few points */
 691                  (cmd->stop_src != TRIG_COUNT || devpriv->count > 256))
 692                 xfer = fifo_half_full_transfer;
 693         else
 694                 xfer = fifo_not_empty_transfer;
 695         devpriv->current_transfer = xfer;
 696
 697         labpc_ai_set_chan_and_gain(dev, mode, chan, range, aref);
 698
 699         labpc_setup_cmd6_reg(dev, s, mode, xfer, range, aref,
 700                              (cmd->stop_src == TRIG_EXT));
 701
 702         /* manual says to set scan enable bit on second pass */
 703         if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
 704                 devpriv->cmd1 |= CMD1_SCANEN;
 705                 /* need a brief delay before enabling scan, or scan
 706                  * list will get screwed when you switch
 707                  * between scan up to scan down mode - dunno why */
 708                 udelay(1);
 709                 devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG);
 710         }
 711
 712         devpriv->write_byte(dev, cmd->chanlist_len, INTERVAL_COUNT_REG);
 713         /*  load count */
 714         devpriv->write_byte(dev, 0x1, INTERVAL_STROBE_REG);
 715
 716         if (cmd->convert_src == TRIG_TIMER ||
 717             cmd->scan_begin_src == TRIG_TIMER) {
 718                 /*  set up pacing */
 719                 labpc_adc_timing(dev, cmd, mode);
 720                 /*  load counter b0 in mode 3 */
 721                 labpc_counter_load(dev, COUNTER_B_BASE_REG,
 722                                    0, devpriv->divisor_b0, I8254_MODE3);
 723         }
 724         /*  set up conversion pacing */
 725         if (labpc_ai_convert_period(cmd, mode)) {
 726                 /*  load counter a0 in mode 2 */
 727                 labpc_counter_load(dev, COUNTER_A_BASE_REG,
 728                                    0, devpriv->divisor_a0, I8254_MODE2);
 729         } else {
 730                 /* initialize pacer counter to prevent any problems */
 731                 labpc_counter_set_mode(dev, COUNTER_A_BASE_REG, 0, I8254_MODE2);
 732         }
 733
 734         /*  set up scan pacing */
 735         if (labpc_ai_scan_period(cmd, mode)) {
 736                 /*  load counter b1 in mode 2 */
 737                 labpc_counter_load(dev, COUNTER_B_BASE_REG,
 738                                    1, devpriv->divisor_b1, I8254_MODE2);
 739         }
 740
 741         labpc_clear_adc_fifo(dev);
 742
 743         if (xfer == isa_dma_transfer)
 744                 labpc_setup_dma(dev, s);
 745
 746         /*  enable error interrupts */
 747         devpriv->cmd3 |= CMD3_ERRINTEN;
 748         /*  enable fifo not empty interrupt? */
 749         if (xfer == fifo_not_empty_transfer)
 750                 devpriv->cmd3 |= CMD3_FIFOINTEN;
 751         devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG);
 752
 753         /*  setup any external triggering/pacing (cmd4 register) */
 754         devpriv->cmd4 = 0;
 755         if (cmd->convert_src != TRIG_EXT)
 756                 devpriv->cmd4 |= CMD4_ECLKRCV;
 757         /* XXX should discard first scan when using interval scanning
 758          * since manual says it is not synced with scan clock */
 759         if (!labpc_use_continuous_mode(cmd, mode)) {
 760                 devpriv->cmd4 |= CMD4_INTSCAN;
 761                 if (cmd->scan_begin_src == TRIG_EXT)
 762                         devpriv->cmd4 |= CMD4_EOIRCV;
 763         }
 764         /*  single-ended/differential */
 765         if (aref == AREF_DIFF)
 766                 devpriv->cmd4 |= CMD4_SEDIFF;
 767         devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
 768
 769         /*  startup acquisition */
 770
 771         spin_lock_irqsave(&dev->spinlock, flags);
 772
 773         /* use 2 cascaded counters for pacing */
 774         devpriv->cmd2 |= CMD2_TBSEL;
 775
 776         devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
 777         if (cmd->start_src == TRIG_EXT)
 778                 devpriv->cmd2 |= CMD2_HWTRIG;
 779         else
 780                 devpriv->cmd2 |= CMD2_SWTRIG;
 781         if (cmd->stop_src == TRIG_EXT)
 782                 devpriv->cmd2 |= (CMD2_HWTRIG | CMD2_PRETRIG);
 783
 784         devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
 785
 786         spin_unlock_irqrestore(&dev->spinlock, flags);
 787
 788         return 0;
 789 }
 790
 791 /* read all available samples from ai fifo */
 792 static int labpc_drain_fifo(struct comedi_device *dev)
 793 {
 794         struct labpc_private *devpriv = dev->private;
 795         struct comedi_async *async = dev->read_subdev->async;
 796         struct comedi_cmd *cmd = &async->cmd;
 797         unsigned short data;
 798         const int timeout = 10000;
 799         unsigned int i;
 800
 801         devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
 802
 803         for (i = 0; (devpriv->stat1 & STAT1_DAVAIL) && i < timeout;
 804              i++) {
 805                 /*  quit if we have all the data we want */
 806                 if (cmd->stop_src == TRIG_COUNT) {
 807                         if (devpriv->count == 0)
 808                                 break;
 809                         devpriv->count--;
 810                 }
 811                 data = labpc_read_adc_fifo(dev);
 812                 comedi_buf_write_samples(dev->read_subdev, &data, 1);
 813                 devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
 814         }
 815         if (i == timeout) {
 816                 dev_err(dev->class_dev, "ai timeout, fifo never empties\n");
 817                 async->events |= COMEDI_CB_ERROR;
 818                 return -1;
 819         }
 820
 821         return 0;
 822 }
 823
 824 /* makes sure all data acquired by board is transferred to comedi (used
 825  * when acquisition is terminated by stop_src == TRIG_EXT). */
 826 static void labpc_drain_dregs(struct comedi_device *dev)
 827 {
 828         struct labpc_private *devpriv = dev->private;
 829
 830         if (devpriv->current_transfer == isa_dma_transfer)
 831                 labpc_drain_dma(dev);
 832
 833         labpc_drain_fifo(dev);
 834 }
 835
 836 /* interrupt service routine */
 837 static irqreturn_t labpc_interrupt(int irq, void *d)
 838 {
 839         struct comedi_device *dev = d;
 840         const struct labpc_boardinfo *board = dev->board_ptr;
 841         struct labpc_private *devpriv = dev->private;
 842         struct comedi_subdevice *s = dev->read_subdev;
 843         struct comedi_async *async;
 844         struct comedi_cmd *cmd;
 845
 846         if (!dev->attached) {
 847                 dev_err(dev->class_dev, "premature interrupt\n");
 848                 return IRQ_HANDLED;
 849         }
 850
 851         async = s->async;
 852         cmd = &async->cmd;
 853
 854         /* read board status */
 855         devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
 856         if (board->is_labpc1200)
 857                 devpriv->stat2 = devpriv->read_byte(dev, STAT2_REG);
 858
 859         if ((devpriv->stat1 & (STAT1_GATA0 | STAT1_CNTINT | STAT1_OVERFLOW |
 860                                STAT1_OVERRUN | STAT1_DAVAIL)) == 0 &&
 861             (devpriv->stat2 & STAT2_OUTA1) == 0 &&
 862             (devpriv->stat2 & STAT2_FIFONHF)) {
 863                 return IRQ_NONE;
 864         }
 865
 866         if (devpriv->stat1 & STAT1_OVERRUN) {
 867                 /* clear error interrupt */
 868                 devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
 869                 async->events |= COMEDI_CB_ERROR;
 870                 comedi_handle_events(dev, s);
 871                 dev_err(dev->class_dev, "overrun\n");
 872                 return IRQ_HANDLED;
 873         }
 874
 875         if (devpriv->current_transfer == isa_dma_transfer)
 876                 labpc_handle_dma_status(dev);
 877         else
 878                 labpc_drain_fifo(dev);
 879
 880         if (devpriv->stat1 & STAT1_CNTINT) {
 881                 dev_err(dev->class_dev, "handled timer interrupt?\n");
 882                 /*  clear it */
 883                 devpriv->write_byte(dev, 0x1, TIMER_CLEAR_REG);
 884         }
 885
 886         if (devpriv->stat1 & STAT1_OVERFLOW) {
 887                 /*  clear error interrupt */
 888                 devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
 889                 async->events |= COMEDI_CB_ERROR;
 890                 comedi_handle_events(dev, s);
 891                 dev_err(dev->class_dev, "overflow\n");
 892                 return IRQ_HANDLED;
 893         }
 894         /*  handle external stop trigger */
 895         if (cmd->stop_src == TRIG_EXT) {
 896                 if (devpriv->stat2 & STAT2_OUTA1) {
 897                         labpc_drain_dregs(dev);
 898                         async->events |= COMEDI_CB_EOA;
 899                 }
 900         }
 901
 902         /* TRIG_COUNT end of acquisition */
 903         if (cmd->stop_src == TRIG_COUNT) {
 904                 if (devpriv->count == 0)
 905                         async->events |= COMEDI_CB_EOA;
 906         }
 907
 908         comedi_handle_events(dev, s);
 909         return IRQ_HANDLED;
 910 }
 911
 912 static void labpc_ao_write(struct comedi_device *dev,
 913                            struct comedi_subdevice *s,
 914                            unsigned int chan, unsigned int val)
 915 {
 916         struct labpc_private *devpriv = dev->private;
 917
 918         devpriv->write_byte(dev, val & 0xff, DAC_LSB_REG(chan));
 919         devpriv->write_byte(dev, (val >> 8) & 0xff, DAC_MSB_REG(chan));
 920
 921         s->readback[chan] = val;
 922 }
 923
 924 static int labpc_ao_insn_write(struct comedi_device *dev,
 925                                struct comedi_subdevice *s,
 926                                struct comedi_insn *insn,
 927                                unsigned int *data)
 928 {
 929         const struct labpc_boardinfo *board = dev->board_ptr;
 930         struct labpc_private *devpriv = dev->private;
 931         int channel, range;
 932         unsigned long flags;
 933
 934         channel = CR_CHAN(insn->chanspec);
 935
 936         /* turn off pacing of analog output channel */
 937         /* note: hardware bug in daqcard-1200 means pacing cannot
 938          * be independently enabled/disabled for its the two channels */
 939         spin_lock_irqsave(&dev->spinlock, flags);
 940         devpriv->cmd2 &= ~CMD2_LDAC(channel);
 941         devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
 942         spin_unlock_irqrestore(&dev->spinlock, flags);
 943
 944         /* set range */
 945         if (board->is_labpc1200) {
 946                 range = CR_RANGE(insn->chanspec);
 947                 if (comedi_range_is_unipolar(s, range))
 948                         devpriv->cmd6 |= CMD6_DACUNI(channel);
 949                 else
 950                         devpriv->cmd6 &= ~CMD6_DACUNI(channel);
 951                 /*  write to register */
 952                 devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG);
 953         }
 954         /* send data */
 955         labpc_ao_write(dev, s, channel, data[0]);
 956
 957         return 1;
 958 }
 959
 960 /* lowlevel write to eeprom/dac */
 961 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 962                              unsigned int value_width)
 963 {
 964         struct labpc_private *devpriv = dev->private;
 965         int i;
 966
 967         for (i = 1; i <= value_width; i++) {
 968                 /*  clear serial clock */
 969                 devpriv->cmd5 &= ~CMD5_SCLK;
 970                 /*  send bits most significant bit first */
 971                 if (value & (1 << (value_width - i)))
 972                         devpriv->cmd5 |= CMD5_SDATA;
 973                 else
 974                         devpriv->cmd5 &= ~CMD5_SDATA;
 975                 udelay(1);
 976                 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
 977                 /*  set clock to load bit */
 978                 devpriv->cmd5 |= CMD5_SCLK;
 979                 udelay(1);
 980                 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
 981         }
 982 }
 983
 984 /* lowlevel read from eeprom */
 985 static unsigned int labpc_serial_in(struct comedi_device *dev)
 986 {
 987         struct labpc_private *devpriv = dev->private;
 988         unsigned int value = 0;
 989         int i;
 990         const int value_width = 8;      /*  number of bits wide values are */
 991
 992         for (i = 1; i <= value_width; i++) {
 993                 /*  set serial clock */
 994                 devpriv->cmd5 |= CMD5_SCLK;
 995                 udelay(1);
 996                 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
 997                 /*  clear clock bit */
 998                 devpriv->cmd5 &= ~CMD5_SCLK;
 999                 udelay(1);
1000                 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1001                 /*  read bits most significant bit first */
1002                 udelay(1);
1003                 devpriv->stat2 = devpriv->read_byte(dev, STAT2_REG);
1004                 if (devpriv->stat2 & STAT2_PROMOUT)
1005                         value |= 1 << (value_width - i);
1006         }
1007
1008         return value;
1009 }
1010
1011 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1012                                       unsigned int address)
1013 {
1014         struct labpc_private *devpriv = dev->private;
1015         unsigned int value;
1016         /*  bits to tell eeprom to expect a read */
1017         const int read_instruction = 0x3;
1018         /*  8 bit write lengths to eeprom */
1019         const int write_length = 8;
1020
1021         /*  enable read/write to eeprom */
1022         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1023         udelay(1);
1024         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1025         devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1026         udelay(1);
1027         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1028
1029         /*  send read instruction */
1030         labpc_serial_out(dev, read_instruction, write_length);
1031         /*  send 8 bit address to read from */
1032         labpc_serial_out(dev, address, write_length);
1033         /*  read result */
1034         value = labpc_serial_in(dev);
1035
1036         /*  disable read/write to eeprom */
1037         devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1038         udelay(1);
1039         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1040
1041         return value;
1042 }
1043
1044 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1045 {
1046         struct labpc_private *devpriv = dev->private;
1047         unsigned int value;
1048         const int read_status_instruction = 0x5;
1049         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1050
1051         /*  enable read/write to eeprom */
1052         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1053         udelay(1);
1054         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1055         devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1056         udelay(1);
1057         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1058
1059         /*  send read status instruction */
1060         labpc_serial_out(dev, read_status_instruction, write_length);
1061         /*  read result */
1062         value = labpc_serial_in(dev);
1063
1064         /*  disable read/write to eeprom */
1065         devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1066         udelay(1);
1067         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1068
1069         return value;
1070 }
1071
1072 static void labpc_eeprom_write(struct comedi_device *dev,
1073                                unsigned int address, unsigned int value)
1074 {
1075         struct labpc_private *devpriv = dev->private;
1076         const int write_enable_instruction = 0x6;
1077         const int write_instruction = 0x2;
1078         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1079
1080         /*  enable read/write to eeprom */
1081         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1082         udelay(1);
1083         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1084         devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1085         udelay(1);
1086         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1087
1088         /*  send write_enable instruction */
1089         labpc_serial_out(dev, write_enable_instruction, write_length);
1090         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1091         udelay(1);
1092         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1093
1094         /*  send write instruction */
1095         devpriv->cmd5 |= CMD5_EEPROMCS;
1096         udelay(1);
1097         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1098         labpc_serial_out(dev, write_instruction, write_length);
1099         /*  send 8 bit address to write to */
1100         labpc_serial_out(dev, address, write_length);
1101         /*  write value */
1102         labpc_serial_out(dev, value, write_length);
1103         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1104         udelay(1);
1105         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1106
1107         /*  disable read/write to eeprom */
1108         devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1109         udelay(1);
1110         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1111 }
1112
1113 /* writes to 8 bit calibration dacs */
1114 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1115                          unsigned int value)
1116 {
1117         struct labpc_private *devpriv = dev->private;
1118
1119         /*  clear caldac load bit and make sure we don't write to eeprom */
1120         devpriv->cmd5 &= ~(CMD5_CALDACLD | CMD5_EEPROMCS | CMD5_WRTPRT);
1121         udelay(1);
1122         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1123
1124         /*  write 4 bit channel */
1125         labpc_serial_out(dev, channel, 4);
1126         /*  write 8 bit caldac value */
1127         labpc_serial_out(dev, value, 8);
1128
1129         /*  set and clear caldac bit to load caldac value */
1130         devpriv->cmd5 |= CMD5_CALDACLD;
1131         udelay(1);
1132         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1133         devpriv->cmd5 &= ~CMD5_CALDACLD;
1134         udelay(1);
1135         devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1136 }
1137
1138 static int labpc_calib_insn_write(struct comedi_device *dev,
1139                                   struct comedi_subdevice *s,
1140                                   struct comedi_insn *insn,
1141                                   unsigned int *data)
1142 {
1143         unsigned int chan = CR_CHAN(insn->chanspec);
1144
1145         /*
1146          * Only write the last data value to the caldac. Preceding
1147          * data would be overwritten anyway.
1148          */
1149         if (insn->n > 0) {
1150                 unsigned int val = data[insn->n - 1];
1151
1152                 if (s->readback[chan] != val) {
1153                         write_caldac(dev, chan, val);
1154                         s->readback[chan] = val;
1155                 }
1156         }
1157
1158         return insn->n;
1159 }
1160
1161 static int labpc_eeprom_ready(struct comedi_device *dev,
1162                               struct comedi_subdevice *s,
1163                               struct comedi_insn *insn,
1164                               unsigned long context)
1165 {
1166         unsigned int status;
1167
1168         /* make sure there isn't already a write in progress */
1169         status = labpc_eeprom_read_status(dev);
1170         if ((status & 0x1) == 0)
1171                 return 0;
1172         return -EBUSY;
1173 }
1174
1175 static int labpc_eeprom_insn_write(struct comedi_device *dev,
1176                                    struct comedi_subdevice *s,
1177                                    struct comedi_insn *insn,
1178                                    unsigned int *data)
1179 {
1180         unsigned int chan = CR_CHAN(insn->chanspec);
1181         int ret;
1182
1183         /* only allow writes to user area of eeprom */
1184         if (chan < 16 || chan > 127)
1185                 return -EINVAL;
1186
1187         /*
1188          * Only write the last data value to the eeprom. Preceding
1189          * data would be overwritten anyway.
1190          */
1191         if (insn->n > 0) {
1192                 unsigned int val = data[insn->n - 1];
1193
1194                 ret = comedi_timeout(dev, s, insn, labpc_eeprom_ready, 0);
1195                 if (ret)
1196                         return ret;
1197
1198                 labpc_eeprom_write(dev, chan, val);
1199                 s->readback[chan] = val;
1200         }
1201
1202         return insn->n;
1203 }
1204
1205 int labpc_common_attach(struct comedi_device *dev,
1206                         unsigned int irq, unsigned long isr_flags)
1207 {
1208         const struct labpc_boardinfo *board = dev->board_ptr;
1209         struct labpc_private *devpriv;
1210         struct comedi_subdevice *s;
1211         int ret;
1212         int i;
1213
1214         devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1215         if (!devpriv)
1216                 return -ENOMEM;
1217
1218         if (dev->mmio) {
1219                 devpriv->read_byte = labpc_readb;
1220                 devpriv->write_byte = labpc_writeb;
1221         } else {
1222                 devpriv->read_byte = labpc_inb;
1223                 devpriv->write_byte = labpc_outb;
1224         }
1225
1226         /* initialize board's command registers */
1227         devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG);
1228         devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
1229         devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG);
1230         devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
1231         if (board->is_labpc1200) {
1232                 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1233                 devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG);
1234         }
1235
1236         if (irq) {
1237                 ret = request_irq(irq, labpc_interrupt, isr_flags,
1238                                   dev->board_name, dev);
1239                 if (ret == 0)
1240                         dev->irq = irq;
1241         }
1242
1243         ret = comedi_alloc_subdevices(dev, 5);
1244         if (ret)
1245                 return ret;
1246
1247         /* analog input subdevice */
1248         s = &dev->subdevices[0];
1249         s->type         = COMEDI_SUBD_AI;
1250         s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1251         s->n_chan       = 8;
1252         s->len_chanlist = 8;
1253         s->maxdata      = 0x0fff;
1254         s->range_table  = board->is_labpc1200 ?
1255                           &range_labpc_1200_ai : &range_labpc_plus_ai;
1256         s->insn_read    = labpc_ai_insn_read;
1257         if (dev->irq) {
1258                 dev->read_subdev = s;
1259                 s->subdev_flags |= SDF_CMD_READ;
1260                 s->do_cmd       = labpc_ai_cmd;
1261                 s->do_cmdtest   = labpc_ai_cmdtest;
1262                 s->cancel       = labpc_cancel;
1263         }
1264
1265         /* analog output */
1266         s = &dev->subdevices[1];
1267         if (board->has_ao) {
1268                 s->type         = COMEDI_SUBD_AO;
1269                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1270                 s->n_chan       = NUM_AO_CHAN;
1271                 s->maxdata      = 0x0fff;
1272                 s->range_table  = &range_labpc_ao;
1273                 s->insn_write   = labpc_ao_insn_write;
1274
1275                 ret = comedi_alloc_subdev_readback(s);
1276                 if (ret)
1277                         return ret;
1278
1279                 /* initialize analog outputs to a known value */
1280                 for (i = 0; i < s->n_chan; i++)
1281                         labpc_ao_write(dev, s, i, s->maxdata / 2);
1282         } else {
1283                 s->type         = COMEDI_SUBD_UNUSED;
1284         }
1285
1286         /* 8255 dio */
1287         s = &dev->subdevices[2];
1288         if (dev->mmio)
1289                 ret = subdev_8255_mm_init(dev, s, NULL, DIO_BASE_REG);
1290         else
1291                 ret = subdev_8255_init(dev, s, NULL, DIO_BASE_REG);
1292         if (ret)
1293                 return ret;
1294
1295         /*  calibration subdevices for boards that have one */
1296         s = &dev->subdevices[3];
1297         if (board->is_labpc1200) {
1298                 s->type         = COMEDI_SUBD_CALIB;
1299                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1300                 s->n_chan       = 16;
1301                 s->maxdata      = 0xff;
1302                 s->insn_write   = labpc_calib_insn_write;
1303
1304                 ret = comedi_alloc_subdev_readback(s);
1305                 if (ret)
1306                         return ret;
1307
1308                 for (i = 0; i < s->n_chan; i++) {
1309                         write_caldac(dev, i, s->maxdata / 2);
1310                         s->readback[i] = s->maxdata / 2;
1311                 }
1312         } else {
1313                 s->type         = COMEDI_SUBD_UNUSED;
1314         }
1315
1316         /* EEPROM */
1317         s = &dev->subdevices[4];
1318         if (board->is_labpc1200) {
1319                 s->type         = COMEDI_SUBD_MEMORY;
1320                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1321                 s->n_chan       = EEPROM_SIZE;
1322                 s->maxdata      = 0xff;
1323                 s->insn_write   = labpc_eeprom_insn_write;
1324
1325                 ret = comedi_alloc_subdev_readback(s);
1326                 if (ret)
1327                         return ret;
1328
1329                 for (i = 0; i < s->n_chan; i++)
1330                         s->readback[i] = labpc_eeprom_read(dev, i);
1331         } else {
1332                 s->type         = COMEDI_SUBD_UNUSED;
1333         }
1334
1335         return 0;
1336 }
1337 EXPORT_SYMBOL_GPL(labpc_common_attach);
1338
1339 static int __init labpc_common_init(void)
1340 {
1341         return 0;
1342 }
1343 module_init(labpc_common_init);
1344
1345 static void __exit labpc_common_exit(void)
1346 {
1347 }
1348 module_exit(labpc_common_exit);
1349
1350 MODULE_AUTHOR("Comedi http://www.comedi.org");
1351 MODULE_DESCRIPTION("Comedi helper for ni_labpc, ni_labpc_pci, ni_labpc_cs");
1352 MODULE_LICENSE("GPL");