drivers/staging/comedi/drivers/ni_tiocmd.c

   1 /*
   2   comedi/drivers/ni_tiocmd.c
   3   Command support for NI general purpose counters
   4
   5   Copyright (C) 2006 Frank Mori Hess <fmhess@users.sourceforge.net>
   6
   7   This program is free software; you can redistribute it and/or modify
   8   it under the terms of the GNU General Public License as published by
   9   the Free Software Foundation; either version 2 of the License, or
  10   (at your option) any later version.
  11
  12   This program is distributed in the hope that it will be useful,
  13   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15   GNU General Public License for more details.
  16 */
  17
  18 /*
  19 Driver: ni_tiocmd
  20 Description: National Instruments general purpose counters command support
  21 Devices:
  22 Author: J.P. Mellor <jpmellor@rose-hulman.edu>,
  23         Herman.Bruyninckx@mech.kuleuven.ac.be,
  24         Wim.Meeussen@mech.kuleuven.ac.be,
  25         Klaas.Gadeyne@mech.kuleuven.ac.be,
  26         Frank Mori Hess <fmhess@users.sourceforge.net>
  27 Updated: Fri, 11 Apr 2008 12:32:35 +0100
  28 Status: works
  29
  30 This module is not used directly by end-users.  Rather, it
  31 is used by other drivers (for example ni_660x and ni_pcimio)
  32 to provide command support for NI's general purpose counters.
  33 It was originally split out of ni_tio.c to stop the 'ni_tio'
  34 module depending on the 'mite' module.
  35
  36 References:
  37 DAQ 660x Register-Level Programmer Manual  (NI 370505A-01)
  38 DAQ 6601/6602 User Manual (NI 322137B-01)
  39 340934b.pdf  DAQ-STC reference manual
  40
  41 */
  42 /*
  43 TODO:
  44         Support use of both banks X and Y
  45 */
  46
  47 #include "comedi_fc.h"
  48 #include "ni_tio_internal.h"
  49 #include "mite.h"
  50
  51 MODULE_AUTHOR("Comedi <comedi@comedi.org>");
  52 MODULE_DESCRIPTION("Comedi command support for NI general-purpose counters");
  53 MODULE_LICENSE("GPL");
  54
  55 static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
  56                                  short read_not_write)
  57 {
  58         struct ni_gpct_device *counter_dev = counter->counter_dev;
  59         unsigned input_select_bits = 0;
  60
  61         if (enable) {
  62                 if (read_not_write)
  63                         input_select_bits |= Gi_Read_Acknowledges_Irq;
  64                 else
  65                         input_select_bits |= Gi_Write_Acknowledges_Irq;
  66         }
  67         ni_tio_set_bits(counter,
  68                         NITIO_Gi_Input_Select_Reg(counter->counter_index),
  69                         Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq,
  70                         input_select_bits);
  71         switch (counter_dev->variant) {
  72         case ni_gpct_variant_e_series:
  73                 break;
  74         case ni_gpct_variant_m_series:
  75         case ni_gpct_variant_660x:
  76                 {
  77                         unsigned gi_dma_config_bits = 0;
  78
  79                         if (enable) {
  80                                 gi_dma_config_bits |= Gi_DMA_Enable_Bit;
  81                                 gi_dma_config_bits |= Gi_DMA_Int_Bit;
  82                         }
  83                         if (read_not_write == 0)
  84                                 gi_dma_config_bits |= Gi_DMA_Write_Bit;
  85                         ni_tio_set_bits(counter,
  86                                         NITIO_Gi_DMA_Config_Reg(counter->
  87                                                                 counter_index),
  88                                         Gi_DMA_Enable_Bit | Gi_DMA_Int_Bit |
  89                                         Gi_DMA_Write_Bit, gi_dma_config_bits);
  90                 }
  91                 break;
  92         }
  93 }
  94
  95 static int ni_tio_input_inttrig(struct comedi_device *dev,
  96                                 struct comedi_subdevice *s,
  97                                 unsigned int trignum)
  98 {
  99         unsigned long flags;
 100         int retval = 0;
 101         struct ni_gpct *counter = s->private;
 102
 103         BUG_ON(counter == NULL);
 104         if (trignum != 0)
 105                 return -EINVAL;
 106
 107         spin_lock_irqsave(&counter->lock, flags);
 108         if (counter->mite_chan)
 109                 mite_dma_arm(counter->mite_chan);
 110         else
 111                 retval = -EIO;
 112         spin_unlock_irqrestore(&counter->lock, flags);
 113         if (retval < 0)
 114                 return retval;
 115         retval = ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE);
 116         s->async->inttrig = NULL;
 117
 118         return retval;
 119 }
 120
 121 static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async)
 122 {
 123         struct ni_gpct_device *counter_dev = counter->counter_dev;
 124         struct comedi_cmd *cmd = &async->cmd;
 125         int retval = 0;
 126
 127         /* write alloc the entire buffer */
 128         comedi_buf_write_alloc(async, async->prealloc_bufsz);
 129         counter->mite_chan->dir = COMEDI_INPUT;
 130         switch (counter_dev->variant) {
 131         case ni_gpct_variant_m_series:
 132         case ni_gpct_variant_660x:
 133                 mite_prep_dma(counter->mite_chan, 32, 32);
 134                 break;
 135         case ni_gpct_variant_e_series:
 136                 mite_prep_dma(counter->mite_chan, 16, 32);
 137                 break;
 138         default:
 139                 BUG();
 140                 break;
 141         }
 142         ni_tio_set_bits(counter, NITIO_Gi_Command_Reg(counter->counter_index),
 143                         Gi_Save_Trace_Bit, 0);
 144         ni_tio_configure_dma(counter, 1, 1);
 145         switch (cmd->start_src) {
 146         case TRIG_NOW:
 147                 async->inttrig = NULL;
 148                 mite_dma_arm(counter->mite_chan);
 149                 retval = ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE);
 150                 break;
 151         case TRIG_INT:
 152                 async->inttrig = &ni_tio_input_inttrig;
 153                 break;
 154         case TRIG_EXT:
 155                 async->inttrig = NULL;
 156                 mite_dma_arm(counter->mite_chan);
 157                 retval = ni_tio_arm(counter, 1, cmd->start_arg);
 158                 break;
 159         case TRIG_OTHER:
 160                 async->inttrig = NULL;
 161                 mite_dma_arm(counter->mite_chan);
 162                 break;
 163         default:
 164                 BUG();
 165                 break;
 166         }
 167         return retval;
 168 }
 169
 170 static int ni_tio_output_cmd(struct ni_gpct *counter,
 171                              struct comedi_async *async)
 172 {
 173         dev_err(counter->counter_dev->dev->class_dev,
 174                 "output commands not yet implemented.\n");
 175         return -ENOTSUPP;
 176
 177         counter->mite_chan->dir = COMEDI_OUTPUT;
 178         mite_prep_dma(counter->mite_chan, 32, 32);
 179         ni_tio_configure_dma(counter, 1, 0);
 180         mite_dma_arm(counter->mite_chan);
 181         return ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE);
 182 }
 183
 184 static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async)
 185 {
 186         struct comedi_cmd *cmd = &async->cmd;
 187         int set_gate_source = 0;
 188         unsigned gate_source;
 189         int retval = 0;
 190
 191         if (cmd->scan_begin_src == TRIG_EXT) {
 192                 set_gate_source = 1;
 193                 gate_source = cmd->scan_begin_arg;
 194         } else if (cmd->convert_src == TRIG_EXT) {
 195                 set_gate_source = 1;
 196                 gate_source = cmd->convert_arg;
 197         }
 198         if (set_gate_source)
 199                 retval = ni_tio_set_gate_src(counter, 0, gate_source);
 200         if (cmd->flags & TRIG_WAKE_EOS) {
 201                 ni_tio_set_bits(counter,
 202                                 NITIO_Gi_Interrupt_Enable_Reg(counter->
 203                                                               counter_index),
 204                                 Gi_Gate_Interrupt_Enable_Bit(counter->
 205                                                              counter_index),
 206                                 Gi_Gate_Interrupt_Enable_Bit(counter->
 207                                                              counter_index));
 208         }
 209         return retval;
 210 }
 211
 212 int ni_tio_cmd(struct ni_gpct *counter, struct comedi_async *async)
 213 {
 214         struct comedi_cmd *cmd = &async->cmd;
 215         int retval = 0;
 216         unsigned long flags;
 217
 218         spin_lock_irqsave(&counter->lock, flags);
 219         if (counter->mite_chan == NULL) {
 220                 dev_err(counter->counter_dev->dev->class_dev,
 221                         "commands only supported with DMA.  ");
 222                 dev_err(counter->counter_dev->dev->class_dev,
 223                         "Interrupt-driven commands not yet implemented.\n");
 224                 retval = -EIO;
 225         } else {
 226                 retval = ni_tio_cmd_setup(counter, async);
 227                 if (retval == 0) {
 228                         if (cmd->flags & CMDF_WRITE)
 229                                 retval = ni_tio_output_cmd(counter, async);
 230                         else
 231                                 retval = ni_tio_input_cmd(counter, async);
 232                 }
 233         }
 234         spin_unlock_irqrestore(&counter->lock, flags);
 235         return retval;
 236 }
 237 EXPORT_SYMBOL_GPL(ni_tio_cmd);
 238
 239 int ni_tio_cmdtest(struct ni_gpct *counter, struct comedi_cmd *cmd)
 240 {
 241         int err = 0;
 242         unsigned int sources;
 243
 244         /* Step 1 : check if triggers are trivially valid */
 245
 246         sources = TRIG_NOW | TRIG_INT | TRIG_OTHER;
 247         if (ni_tio_counting_mode_registers_present(counter->counter_dev))
 248                 sources |= TRIG_EXT;
 249         err |= cfc_check_trigger_src(&cmd->start_src, sources);
 250
 251         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
 252                                         TRIG_FOLLOW | TRIG_EXT | TRIG_OTHER);
 253         err |= cfc_check_trigger_src(&cmd->convert_src,
 254                                         TRIG_NOW | TRIG_EXT | TRIG_OTHER);
 255         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 256         err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
 257
 258         if (err)
 259                 return 1;
 260
 261         /* Step 2a : make sure trigger sources are unique */
 262
 263         err |= cfc_check_trigger_is_unique(cmd->start_src);
 264         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
 265         err |= cfc_check_trigger_is_unique(cmd->convert_src);
 266
 267         /* Step 2b : and mutually compatible */
 268
 269         if (cmd->convert_src != TRIG_NOW && cmd->scan_begin_src != TRIG_FOLLOW)
 270                 err |= -EINVAL;
 271
 272         if (err)
 273                 return 2;
 274
 275         /* Step 3: check if arguments are trivially valid */
 276
 277         if (cmd->start_src != TRIG_EXT)
 278                 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
 279
 280         if (cmd->scan_begin_src != TRIG_EXT)
 281                 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
 282
 283         if (cmd->convert_src != TRIG_EXT)
 284                 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
 285
 286         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
 287         err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
 288
 289         if (err)
 290                 return 3;
 291
 292         /* step 4: fix up any arguments */
 293
 294         if (err)
 295                 return 4;
 296
 297         return 0;
 298 }
 299 EXPORT_SYMBOL_GPL(ni_tio_cmdtest);
 300
 301 int ni_tio_cancel(struct ni_gpct *counter)
 302 {
 303         unsigned long flags;
 304
 305         ni_tio_arm(counter, 0, 0);
 306         spin_lock_irqsave(&counter->lock, flags);
 307         if (counter->mite_chan)
 308                 mite_dma_disarm(counter->mite_chan);
 309         spin_unlock_irqrestore(&counter->lock, flags);
 310         ni_tio_configure_dma(counter, 0, 0);
 311
 312         ni_tio_set_bits(counter,
 313                         NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index),
 314                         Gi_Gate_Interrupt_Enable_Bit(counter->counter_index),
 315                         0x0);
 316         return 0;
 317 }
 318 EXPORT_SYMBOL_GPL(ni_tio_cancel);
 319
 320         /* During buffered input counter operation for e-series, the gate
 321            interrupt is acked automatically by the dma controller, due to the
 322            Gi_Read/Write_Acknowledges_IRQ bits in the input select register.  */
 323 static int should_ack_gate(struct ni_gpct *counter)
 324 {
 325         unsigned long flags;
 326         int retval = 0;
 327
 328         switch (counter->counter_dev->variant) {
 329         case ni_gpct_variant_m_series:
 330         /*  not sure if 660x really supports gate
 331             interrupts (the bits are not listed
 332             in register-level manual) */
 333         case ni_gpct_variant_660x:
 334                 return 1;
 335                 break;
 336         case ni_gpct_variant_e_series:
 337                 spin_lock_irqsave(&counter->lock, flags);
 338                 {
 339                         if (counter->mite_chan == NULL ||
 340                             counter->mite_chan->dir != COMEDI_INPUT ||
 341                             (mite_done(counter->mite_chan))) {
 342                                 retval = 1;
 343                         }
 344                 }
 345                 spin_unlock_irqrestore(&counter->lock, flags);
 346                 break;
 347         }
 348         return retval;
 349 }
 350
 351 void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
 352                                     int *tc_error, int *perm_stale_data,
 353                                     int *stale_data)
 354 {
 355         const unsigned short gxx_status = read_register(counter,
 356                                                         NITIO_Gxx_Status_Reg
 357                                                         (counter->
 358                                                          counter_index));
 359         const unsigned short gi_status = read_register(counter,
 360                                                        NITIO_Gi_Status_Reg
 361                                                        (counter->
 362                                                         counter_index));
 363         unsigned ack = 0;
 364
 365         if (gate_error)
 366                 *gate_error = 0;
 367         if (tc_error)
 368                 *tc_error = 0;
 369         if (perm_stale_data)
 370                 *perm_stale_data = 0;
 371         if (stale_data)
 372                 *stale_data = 0;
 373
 374         if (gxx_status & Gi_Gate_Error_Bit(counter->counter_index)) {
 375                 ack |= Gi_Gate_Error_Confirm_Bit(counter->counter_index);
 376                 if (gate_error) {
 377                         /*660x don't support automatic acknowledgement
 378                           of gate interrupt via dma read/write
 379                            and report bogus gate errors */
 380                         if (counter->counter_dev->variant !=
 381                             ni_gpct_variant_660x) {
 382                                 *gate_error = 1;
 383                         }
 384                 }
 385         }
 386         if (gxx_status & Gi_TC_Error_Bit(counter->counter_index)) {
 387                 ack |= Gi_TC_Error_Confirm_Bit(counter->counter_index);
 388                 if (tc_error)
 389                         *tc_error = 1;
 390         }
 391         if (gi_status & Gi_TC_Bit)
 392                 ack |= Gi_TC_Interrupt_Ack_Bit;
 393         if (gi_status & Gi_Gate_Interrupt_Bit) {
 394                 if (should_ack_gate(counter))
 395                         ack |= Gi_Gate_Interrupt_Ack_Bit;
 396         }
 397         if (ack)
 398                 write_register(counter, ack,
 399                                NITIO_Gi_Interrupt_Acknowledge_Reg
 400                                (counter->counter_index));
 401         if (ni_tio_get_soft_copy
 402             (counter,
 403              NITIO_Gi_Mode_Reg(counter->counter_index)) &
 404             Gi_Loading_On_Gate_Bit) {
 405                 if (gxx_status & Gi_Stale_Data_Bit(counter->counter_index)) {
 406                         if (stale_data)
 407                                 *stale_data = 1;
 408                 }
 409                 if (read_register(counter,
 410                                   NITIO_Gxx_Joint_Status2_Reg
 411                                   (counter->counter_index)) &
 412                     Gi_Permanent_Stale_Bit(counter->counter_index)) {
 413                         dev_info(counter->counter_dev->dev->class_dev,
 414                                  "%s: Gi_Permanent_Stale_Data detected.\n",
 415                                  __func__);
 416                         if (perm_stale_data)
 417                                 *perm_stale_data = 1;
 418                 }
 419         }
 420 }
 421 EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm);
 422
 423 void ni_tio_handle_interrupt(struct ni_gpct *counter,
 424                              struct comedi_subdevice *s)
 425 {
 426         unsigned gpct_mite_status;
 427         unsigned long flags;
 428         int gate_error;
 429         int tc_error;
 430         int perm_stale_data;
 431
 432         ni_tio_acknowledge_and_confirm(counter, &gate_error, &tc_error,
 433                                        &perm_stale_data, NULL);
 434         if (gate_error) {
 435                 dev_notice(counter->counter_dev->dev->class_dev,
 436                            "%s: Gi_Gate_Error detected.\n", __func__);
 437                 s->async->events |= COMEDI_CB_OVERFLOW;
 438         }
 439         if (perm_stale_data)
 440                 s->async->events |= COMEDI_CB_ERROR;
 441         switch (counter->counter_dev->variant) {
 442         case ni_gpct_variant_m_series:
 443         case ni_gpct_variant_660x:
 444                 if (read_register(counter,
 445                                 NITIO_Gi_DMA_Status_Reg
 446                                 (counter->counter_index)) & Gi_DRQ_Error_Bit) {
 447                         dev_notice(counter->counter_dev->dev->class_dev,
 448                                    "%s: Gi_DRQ_Error detected.\n", __func__);
 449                         s->async->events |= COMEDI_CB_OVERFLOW;
 450                 }
 451                 break;
 452         case ni_gpct_variant_e_series:
 453                 break;
 454         }
 455         spin_lock_irqsave(&counter->lock, flags);
 456         if (counter->mite_chan == NULL) {
 457                 spin_unlock_irqrestore(&counter->lock, flags);
 458                 return;
 459         }
 460         gpct_mite_status = mite_get_status(counter->mite_chan);
 461         if (gpct_mite_status & CHSR_LINKC) {
 462                 writel(CHOR_CLRLC,
 463                        counter->mite_chan->mite->mite_io_addr +
 464                        MITE_CHOR(counter->mite_chan->channel));
 465         }
 466         mite_sync_input_dma(counter->mite_chan, s->async);
 467         spin_unlock_irqrestore(&counter->lock, flags);
 468 }
 469 EXPORT_SYMBOL_GPL(ni_tio_handle_interrupt);
 470
 471 void ni_tio_set_mite_channel(struct ni_gpct *counter,
 472                              struct mite_channel *mite_chan)
 473 {
 474         unsigned long flags;
 475
 476         spin_lock_irqsave(&counter->lock, flags);
 477         counter->mite_chan = mite_chan;
 478         spin_unlock_irqrestore(&counter->lock, flags);
 479 }
 480 EXPORT_SYMBOL_GPL(ni_tio_set_mite_channel);
 481
 482 static int __init ni_tiocmd_init_module(void)
 483 {
 484         return 0;
 485 }
 486
 487 module_init(ni_tiocmd_init_module);
 488
 489 static void __exit ni_tiocmd_cleanup_module(void)
 490 {
 491 }
 492
 493 module_exit(ni_tiocmd_cleanup_module);