1 /* pmc93x6_eeprom.c - PMC's 93LC46 EEPROM Device
3 * The 93LC46 is a low-power, serial Electrically Erasable and
4 * Programmable Read Only Memory organized as 128 8-bit bytes.
6 * Accesses to the 93LC46 are done in a bit serial stream, organized
7 * in a 3 wire format. Writes are internally timed by the device
8 * (the In data bit is pulled low until the write is complete and
9 * then is pulled high) and take about 6 milliseconds.
11 * Copyright (C) 2003-2005 SBE, Inc.
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26 #include <linux/types.h>
27 #include "pmcc4_sysdep.h"
28 #include "sbecom_inline_linux.h"
30 #include "sbe_promformat.h"
31 #include "pmc93x6_eeprom.h"
38 /*------------------------------------------------------------------------
39 * EEPROM address definitions
40 *------------------------------------------------------------------------
42 * The offset in the definitions below allows the test to skip over
43 * areas of the EEPROM that other programs (such a VxWorks) are
47 #define EE_MFG (long)0 /* Index to manufacturing record */
48 #define EE_FIRST 0x28 /* Index to start testing at */
49 #define EE_LIMIT 128 /* Index to end testing at */
51 /* Bit Ordering for Instructions
53 * A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB (lsb, or 1st bit out)
57 #define EPROM_EWEN 0x0019 /* Erase/Write enable (reversed) */
58 #define EPROM_EWDS 0x0001 /* Erase/Write disable (reversed) */
59 #define EPROM_READ 0x0003 /* Read (reversed) */
60 #define EPROM_WRITE 0x0005 /* Write (reversed) */
61 #define EPROM_ERASE 0x0007 /* Erase (reversed) */
62 #define EPROM_ERAL 0x0009 /* Erase All (reversed) */
63 #define EPROM_WRAL 0x0011 /* Write All (reversed) */
65 #define EPROM_ADR_SZ 7 /* Number of bits in offset address */
66 #define EPROM_OP_SZ 3 /* Number of bits in command */
67 #define SIZE_ADDR_OP (EPROM_ADR_SZ + EPROM_OP_SZ)
68 #define LC46A_MAX_OPS 10 /* Number of bits in Instruction */
69 #define NUM_OF_BITS 8 /* Number of bits in data */
71 /* EEPROM signal bits */
72 #define EPROM_ACTIVE_OUT_BIT 0x0001 /* Out data bit */
73 #define EPROM_ACTIVE_IN_BIT 0x0002 /* In data bit */
74 #define ACTIVE_IN_BIT_SHIFT 0x0001 /* Shift In data bit to LSB */
75 #define EPROM_ENCS 0x0004 /* Set EEPROM CS during operation */
77 /*------------------------------------------------------------------------
78 * The ByteReverse table is used to reverses the 8 bits within a byte
79 *------------------------------------------------------------------------
82 static unsigned char ByteReverse[256];
83 static int ByteReverseBuilt = FALSE;
85 /*------------------------------------------------------------------------
86 * mfg_template - initial serial EEPROM data structure
87 *------------------------------------------------------------------------
90 static u8 mfg_template[sizeof(FLD_TYPE2)] = {
91 PROM_FORMAT_TYPE2, /* type; */
92 0x00, 0x1A, /* length[2]; */
93 0x00, 0x00, 0x00, 0x00, /* Crc32[4]; */
94 0x11, 0x76, /* Id[2]; */
95 0x07, 0x05, /* SubId[2] E1; */
96 0x00, 0xA0, 0xD6, 0x00, 0x00, 0x00, /* Serial[6]; */
97 0x00, 0x00, 0x00, 0x00, /* CreateTime[4]; */
98 0x00, 0x00, 0x00, 0x00, /* HeatRunTime[4]; */
99 0x00, 0x00, 0x00, 0x00, /* HeatRunIterations[4]; */
100 0x00, 0x00, 0x00, 0x00, /* HeatRunErrors[4]; */
103 /*------------------------------------------------------------------------
104 * BuildByteReverse - build the 8-bit reverse table
105 *------------------------------------------------------------------------
107 * The 'ByteReverse' table reverses the 8 bits within a byte
108 * (the MSB becomes the LSB etc.).
111 static void BuildByteReverse(void)
113 /* Used to build by powers to 2 */
119 for (half = 1; half < sizeof(ByteReverse); half <<= 1)
120 for (i = 0; i < half; i++)
121 ByteReverse[half + i] =
122 (char)(ByteReverse[i] | (0x80 / half));
124 ByteReverseBuilt = TRUE;
127 /*------------------------------------------------------------------------
128 * eeprom_delay - small delay for EEPROM timing
129 *------------------------------------------------------------------------
132 static void eeprom_delay(void)
136 for (timeout = 20; timeout; --timeout)
140 /*------------------------------------------------------------------------
141 * eeprom_put_byte - Send a byte to the EEPROM serially
142 *------------------------------------------------------------------------
144 * Given the PCI address and the data, this routine serially sends
145 * the data to the EEPROM.
148 static void eeprom_put_byte(long addr, long data, int count)
152 while (--count >= 0) {
153 /* Get next data bit */
154 output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0;
155 /* Add Chip Select */
156 output |= EPROM_ENCS;
161 pci_write_32((u_int32_t *) addr, output);
165 /*------------------------------------------------------------------------
166 * eeprom_get_byte - Receive a byte from the EEPROM serially
167 *------------------------------------------------------------------------
169 * Given the PCI address, this routine serially fetches the data
173 static u_int32_t eeprom_get_byte(long addr)
179 /* Start the Reading of DATA
181 * The first read is a dummy as the data is latched in the
182 * EPLD and read on the next read access to the EEPROM.
185 input = pci_read_32((u_int32_t *) addr);
189 while (--count >= 0) {
191 input = pci_read_32((u_int32_t *) addr);
193 /* Shift data over */
195 data |= (input & EPROM_ACTIVE_IN_BIT) ? 1 : 0;
202 /*------------------------------------------------------------------------
203 * disable_pmc_eeprom - Disable writes to the EEPROM
204 *------------------------------------------------------------------------
206 * Issue the EEPROM command to disable writes.
209 static void disable_pmc_eeprom(long addr)
211 eeprom_put_byte(addr, EPROM_EWDS, SIZE_ADDR_OP);
213 /* this removes Chip Select from EEPROM */
214 pci_write_32((u_int32_t *) addr, 0);
217 /*------------------------------------------------------------------------
218 * enable_pmc_eeprom - Enable writes to the EEPROM
219 *------------------------------------------------------------------------
221 * Issue the EEPROM command to enable writes.
224 static void enable_pmc_eeprom(long addr)
226 eeprom_put_byte(addr, EPROM_EWEN, SIZE_ADDR_OP);
228 /* this removes Chip Select from EEPROM */
229 pci_write_32((u_int32_t *) addr, 0);
232 /*------------------------------------------------------------------------
233 * pmc_eeprom_read - EEPROM location read
234 *------------------------------------------------------------------------
236 * Given a EEPROM PCI address and location offset, this routine returns
237 * the contents of the specified location to the calling routine.
240 static u_int32_t pmc_eeprom_read(long addr, long mem_offset)
245 if (!ByteReverseBuilt)
248 /* Reverse address */
249 mem_offset = ByteReverse[0x7F & mem_offset];
252 * NOTE: The max offset address is 128 or half the reversal table. So
253 * the LSB is always zero and counts as a built in shift of one bit.
254 * So even though we need to shift 3 bits to make room for the command,
255 * we only need to shift twice more because of the built in shift.
258 /* Shift for command */
261 mem_offset |= EPROM_READ;
263 /* Output chip address */
264 eeprom_put_byte(addr, mem_offset, SIZE_ADDR_OP);
267 data = eeprom_get_byte(addr);
269 /* Remove Chip Select from EEPROM */
270 pci_write_32((u_int32_t *) addr, 0);
272 return (data & 0x000000FF);
275 /*------------------------------------------------------------------------
276 * pmc_eeprom_write - EEPROM location write
277 *------------------------------------------------------------------------
279 * Given a EEPROM PCI address, location offset and value, this
280 * routine writes the value to the specified location.
282 * Note: it is up to the caller to determine if the write
283 * operation succeeded.
286 static int pmc_eeprom_write(long addr, long mem_offset, u_int32_t data)
291 if (!ByteReverseBuilt)
294 /* Reverse address */
295 mem_offset = ByteReverse[0x7F & mem_offset];
298 * NOTE: The max offset address is 128 or half the reversal table. So
299 * the LSB is always zero and counts as a built in shift of one bit.
300 * So even though we need to shift 3 bits to make room for the command,
301 * we only need to shift twice more because of the built in shift.
304 /* Shift for command */
307 mem_offset |= EPROM_WRITE;
309 /* Output chip address */
310 eeprom_put_byte(addr, mem_offset, SIZE_ADDR_OP);
313 data = ByteReverse[0xFF & data];
314 /* Output chip data */
315 eeprom_put_byte(addr, data, NUM_OF_BITS);
317 /* Remove Chip Select from EEPROM */
318 pci_write_32((u_int32_t *) addr, 0);
321 * Must see Data In at a low state before completing this transaction.
323 * Afterwards, the data bit will return to a high state, ~6 ms, terminating
326 /* Re-enable Chip Select */
327 pci_write_32((u_int32_t *) addr, EPROM_ENCS);
328 /* discard first read */
329 temp = pci_read_32((u_int32_t *) addr);
330 temp = pci_read_32((u_int32_t *) addr);
331 if (temp & EPROM_ACTIVE_IN_BIT) {
332 temp = pci_read_32((u_int32_t *) addr);
333 if (temp & EPROM_ACTIVE_IN_BIT) {
334 /* Remove Chip Select from EEPROM */
335 pci_write_32((u_int32_t *) addr, 0);
341 for (temp = 0; temp < 0x10; temp++)
344 if (pci_read_32((u_int32_t *) addr) & EPROM_ACTIVE_IN_BIT)
354 /*------------------------------------------------------------------------
355 * pmcGetBuffValue - read the specified value from buffer
356 *------------------------------------------------------------------------
359 static long pmcGetBuffValue(char *ptr, int size)
364 for (index = 0; index < size; ++index) {
366 value |= ptr[index] & 0xFF;
372 /*------------------------------------------------------------------------
373 * pmcSetBuffValue - save the specified value to buffer
374 *------------------------------------------------------------------------
377 static void pmcSetBuffValue(char *ptr, long value, int size)
381 while (--index >= 0) {
382 ptr[index] = (char)(value & 0xFF);
387 /*------------------------------------------------------------------------
388 * pmc_eeprom_read_buffer - read EEPROM data into specified buffer
389 *------------------------------------------------------------------------
393 pmc_eeprom_read_buffer(long addr, long mem_offset, char *dest_ptr, int size)
396 *dest_ptr++ = (char)pmc_eeprom_read(addr, mem_offset++);
399 /*------------------------------------------------------------------------
400 * pmc_eeprom_write_buffer - write EEPROM data from specified buffer
401 *------------------------------------------------------------------------
405 pmc_eeprom_write_buffer(long addr, long mem_offset, char *dest_ptr, int size)
407 enable_pmc_eeprom(addr);
410 pmc_eeprom_write(addr, mem_offset++, *dest_ptr++);
412 disable_pmc_eeprom(addr);
415 /*------------------------------------------------------------------------
416 * pmcCalcCrc - calculate the CRC for the serial EEPROM structure
417 *------------------------------------------------------------------------
420 static u_int32_t pmcCalcCrc_T01(void *bufp)
422 FLD_TYPE2 *buf = bufp;
423 /* CRC of the structure */
426 /* Calc CRC for type and length fields */
427 sbeCrc((u_int8_t *) &buf->type,
428 (u_int32_t) STRUCT_OFFSET(FLD_TYPE1, Crc32),
429 (u_int32_t) 0, (u_int32_t *) &crc);
431 #ifdef EEPROM_TYPE_DEBUG
433 pr_info("sbeCrc: crc 1 calculated as %08x\n", crc);
438 static u_int32_t pmcCalcCrc_T02(void *bufp)
440 FLD_TYPE2 *buf = bufp;
441 /* CRC of the structure */
444 /* Calc CRC for type and length fields */
445 sbeCrc((u_int8_t *) &buf->type,
446 (u_int32_t) STRUCT_OFFSET(FLD_TYPE2, Crc32),
447 (u_int32_t) 0, (u_int32_t *) &crc);
449 /* Calc CRC for remaining fields */
450 sbeCrc((u_int8_t *) &buf->Id[0],
451 (u_int32_t) (sizeof(FLD_TYPE2) - STRUCT_OFFSET(FLD_TYPE2, Id)),
452 (u_int32_t) crc, (u_int32_t *) &crc);
454 #ifdef EEPROM_TYPE_DEBUG
456 pr_info("sbeCrc: crc 2 calculated as %08x\n", crc);
461 /*------------------------------------------------------------------------
462 * pmc_init_seeprom - initialize the serial EEPROM structure
463 *------------------------------------------------------------------------
465 * At the front of the serial EEPROM there is a record that contains
466 * manufacturing information. If the info does not already exist, it
467 * is created. The only field modifiable by the operator is the
468 * serial number field.
471 void pmc_init_seeprom(u_int32_t addr, u_int32_t serialNum)
473 /* Memory image of structure */
475 /* CRC of structure */
479 createTime = get_seconds();
481 /* use template data */
482 memcpy(&buffer.fldType2, mfg_template, sizeof(buffer.fldType2));
484 /* Update serial number field in buffer */
485 pmcSetBuffValue(&buffer.fldType2.Serial[3], serialNum, 3);
487 /* Update create time field in buffer */
488 pmcSetBuffValue(&buffer.fldType2.CreateTime[0], createTime, 4);
490 /* Update CRC field in buffer */
491 crc = pmcCalcCrc_T02(&buffer);
492 pmcSetBuffValue(&buffer.fldType2.Crc32[0], crc, 4);
495 for (i = 0; i < sizeof(FLD_TYPE2); ++i)
496 pr_info("[%02X] = %02X\n", i, buffer.bytes[i] & 0xFF);
499 /* Write structure to serial EEPROM */
500 pmc_eeprom_write_buffer(addr, EE_MFG, (char *)&buffer,
504 char pmc_verify_cksum(void *bufp)
506 FLD_TYPE1 *buf1 = bufp;
507 FLD_TYPE2 *buf2 = bufp;
508 /* CRC read from EEPROM */
509 u_int32_t crc1, crc2;
511 /* Retrieve contents of CRC field */
512 crc1 = pmcGetBuffValue(&buf1->Crc32[0], sizeof(buf1->Crc32));
513 #ifdef EEPROM_TYPE_DEBUG
515 pr_info("EEPROM: chksum 1 reads as %08x\n", crc1);
517 if ((buf1->type == PROM_FORMAT_TYPE1) &&
518 (pmcCalcCrc_T01((void *)buf1) == crc1))
519 return PROM_FORMAT_TYPE1; /* checksum type 1 verified */
521 crc2 = pmcGetBuffValue(&buf2->Crc32[0], sizeof(buf2->Crc32));
522 #ifdef EEPROM_TYPE_DEBUG
524 pr_info("EEPROM: chksum 2 reads as %08x\n", crc2);
526 if ((buf2->type == PROM_FORMAT_TYPE2) &&
527 (pmcCalcCrc_T02((void *)buf2) == crc2))
528 return PROM_FORMAT_TYPE2; /* checksum type 2 verified */
530 /* failed to validate */
531 return PROM_FORMAT_Unk;