1 /***************************************************************************
2 * Copyright (C) 2006-2010 by Marin Mitov *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 #include <linux/version.h>
22 #include <linux/stringify.h>
23 #include <linux/delay.h>
24 #include <linux/kthread.h>
25 #include <media/v4l2-dev.h>
26 #include <media/v4l2-ioctl.h>
27 #include <media/videobuf-dma-contig.h>
29 #include "dt3155v4l.h"
31 #define DT3155_VENDOR_ID 0x8086
32 #define DT3155_DEVICE_ID 0x1223
34 /* DT3155_CHUNK_SIZE is 4M (2^22) 8 full size buffers */
35 #define DT3155_CHUNK_SIZE (1U << 22)
37 #define DT3155_COH_FLAGS (GFP_KERNEL | GFP_DMA32 | __GFP_COLD | __GFP_NOWARN)
39 #define DT3155_BUF_SIZE (768 * 576)
41 /* global initializers (for all boards) */
42 #ifdef CONFIG_DT3155_CCIR
43 static const u8 csr2_init = VT_50HZ;
44 #define DT3155_CURRENT_NORM V4L2_STD_625_50
45 static const unsigned int img_width = 768;
46 static const unsigned int img_height = 576;
47 static const unsigned int frames_per_sec = 25;
48 static const struct v4l2_fmtdesc frame_std[] = {
51 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
53 .description = "CCIR/50Hz 8 bits gray",
54 .pixelformat = V4L2_PIX_FMT_GREY,
58 static const u8 csr2_init = VT_60HZ;
59 #define DT3155_CURRENT_NORM V4L2_STD_525_60
60 static const unsigned int img_width = 640;
61 static const unsigned int img_height = 480;
62 static const unsigned int frames_per_sec = 30;
63 static const struct v4l2_fmtdesc frame_std[] = {
66 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
68 .description = "RS-170/60Hz 8 bits gray",
69 .pixelformat = V4L2_PIX_FMT_GREY,
74 #define NUM_OF_FORMATS ARRAY_SIZE(frame_std)
76 static u8 config_init = ACQ_MODE_EVEN;
79 * read_i2c_reg - reads an internal i2c register
81 * @addr: dt3155 mmio base address
82 * @index: index (internal address) of register to read
83 * @data: pointer to byte the read data will be placed in
85 * returns: zero on success or error code
87 * This function starts reading the specified (by index) register
88 * and busy waits for the process to finish. The result is placed
89 * in a byte pointed by data.
92 read_i2c_reg(void __iomem *addr, u8 index, u8 *data)
96 iowrite32((tmp<<17) | IIC_READ, addr + IIC_CSR2);
98 udelay(45); /* wait at least 43 usec for NEW_CYCLE to clear */
99 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
100 /* error: NEW_CYCLE not cleared */
101 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
104 tmp = ioread32(addr + IIC_CSR1);
105 if (tmp & DIRECT_ABORT) {
106 /* error: DIRECT_ABORT set */
107 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
108 /* reset DIRECT_ABORT bit */
109 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
117 * write_i2c_reg - writes to an internal i2c register
119 * @addr: dt3155 mmio base address
120 * @index: index (internal address) of register to read
121 * @data: data to be written
123 * returns: zero on success or error code
125 * This function starts writting the specified (by index) register
126 * and busy waits for the process to finish.
129 write_i2c_reg(void __iomem *addr, u8 index, u8 data)
133 iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2);
135 udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */
136 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
137 /* error: NEW_CYCLE not cleared */
138 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
141 if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) {
142 /* error: DIRECT_ABORT set */
143 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
144 /* reset DIRECT_ABORT bit */
145 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
152 * write_i2c_reg_nowait - writes to an internal i2c register
154 * @addr: dt3155 mmio base address
155 * @index: index (internal address) of register to read
156 * @data: data to be written
158 * This function starts writting the specified (by index) register
161 static void write_i2c_reg_nowait(void __iomem *addr, u8 index, u8 data)
165 iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2);
170 * wait_i2c_reg - waits the read/write to finish
172 * @addr: dt3155 mmio base address
174 * returns: zero on success or error code
176 * This function waits reading/writting to finish.
178 static int wait_i2c_reg(void __iomem *addr)
180 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE)
181 udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */
182 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
183 /* error: NEW_CYCLE not cleared */
184 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
187 if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) {
188 /* error: DIRECT_ABORT set */
189 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
190 /* reset DIRECT_ABORT bit */
191 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
198 dt3155_start_acq(struct dt3155_priv *pd)
200 struct videobuf_buffer *vb = pd->curr_buf;
203 dma_addr = videobuf_to_dma_contig(vb);
204 iowrite32(dma_addr, pd->regs + EVEN_DMA_START);
205 iowrite32(dma_addr + vb->width, pd->regs + ODD_DMA_START);
206 iowrite32(vb->width, pd->regs + EVEN_DMA_STRIDE);
207 iowrite32(vb->width, pd->regs + ODD_DMA_STRIDE);
208 /* enable interrupts, clear all irq flags */
209 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
210 FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
211 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
212 FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD,
214 wait_i2c_reg(pd->regs);
215 write_i2c_reg(pd->regs, CONFIG, pd->config);
216 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
217 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
219 /* start the board */
220 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | BUSY_ODD);
221 return 0; /* success */
225 dt3155_stop_acq(struct dt3155_priv *pd)
230 wait_i2c_reg(pd->regs);
231 write_i2c_reg(pd->regs, CSR2, pd->csr2);
233 /* disable all irqs, clear all irq flags */
234 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
235 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
236 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
237 tmp = ioread32(pd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD);
239 printk(KERN_ERR "dt3155: corrupted field %u\n", tmp);
240 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
241 FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD,
246 /* Locking: Caller holds q->vb_lock */
248 dt3155_buf_setup(struct videobuf_queue *q, unsigned int *count,
251 *size = img_width * img_height;
255 /* Locking: Caller holds q->vb_lock */
257 dt3155_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
258 enum v4l2_field field)
262 vb->width = img_width;
263 vb->height = img_height;
264 vb->size = img_width * img_height;
266 if (vb->state == VIDEOBUF_NEEDS_INIT)
267 ret = videobuf_iolock(q, vb, NULL);
269 vb->state = VIDEOBUF_ERROR;
270 printk(KERN_ERR "ERROR: videobuf_iolock() failed\n");
271 videobuf_dma_contig_free(q, vb); /* FIXME: needed? */
273 vb->state = VIDEOBUF_PREPARED;
277 /* Locking: Caller holds q->vb_lock & q->irqlock */
279 dt3155_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
281 struct dt3155_priv *pd = q->priv_data;
283 if (vb->state != VIDEOBUF_NEEDS_INIT) {
284 vb->state = VIDEOBUF_QUEUED;
285 list_add_tail(&vb->queue, &pd->dmaq);
286 wake_up_interruptible_sync(&pd->do_dma);
288 vb->state = VIDEOBUF_ERROR;
291 /* Locking: Caller holds q->vb_lock */
293 dt3155_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
295 if (vb->state == VIDEOBUF_ACTIVE)
296 videobuf_waiton(vb, 0, 0); /* FIXME: cannot be interrupted */
297 videobuf_dma_contig_free(q, vb);
298 vb->state = VIDEOBUF_NEEDS_INIT;
301 static struct videobuf_queue_ops vbq_ops = {
302 .buf_setup = dt3155_buf_setup,
303 .buf_prepare = dt3155_buf_prepare,
304 .buf_queue = dt3155_buf_queue,
305 .buf_release = dt3155_buf_release,
309 dt3155_irq_handler_even(int irq, void *dev_id)
311 struct dt3155_priv *ipd = dev_id;
312 struct videobuf_buffer *ivb;
316 tmp = ioread32(ipd->regs + INT_CSR) & (FLD_START | FLD_END_ODD);
318 return IRQ_NONE; /* not our irq */
319 if ((tmp & FLD_START) && !(tmp & FLD_END_ODD)) {
320 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START,
321 ipd->regs + INT_CSR);
323 return IRQ_HANDLED; /* start of field irq */
325 if ((tmp & FLD_START) && (tmp & FLD_END_ODD)) {
326 if (!ipd->stats.start_before_end++)
327 printk(KERN_ERR "dt3155: irq: START before END\n");
329 /* check for corrupted fields */
330 /* write_i2c_reg(ipd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE); */
331 /* write_i2c_reg(ipd->regs, ODD_CSR, CSR_ERROR | CSR_DONE); */
332 tmp = ioread32(ipd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD);
334 if (!ipd->stats.corrupted_fields++)
335 printk(KERN_ERR "dt3155: corrupted field %u\n", tmp);
336 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
337 FLD_DN_ODD | FLD_DN_EVEN |
338 CAP_CONT_EVEN | CAP_CONT_ODD,
343 spin_lock(&ipd->lock);
344 if (ipd->curr_buf && ipd->curr_buf->state == VIDEOBUF_ACTIVE) {
345 if (waitqueue_active(&ipd->curr_buf->done)) {
346 do_gettimeofday(&ipd->curr_buf->ts);
347 ipd->curr_buf->field_count = ipd->field_count;
348 ipd->curr_buf->state = VIDEOBUF_DONE;
349 wake_up(&ipd->curr_buf->done);
356 if (list_empty(&ipd->dmaq))
358 ivb = list_first_entry(&ipd->dmaq, typeof(*ivb), queue);
359 list_del(&ivb->queue);
360 if (ivb->state == VIDEOBUF_QUEUED) {
361 ivb->state = VIDEOBUF_ACTIVE;
366 dma_addr = videobuf_to_dma_contig(ivb);
367 iowrite32(dma_addr, ipd->regs + EVEN_DMA_START);
368 iowrite32(dma_addr + ivb->width, ipd->regs + ODD_DMA_START);
369 iowrite32(ivb->width, ipd->regs + EVEN_DMA_STRIDE);
370 iowrite32(ivb->width, ipd->regs + ODD_DMA_STRIDE);
372 /* enable interrupts, clear all irq flags */
373 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
374 FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR);
375 spin_unlock(&ipd->lock);
379 ipd->curr_buf = NULL;
381 write_i2c_reg_nowait(ipd->regs, CSR2, ipd->csr2);
382 /* disable interrupts, clear all irq flags */
383 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR);
384 spin_unlock(&ipd->lock);
389 dt3155_threadfn(void *arg)
391 struct dt3155_priv *pd = arg;
392 struct videobuf_buffer *vb;
396 wait_event_interruptible(pd->do_dma,
397 kthread_should_stop() || !list_empty(&pd->dmaq));
398 if (kthread_should_stop())
401 spin_lock_irqsave(&pd->lock, flags);
402 if (pd->curr_buf) /* dma is active */
404 if (list_empty(&pd->dmaq)) /* no empty biffers */
406 vb = list_first_entry(&pd->dmaq, typeof(*vb), queue);
407 list_del(&vb->queue);
408 if (vb->state == VIDEOBUF_QUEUED) {
409 vb->state = VIDEOBUF_ACTIVE;
411 spin_unlock_irqrestore(&pd->lock, flags);
413 dt3155_start_acq(pd);
416 printk(KERN_DEBUG "%s(): This is a BUG\n", __func__);
418 spin_unlock_irqrestore(&pd->lock, flags);
424 dt3155_open(struct file *filp)
427 struct dt3155_priv *pd = video_drvdata(filp);
429 printk(KERN_INFO "dt3155: open(): minor: %i\n", pd->vdev->minor);
431 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
434 pd->vidq = kzalloc(sizeof(*pd->vidq), GFP_KERNEL);
436 printk(KERN_ERR "dt3155: error: alloc queue\n");
438 goto err_alloc_queue;
440 videobuf_queue_dma_contig_init(pd->vidq, &vbq_ops,
441 &pd->pdev->dev, &pd->lock,
442 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE,
443 sizeof(struct videobuf_buffer), pd);
444 /* disable all irqs, clear all irq flags */
445 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD,
447 pd->irq_handler = dt3155_irq_handler_even;
448 ret = request_irq(pd->pdev->irq, pd->irq_handler,
449 IRQF_SHARED, DT3155_NAME, pd);
451 printk(KERN_ERR "dt3155: error: request_irq\n");
452 goto err_request_irq;
455 pd->thread = kthread_run(dt3155_threadfn, pd,
456 "dt3155_thread_%i", pd->vdev->minor);
457 if (IS_ERR(pd->thread)) {
458 printk(KERN_ERR "dt3155: kthread_run() failed\n");
459 ret = PTR_ERR(pd->thread);
467 free_irq(pd->pdev->irq, pd);
473 mutex_unlock(&pd->mux);
478 dt3155_release(struct file *filp)
480 struct dt3155_priv *pd = video_drvdata(filp);
481 struct videobuf_buffer *tmp;
485 printk(KERN_INFO "dt3155: release(): minor: %i\n", pd->vdev->minor);
487 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
490 BUG_ON(pd->users < 0);
491 if (pd->acq_fp == filp) {
492 spin_lock_irqsave(&pd->lock, flags);
493 INIT_LIST_HEAD(&pd->dmaq); /* queue is emptied */
495 spin_unlock_irqrestore(&pd->lock, flags);
497 videobuf_waiton(tmp, 0, 1); /* block, interruptible */
499 videobuf_stop(pd->vidq);
504 kthread_stop(pd->thread);
505 free_irq(pd->pdev->irq, pd);
509 mutex_unlock(&pd->mux);
514 dt3155_read(struct file *filp, char __user *user, size_t size, loff_t *loff)
516 struct dt3155_priv *pd = video_drvdata(filp);
519 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
524 } else if (pd->acq_fp != filp) {
527 } else if (pd->streaming == 1) {
531 ret = videobuf_read_stream(pd->vidq, user, size, loff, 0,
532 filp->f_flags & O_NONBLOCK);
534 mutex_unlock(&pd->mux);
539 dt3155_poll(struct file *filp, struct poll_table_struct *polltbl)
541 struct dt3155_priv *pd = video_drvdata(filp);
543 return videobuf_poll_stream(filp, pd->vidq, polltbl);
547 dt3155_mmap(struct file *filp, struct vm_area_struct *vma)
549 struct dt3155_priv *pd = video_drvdata(filp);
551 return videobuf_mmap_mapper(pd->vidq, vma);
554 static const struct v4l2_file_operations dt3155_fops = {
555 .owner = THIS_MODULE,
557 .release = dt3155_release,
560 .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */
565 dt3155_ioc_streamon(struct file *filp, void *p, enum v4l2_buf_type type)
567 struct dt3155_priv *pd = video_drvdata(filp);
568 int ret = -ERESTARTSYS;
570 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
573 ret = videobuf_streamon(pd->vidq);
578 wake_up_interruptible_sync(&pd->do_dma);
579 } else if (pd->acq_fp == filp) {
581 ret = videobuf_streamon(pd->vidq);
583 wake_up_interruptible_sync(&pd->do_dma);
587 mutex_unlock(&pd->mux);
592 dt3155_ioc_streamoff(struct file *filp, void *p, enum v4l2_buf_type type)
594 struct dt3155_priv *pd = video_drvdata(filp);
595 struct videobuf_buffer *tmp;
599 ret = videobuf_streamoff(pd->vidq);
602 spin_lock_irqsave(&pd->lock, flags);
604 spin_unlock_irqrestore(&pd->lock, flags);
606 videobuf_waiton(tmp, 0, 1); /* block, interruptible */
611 dt3155_ioc_querycap(struct file *filp, void *p, struct v4l2_capability *cap)
613 struct dt3155_priv *pd = video_drvdata(filp);
615 strcpy(cap->driver, DT3155_NAME);
616 strcpy(cap->card, DT3155_NAME " frame grabber");
617 sprintf(cap->bus_info, "PCI:%s", pci_name(pd->pdev));
619 KERNEL_VERSION(DT3155_VER_MAJ, DT3155_VER_MIN, DT3155_VER_EXT);
620 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
627 dt3155_ioc_enum_fmt_vid_cap(struct file *filp, void *p, struct v4l2_fmtdesc *f)
629 if (f->index >= NUM_OF_FORMATS)
631 *f = frame_std[f->index];
636 dt3155_ioc_g_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
638 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
640 f->fmt.pix.width = img_width;
641 f->fmt.pix.height = img_height;
642 f->fmt.pix.pixelformat = V4L2_PIX_FMT_GREY;
643 f->fmt.pix.field = V4L2_FIELD_NONE;
644 f->fmt.pix.bytesperline = f->fmt.pix.width;
645 f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height;
646 f->fmt.pix.colorspace = 0;
652 dt3155_ioc_try_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
654 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
656 if (f->fmt.pix.width == img_width &&
657 f->fmt.pix.height == img_height &&
658 f->fmt.pix.pixelformat == V4L2_PIX_FMT_GREY &&
659 f->fmt.pix.field == V4L2_FIELD_NONE &&
660 f->fmt.pix.bytesperline == f->fmt.pix.width &&
661 f->fmt.pix.sizeimage == f->fmt.pix.width * f->fmt.pix.height)
668 dt3155_ioc_s_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
670 struct dt3155_priv *pd = video_drvdata(filp);
671 int ret = -ERESTARTSYS;
673 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
678 } else if (pd->acq_fp != filp) {
682 /* FIXME: we don't change the format for now
683 if (pd->vidq->streaming || pd->vidq->reading || pd->curr_buff) {
688 ret = dt3155_ioc_g_fmt_vid_cap(filp, p, f);
690 mutex_unlock(&pd->mux);
695 dt3155_ioc_reqbufs(struct file *filp, void *p, struct v4l2_requestbuffers *b)
697 struct dt3155_priv *pd = video_drvdata(filp);
698 struct videobuf_queue *q = pd->vidq;
699 int ret = -ERESTARTSYS;
701 if (b->memory != V4L2_MEMORY_MMAP)
703 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
707 else if (pd->acq_fp != filp) {
714 mutex_unlock(&pd->mux);
718 ret = videobuf_reqbufs(q, b);
719 else { /* FIXME: is it necessary? */
720 printk(KERN_DEBUG "dt3155: request to free buffers\n");
721 /* ret = videobuf_mmap_free(q); */
722 ret = dt3155_ioc_streamoff(filp, p,
723 V4L2_BUF_TYPE_VIDEO_CAPTURE);
729 dt3155_ioc_querybuf(struct file *filp, void *p, struct v4l2_buffer *b)
731 struct dt3155_priv *pd = video_drvdata(filp);
732 struct videobuf_queue *q = pd->vidq;
734 return videobuf_querybuf(q, b);
738 dt3155_ioc_qbuf(struct file *filp, void *p, struct v4l2_buffer *b)
740 struct dt3155_priv *pd = video_drvdata(filp);
741 struct videobuf_queue *q = pd->vidq;
744 ret = videobuf_qbuf(q, b);
747 return videobuf_querybuf(q, b);
751 dt3155_ioc_dqbuf(struct file *filp, void *p, struct v4l2_buffer *b)
753 struct dt3155_priv *pd = video_drvdata(filp);
754 struct videobuf_queue *q = pd->vidq;
756 return videobuf_dqbuf(q, b, filp->f_flags & O_NONBLOCK);
760 dt3155_ioc_querystd(struct file *filp, void *p, v4l2_std_id *norm)
762 *norm = DT3155_CURRENT_NORM;
767 dt3155_ioc_g_std(struct file *filp, void *p, v4l2_std_id *norm)
769 *norm = DT3155_CURRENT_NORM;
774 dt3155_ioc_s_std(struct file *filp, void *p, v4l2_std_id *norm)
776 if (*norm & DT3155_CURRENT_NORM)
782 dt3155_ioc_enum_input(struct file *filp, void *p, struct v4l2_input *input)
786 strcpy(input->name, "Coax in");
787 input->type = V4L2_INPUT_TYPE_CAMERA;
789 * FIXME: input->std = 0 according to v4l2 API
790 * VIDIOC_G_STD, VIDIOC_S_STD, VIDIOC_QUERYSTD and VIDIOC_ENUMSTD
791 * should return -EINVAL
793 input->std = DT3155_CURRENT_NORM;
794 input->status = 0;/* FIXME: add sync detection & V4L2_IN_ST_NO_H_LOCK */
799 dt3155_ioc_g_input(struct file *filp, void *p, unsigned int *i)
806 dt3155_ioc_s_input(struct file *filp, void *p, unsigned int i)
814 dt3155_ioc_g_parm(struct file *filp, void *p, struct v4l2_streamparm *parms)
816 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
818 parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
819 parms->parm.capture.capturemode = 0;
820 parms->parm.capture.timeperframe.numerator = 1001;
821 parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000;
822 parms->parm.capture.extendedmode = 0;
823 parms->parm.capture.readbuffers = 1; /* FIXME: 2 buffers? */
828 dt3155_ioc_s_parm(struct file *filp, void *p, struct v4l2_streamparm *parms)
830 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
832 parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
833 parms->parm.capture.capturemode = 0;
834 parms->parm.capture.timeperframe.numerator = 1001;
835 parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000;
836 parms->parm.capture.extendedmode = 0;
837 parms->parm.capture.readbuffers = 1; /* FIXME: 2 buffers? */
841 static const struct v4l2_ioctl_ops dt3155_ioctl_ops = {
842 .vidioc_streamon = dt3155_ioc_streamon,
843 .vidioc_streamoff = dt3155_ioc_streamoff,
844 .vidioc_querycap = dt3155_ioc_querycap,
846 .vidioc_g_priority = dt3155_ioc_g_priority,
847 .vidioc_s_priority = dt3155_ioc_s_priority,
849 .vidioc_enum_fmt_vid_cap = dt3155_ioc_enum_fmt_vid_cap,
850 .vidioc_try_fmt_vid_cap = dt3155_ioc_try_fmt_vid_cap,
851 .vidioc_g_fmt_vid_cap = dt3155_ioc_g_fmt_vid_cap,
852 .vidioc_s_fmt_vid_cap = dt3155_ioc_s_fmt_vid_cap,
853 .vidioc_reqbufs = dt3155_ioc_reqbufs,
854 .vidioc_querybuf = dt3155_ioc_querybuf,
855 .vidioc_qbuf = dt3155_ioc_qbuf,
856 .vidioc_dqbuf = dt3155_ioc_dqbuf,
857 .vidioc_querystd = dt3155_ioc_querystd,
858 .vidioc_g_std = dt3155_ioc_g_std,
859 .vidioc_s_std = dt3155_ioc_s_std,
860 .vidioc_enum_input = dt3155_ioc_enum_input,
861 .vidioc_g_input = dt3155_ioc_g_input,
862 .vidioc_s_input = dt3155_ioc_s_input,
864 .vidioc_queryctrl = dt3155_ioc_queryctrl,
865 .vidioc_g_ctrl = dt3155_ioc_g_ctrl,
866 .vidioc_s_ctrl = dt3155_ioc_s_ctrl,
867 .vidioc_querymenu = dt3155_ioc_querymenu,
868 .vidioc_g_ext_ctrls = dt3155_ioc_g_ext_ctrls,
869 .vidioc_s_ext_ctrls = dt3155_ioc_s_ext_ctrls,
871 .vidioc_g_parm = dt3155_ioc_g_parm,
872 .vidioc_s_parm = dt3155_ioc_s_parm,
874 .vidioc_cropcap = dt3155_ioc_cropcap,
875 .vidioc_g_crop = dt3155_ioc_g_crop,
876 .vidioc_s_crop = dt3155_ioc_s_crop,
877 .vidioc_enum_framesizes = dt3155_ioc_enum_framesizes,
878 .vidioc_enum_frameintervals = dt3155_ioc_enum_frameintervals,
879 #ifdef CONFIG_VIDEO_V4L1_COMPAT
880 .vidiocgmbuf = iocgmbuf,
886 dt3155_init_board(struct pci_dev *dev)
888 struct dt3155_priv *pd = pci_get_drvdata(dev);
894 pci_set_master(dev); /* dt3155 needs it */
896 /* resetting the adapter */
897 iowrite32(FLD_CRPT_ODD | FLD_CRPT_EVEN | FLD_DN_ODD | FLD_DN_EVEN,
902 /* initializing adaper registers */
903 iowrite32(FIFO_EN | SRST, pd->regs + CSR1);
905 iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT);
906 iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT);
907 iowrite32(0x00000020, pd->regs + FIFO_TRIGER);
908 iowrite32(0x00000103, pd->regs + XFER_MODE);
909 iowrite32(0, pd->regs + RETRY_WAIT_CNT);
910 iowrite32(0, pd->regs + INT_CSR);
911 iowrite32(1, pd->regs + EVEN_FLD_MASK);
912 iowrite32(1, pd->regs + ODD_FLD_MASK);
913 iowrite32(0, pd->regs + MASK_LENGTH);
914 iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT);
915 iowrite32(0x01010101, pd->regs + IIC_CLK_DUR);
918 /* verifying that we have a DT3155 board (not just a SAA7116 chip) */
919 read_i2c_reg(pd->regs, DT_ID, &tmp);
920 if (tmp != DT3155_ID)
923 /* initialize AD LUT */
924 write_i2c_reg(pd->regs, AD_ADDR, 0);
925 for (i = 0; i < 256; i++)
926 write_i2c_reg(pd->regs, AD_LUT, i);
928 /* initialize ADC references */
929 /* FIXME: pos_ref & neg_ref depend on VT_50HZ */
930 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
931 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
932 write_i2c_reg(pd->regs, AD_ADDR, AD_POS_REF);
933 write_i2c_reg(pd->regs, AD_CMD, 34);
934 write_i2c_reg(pd->regs, AD_ADDR, AD_NEG_REF);
935 write_i2c_reg(pd->regs, AD_CMD, 0);
937 /* initialize PM LUT */
938 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM);
939 for (i = 0; i < 256; i++) {
940 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
941 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
943 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM | PM_LUT_SEL);
944 for (i = 0; i < 256; i++) {
945 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
946 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
948 write_i2c_reg(pd->regs, CONFIG, pd->config); /* ACQ_MODE_EVEN */
950 /* select chanel 1 for input and set sync level */
951 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
952 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
954 /* allocate memory, and initialize the DMA machine */
955 buf_cpu = dma_alloc_coherent(&dev->dev, DT3155_BUF_SIZE, &buf_dma,
958 printk(KERN_ERR "dt3155: dma_alloc_coherent "
959 "(in dt3155_init_board) failed\n");
962 iowrite32(buf_dma, pd->regs + EVEN_DMA_START);
963 iowrite32(buf_dma, pd->regs + ODD_DMA_START);
964 iowrite32(0, pd->regs + EVEN_DMA_STRIDE);
965 iowrite32(0, pd->regs + ODD_DMA_STRIDE);
967 /* Perform a pseudo even field acquire */
968 iowrite32(FIFO_EN | SRST | CAP_CONT_ODD, pd->regs + CSR1);
969 write_i2c_reg(pd->regs, CSR2, pd->csr2 | SYNC_SNTL);
970 write_i2c_reg(pd->regs, CONFIG, pd->config);
971 write_i2c_reg(pd->regs, EVEN_CSR, CSR_SNGL);
972 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | SYNC_SNTL);
974 read_i2c_reg(pd->regs, CSR2, &tmp);
975 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
976 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
977 write_i2c_reg(pd->regs, CSR2, pd->csr2);
978 iowrite32(FIFO_EN | SRST | FLD_DN_EVEN | FLD_DN_ODD, pd->regs + CSR1);
980 /* deallocate memory */
981 dma_free_coherent(&dev->dev, DT3155_BUF_SIZE, buf_cpu, buf_dma);
982 if (tmp & BUSY_EVEN) {
983 printk(KERN_ERR "dt3155: BUSY_EVEN not cleared\n");
989 static struct video_device dt3155_vdev = {
991 .fops = &dt3155_fops,
992 .ioctl_ops = &dt3155_ioctl_ops,
994 .release = video_device_release,
995 .tvnorms = DT3155_CURRENT_NORM,
996 .current_norm = DT3155_CURRENT_NORM,
999 /* same as in drivers/base/dma-coherent.c */
1000 struct dma_coherent_mem {
1005 unsigned long *bitmap;
1008 static int __devinit
1009 dt3155_alloc_coherent(struct device *dev, size_t size, int flags)
1011 struct dma_coherent_mem *mem;
1012 dma_addr_t dev_base;
1013 int pages = size >> PAGE_SHIFT;
1014 int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
1016 if ((flags & DMA_MEMORY_MAP) == 0)
1023 mem = kzalloc(sizeof(*mem), GFP_KERNEL);
1026 mem->virt_base = dma_alloc_coherent(dev, size, &dev_base,
1028 if (!mem->virt_base)
1029 goto err_alloc_coherent;
1030 mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1034 /* coherent_dma_mask is already set to 32 bits */
1035 mem->device_base = dev_base;
1039 return DMA_MEMORY_MAP;
1042 dma_free_coherent(dev, size, mem->virt_base, dev_base);
1049 static void __devexit
1050 dt3155_free_coherent(struct device *dev)
1052 struct dma_coherent_mem *mem = dev->dma_mem;
1056 dev->dma_mem = NULL;
1057 dma_free_coherent(dev, mem->size << PAGE_SHIFT,
1058 mem->virt_base, mem->device_base);
1063 static int __devinit
1064 dt3155_probe(struct pci_dev *dev, const struct pci_device_id *id)
1067 struct dt3155_priv *pd;
1069 printk(KERN_INFO "dt3155: probe()\n");
1070 err = dma_set_mask(&dev->dev, DMA_BIT_MASK(32));
1072 printk(KERN_ERR "dt3155: cannot set dma_mask\n");
1075 err = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
1077 printk(KERN_ERR "dt3155: cannot set dma_coherent_mask\n");
1080 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
1082 printk(KERN_ERR "dt3155: cannot allocate dt3155_priv\n");
1085 pd->vdev = video_device_alloc();
1087 printk(KERN_ERR "dt3155: cannot allocate vdev structure\n");
1088 goto err_video_device_alloc;
1090 *pd->vdev = dt3155_vdev;
1091 pci_set_drvdata(dev, pd); /* for use in dt3155_remove() */
1092 video_set_drvdata(pd->vdev, pd); /* for use in video_fops */
1096 INIT_LIST_HEAD(&pd->dmaq);
1097 init_waitqueue_head(&pd->do_dma);
1098 mutex_init(&pd->mux);
1099 pd->csr2 = csr2_init;
1100 pd->config = config_init;
1101 err = pci_enable_device(pd->pdev);
1103 printk(KERN_ERR "dt3155: pci_dev not enabled\n");
1104 goto err_enable_dev;
1106 err = pci_request_region(pd->pdev, 0, pci_name(pd->pdev));
1108 goto err_req_region;
1109 pd->regs = pci_iomap(pd->pdev, 0, pci_resource_len(pd->pdev, 0));
1112 printk(KERN_ERR "dt3155: pci_iomap failed\n");
1115 err = dt3155_init_board(pd->pdev);
1117 printk(KERN_ERR "dt3155: dt3155_init_board failed\n");
1118 goto err_init_board;
1120 err = video_register_device(pd->vdev, VFL_TYPE_GRABBER, -1);
1122 printk(KERN_ERR "dt3155: Cannot register video device\n");
1123 goto err_init_board;
1125 err = dt3155_alloc_coherent(&dev->dev, DT3155_CHUNK_SIZE,
1128 printk(KERN_INFO "dt3155: preallocated 8 buffers\n");
1129 printk(KERN_INFO "dt3155: /dev/video%i is ready\n", pd->vdev->minor);
1130 return 0; /* success */
1133 pci_iounmap(pd->pdev, pd->regs);
1135 pci_release_region(pd->pdev, 0);
1137 pci_disable_device(pd->pdev);
1139 video_device_release(pd->vdev);
1140 err_video_device_alloc:
1145 static void __devexit
1146 dt3155_remove(struct pci_dev *dev)
1148 struct dt3155_priv *pd = pci_get_drvdata(dev);
1150 printk(KERN_INFO "dt3155: remove()\n");
1151 dt3155_free_coherent(&dev->dev);
1152 video_unregister_device(pd->vdev);
1153 pci_iounmap(dev, pd->regs);
1154 pci_release_region(pd->pdev, 0);
1155 pci_disable_device(pd->pdev);
1157 * video_device_release() is invoked automatically
1158 * see: struct video_device dt3155_vdev
1163 static DEFINE_PCI_DEVICE_TABLE(pci_ids) = {
1164 { PCI_DEVICE(DT3155_VENDOR_ID, DT3155_DEVICE_ID) },
1165 { 0, /* zero marks the end */ },
1167 MODULE_DEVICE_TABLE(pci, pci_ids);
1169 static struct pci_driver pci_driver = {
1170 .name = DT3155_NAME,
1171 .id_table = pci_ids,
1172 .probe = dt3155_probe,
1173 .remove = __devexit_p(dt3155_remove),
1177 dt3155_init_module(void)
1181 printk(KERN_INFO "dt3155: ==================\n");
1182 printk(KERN_INFO "dt3155: init()\n");
1183 err = pci_register_driver(&pci_driver);
1185 printk(KERN_ERR "dt3155: cannot register pci_driver\n");
1188 return 0; /* succes */
1192 dt3155_exit_module(void)
1194 pci_unregister_driver(&pci_driver);
1195 printk(KERN_INFO "dt3155: exit()\n");
1196 printk(KERN_INFO "dt3155: ==================\n");
1199 module_init(dt3155_init_module);
1200 module_exit(dt3155_exit_module);
1202 MODULE_DESCRIPTION("video4linux pci-driver for dt3155 frame grabber");
1203 MODULE_AUTHOR("Marin Mitov <mitov@issp.bas.bg>");
1204 MODULE_VERSION(DT3155_VERSION);
1205 MODULE_LICENSE("GPL");