drivers/staging/emxx_udc/emxx_udc.c

   1 /*
   2  *  drivers/usb/gadget/emxx_udc.c
   3  *     EMXX FCD (Function Controller Driver) for USB.
   4  *
   5  *  Copyright (C) 2010 Renesas Electronics Corporation
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License version 2
   9  *  as published by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  *  GNU General Public License for more details.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/delay.h>
  21 #include <linux/ioport.h>
  22 #include <linux/slab.h>
  23 #include <linux/errno.h>
  24 #include <linux/list.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/proc_fs.h>
  27 #include <linux/clk.h>
  28 #include <linux/ctype.h>
  29 #include <linux/string.h>
  30 #include <linux/dma-mapping.h>
  31 #include <linux/workqueue.h>
  32 #include <linux/device.h>
  33
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36
  37 #include <linux/irq.h>
  38 #include <linux/gpio.h>
  39
  40 #include "emxx_udc.h"
  41
  42 #define DRIVER_DESC     "EMXX UDC driver"
  43 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  44
  45 static const char       driver_name[] = "emxx_udc";
  46 static const char       driver_desc[] = DRIVER_DESC;
  47
  48 /*===========================================================================*/
  49 /* Prototype */
  50 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
  51 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
  52 /*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
  53 static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
  54 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
  55 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
  56
  57 static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
  58 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
  59
  60 /*===========================================================================*/
  61 /* Macro */
  62 #define _nbu2ss_zero_len_pkt(udc, epnum)        \
  63         _nbu2ss_ep_in_end(udc, epnum, 0, 0)
  64
  65 /*===========================================================================*/
  66 /* Global */
  67 struct nbu2ss_udc udc_controller;
  68
  69 /*-------------------------------------------------------------------------*/
  70 /* Read */
  71 static inline u32 _nbu2ss_readl(void *address)
  72 {
  73         return __raw_readl(address);
  74 }
  75
  76 /*-------------------------------------------------------------------------*/
  77 /* Write */
  78 static inline void _nbu2ss_writel(void *address, u32 udata)
  79 {
  80         __raw_writel(udata, address);
  81 }
  82
  83 /*-------------------------------------------------------------------------*/
  84 /* Set Bit */
  85 static inline void _nbu2ss_bitset(void *address, u32 udata)
  86 {
  87         u32     reg_dt = __raw_readl(address) | (udata);
  88
  89         __raw_writel(reg_dt, address);
  90 }
  91
  92 /*-------------------------------------------------------------------------*/
  93 /* Clear Bit */
  94 static inline void _nbu2ss_bitclr(void *address, u32 udata)
  95 {
  96         u32     reg_dt = __raw_readl(address) & ~(udata);
  97
  98         __raw_writel(reg_dt, address);
  99 }
 100
 101 #ifdef UDC_DEBUG_DUMP
 102 /*-------------------------------------------------------------------------*/
 103 static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
 104 {
 105         int             i;
 106         u32 reg_data;
 107
 108         pr_info("=== %s()\n", __func__);
 109
 110         if (!udc) {
 111                 pr_err("%s udc == NULL\n", __func__);
 112                 return;
 113         }
 114
 115         spin_unlock(&udc->lock);
 116
 117         dev_dbg(&udc->dev, "\n-USB REG-\n");
 118         for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
 119                 reg_data =   _nbu2ss_readl(
 120                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
 121                 dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
 122
 123                 reg_data =  _nbu2ss_readl(
 124                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
 125                 dev_dbg(&udc->dev, " %08x", (int)reg_data);
 126
 127                 reg_data =  _nbu2ss_readl(
 128                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
 129                 dev_dbg(&udc->dev, " %08x", (int)reg_data);
 130
 131                 reg_data =  _nbu2ss_readl(
 132                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
 133                 dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
 134         }
 135
 136         spin_lock(&udc->lock);
 137 }
 138 #endif /* UDC_DEBUG_DUMP */
 139
 140 /*-------------------------------------------------------------------------*/
 141 /* Endpoint 0 Callback (Complete) */
 142 static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
 143 {
 144         u8              recipient;
 145         u16             selector;
 146         u32             test_mode;
 147         struct usb_ctrlrequest  *p_ctrl;
 148         struct nbu2ss_udc *udc;
 149
 150         if ((!_ep) || (!_req))
 151                 return;
 152
 153         udc = (struct nbu2ss_udc *)_req->context;
 154         p_ctrl = &udc->ctrl;
 155         if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
 156                 if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
 157                         /*-------------------------------------------------*/
 158                         /* SET_FEATURE */
 159                         recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
 160                         selector  = p_ctrl->wValue;
 161                         if ((recipient == USB_RECIP_DEVICE) &&
 162                             (selector == USB_DEVICE_TEST_MODE)) {
 163                                 test_mode = (u32)(p_ctrl->wIndex >> 8);
 164                                 _nbu2ss_set_test_mode(udc, test_mode);
 165                         }
 166                 }
 167         }
 168 }
 169
 170 /*-------------------------------------------------------------------------*/
 171 /* Initialization usb_request */
 172 static void _nbu2ss_create_ep0_packet(
 173         struct nbu2ss_udc *udc,
 174         void *p_buf,
 175         unsigned length
 176 )
 177 {
 178         udc->ep0_req.req.buf            = p_buf;
 179         udc->ep0_req.req.length         = length;
 180         udc->ep0_req.req.dma            = 0;
 181         udc->ep0_req.req.zero           = TRUE;
 182         udc->ep0_req.req.complete       = _nbu2ss_ep0_complete;
 183         udc->ep0_req.req.status         = -EINPROGRESS;
 184         udc->ep0_req.req.context        = udc;
 185         udc->ep0_req.req.actual         = 0;
 186 }
 187
 188 /*-------------------------------------------------------------------------*/
 189 /* Acquisition of the first address of RAM(FIFO) */
 190 static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
 191 {
 192         u32             num, buf_type;
 193         u32             data, last_ram_adr, use_ram_size;
 194
 195         struct ep_regs *p_ep_regs;
 196
 197         last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
 198         use_ram_size = 0;
 199
 200         for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
 201                 p_ep_regs = &udc->p_regs->EP_REGS[num];
 202                 data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
 203                 buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPn_BUF_TYPE;
 204                 if (buf_type == 0) {
 205                         /* Single Buffer */
 206                         use_ram_size += (data & EPn_MPKT) / sizeof(u32);
 207                 } else {
 208                         /* Double Buffer */
 209                         use_ram_size += ((data & EPn_MPKT) / sizeof(u32)) * 2;
 210                 }
 211
 212                 if ((data >> 16) > last_ram_adr)
 213                         last_ram_adr = data >> 16;
 214         }
 215
 216         return last_ram_adr + use_ram_size;
 217 }
 218
 219 /*-------------------------------------------------------------------------*/
 220 /* Construction of Endpoint */
 221 static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 222 {
 223         u32             num;
 224         u32             data;
 225         u32             begin_adrs;
 226
 227         if (ep->epnum == 0)
 228                 return  -EINVAL;
 229
 230         num = ep->epnum - 1;
 231
 232         /*-------------------------------------------------------------*/
 233         /* RAM Transfer Address */
 234         begin_adrs = _nbu2ss_get_begin_ram_address(udc);
 235         data = (begin_adrs << 16) | ep->ep.maxpacket;
 236         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
 237
 238         /*-------------------------------------------------------------*/
 239         /* Interrupt Enable */
 240         data = 1 << (ep->epnum + 8);
 241         _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
 242
 243         /*-------------------------------------------------------------*/
 244         /* Endpoint Type(Mode) */
 245         /*   Bulk, Interrupt, ISO */
 246         switch (ep->ep_type) {
 247         case USB_ENDPOINT_XFER_BULK:
 248                 data = EPn_BULK;
 249                 break;
 250
 251         case USB_ENDPOINT_XFER_INT:
 252                 data = EPn_BUF_SINGLE | EPn_INTERRUPT;
 253                 break;
 254
 255         case USB_ENDPOINT_XFER_ISOC:
 256                 data = EPn_ISO;
 257                 break;
 258
 259         default:
 260                 data = 0;
 261                 break;
 262         }
 263
 264         _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 265         _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum | ep->direct));
 266
 267         if (ep->direct == USB_DIR_OUT) {
 268                 /*---------------------------------------------------------*/
 269                 /* OUT */
 270                 data = EPn_EN | EPn_BCLR | EPn_DIR0;
 271                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 272
 273                 data = EPn_ONAK | EPn_OSTL_EN | EPn_OSTL;
 274                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 275
 276                 data = EPn_OUT_EN | EPn_OUT_END_EN;
 277                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 278         } else {
 279                 /*---------------------------------------------------------*/
 280                 /* IN */
 281                 data = EPn_EN | EPn_BCLR | EPn_AUTO;
 282                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 283
 284                 data = EPn_ISTL;
 285                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 286
 287                 data = EPn_IN_EN | EPn_IN_END_EN;
 288                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 289         }
 290
 291         return 0;
 292 }
 293
 294 /*-------------------------------------------------------------------------*/
 295 /* Release of Endpoint */
 296 static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 297 {
 298         u32             num;
 299         u32             data;
 300
 301         if ((ep->epnum == 0) || (udc->vbus_active == 0))
 302                 return  -EINVAL;
 303
 304         num = ep->epnum - 1;
 305
 306         /*-------------------------------------------------------------*/
 307         /* RAM Transfer Address */
 308         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
 309
 310         /*-------------------------------------------------------------*/
 311         /* Interrupt Disable */
 312         data = 1 << (ep->epnum + 8);
 313         _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
 314
 315         if (ep->direct == USB_DIR_OUT) {
 316                 /*---------------------------------------------------------*/
 317                 /* OUT */
 318                 data = EPn_ONAK | EPn_BCLR;
 319                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 320
 321                 data = EPn_EN | EPn_DIR0;
 322                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 323
 324                 data = EPn_OUT_EN | EPn_OUT_END_EN;
 325                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 326         } else {
 327                 /*---------------------------------------------------------*/
 328                 /* IN */
 329                 data = EPn_BCLR;
 330                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 331
 332                 data = EPn_EN | EPn_AUTO;
 333                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 334
 335                 data = EPn_IN_EN | EPn_IN_END_EN;
 336                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 337         }
 338
 339         return 0;
 340 }
 341
 342 /*-------------------------------------------------------------------------*/
 343 /* DMA setting (without Endpoint 0) */
 344 static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 345 {
 346         u32             num;
 347         u32             data;
 348
 349         data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
 350         if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
 351                 return;         /* Not Support DMA */
 352
 353         num = ep->epnum - 1;
 354
 355         if (ep->direct == USB_DIR_OUT) {
 356                 /*---------------------------------------------------------*/
 357                 /* OUT */
 358                 data = ep->ep.maxpacket;
 359                 _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
 360
 361                 /*---------------------------------------------------------*/
 362                 /* Transfer Direct */
 363                 data = DCR1_EPn_DIR0;
 364                 _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
 365
 366                 /*---------------------------------------------------------*/
 367                 /* DMA Mode etc. */
 368                 data = EPn_STOP_MODE | EPn_STOP_SET  | EPn_DMAMODE0;
 369                 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 370         } else {
 371                 /*---------------------------------------------------------*/
 372                 /* IN */
 373                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 374
 375                 /*---------------------------------------------------------*/
 376                 /* DMA Mode etc. */
 377                 data = EPn_BURST_SET | EPn_DMAMODE0;
 378                 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 379         }
 380 }
 381
 382 /*-------------------------------------------------------------------------*/
 383 /* DMA setting release */
 384 static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 385 {
 386         u32             num;
 387         u32             data;
 388         struct fc_regs  *preg = udc->p_regs;
 389
 390         if (udc->vbus_active == 0)
 391                 return;         /* VBUS OFF */
 392
 393         data = _nbu2ss_readl(&preg->USBSSCONF);
 394         if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
 395                 return;         /* Not Support DMA */
 396
 397         num = ep->epnum - 1;
 398
 399         _nbu2ss_ep_dma_abort(udc, ep);
 400
 401         if (ep->direct == USB_DIR_OUT) {
 402                 /*---------------------------------------------------------*/
 403                 /* OUT */
 404                 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
 405                 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_DIR0);
 406                 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 407         } else {
 408                 /*---------------------------------------------------------*/
 409                 /* IN */
 410                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 411                 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 412         }
 413 }
 414
 415 /*-------------------------------------------------------------------------*/
 416 /* Abort DMA */
 417 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 418 {
 419         struct fc_regs  *preg = udc->p_regs;
 420
 421         _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum - 1].EP_DCR1, DCR1_EPn_REQEN);
 422         mdelay(DMA_DISABLE_TIME);       /* DCR1_EPn_REQEN Clear */
 423         _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum - 1].EP_DMA_CTRL, EPn_DMA_EN);
 424 }
 425
 426 /*-------------------------------------------------------------------------*/
 427 /* Start IN Transfer */
 428 static void _nbu2ss_ep_in_end(
 429         struct nbu2ss_udc *udc,
 430         u32 epnum,
 431         u32 data32,
 432         u32 length
 433 )
 434 {
 435         u32             data;
 436         u32             num;
 437         struct fc_regs  *preg = udc->p_regs;
 438
 439         if (length >= sizeof(u32))
 440                 return;
 441
 442         if (epnum == 0) {
 443                 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
 444
 445                 /* Writing of 1-4 bytes */
 446                 if (length)
 447                         _nbu2ss_writel(&preg->EP0_WRITE, data32);
 448
 449                 data = ((length << 5) & EP0_DW) | EP0_DEND;
 450                 _nbu2ss_writel(&preg->EP0_CONTROL, data);
 451
 452                 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
 453         } else {
 454                 num = epnum - 1;
 455
 456                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 457
 458                 /* Writing of 1-4 bytes */
 459                 if (length)
 460                         _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
 461
 462                 data = (((length) << 5) & EPn_DW) | EPn_DEND;
 463                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
 464
 465                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 466         }
 467 }
 468
 469 #ifdef USE_DMA
 470 /*-------------------------------------------------------------------------*/
 471 static void _nbu2ss_dma_map_single(
 472         struct nbu2ss_udc *udc,
 473         struct nbu2ss_ep *ep,
 474         struct nbu2ss_req *req,
 475         u8              direct
 476 )
 477 {
 478         if (req->req.dma == DMA_ADDR_INVALID) {
 479                 if (req->unaligned) {
 480                         req->req.dma = ep->phys_buf;
 481                 } else {
 482                         req->req.dma = dma_map_single(
 483                                 udc->gadget.dev.parent,
 484                                 req->req.buf,
 485                                 req->req.length,
 486                                 (direct == USB_DIR_IN)
 487                                 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 488                 }
 489                 req->mapped = 1;
 490         } else {
 491                 if (!req->unaligned)
 492                         dma_sync_single_for_device(
 493                                 udc->gadget.dev.parent,
 494                                 req->req.dma,
 495                                 req->req.length,
 496                                 (direct == USB_DIR_IN)
 497                                 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 498
 499                 req->mapped = 0;
 500         }
 501 }
 502
 503 /*-------------------------------------------------------------------------*/
 504 static void _nbu2ss_dma_unmap_single(
 505         struct nbu2ss_udc *udc,
 506         struct nbu2ss_ep *ep,
 507         struct nbu2ss_req *req,
 508         u8              direct
 509 )
 510 {
 511         u8              data[4];
 512         u8              *p;
 513         u32             count = 0;
 514
 515         if (direct == USB_DIR_OUT) {
 516                 count = req->req.actual % 4;
 517                 if (count) {
 518                         p = req->req.buf;
 519                         p += (req->req.actual - count);
 520                         memcpy(data, p, count);
 521                 }
 522         }
 523
 524         if (req->mapped) {
 525                 if (req->unaligned) {
 526                         if (direct == USB_DIR_OUT)
 527                                 memcpy(req->req.buf, ep->virt_buf,
 528                                        req->req.actual & 0xfffffffc);
 529                 } else
 530                         dma_unmap_single(udc->gadget.dev.parent,
 531                                          req->req.dma, req->req.length,
 532                                 (direct == USB_DIR_IN)
 533                                 ? DMA_TO_DEVICE
 534                                 : DMA_FROM_DEVICE);
 535                 req->req.dma = DMA_ADDR_INVALID;
 536                 req->mapped = 0;
 537         } else {
 538                 if (!req->unaligned)
 539                         dma_sync_single_for_cpu(udc->gadget.dev.parent,
 540                                                 req->req.dma, req->req.length,
 541                                 (direct == USB_DIR_IN)
 542                                 ? DMA_TO_DEVICE
 543                                 : DMA_FROM_DEVICE);
 544         }
 545
 546         if (count) {
 547                 p = req->req.buf;
 548                 p += (req->req.actual - count);
 549                 memcpy(p, data, count);
 550         }
 551 }
 552 #endif
 553
 554 /*-------------------------------------------------------------------------*/
 555 /* Endpoint 0 OUT Transfer (PIO) */
 556 static int EP0_out_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 557 {
 558         u32             i;
 559         int             nret   = 0;
 560         u32             iWordLength = 0;
 561         union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
 562
 563         /*------------------------------------------------------------*/
 564         /* Read Length */
 565         iWordLength = length / sizeof(u32);
 566
 567         /*------------------------------------------------------------*/
 568         /* PIO Read */
 569         if (iWordLength) {
 570                 for (i = 0; i < iWordLength; i++) {
 571                         pBuf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 572                         pBuf32++;
 573                 }
 574                 nret = iWordLength * sizeof(u32);
 575         }
 576
 577         return nret;
 578 }
 579
 580 /*-------------------------------------------------------------------------*/
 581 /* Endpoint 0 OUT Transfer (PIO, OverBytes) */
 582 static int EP0_out_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 583 {
 584         u32             i;
 585         u32             iReadSize = 0;
 586         union usb_reg_access  Temp32;
 587         union usb_reg_access  *pBuf32 = (union usb_reg_access *)pBuf;
 588
 589         if ((length > 0) && (length < sizeof(u32))) {
 590                 Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 591                 for (i = 0 ; i < length ; i++)
 592                         pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
 593                 iReadSize += length;
 594         }
 595
 596         return iReadSize;
 597 }
 598
 599 /*-------------------------------------------------------------------------*/
 600 /* Endpoint 0 IN Transfer (PIO) */
 601 static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 602 {
 603         u32             i;
 604         u32             iMaxLength   = EP0_PACKETSIZE;
 605         u32             iWordLength  = 0;
 606         u32             iWriteLength = 0;
 607         union usb_reg_access  *pBuf32 = (union usb_reg_access *)pBuf;
 608
 609         /*------------------------------------------------------------*/
 610         /* Transfer Length */
 611         if (iMaxLength < length)
 612                 iWordLength = iMaxLength / sizeof(u32);
 613         else
 614                 iWordLength = length / sizeof(u32);
 615
 616         /*------------------------------------------------------------*/
 617         /* PIO */
 618         for (i = 0; i < iWordLength; i++) {
 619                 _nbu2ss_writel(&udc->p_regs->EP0_WRITE, pBuf32->dw);
 620                 pBuf32++;
 621                 iWriteLength += sizeof(u32);
 622         }
 623
 624         return iWriteLength;
 625 }
 626
 627 /*-------------------------------------------------------------------------*/
 628 /* Endpoint 0 IN Transfer (PIO, OverBytes) */
 629 static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
 630 {
 631         u32             i;
 632         union usb_reg_access  Temp32;
 633         union usb_reg_access  *pBuf32 = (union usb_reg_access *)pBuf;
 634
 635         if ((iRemainSize > 0) && (iRemainSize < sizeof(u32))) {
 636                 for (i = 0 ; i < iRemainSize ; i++)
 637                         Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
 638                 _nbu2ss_ep_in_end(udc, 0, Temp32.dw, iRemainSize);
 639
 640                 return iRemainSize;
 641         }
 642
 643         return 0;
 644 }
 645
 646 /*-------------------------------------------------------------------------*/
 647 /* Transfer NULL Packet (Epndoint 0) */
 648 static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 649 {
 650         u32             data;
 651
 652         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 653         data &= ~(u32)EP0_INAK;
 654
 655         if (pid_flag)
 656                 data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
 657         else
 658                 data |= (EP0_INAK_EN | EP0_DEND);
 659
 660         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 661
 662         return 0;
 663 }
 664
 665 /*-------------------------------------------------------------------------*/
 666 /* Receive NULL Packet (Endpoint 0) */
 667 static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 668 {
 669         u32             data;
 670
 671         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 672         data &= ~(u32)EP0_ONAK;
 673
 674         if (pid_flag)
 675                 data |= EP0_PIDCLR;
 676
 677         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 678
 679         return 0;
 680 }
 681
 682 /*-------------------------------------------------------------------------*/
 683 static int _nbu2ss_ep0_in_transfer(
 684         struct nbu2ss_udc *udc,
 685         struct nbu2ss_req *req
 686 )
 687 {
 688         u8              *pBuffer;                       /* IN Data Buffer */
 689         u32             data;
 690         u32             iRemainSize = 0;
 691         int             result = 0;
 692
 693         /*-------------------------------------------------------------*/
 694         /* End confirmation */
 695         if (req->req.actual == req->req.length) {
 696                 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 697                         if (req->zero) {
 698                                 req->zero = false;
 699                                 EP0_send_NULL(udc, FALSE);
 700                                 return 1;
 701                         }
 702                 }
 703
 704                 return 0;               /* Transfer End */
 705         }
 706
 707         /*-------------------------------------------------------------*/
 708         /* NAK release */
 709         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 710         data |= EP0_INAK_EN;
 711         data &= ~(u32)EP0_INAK;
 712         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 713
 714         iRemainSize = req->req.length - req->req.actual;
 715         pBuffer = (u8 *)req->req.buf;
 716         pBuffer += req->req.actual;
 717
 718         /*-------------------------------------------------------------*/
 719         /* Data transfer */
 720         result = EP0_in_PIO(udc, pBuffer, iRemainSize);
 721
 722         req->div_len = result;
 723         iRemainSize -= result;
 724
 725         if (iRemainSize == 0) {
 726                 EP0_send_NULL(udc, FALSE);
 727                 return result;
 728         }
 729
 730         if ((iRemainSize < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
 731                 pBuffer += result;
 732                 result += EP0_in_OverBytes(udc, pBuffer, iRemainSize);
 733                 req->div_len = result;
 734         }
 735
 736         return result;
 737 }
 738
 739 /*-------------------------------------------------------------------------*/
 740 static int _nbu2ss_ep0_out_transfer(
 741         struct nbu2ss_udc *udc,
 742         struct nbu2ss_req *req
 743 )
 744 {
 745         u8              *pBuffer;
 746         u32             iRemainSize;
 747         u32             iRecvLength;
 748         int             result = 0;
 749         int             fRcvZero;
 750
 751         /*-------------------------------------------------------------*/
 752         /* Receive data confirmation */
 753         iRecvLength = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
 754         if (iRecvLength != 0) {
 755                 fRcvZero = 0;
 756
 757                 iRemainSize = req->req.length - req->req.actual;
 758                 pBuffer = (u8 *)req->req.buf;
 759                 pBuffer += req->req.actual;
 760
 761                 result = EP0_out_PIO(udc, pBuffer
 762                                         , min(iRemainSize, iRecvLength));
 763                 if (result < 0)
 764                         return result;
 765
 766                 req->req.actual += result;
 767                 iRecvLength -= result;
 768
 769                 if ((iRecvLength > 0) && (iRecvLength < sizeof(u32))) {
 770                         pBuffer += result;
 771                         iRemainSize -= result;
 772
 773                         result = EP0_out_OverBytes(udc, pBuffer
 774                                         , min(iRemainSize, iRecvLength));
 775                         req->req.actual += result;
 776                 }
 777         } else {
 778                 fRcvZero = 1;
 779         }
 780
 781         /*-------------------------------------------------------------*/
 782         /* End confirmation */
 783         if (req->req.actual == req->req.length) {
 784                 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 785                         if (req->zero) {
 786                                 req->zero = false;
 787                                 EP0_receive_NULL(udc, FALSE);
 788                                 return 1;
 789                         }
 790                 }
 791
 792                 return 0;               /* Transfer End */
 793         }
 794
 795         if ((req->req.actual % EP0_PACKETSIZE) != 0)
 796                 return 0;               /* Short Packet Transfer End */
 797
 798         if (req->req.actual > req->req.length) {
 799                 dev_err(udc->dev, " *** Overrun Error\n");
 800                 return -EOVERFLOW;
 801         }
 802
 803         if (fRcvZero != 0) {
 804                 iRemainSize = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 805                 if (iRemainSize & EP0_ONAK) {
 806                         /*---------------------------------------------------*/
 807                         /* NACK release */
 808                         _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
 809                 }
 810                 result = 1;
 811         }
 812
 813         return result;
 814 }
 815
 816 /*-------------------------------------------------------------------------*/
 817 static int _nbu2ss_out_dma(
 818         struct nbu2ss_udc *udc,
 819         struct nbu2ss_req *req,
 820         u32             num,
 821         u32             length
 822 )
 823 {
 824         dma_addr_t      pBuffer;
 825         u32             mpkt;
 826         u32             lmpkt;
 827         u32             dmacnt;
 828         u32             burst = 1;
 829         u32             data;
 830         int             result = -EINVAL;
 831         struct fc_regs  *preg = udc->p_regs;
 832
 833         if (req->dma_flag)
 834                 return 1;               /* DMA is forwarded */
 835
 836         req->dma_flag = TRUE;
 837         pBuffer = req->req.dma;
 838         pBuffer += req->req.actual;
 839
 840         /* DMA Address */
 841         _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
 842
 843         /* Number of transfer packets */
 844         mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
 845         dmacnt = length / mpkt;
 846         lmpkt = (length % mpkt) & ~(u32)0x03;
 847
 848         if (dmacnt > DMA_MAX_COUNT) {
 849                 dmacnt = DMA_MAX_COUNT;
 850                 lmpkt = 0;
 851         } else if (lmpkt != 0) {
 852                 if (dmacnt == 0)
 853                         burst = 0;      /* Burst OFF */
 854                 dmacnt++;
 855         }
 856
 857         data = mpkt | (lmpkt << 16);
 858         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
 859
 860         data = ((dmacnt & 0xff) << 16) | DCR1_EPn_DIR0 | DCR1_EPn_REQEN;
 861         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
 862
 863         if (burst == 0) {
 864                 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
 865                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
 866         } else {
 867                 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
 868                                 , (dmacnt << 16));
 869                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
 870         }
 871         _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
 872
 873         result = length & ~(u32)0x03;
 874         req->div_len = result;
 875
 876         return result;
 877 }
 878
 879 /*-------------------------------------------------------------------------*/
 880 static int _nbu2ss_epn_out_pio(
 881         struct nbu2ss_udc *udc,
 882         struct nbu2ss_ep *ep,
 883         struct nbu2ss_req *req,
 884         u32             length
 885 )
 886 {
 887         u8              *pBuffer;
 888         u32             i;
 889         u32             data;
 890         u32             iWordLength;
 891         union usb_reg_access    Temp32;
 892         union usb_reg_access    *pBuf32;
 893         int             result = 0;
 894         struct fc_regs  *preg = udc->p_regs;
 895
 896         if (req->dma_flag)
 897                 return 1;               /* DMA is forwarded */
 898
 899         if (length == 0)
 900                 return 0;
 901
 902         pBuffer = (u8 *)req->req.buf;
 903         pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
 904
 905         iWordLength = length / sizeof(u32);
 906         if (iWordLength > 0) {
 907                 /*---------------------------------------------------------*/
 908                 /* Copy of every four bytes */
 909                 for (i = 0; i < iWordLength; i++) {
 910                         pBuf32->dw =
 911                         _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
 912                         pBuf32++;
 913                 }
 914                 result = iWordLength * sizeof(u32);
 915         }
 916
 917         data = length - result;
 918         if (data > 0) {
 919                 /*---------------------------------------------------------*/
 920                 /* Copy of fraction byte */
 921                 Temp32.dw = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
 922                 for (i = 0 ; i < data ; i++)
 923                         pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
 924                 result += data;
 925         }
 926
 927         req->req.actual += result;
 928
 929         if ((req->req.actual == req->req.length) ||
 930             ((req->req.actual % ep->ep.maxpacket) != 0)) {
 931                 result = 0;
 932         }
 933
 934         return result;
 935 }
 936
 937 /*-------------------------------------------------------------------------*/
 938 static int _nbu2ss_epn_out_data(
 939         struct nbu2ss_udc *udc,
 940         struct nbu2ss_ep *ep,
 941         struct nbu2ss_req *req,
 942         u32             data_size
 943 )
 944 {
 945         u32             num;
 946         u32             iBufSize;
 947         int             nret = 1;
 948
 949         if (ep->epnum == 0)
 950                 return -EINVAL;
 951
 952         num = ep->epnum - 1;
 953
 954         iBufSize = min((req->req.length - req->req.actual), data_size);
 955
 956         if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
 957             (iBufSize  >= sizeof(u32))) {
 958                 nret = _nbu2ss_out_dma(udc, req, num, iBufSize);
 959         } else {
 960                 iBufSize = min_t(u32, iBufSize, ep->ep.maxpacket);
 961                 nret = _nbu2ss_epn_out_pio(udc, ep, req, iBufSize);
 962         }
 963
 964         return nret;
 965 }
 966
 967 /*-------------------------------------------------------------------------*/
 968 static int _nbu2ss_epn_out_transfer(
 969         struct nbu2ss_udc *udc,
 970         struct nbu2ss_ep *ep,
 971         struct nbu2ss_req *req
 972 )
 973 {
 974         u32             num;
 975         u32             iRecvLength;
 976         int             result = 1;
 977         struct fc_regs  *preg = udc->p_regs;
 978
 979         if (ep->epnum == 0)
 980                 return -EINVAL;
 981
 982         num = ep->epnum - 1;
 983
 984         /*-------------------------------------------------------------*/
 985         /* Receive Length */
 986         iRecvLength
 987                 = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPn_LDATA;
 988
 989         if (iRecvLength != 0) {
 990                 result = _nbu2ss_epn_out_data(udc, ep, req, iRecvLength);
 991                 if (iRecvLength < ep->ep.maxpacket) {
 992                         if (iRecvLength == result) {
 993                                 req->req.actual += result;
 994                                 result = 0;
 995                         }
 996                 }
 997         } else {
 998                 if ((req->req.actual == req->req.length) ||
 999                     ((req->req.actual % ep->ep.maxpacket) != 0)) {
1000                         result = 0;
1001                 }
1002         }
1003
1004         if (result == 0) {
1005                 if ((req->req.actual % ep->ep.maxpacket) == 0) {
1006                         if (req->zero) {
1007                                 req->zero = false;
1008                                 return 1;
1009                         }
1010                 }
1011         }
1012
1013         if (req->req.actual > req->req.length) {
1014                 dev_err(udc->dev, " Overrun Error\n");
1015                 dev_err(udc->dev, " actual = %d, length = %d\n",
1016                         req->req.actual, req->req.length);
1017                 result = -EOVERFLOW;
1018         }
1019
1020         return result;
1021 }
1022
1023 /*-------------------------------------------------------------------------*/
1024 static int _nbu2ss_in_dma(
1025         struct nbu2ss_udc *udc,
1026         struct nbu2ss_ep *ep,
1027         struct nbu2ss_req *req,
1028         u32             num,
1029         u32             length
1030 )
1031 {
1032         dma_addr_t      pBuffer;
1033         u32             mpkt;           /* MaxPacketSize */
1034         u32             lmpkt;          /* Last Packet Data Size */
1035         u32             dmacnt;         /* IN Data Size */
1036         u32             iWriteLength;
1037         u32             data;
1038         int             result = -EINVAL;
1039         struct fc_regs  *preg = udc->p_regs;
1040
1041         if (req->dma_flag)
1042                 return 1;               /* DMA is forwarded */
1043
1044 #ifdef USE_DMA
1045         if (req->req.actual == 0)
1046                 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1047 #endif
1048         req->dma_flag = TRUE;
1049
1050         /* MAX Packet Size */
1051         mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
1052
1053         if ((DMA_MAX_COUNT * mpkt) < length)
1054                 iWriteLength = DMA_MAX_COUNT * mpkt;
1055         else
1056                 iWriteLength = length;
1057
1058         /*------------------------------------------------------------*/
1059         /* Number of transmission packets */
1060         if (mpkt < iWriteLength) {
1061                 dmacnt = iWriteLength / mpkt;
1062                 lmpkt  = (iWriteLength % mpkt) & ~(u32)0x3;
1063                 if (lmpkt != 0)
1064                         dmacnt++;
1065                 else
1066                         lmpkt = mpkt & ~(u32)0x3;
1067
1068         } else {
1069                 dmacnt = 1;
1070                 lmpkt  = iWriteLength & ~(u32)0x3;
1071         }
1072
1073         /* Packet setting */
1074         data = mpkt | (lmpkt << 16);
1075         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1076
1077         /* Address setting */
1078         pBuffer = req->req.dma;
1079         pBuffer += req->req.actual;
1080         _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
1081
1082         /* Packet and DMA setting */
1083         data = ((dmacnt & 0xff) << 16) | DCR1_EPn_REQEN;
1084         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1085
1086         /* Packet setting of EPC */
1087         data = dmacnt << 16;
1088         _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1089
1090         /*DMA setting of EPC */
1091         _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
1092
1093         result = iWriteLength & ~(u32)0x3;
1094         req->div_len = result;
1095
1096         return result;
1097 }
1098
1099 /*-------------------------------------------------------------------------*/
1100 static int _nbu2ss_epn_in_pio(
1101         struct nbu2ss_udc *udc,
1102         struct nbu2ss_ep *ep,
1103         struct nbu2ss_req *req,
1104         u32             length
1105 )
1106 {
1107         u8              *pBuffer;
1108         u32             i;
1109         u32             data;
1110         u32             iWordLength;
1111         union usb_reg_access    Temp32;
1112         union usb_reg_access    *pBuf32 = NULL;
1113         int             result = 0;
1114         struct fc_regs  *preg = udc->p_regs;
1115
1116         if (req->dma_flag)
1117                 return 1;               /* DMA is forwarded */
1118
1119         if (length > 0) {
1120                 pBuffer = (u8 *)req->req.buf;
1121                 pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
1122
1123                 iWordLength = length / sizeof(u32);
1124                 if (iWordLength > 0) {
1125                         for (i = 0; i < iWordLength; i++) {
1126                                 _nbu2ss_writel(
1127                                         &preg->EP_REGS[ep->epnum - 1].EP_WRITE
1128                                         , pBuf32->dw
1129                                 );
1130
1131                                 pBuf32++;
1132                         }
1133                         result = iWordLength * sizeof(u32);
1134                 }
1135         }
1136
1137         if (result != ep->ep.maxpacket) {
1138                 data = length - result;
1139                 Temp32.dw = 0;
1140                 for (i = 0 ; i < data ; i++)
1141                         Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
1142
1143                 _nbu2ss_ep_in_end(udc, ep->epnum, Temp32.dw, data);
1144                 result += data;
1145         }
1146
1147         req->div_len = result;
1148
1149         return result;
1150 }
1151
1152 /*-------------------------------------------------------------------------*/
1153 static int _nbu2ss_epn_in_data(
1154         struct nbu2ss_udc *udc,
1155         struct nbu2ss_ep *ep,
1156         struct nbu2ss_req *req,
1157         u32             data_size
1158 )
1159 {
1160         u32             num;
1161         int             nret = 1;
1162
1163         if (ep->epnum == 0)
1164                 return -EINVAL;
1165
1166         num = ep->epnum - 1;
1167
1168         if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
1169             (data_size >= sizeof(u32))) {
1170                 nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1171         } else {
1172                 data_size = min_t(u32, data_size, ep->ep.maxpacket);
1173                 nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1174         }
1175
1176         return nret;
1177 }
1178
1179 /*-------------------------------------------------------------------------*/
1180 static int _nbu2ss_epn_in_transfer(
1181         struct nbu2ss_udc *udc,
1182         struct nbu2ss_ep *ep,
1183         struct nbu2ss_req *req
1184 )
1185 {
1186         u32             num;
1187         u32             iBufSize;
1188         int             result = 0;
1189         u32             status;
1190
1191         if (ep->epnum == 0)
1192                 return -EINVAL;
1193
1194         num = ep->epnum - 1;
1195
1196         status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1197
1198         /*-------------------------------------------------------------*/
1199         /* State confirmation of FIFO */
1200         if (req->req.actual == 0) {
1201                 if ((status & EPn_IN_EMPTY) == 0)
1202                         return 1;       /* Not Empty */
1203
1204         } else {
1205                 if ((status & EPn_IN_FULL) != 0)
1206                         return 1;       /* Not Empty */
1207         }
1208
1209         /*-------------------------------------------------------------*/
1210         /* Start transfer */
1211         iBufSize = req->req.length - req->req.actual;
1212         if (iBufSize > 0)
1213                 result = _nbu2ss_epn_in_data(udc, ep, req, iBufSize);
1214         else if (req->req.length == 0)
1215                 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1216
1217         return result;
1218 }
1219
1220 /*-------------------------------------------------------------------------*/
1221 static int _nbu2ss_start_transfer(
1222         struct nbu2ss_udc *udc,
1223         struct nbu2ss_ep *ep,
1224         struct nbu2ss_req *req,
1225         bool    bflag)
1226 {
1227         int             nret = -EINVAL;
1228
1229         req->dma_flag = FALSE;
1230         req->div_len = 0;
1231
1232         if (req->req.length == 0) {
1233                 req->zero = false;
1234         } else {
1235                 if ((req->req.length % ep->ep.maxpacket) == 0)
1236                         req->zero = req->req.zero;
1237                 else
1238                         req->zero = false;
1239         }
1240
1241         if (ep->epnum == 0) {
1242                 /* EP0 */
1243                 switch (udc->ep0state) {
1244                 case EP0_IN_DATA_PHASE:
1245                         nret = _nbu2ss_ep0_in_transfer(udc, req);
1246                         break;
1247
1248                 case EP0_OUT_DATA_PHASE:
1249                         nret = _nbu2ss_ep0_out_transfer(udc, req);
1250                         break;
1251
1252                 case EP0_IN_STATUS_PHASE:
1253                         nret = EP0_send_NULL(udc, TRUE);
1254                         break;
1255
1256                 default:
1257                         break;
1258                 }
1259
1260         } else {
1261                 /* EPn */
1262                 if (ep->direct == USB_DIR_OUT) {
1263                         /* OUT */
1264                         if (!bflag)
1265                                 nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1266                 } else {
1267                         /* IN */
1268                         nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1269                 }
1270         }
1271
1272         return nret;
1273 }
1274
1275 /*-------------------------------------------------------------------------*/
1276 static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1277 {
1278         u32             length;
1279         bool    bflag = FALSE;
1280         struct nbu2ss_req *req;
1281
1282         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1283         if (!req)
1284                 return;
1285
1286         if (ep->epnum > 0) {
1287                 length = _nbu2ss_readl(
1288                         &ep->udc->p_regs->EP_REGS[ep->epnum - 1].EP_LEN_DCNT);
1289
1290                 length &= EPn_LDATA;
1291                 if (length < ep->ep.maxpacket)
1292                         bflag = TRUE;
1293         }
1294
1295         _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1296 }
1297
1298 /*-------------------------------------------------------------------------*/
1299 /*      Endpoint Toggle Reset */
1300 static void _nbu2ss_endpoint_toggle_reset(
1301         struct nbu2ss_udc *udc,
1302         u8 ep_adrs)
1303 {
1304         u8              num;
1305         u32             data;
1306
1307         if ((ep_adrs == 0) || (ep_adrs == 0x80))
1308                 return;
1309
1310         num = (ep_adrs & 0x7F) - 1;
1311
1312         if (ep_adrs & USB_DIR_IN)
1313                 data = EPn_IPIDCLR;
1314         else
1315                 data = EPn_BCLR | EPn_OPIDCLR;
1316
1317         _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1318 }
1319
1320 /*-------------------------------------------------------------------------*/
1321 /*      Endpoint STALL set */
1322 static void _nbu2ss_set_endpoint_stall(
1323         struct nbu2ss_udc *udc,
1324         u8 ep_adrs,
1325         bool bstall)
1326 {
1327         u8              num, epnum;
1328         u32             data;
1329         struct nbu2ss_ep *ep;
1330         struct fc_regs  *preg = udc->p_regs;
1331
1332         if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1333                 if (bstall) {
1334                         /* Set STALL */
1335                         _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1336                 } else {
1337                         /* Clear STALL */
1338                         _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1339                 }
1340         } else {
1341                 epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1342                 num = epnum - 1;
1343                 ep = &udc->ep[epnum];
1344
1345                 if (bstall) {
1346                         /* Set STALL */
1347                         ep->halted = TRUE;
1348
1349                         if (ep_adrs & USB_DIR_IN)
1350                                 data = EPn_BCLR | EPn_ISTL;
1351                         else
1352                                 data = EPn_OSTL_EN | EPn_OSTL;
1353
1354                         _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1355                 } else {
1356                         /* Clear STALL */
1357                         ep->stalled = FALSE;
1358                         if (ep_adrs & USB_DIR_IN) {
1359                                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1360                                                 , EPn_ISTL);
1361                         } else {
1362                                 data =
1363                                 _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1364
1365                                 data &= ~EPn_OSTL;
1366                                 data |= EPn_OSTL_EN;
1367
1368                                 _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1369                                                 , data);
1370                         }
1371
1372                         ep->stalled = FALSE;
1373                         if (ep->halted) {
1374                                 ep->halted = FALSE;
1375                                 _nbu2ss_restert_transfer(ep);
1376                         }
1377                 }
1378         }
1379 }
1380
1381 /*-------------------------------------------------------------------------*/
1382 /* Device Descriptor */
1383 static struct usb_device_descriptor device_desc = {
1384         .bLength              = sizeof(device_desc),
1385         .bDescriptorType      = USB_DT_DEVICE,
1386         .bcdUSB               = cpu_to_le16(0x0200),
1387         .bDeviceClass         = USB_CLASS_VENDOR_SPEC,
1388         .bDeviceSubClass      = 0x00,
1389         .bDeviceProtocol      = 0x00,
1390         .bMaxPacketSize0      = 64,
1391         .idVendor             = cpu_to_le16(0x0409),
1392         .idProduct            = cpu_to_le16(0xfff0),
1393         .bcdDevice            = 0xffff,
1394         .iManufacturer        = 0x00,
1395         .iProduct             = 0x00,
1396         .iSerialNumber        = 0x00,
1397         .bNumConfigurations   = 0x01,
1398 };
1399
1400 /*-------------------------------------------------------------------------*/
1401 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1402 {
1403         u32             data;
1404
1405         if (mode > MAX_TEST_MODE_NUM)
1406                 return;
1407
1408         dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
1409
1410         data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1411         data &= ~TEST_FORCE_ENABLE;
1412         data |= mode << TEST_MODE_SHIFT;
1413
1414         _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1415         _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1416 }
1417
1418 /*-------------------------------------------------------------------------*/
1419 static int _nbu2ss_set_feature_device(
1420         struct nbu2ss_udc *udc,
1421         u16 selector,
1422         u16 wIndex
1423 )
1424 {
1425         int     result = -EOPNOTSUPP;
1426
1427         switch (selector) {
1428         case USB_DEVICE_REMOTE_WAKEUP:
1429                 if (wIndex == 0x0000) {
1430                         udc->remote_wakeup = U2F_ENABLE;
1431                         result = 0;
1432                 }
1433                 break;
1434
1435         case USB_DEVICE_TEST_MODE:
1436                 wIndex >>= 8;
1437                 if (wIndex <= MAX_TEST_MODE_NUM)
1438                         result = 0;
1439                 break;
1440
1441         default:
1442                 break;
1443         }
1444
1445         return result;
1446 }
1447
1448 /*-------------------------------------------------------------------------*/
1449 static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1450 {
1451         u8              epnum;
1452         u32             data = 0, bit_data;
1453         struct fc_regs  *preg = udc->p_regs;
1454
1455         epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1456         if (epnum == 0) {
1457                 data = _nbu2ss_readl(&preg->EP0_CONTROL);
1458                 bit_data = EP0_STL;
1459
1460         } else {
1461                 data = _nbu2ss_readl(&preg->EP_REGS[epnum - 1].EP_CONTROL);
1462                 if ((data & EPn_EN) == 0)
1463                         return -1;
1464
1465                 if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1466                         bit_data = EPn_ISTL;
1467                 else
1468                         bit_data = EPn_OSTL;
1469         }
1470
1471         if ((data & bit_data) == 0)
1472                 return 0;
1473         return 1;
1474 }
1475
1476 /*-------------------------------------------------------------------------*/
1477 static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1478 {
1479         u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1480         u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1481         u16     selector  = udc->ctrl.wValue;
1482         u16     wIndex    = udc->ctrl.wIndex;
1483         u8      ep_adrs;
1484         int     result = -EOPNOTSUPP;
1485
1486         if ((udc->ctrl.wLength != 0x0000) ||
1487             (direction != USB_DIR_OUT)) {
1488                 return -EINVAL;
1489         }
1490
1491         switch (recipient) {
1492         case USB_RECIP_DEVICE:
1493                 if (bset)
1494                         result =
1495                         _nbu2ss_set_feature_device(udc, selector, wIndex);
1496                 break;
1497
1498         case USB_RECIP_ENDPOINT:
1499                 if (0x0000 == (wIndex & 0xFF70)) {
1500                         if (selector == USB_ENDPOINT_HALT) {
1501                                 ep_adrs = wIndex & 0xFF;
1502                                 if (!bset) {
1503                                         _nbu2ss_endpoint_toggle_reset(
1504                                                 udc, ep_adrs);
1505                                 }
1506
1507                                 _nbu2ss_set_endpoint_stall(
1508                                         udc, ep_adrs, bset);
1509
1510                                 result = 0;
1511                         }
1512                 }
1513                 break;
1514
1515         default:
1516                 break;
1517         }
1518
1519         if (result >= 0)
1520                 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1521
1522         return result;
1523 }
1524
1525 /*-------------------------------------------------------------------------*/
1526 static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1527 {
1528         u32             data;
1529         enum usb_device_speed speed = USB_SPEED_FULL;
1530
1531         data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1532         if (data & HIGH_SPEED)
1533                 speed = USB_SPEED_HIGH;
1534
1535         return speed;
1536 }
1537
1538 /*-------------------------------------------------------------------------*/
1539 static void _nbu2ss_epn_set_stall(
1540         struct nbu2ss_udc *udc,
1541         struct nbu2ss_ep *ep
1542 )
1543 {
1544         u8      ep_adrs;
1545         u32     regdata;
1546         int     limit_cnt = 0;
1547
1548         struct fc_regs  *preg = udc->p_regs;
1549
1550         if (ep->direct == USB_DIR_IN) {
1551                 for (limit_cnt = 0
1552                         ; limit_cnt < IN_DATA_EMPTY_COUNT
1553                         ; limit_cnt++) {
1554                         regdata = _nbu2ss_readl(
1555                                 &preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1556
1557                         if ((regdata & EPn_IN_DATA) == 0)
1558                                 break;
1559
1560                         mdelay(1);
1561                 }
1562         }
1563
1564         ep_adrs = ep->epnum | ep->direct;
1565         _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1566 }
1567
1568 /*-------------------------------------------------------------------------*/
1569 static int std_req_get_status(struct nbu2ss_udc *udc)
1570 {
1571         u32     length;
1572         u16     status_data = 0;
1573         u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1574         u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1575         u8      ep_adrs;
1576         int     result = -EINVAL;
1577
1578         if ((udc->ctrl.wValue != 0x0000) || (direction != USB_DIR_IN))
1579                 return result;
1580
1581         length = min_t(u16, udc->ctrl.wLength, sizeof(status_data));
1582
1583         switch (recipient) {
1584         case USB_RECIP_DEVICE:
1585                 if (udc->ctrl.wIndex == 0x0000) {
1586                         if (udc->gadget.is_selfpowered)
1587                                 status_data |= (1 << USB_DEVICE_SELF_POWERED);
1588
1589                         if (udc->remote_wakeup)
1590                                 status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1591
1592                         result = 0;
1593                 }
1594                 break;
1595
1596         case USB_RECIP_ENDPOINT:
1597                 if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
1598                         ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
1599                         result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1600
1601                         if (result > 0)
1602                                 status_data |= (1 << USB_ENDPOINT_HALT);
1603                 }
1604                 break;
1605
1606         default:
1607                 break;
1608         }
1609
1610         if (result >= 0) {
1611                 memcpy(udc->ep0_buf, &status_data, length);
1612                 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1613                 _nbu2ss_ep0_in_transfer(udc, &udc->ep0_req);
1614
1615         } else {
1616                 dev_err(udc->dev, " Error GET_STATUS\n");
1617         }
1618
1619         return result;
1620 }
1621
1622 /*-------------------------------------------------------------------------*/
1623 static int std_req_clear_feature(struct nbu2ss_udc *udc)
1624 {
1625         return _nbu2ss_req_feature(udc, FALSE);
1626 }
1627
1628 /*-------------------------------------------------------------------------*/
1629 static int std_req_set_feature(struct nbu2ss_udc *udc)
1630 {
1631         return _nbu2ss_req_feature(udc, TRUE);
1632 }
1633
1634 /*-------------------------------------------------------------------------*/
1635 static int std_req_set_address(struct nbu2ss_udc *udc)
1636 {
1637         int             result = 0;
1638         u32             wValue = udc->ctrl.wValue;
1639
1640         if ((udc->ctrl.bRequestType != 0x00)    ||
1641             (udc->ctrl.wIndex != 0x0000)        ||
1642                 (udc->ctrl.wLength != 0x0000)) {
1643                 return -EINVAL;
1644         }
1645
1646         if (wValue != (wValue & 0x007F))
1647                 return -EINVAL;
1648
1649         wValue <<= USB_ADRS_SHIFT;
1650
1651         _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1652         _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1653
1654         return result;
1655 }
1656
1657 /*-------------------------------------------------------------------------*/
1658 static int std_req_set_configuration(struct nbu2ss_udc *udc)
1659 {
1660         u32 ConfigValue = (u32)(udc->ctrl.wValue & 0x00ff);
1661
1662         if ((udc->ctrl.wIndex != 0x0000)        ||
1663             (udc->ctrl.wLength != 0x0000)       ||
1664                 (udc->ctrl.bRequestType != 0x00)) {
1665                 return -EINVAL;
1666         }
1667
1668         udc->curr_config = ConfigValue;
1669
1670         if (ConfigValue > 0) {
1671                 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1672                 udc->devstate = USB_STATE_CONFIGURED;
1673
1674         } else {
1675                 _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1676                 udc->devstate = USB_STATE_ADDRESS;
1677         }
1678
1679         return 0;
1680 }
1681
1682 /*-------------------------------------------------------------------------*/
1683 static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1684 {
1685         if ((!udc) && (!pdata))
1686                 return;
1687
1688         *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1689         pdata++;
1690         *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1691 }
1692
1693 /*-------------------------------------------------------------------------*/
1694 static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1695 {
1696         bool                    bcall_back = TRUE;
1697         int                     nret = -EINVAL;
1698         struct usb_ctrlrequest  *p_ctrl;
1699
1700         p_ctrl = &udc->ctrl;
1701         _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1702
1703         /* ep0 state control */
1704         if (p_ctrl->wLength == 0) {
1705                 udc->ep0state = EP0_IN_STATUS_PHASE;
1706
1707         } else {
1708                 if (p_ctrl->bRequestType & USB_DIR_IN)
1709                         udc->ep0state = EP0_IN_DATA_PHASE;
1710                 else
1711                         udc->ep0state = EP0_OUT_DATA_PHASE;
1712         }
1713
1714         if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1715                 switch (p_ctrl->bRequest) {
1716                 case USB_REQ_GET_STATUS:
1717                         nret = std_req_get_status(udc);
1718                         bcall_back = FALSE;
1719                         break;
1720
1721                 case USB_REQ_CLEAR_FEATURE:
1722                         nret = std_req_clear_feature(udc);
1723                         bcall_back = FALSE;
1724                         break;
1725
1726                 case USB_REQ_SET_FEATURE:
1727                         nret = std_req_set_feature(udc);
1728                         bcall_back = FALSE;
1729                         break;
1730
1731                 case USB_REQ_SET_ADDRESS:
1732                         nret = std_req_set_address(udc);
1733                         bcall_back = FALSE;
1734                         break;
1735
1736                 case USB_REQ_SET_CONFIGURATION:
1737                         nret = std_req_set_configuration(udc);
1738                         break;
1739
1740                 default:
1741                         break;
1742                 }
1743         }
1744
1745         if (!bcall_back) {
1746                 if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1747                         if (nret >= 0) {
1748                                 /*--------------------------------------*/
1749                                 /* Status Stage */
1750                                 nret = EP0_send_NULL(udc, TRUE);
1751                         }
1752                 }
1753
1754         } else {
1755                 spin_unlock(&udc->lock);
1756                 nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1757                 spin_lock(&udc->lock);
1758         }
1759
1760         if (nret < 0)
1761                 udc->ep0state = EP0_IDLE;
1762
1763         return nret;
1764 }
1765
1766 /*-------------------------------------------------------------------------*/
1767 static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1768 {
1769         int                     nret;
1770         struct nbu2ss_req       *req;
1771         struct nbu2ss_ep        *ep = &udc->ep[0];
1772
1773         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1774         if (!req)
1775                 req = &udc->ep0_req;
1776
1777         req->req.actual += req->div_len;
1778         req->div_len = 0;
1779
1780         nret = _nbu2ss_ep0_in_transfer(udc, req);
1781         if (nret == 0) {
1782                 udc->ep0state = EP0_OUT_STATUS_PAHSE;
1783                 EP0_receive_NULL(udc, TRUE);
1784         }
1785
1786         return 0;
1787 }
1788
1789 /*-------------------------------------------------------------------------*/
1790 static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1791 {
1792         int                     nret;
1793         struct nbu2ss_req       *req;
1794         struct nbu2ss_ep        *ep = &udc->ep[0];
1795
1796         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1797         if (!req)
1798                 req = &udc->ep0_req;
1799
1800         nret = _nbu2ss_ep0_out_transfer(udc, req);
1801         if (nret == 0) {
1802                 udc->ep0state = EP0_IN_STATUS_PHASE;
1803                 EP0_send_NULL(udc, TRUE);
1804
1805         } else if (nret < 0) {
1806                 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1807                 req->req.status = nret;
1808         }
1809
1810         return 0;
1811 }
1812
1813 /*-------------------------------------------------------------------------*/
1814 static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1815 {
1816         struct nbu2ss_req       *req;
1817         struct nbu2ss_ep        *ep = &udc->ep[0];
1818
1819         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1820         if (!req) {
1821                 req = &udc->ep0_req;
1822                 if (req->req.complete)
1823                         req->req.complete(&ep->ep, &req->req);
1824
1825         } else {
1826                 if (req->req.complete)
1827                         _nbu2ss_ep_done(ep, req, 0);
1828         }
1829
1830         udc->ep0state = EP0_IDLE;
1831
1832         return 0;
1833 }
1834
1835 /*-------------------------------------------------------------------------*/
1836 static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1837 {
1838         int             i;
1839         u32             status;
1840         u32             intr;
1841         int             nret = -1;
1842
1843         status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1844         intr = status & EP0_STATUS_RW_BIT;
1845         _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~intr);
1846
1847         status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1848                         | STG_END_INT | EP0_OUT_NULL_INT);
1849
1850         if (status == 0) {
1851                 dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
1852                 dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
1853                 return;
1854         }
1855
1856         if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1857                 udc->gadget.speed = _nbu2ss_get_speed(udc);
1858
1859         for (i = 0; i < EP0_END_XFER; i++) {
1860                 switch (udc->ep0state) {
1861                 case EP0_IDLE:
1862                         if (status & SETUP_INT) {
1863                                 status = 0;
1864                                 nret = _nbu2ss_decode_request(udc);
1865                         }
1866                         break;
1867
1868                 case EP0_IN_DATA_PHASE:
1869                         if (status & EP0_IN_INT) {
1870                                 status &= ~EP0_IN_INT;
1871                                 nret = _nbu2ss_ep0_in_data_stage(udc);
1872                         }
1873                         break;
1874
1875                 case EP0_OUT_DATA_PHASE:
1876                         if (status & EP0_OUT_INT) {
1877                                 status &= ~EP0_OUT_INT;
1878                                 nret = _nbu2ss_ep0_out_data_stage(udc);
1879                         }
1880                         break;
1881
1882                 case EP0_IN_STATUS_PHASE:
1883                         if ((status & STG_END_INT) || (status & SETUP_INT)) {
1884                                 status &= ~(STG_END_INT | EP0_IN_INT);
1885                                 nret = _nbu2ss_ep0_status_stage(udc);
1886                         }
1887                         break;
1888
1889                 case EP0_OUT_STATUS_PAHSE:
1890                         if ((status & STG_END_INT) || (status & SETUP_INT) ||
1891                             (status & EP0_OUT_NULL_INT)) {
1892                                 status &= ~(STG_END_INT
1893                                                 | EP0_OUT_INT
1894                                                 | EP0_OUT_NULL_INT);
1895
1896                                 nret = _nbu2ss_ep0_status_stage(udc);
1897                         }
1898
1899                         break;
1900
1901                 default:
1902                         status = 0;
1903                         break;
1904                 }
1905
1906                 if (status == 0)
1907                         break;
1908         }
1909
1910         if (nret < 0) {
1911                 /* Send Stall */
1912                 _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
1913         }
1914 }
1915
1916 /*-------------------------------------------------------------------------*/
1917 static void _nbu2ss_ep_done(
1918         struct nbu2ss_ep *ep,
1919         struct nbu2ss_req *req,
1920         int status)
1921 {
1922         struct nbu2ss_udc *udc = ep->udc;
1923
1924         list_del_init(&req->queue);
1925
1926         if (status == -ECONNRESET)
1927                 _nbu2ss_fifo_flush(udc, ep);
1928
1929         if (likely(req->req.status == -EINPROGRESS))
1930                 req->req.status = status;
1931
1932         if (ep->stalled) {
1933                 _nbu2ss_epn_set_stall(udc, ep);
1934         } else {
1935                 if (!list_empty(&ep->queue))
1936                         _nbu2ss_restert_transfer(ep);
1937         }
1938
1939 #ifdef USE_DMA
1940         if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1941             (req->req.dma != 0))
1942                 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1943 #endif
1944
1945         spin_unlock(&udc->lock);
1946         req->req.complete(&ep->ep, &req->req);
1947         spin_lock(&udc->lock);
1948 }
1949
1950 /*-------------------------------------------------------------------------*/
1951 static inline void _nbu2ss_epn_in_int(
1952         struct nbu2ss_udc *udc,
1953         struct nbu2ss_ep *ep,
1954         struct nbu2ss_req *req)
1955 {
1956         int     result = 0;
1957         u32     status;
1958
1959         struct fc_regs  *preg = udc->p_regs;
1960
1961         if (req->dma_flag)
1962                 return;         /* DMA is forwarded */
1963
1964         req->req.actual += req->div_len;
1965         req->div_len = 0;
1966
1967         if (req->req.actual != req->req.length) {
1968                 /*---------------------------------------------------------*/
1969                 /* remainder of data */
1970                 result = _nbu2ss_epn_in_transfer(udc, ep, req);
1971
1972         } else {
1973                 if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
1974                         status =
1975                         _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1976
1977                         if ((status & EPn_IN_FULL) == 0) {
1978                                 /*-----------------------------------------*/
1979                                 /* 0 Length Packet */
1980                                 req->zero = false;
1981                                 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1982                         }
1983                         return;
1984                 }
1985         }
1986
1987         if (result <= 0) {
1988                 /*---------------------------------------------------------*/
1989                 /* Complete */
1990                 _nbu2ss_ep_done(ep, req, result);
1991         }
1992 }
1993
1994 /*-------------------------------------------------------------------------*/
1995 static inline void _nbu2ss_epn_out_int(
1996         struct nbu2ss_udc *udc,
1997         struct nbu2ss_ep *ep,
1998         struct nbu2ss_req *req)
1999 {
2000         int     result;
2001
2002         result = _nbu2ss_epn_out_transfer(udc, ep, req);
2003         if (result <= 0)
2004                 _nbu2ss_ep_done(ep, req, result);
2005 }
2006
2007 /*-------------------------------------------------------------------------*/
2008 static inline void _nbu2ss_epn_in_dma_int(
2009         struct nbu2ss_udc *udc,
2010         struct nbu2ss_ep *ep,
2011         struct nbu2ss_req *req)
2012 {
2013         u32             mpkt;
2014         u32             size;
2015         struct usb_request *preq;
2016
2017         preq = &req->req;
2018
2019         if (!req->dma_flag)
2020                 return;
2021
2022         preq->actual += req->div_len;
2023         req->div_len = 0;
2024         req->dma_flag = FALSE;
2025
2026 #ifdef USE_DMA
2027         _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
2028 #endif
2029
2030         if (preq->actual != preq->length) {
2031                 _nbu2ss_epn_in_transfer(udc, ep, req);
2032         } else {
2033                 mpkt = ep->ep.maxpacket;
2034                 size = preq->actual % mpkt;
2035                 if (size > 0) {
2036                         if (((preq->actual & 0x03) == 0) && (size < mpkt))
2037                                 _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
2038                 } else {
2039                         _nbu2ss_epn_in_int(udc, ep, req);
2040                 }
2041         }
2042 }
2043
2044 /*-------------------------------------------------------------------------*/
2045 static inline void _nbu2ss_epn_out_dma_int(
2046         struct nbu2ss_udc *udc,
2047         struct nbu2ss_ep *ep,
2048         struct nbu2ss_req *req)
2049 {
2050         int             i;
2051         u32             num;
2052         u32             dmacnt, ep_dmacnt;
2053         u32             mpkt;
2054         struct fc_regs  *preg = udc->p_regs;
2055
2056         num = ep->epnum - 1;
2057
2058         if (req->req.actual == req->req.length) {
2059                 if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
2060                         req->div_len = 0;
2061                         req->dma_flag = FALSE;
2062                         _nbu2ss_ep_done(ep, req, 0);
2063                         return;
2064                 }
2065         }
2066
2067         ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
2068                  & EPn_DMACNT;
2069         ep_dmacnt >>= 16;
2070
2071         for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2072                 dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
2073                          & DCR1_EPn_DMACNT;
2074                 dmacnt >>= 16;
2075                 if (ep_dmacnt == dmacnt)
2076                         break;
2077         }
2078
2079         _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_REQEN);
2080
2081         if (dmacnt != 0) {
2082                 mpkt = ep->ep.maxpacket;
2083                 if ((req->div_len % mpkt) == 0)
2084                         req->div_len -= mpkt * dmacnt;
2085         }
2086
2087         if ((req->req.actual % ep->ep.maxpacket) > 0) {
2088                 if (req->req.actual == req->div_len) {
2089                         req->div_len = 0;
2090                         req->dma_flag = FALSE;
2091                         _nbu2ss_ep_done(ep, req, 0);
2092                         return;
2093                 }
2094         }
2095
2096         req->req.actual += req->div_len;
2097         req->div_len = 0;
2098         req->dma_flag = FALSE;
2099
2100         _nbu2ss_epn_out_int(udc, ep, req);
2101 }
2102
2103 /*-------------------------------------------------------------------------*/
2104 static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2105 {
2106         u32     num;
2107         u32     status;
2108
2109         struct nbu2ss_req       *req;
2110         struct nbu2ss_ep        *ep = &udc->ep[epnum];
2111
2112         num = epnum - 1;
2113
2114         /* Interrupt Status */
2115         status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2116
2117         /* Interrupt Clear */
2118         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~status);
2119
2120         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
2121         if (!req) {
2122                 /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2123                 return;
2124         }
2125
2126         if (status & EPn_OUT_END_INT) {
2127                 status &= ~EPn_OUT_INT;
2128                 _nbu2ss_epn_out_dma_int(udc, ep, req);
2129         }
2130
2131         if (status & EPn_OUT_INT)
2132                 _nbu2ss_epn_out_int(udc, ep, req);
2133
2134         if (status & EPn_IN_END_INT) {
2135                 status &= ~EPn_IN_INT;
2136                 _nbu2ss_epn_in_dma_int(udc, ep, req);
2137         }
2138
2139         if (status & EPn_IN_INT)
2140                 _nbu2ss_epn_in_int(udc, ep, req);
2141 }
2142
2143 /*-------------------------------------------------------------------------*/
2144 static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2145 {
2146         if (epnum == 0)
2147                 _nbu2ss_ep0_int(udc);
2148         else
2149                 _nbu2ss_epn_int(udc, epnum);
2150 }
2151
2152 /*-------------------------------------------------------------------------*/
2153 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2154 {
2155         _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2156         _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2157 }
2158
2159 /*-------------------------------------------------------------------------*/
2160 static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2161                         struct nbu2ss_ep *ep,
2162                         int status)
2163 {
2164         struct nbu2ss_req *req;
2165
2166         /* Endpoint Disable */
2167         _nbu2ss_epn_exit(udc, ep);
2168
2169         /* DMA Disable */
2170         _nbu2ss_ep_dma_exit(udc, ep);
2171
2172         if (list_empty(&ep->queue))
2173                 return 0;
2174
2175         /* called with irqs blocked */
2176         list_for_each_entry(req, &ep->queue, queue) {
2177                 _nbu2ss_ep_done(ep, req, status);
2178         }
2179
2180         return 0;
2181 }
2182
2183 /*-------------------------------------------------------------------------*/
2184 static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2185 {
2186         struct nbu2ss_ep        *ep;
2187
2188         udc->gadget.speed = USB_SPEED_UNKNOWN;
2189
2190         _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2191
2192         /* Endpoint n */
2193         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2194                 _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2195         }
2196 }
2197
2198 /*-------------------------------------------------------------------------*/
2199 static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2200 {
2201         u32     reg_dt;
2202
2203         if (udc->vbus_active == 0)
2204                 return -ESHUTDOWN;
2205
2206         if (is_on) {
2207                 /* D+ Pullup */
2208                 if (udc->driver) {
2209                         reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2210                                 | PUE2) & ~(u32)CONNECTB;
2211
2212                         _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2213                 }
2214
2215         } else {
2216                 /* D+ Pulldown */
2217                 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2218                         & ~(u32)PUE2;
2219
2220                 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2221                 udc->gadget.speed = USB_SPEED_UNKNOWN;
2222         }
2223
2224         return 0;
2225 }
2226
2227 /*-------------------------------------------------------------------------*/
2228 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2229 {
2230         struct fc_regs  *p = udc->p_regs;
2231
2232         if (udc->vbus_active == 0)
2233                 return;
2234
2235         if (ep->epnum == 0) {
2236                 /* EP0 */
2237                 _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2238
2239         } else {
2240                 /* EPn */
2241                 _nbu2ss_ep_dma_abort(udc, ep);
2242                 _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPn_BCLR);
2243         }
2244 }
2245
2246 /*-------------------------------------------------------------------------*/
2247 static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2248 {
2249         int     waitcnt = 0;
2250
2251         if (udc->udc_enabled)
2252                 return 0;
2253
2254         /* Reset */
2255         _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2256         udelay(EPC_RST_DISABLE_TIME);   /* 1us wait */
2257
2258         _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2259         mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2260
2261         _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2262
2263         _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2264
2265                 _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2266                                HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2267
2268         while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2269                 waitcnt++;
2270                 udelay(1);      /* 1us wait */
2271                 if (waitcnt == EPC_PLL_LOCK_COUNT) {
2272                         dev_err(udc->dev, "*** Reset Cancel failed\n");
2273                         return -EINVAL;
2274                 }
2275         }
2276
2277                 _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2278
2279         _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2280
2281         /* EP0 */
2282         _nbu2ss_ep0_enable(udc);
2283
2284         /* USB Interrupt Enable */
2285         _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2286
2287         udc->udc_enabled = TRUE;
2288
2289         return 0;
2290 }
2291
2292 /*-------------------------------------------------------------------------*/
2293 static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2294 {
2295         _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2296         _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2297 }
2298
2299 /*-------------------------------------------------------------------------*/
2300 static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2301 {
2302         if (udc->udc_enabled) {
2303                 udc->udc_enabled = FALSE;
2304                 _nbu2ss_reset_controller(udc);
2305                 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2306         }
2307 }
2308
2309 /*-------------------------------------------------------------------------*/
2310 static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2311 {
2312         int     nret;
2313         u32     reg_dt;
2314
2315         /* chattering */
2316         mdelay(VBUS_CHATTERING_MDELAY);         /* wait (ms) */
2317
2318         /* VBUS ON Check*/
2319         reg_dt = gpio_get_value(VBUS_VALUE);
2320         if (reg_dt == 0) {
2321                 udc->linux_suspended = 0;
2322
2323                 _nbu2ss_reset_controller(udc);
2324                 dev_info(udc->dev, " ----- VBUS OFF\n");
2325
2326                 if (udc->vbus_active == 1) {
2327                         /* VBUS OFF */
2328                         udc->vbus_active = 0;
2329                         if (udc->usb_suspended) {
2330                                 udc->usb_suspended = 0;
2331                                 /* _nbu2ss_reset_controller(udc); */
2332                         }
2333                         udc->devstate = USB_STATE_NOTATTACHED;
2334
2335                         _nbu2ss_quiesce(udc);
2336                         if (udc->driver) {
2337                                 spin_unlock(&udc->lock);
2338                                 udc->driver->disconnect(&udc->gadget);
2339                                 spin_lock(&udc->lock);
2340                         }
2341
2342                         _nbu2ss_disable_controller(udc);
2343                 }
2344         } else {
2345                 mdelay(5);              /* wait (5ms) */
2346                 reg_dt = gpio_get_value(VBUS_VALUE);
2347                 if (reg_dt == 0)
2348                         return;
2349
2350                 dev_info(udc->dev, " ----- VBUS ON\n");
2351
2352                 if (udc->linux_suspended)
2353                         return;
2354
2355                 if (udc->vbus_active == 0) {
2356                         /* VBUS ON */
2357                         udc->vbus_active = 1;
2358                         udc->devstate = USB_STATE_POWERED;
2359
2360                         nret = _nbu2ss_enable_controller(udc);
2361                         if (nret < 0) {
2362                                 _nbu2ss_disable_controller(udc);
2363                                 udc->vbus_active = 0;
2364                                 return;
2365                         }
2366
2367                         _nbu2ss_pullup(udc, 1);
2368
2369 #ifdef UDC_DEBUG_DUMP
2370                         _nbu2ss_dump_register(udc);
2371 #endif /* UDC_DEBUG_DUMP */
2372
2373                 } else {
2374                         if (udc->devstate == USB_STATE_POWERED)
2375                                 _nbu2ss_pullup(udc, 1);
2376                 }
2377         }
2378 }
2379
2380 /*-------------------------------------------------------------------------*/
2381 static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2382 {
2383         udc->devstate           = USB_STATE_DEFAULT;
2384         udc->remote_wakeup      = 0;
2385
2386         _nbu2ss_quiesce(udc);
2387
2388         udc->ep0state = EP0_IDLE;
2389 }
2390
2391 /*-------------------------------------------------------------------------*/
2392 static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2393 {
2394         if (udc->usb_suspended == 1) {
2395                 udc->usb_suspended = 0;
2396                 if (udc->driver && udc->driver->resume) {
2397                         spin_unlock(&udc->lock);
2398                         udc->driver->resume(&udc->gadget);
2399                         spin_lock(&udc->lock);
2400                 }
2401         }
2402 }
2403
2404 /*-------------------------------------------------------------------------*/
2405 static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2406 {
2407         u32     reg_dt;
2408
2409         if (udc->usb_suspended == 0) {
2410                 reg_dt = gpio_get_value(VBUS_VALUE);
2411
2412                 if (reg_dt == 0)
2413                         return;
2414
2415                 udc->usb_suspended = 1;
2416                 if (udc->driver && udc->driver->suspend) {
2417                         spin_unlock(&udc->lock);
2418                         udc->driver->suspend(&udc->gadget);
2419                         spin_lock(&udc->lock);
2420                 }
2421
2422                 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2423         }
2424 }
2425
2426 /*-------------------------------------------------------------------------*/
2427 /* VBUS (GPIO153) Interrupt */
2428 static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2429 {
2430         struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2431
2432         spin_lock(&udc->lock);
2433         _nbu2ss_check_vbus(udc);
2434         spin_unlock(&udc->lock);
2435
2436         return IRQ_HANDLED;
2437 }
2438
2439 /*-------------------------------------------------------------------------*/
2440 /* Interrupt (udc) */
2441 static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2442 {
2443         u8      suspend_flag = 0;
2444         u32     status;
2445         u32     epnum, int_bit;
2446
2447         struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2448         struct fc_regs  *preg = udc->p_regs;
2449
2450         if (gpio_get_value(VBUS_VALUE) == 0) {
2451                 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2452                 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2453                 return IRQ_HANDLED;
2454         }
2455
2456         spin_lock(&udc->lock);
2457
2458         for (;;) {
2459                 if (gpio_get_value(VBUS_VALUE) == 0) {
2460                         _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2461                         _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2462                         status = 0;
2463                 } else {
2464                         status = _nbu2ss_readl(&preg->USB_INT_STA);
2465                 }
2466
2467                 if (status == 0)
2468                         break;
2469
2470                 _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2471
2472                 if (status & USB_RST_INT) {
2473                         /* USB Reset */
2474                         _nbu2ss_int_bus_reset(udc);
2475                 }
2476
2477                 if (status & RSUM_INT) {
2478                         /* Resume */
2479                         _nbu2ss_int_usb_resume(udc);
2480                 }
2481
2482                 if (status & SPND_INT) {
2483                         /* Suspend */
2484                         suspend_flag = 1;
2485                 }
2486
2487                 if (status & EPn_INT) {
2488                         /* EP INT */
2489                         int_bit = status >> 8;
2490
2491                         for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2492                                 if (0x01 & int_bit)
2493                                         _nbu2ss_ep_int(udc, epnum);
2494
2495                                 int_bit >>= 1;
2496
2497                                 if (int_bit == 0)
2498                                         break;
2499                         }
2500                 }
2501         }
2502
2503         if (suspend_flag)
2504                 _nbu2ss_int_usb_suspend(udc);
2505
2506         spin_unlock(&udc->lock);
2507
2508         return IRQ_HANDLED;
2509 }
2510
2511 /*-------------------------------------------------------------------------*/
2512 /* usb_ep_ops */
2513 static int nbu2ss_ep_enable(
2514         struct usb_ep *_ep,
2515         const struct usb_endpoint_descriptor *desc)
2516 {
2517         u8              ep_type;
2518         unsigned long   flags;
2519
2520         struct nbu2ss_ep        *ep;
2521         struct nbu2ss_udc       *udc;
2522
2523         if ((!_ep) || (!desc)) {
2524                 pr_err(" *** %s, bad param\n", __func__);
2525                 return -EINVAL;
2526         }
2527
2528         ep = container_of(_ep, struct nbu2ss_ep, ep);
2529         if ((!ep) || (!ep->udc)) {
2530                 pr_err(" *** %s, ep == NULL !!\n", __func__);
2531                 return -EINVAL;
2532         }
2533
2534         ep_type = usb_endpoint_type(desc);
2535         if ((ep_type == USB_ENDPOINT_XFER_CONTROL) ||
2536             (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2537                 pr_err(" *** %s, bat bmAttributes\n", __func__);
2538                 return -EINVAL;
2539         }
2540
2541         udc = ep->udc;
2542         if (udc->vbus_active == 0)
2543                 return -ESHUTDOWN;
2544
2545         if ((!udc->driver) || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2546                 dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
2547                 return -ESHUTDOWN;
2548         }
2549
2550         spin_lock_irqsave(&udc->lock, flags);
2551
2552         ep->desc = desc;
2553         ep->epnum = usb_endpoint_num(desc);
2554         ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2555         ep->ep_type = ep_type;
2556         ep->wedged = 0;
2557         ep->halted = FALSE;
2558         ep->stalled = FALSE;
2559
2560         ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2561
2562         /* DMA setting */
2563         _nbu2ss_ep_dma_init(udc, ep);
2564
2565         /* Endpoint setting */
2566         _nbu2ss_ep_init(udc, ep);
2567
2568         spin_unlock_irqrestore(&udc->lock, flags);
2569
2570         return 0;
2571 }
2572
2573 /*-------------------------------------------------------------------------*/
2574 static int nbu2ss_ep_disable(struct usb_ep *_ep)
2575 {
2576         struct nbu2ss_ep        *ep;
2577         struct nbu2ss_udc       *udc;
2578         unsigned long           flags;
2579
2580         if (!_ep) {
2581                 pr_err(" *** %s, bad param\n", __func__);
2582                 return -EINVAL;
2583         }
2584
2585         ep = container_of(_ep, struct nbu2ss_ep, ep);
2586         if ((!ep) || (!ep->udc)) {
2587                 pr_err("udc: *** %s, ep == NULL !!\n", __func__);
2588                 return -EINVAL;
2589         }
2590
2591         udc = ep->udc;
2592         if (udc->vbus_active == 0)
2593                 return -ESHUTDOWN;
2594
2595         spin_lock_irqsave(&udc->lock, flags);
2596         _nbu2ss_nuke(udc, ep, -EINPROGRESS);            /* dequeue request */
2597         spin_unlock_irqrestore(&udc->lock, flags);
2598
2599         return 0;
2600 }
2601
2602 /*-------------------------------------------------------------------------*/
2603 static struct usb_request *nbu2ss_ep_alloc_request(
2604         struct usb_ep *ep,
2605         gfp_t gfp_flags)
2606 {
2607         struct nbu2ss_req *req;
2608
2609         req = kzalloc(sizeof(*req), gfp_flags);
2610         if (!req)
2611                 return NULL;
2612
2613 #ifdef USE_DMA
2614         req->req.dma = DMA_ADDR_INVALID;
2615 #endif
2616         INIT_LIST_HEAD(&req->queue);
2617
2618         return &req->req;
2619 }
2620
2621 /*-------------------------------------------------------------------------*/
2622 static void nbu2ss_ep_free_request(
2623         struct usb_ep *_ep,
2624         struct usb_request *_req)
2625 {
2626         struct nbu2ss_req *req;
2627
2628         if (_req) {
2629                 req = container_of(_req, struct nbu2ss_req, req);
2630
2631                 kfree(req);
2632         }
2633 }
2634
2635 /*-------------------------------------------------------------------------*/
2636 static int nbu2ss_ep_queue(
2637         struct usb_ep *_ep,
2638         struct usb_request *_req,
2639         gfp_t gfp_flags)
2640 {
2641         struct nbu2ss_req       *req;
2642         struct nbu2ss_ep        *ep;
2643         struct nbu2ss_udc       *udc;
2644         unsigned long           flags;
2645         bool                    bflag;
2646         int                     result = -EINVAL;
2647
2648         /* catch various bogus parameters */
2649         if ((!_ep) || (!_req)) {
2650                 if (!_ep)
2651                         pr_err("udc: %s --- _ep == NULL\n", __func__);
2652
2653                 if (!_req)
2654                         pr_err("udc: %s --- _req == NULL\n", __func__);
2655
2656                 return -EINVAL;
2657         }
2658
2659         req = container_of(_req, struct nbu2ss_req, req);
2660         if (unlikely(!_req->complete || !_req->buf || !list_empty(&req->queue))) {
2661                 if (!_req->complete)
2662                         pr_err("udc: %s --- !_req->complete\n", __func__);
2663
2664                 if (!_req->buf)
2665                         pr_err("udc:%s --- !_req->buf\n", __func__);
2666
2667                 if (!list_empty(&req->queue))
2668                         pr_err("%s --- !list_empty(&req->queue)\n", __func__);
2669
2670                 return -EINVAL;
2671         }
2672
2673         ep = container_of(_ep, struct nbu2ss_ep, ep);
2674         udc = ep->udc;
2675
2676         if (udc->vbus_active == 0) {
2677                 dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
2678                 return -ESHUTDOWN;
2679         }
2680
2681         if (unlikely(!udc->driver)) {
2682                 dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
2683                         udc->driver);
2684                 return -ESHUTDOWN;
2685         }
2686
2687         spin_lock_irqsave(&udc->lock, flags);
2688
2689 #ifdef USE_DMA
2690         if ((uintptr_t)req->req.buf & 0x3)
2691                 req->unaligned = TRUE;
2692         else
2693                 req->unaligned = FALSE;
2694
2695         if (req->unaligned) {
2696                 if (!ep->virt_buf)
2697                         ep->virt_buf = (u8 *)dma_alloc_coherent(
2698                                 NULL, PAGE_SIZE,
2699                                 &ep->phys_buf, GFP_ATOMIC | GFP_DMA);
2700                 if (ep->epnum > 0)  {
2701                         if (ep->direct == USB_DIR_IN)
2702                                 memcpy(ep->virt_buf, req->req.buf,
2703                                        req->req.length);
2704                 }
2705         }
2706
2707         if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2708             (req->req.dma != 0))
2709                 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2710 #endif
2711
2712         _req->status = -EINPROGRESS;
2713         _req->actual = 0;
2714
2715         bflag = list_empty(&ep->queue);
2716         list_add_tail(&req->queue, &ep->queue);
2717
2718         if (bflag && !ep->stalled) {
2719                 result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
2720                 if (result < 0) {
2721                         dev_err(udc->dev, " *** %s, result = %d\n", __func__,
2722                                 result);
2723                         list_del(&req->queue);
2724                 } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2725 #ifdef USE_DMA
2726                         if (req->req.length < 4 &&
2727                             req->req.length == req->req.actual)
2728 #else
2729                         if (req->req.length == req->req.actual)
2730 #endif
2731                                 _nbu2ss_ep_done(ep, req, result);
2732                 }
2733         }
2734
2735         spin_unlock_irqrestore(&udc->lock, flags);
2736
2737         return 0;
2738 }
2739
2740 /*-------------------------------------------------------------------------*/
2741 static int nbu2ss_ep_dequeue(
2742         struct usb_ep *_ep,
2743         struct usb_request *_req)
2744 {
2745         struct nbu2ss_req       *req;
2746         struct nbu2ss_ep        *ep;
2747         struct nbu2ss_udc       *udc;
2748         unsigned long flags;
2749
2750         /* catch various bogus parameters */
2751         if ((!_ep) || (!_req)) {
2752                 /* pr_err("%s, bad param(1)\n", __func__); */
2753                 return -EINVAL;
2754         }
2755
2756         ep = container_of(_ep, struct nbu2ss_ep, ep);
2757         if (!ep) {
2758                 pr_err("%s, ep == NULL !!\n", __func__);
2759                 return -EINVAL;
2760         }
2761
2762         udc = ep->udc;
2763         if (!udc)
2764                 return -EINVAL;
2765
2766         spin_lock_irqsave(&udc->lock, flags);
2767
2768         /* make sure it's actually queued on this endpoint */
2769         list_for_each_entry(req, &ep->queue, queue) {
2770                 if (&req->req == _req)
2771                         break;
2772         }
2773         if (&req->req != _req) {
2774                 spin_unlock_irqrestore(&udc->lock, flags);
2775                 pr_debug("%s no queue(EINVAL)\n", __func__);
2776                 return -EINVAL;
2777         }
2778
2779         _nbu2ss_ep_done(ep, req, -ECONNRESET);
2780
2781         spin_unlock_irqrestore(&udc->lock, flags);
2782
2783         return 0;
2784 }
2785
2786 /*-------------------------------------------------------------------------*/
2787 static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2788 {
2789         u8              ep_adrs;
2790         unsigned long   flags;
2791
2792         struct nbu2ss_ep        *ep;
2793         struct nbu2ss_udc       *udc;
2794
2795         if (!_ep) {
2796                 pr_err("%s, bad param\n", __func__);
2797                 return -EINVAL;
2798         }
2799
2800         ep = container_of(_ep, struct nbu2ss_ep, ep);
2801         if (!ep) {
2802                 pr_err("%s, bad ep\n", __func__);
2803                 return -EINVAL;
2804         }
2805
2806         udc = ep->udc;
2807         if (!udc) {
2808                 dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
2809                 return -EINVAL;
2810         }
2811
2812         spin_lock_irqsave(&udc->lock, flags);
2813
2814         ep_adrs = ep->epnum | ep->direct;
2815         if (value == 0) {
2816                 _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2817                 ep->stalled = FALSE;
2818         } else {
2819                 if (list_empty(&ep->queue))
2820                         _nbu2ss_epn_set_stall(udc, ep);
2821                 else
2822                         ep->stalled = TRUE;
2823         }
2824
2825         if (value == 0)
2826                 ep->wedged = 0;
2827
2828         spin_unlock_irqrestore(&udc->lock, flags);
2829
2830         return 0;
2831 }
2832
2833 static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2834 {
2835         return nbu2ss_ep_set_halt(_ep, 1);
2836 }
2837
2838 /*-------------------------------------------------------------------------*/
2839 static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2840 {
2841         u32             data;
2842         struct nbu2ss_ep        *ep;
2843         struct nbu2ss_udc       *udc;
2844         unsigned long           flags;
2845         struct fc_regs          *preg;
2846
2847         if (!_ep) {
2848                 pr_err("%s, bad param\n", __func__);
2849                 return -EINVAL;
2850         }
2851
2852         ep = container_of(_ep, struct nbu2ss_ep, ep);
2853         if (!ep) {
2854                 pr_err("%s, bad ep\n", __func__);
2855                 return -EINVAL;
2856         }
2857
2858         udc = ep->udc;
2859         if (!udc) {
2860                 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2861                 return -EINVAL;
2862         }
2863
2864         preg = udc->p_regs;
2865
2866         data = gpio_get_value(VBUS_VALUE);
2867         if (data == 0)
2868                 return -EINVAL;
2869
2870         spin_lock_irqsave(&udc->lock, flags);
2871
2872         if (ep->epnum == 0) {
2873                 data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2874
2875         } else {
2876                 data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_LEN_DCNT)
2877                         & EPn_LDATA;
2878         }
2879
2880         spin_unlock_irqrestore(&udc->lock, flags);
2881
2882         return 0;
2883 }
2884
2885 /*-------------------------------------------------------------------------*/
2886 static void  nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2887 {
2888         u32                     data;
2889         struct nbu2ss_ep        *ep;
2890         struct nbu2ss_udc       *udc;
2891         unsigned long           flags;
2892
2893         if (!_ep) {
2894                 pr_err("udc: %s, bad param\n", __func__);
2895                 return;
2896         }
2897
2898         ep = container_of(_ep, struct nbu2ss_ep, ep);
2899         if (!ep) {
2900                 pr_err("udc: %s, bad ep\n", __func__);
2901                 return;
2902         }
2903
2904         udc = ep->udc;
2905         if (!udc) {
2906                 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2907                 return;
2908         }
2909
2910         data = gpio_get_value(VBUS_VALUE);
2911         if (data == 0)
2912                 return;
2913
2914         spin_lock_irqsave(&udc->lock, flags);
2915         _nbu2ss_fifo_flush(udc, ep);
2916         spin_unlock_irqrestore(&udc->lock, flags);
2917 }
2918
2919 /*-------------------------------------------------------------------------*/
2920 static const struct usb_ep_ops nbu2ss_ep_ops = {
2921         .enable         = nbu2ss_ep_enable,
2922         .disable        = nbu2ss_ep_disable,
2923
2924         .alloc_request  = nbu2ss_ep_alloc_request,
2925         .free_request   = nbu2ss_ep_free_request,
2926
2927         .queue          = nbu2ss_ep_queue,
2928         .dequeue        = nbu2ss_ep_dequeue,
2929
2930         .set_halt       = nbu2ss_ep_set_halt,
2931         .set_wedge      = nbu2ss_ep_set_wedge,
2932
2933         .fifo_status    = nbu2ss_ep_fifo_status,
2934         .fifo_flush     = nbu2ss_ep_fifo_flush,
2935 };
2936
2937 /*-------------------------------------------------------------------------*/
2938 /* usb_gadget_ops */
2939
2940 /*-------------------------------------------------------------------------*/
2941 static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
2942 {
2943         u32                     data;
2944         struct nbu2ss_udc       *udc;
2945
2946         if (!pgadget) {
2947                 pr_err("udc: %s, bad param\n", __func__);
2948                 return -EINVAL;
2949         }
2950
2951         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2952         if (!udc) {
2953                 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2954                 return -EINVAL;
2955         }
2956
2957         data = gpio_get_value(VBUS_VALUE);
2958         if (data == 0)
2959                 return -EINVAL;
2960
2961         return _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
2962 }
2963
2964 /*-------------------------------------------------------------------------*/
2965 static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
2966 {
2967         int     i;
2968         u32     data;
2969
2970         struct nbu2ss_udc       *udc;
2971
2972         if (!pgadget) {
2973                 pr_err("%s, bad param\n", __func__);
2974                 return -EINVAL;
2975         }
2976
2977         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2978         if (!udc) {
2979                 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2980                 return -EINVAL;
2981         }
2982
2983         data = gpio_get_value(VBUS_VALUE);
2984         if (data == 0) {
2985                 dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
2986                 return -EINVAL;
2987         }
2988
2989         _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
2990
2991         for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2992                 data = _nbu2ss_readl(&udc->p_regs->EPCTR);
2993
2994                 if (data & PLL_LOCK)
2995                         break;
2996         }
2997
2998         _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
2999
3000         return 0;
3001 }
3002
3003 /*-------------------------------------------------------------------------*/
3004 static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
3005                                       int is_selfpowered)
3006 {
3007         struct nbu2ss_udc       *udc;
3008         unsigned long           flags;
3009
3010         if (!pgadget) {
3011                 pr_err("%s, bad param\n", __func__);
3012                 return -EINVAL;
3013         }
3014
3015         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3016
3017         spin_lock_irqsave(&udc->lock, flags);
3018         pgadget->is_selfpowered = (is_selfpowered != 0);
3019         spin_unlock_irqrestore(&udc->lock, flags);
3020
3021         return 0;
3022 }
3023
3024 /*-------------------------------------------------------------------------*/
3025 static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
3026 {
3027         return 0;
3028 }
3029
3030 /*-------------------------------------------------------------------------*/
3031 static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned int mA)
3032 {
3033         struct nbu2ss_udc       *udc;
3034         unsigned long           flags;
3035
3036         if (!pgadget) {
3037                 pr_err("%s, bad param\n", __func__);
3038                 return -EINVAL;
3039         }
3040
3041         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3042
3043         spin_lock_irqsave(&udc->lock, flags);
3044         udc->mA = mA;
3045         spin_unlock_irqrestore(&udc->lock, flags);
3046
3047         return 0;
3048 }
3049
3050 /*-------------------------------------------------------------------------*/
3051 static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
3052 {
3053         struct nbu2ss_udc       *udc;
3054         unsigned long           flags;
3055
3056         if (!pgadget) {
3057                 pr_err("%s, bad param\n", __func__);
3058                 return -EINVAL;
3059         }
3060
3061         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3062
3063         if (!udc->driver) {
3064                 pr_warn("%s, Not Regist Driver\n", __func__);
3065                 return -EINVAL;
3066         }
3067
3068         if (udc->vbus_active == 0)
3069                 return -ESHUTDOWN;
3070
3071         spin_lock_irqsave(&udc->lock, flags);
3072         _nbu2ss_pullup(udc, is_on);
3073         spin_unlock_irqrestore(&udc->lock, flags);
3074
3075         return 0;
3076 }
3077
3078 /*-------------------------------------------------------------------------*/
3079 static int nbu2ss_gad_ioctl(
3080         struct usb_gadget *pgadget,
3081         unsigned int code,
3082         unsigned long param)
3083 {
3084         return 0;
3085 }
3086
3087 static const struct usb_gadget_ops nbu2ss_gadget_ops = {
3088         .get_frame              = nbu2ss_gad_get_frame,
3089         .wakeup                 = nbu2ss_gad_wakeup,
3090         .set_selfpowered        = nbu2ss_gad_set_selfpowered,
3091         .vbus_session           = nbu2ss_gad_vbus_session,
3092         .vbus_draw              = nbu2ss_gad_vbus_draw,
3093         .pullup                 = nbu2ss_gad_pullup,
3094         .ioctl                  = nbu2ss_gad_ioctl,
3095 };
3096
3097 static const struct {
3098         const char *name;
3099         const struct usb_ep_caps caps;
3100 } ep_info[NUM_ENDPOINTS] = {
3101 #define EP_INFO(_name, _caps) \
3102         { \
3103                 .name = _name, \
3104                 .caps = _caps, \
3105         }
3106
3107         EP_INFO("ep0",
3108                 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
3109         EP_INFO("ep1-bulk",
3110                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3111         EP_INFO("ep2-bulk",
3112                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3113         EP_INFO("ep3in-int",
3114                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3115         EP_INFO("ep4-iso",
3116                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3117         EP_INFO("ep5-iso",
3118                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3119         EP_INFO("ep6-bulk",
3120                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3121         EP_INFO("ep7-bulk",
3122                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3123         EP_INFO("ep8in-int",
3124                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3125         EP_INFO("ep9-iso",
3126                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3127         EP_INFO("epa-iso",
3128                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3129         EP_INFO("epb-bulk",
3130                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3131         EP_INFO("epc-bulk",
3132                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3133         EP_INFO("epdin-int",
3134                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3135
3136 #undef EP_INFO
3137 };
3138
3139 /*-------------------------------------------------------------------------*/
3140 static void __init nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3141 {
3142         int     i;
3143
3144         INIT_LIST_HEAD(&udc->gadget.ep_list);
3145         udc->gadget.ep0 = &udc->ep[0].ep;
3146
3147         for (i = 0; i < NUM_ENDPOINTS; i++) {
3148                 struct nbu2ss_ep *ep = &udc->ep[i];
3149
3150                 ep->udc = udc;
3151                 ep->desc = NULL;
3152
3153                 ep->ep.driver_data = NULL;
3154                 ep->ep.name = ep_info[i].name;
3155                 ep->ep.caps = ep_info[i].caps;
3156                 ep->ep.ops = &nbu2ss_ep_ops;
3157
3158                 usb_ep_set_maxpacket_limit(&ep->ep,
3159                                            i == 0 ? EP0_PACKETSIZE
3160                                            : EP_PACKETSIZE);
3161
3162                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3163                 INIT_LIST_HEAD(&ep->queue);
3164         }
3165
3166         list_del_init(&udc->ep[0].ep.ep_list);
3167 }
3168
3169 /*-------------------------------------------------------------------------*/
3170 /* platform_driver */
3171 static int __init nbu2ss_drv_contest_init(
3172         struct platform_device *pdev,
3173         struct nbu2ss_udc *udc)
3174 {
3175         spin_lock_init(&udc->lock);
3176         udc->dev = &pdev->dev;
3177
3178         udc->gadget.is_selfpowered = 1;
3179         udc->devstate = USB_STATE_NOTATTACHED;
3180         udc->pdev = pdev;
3181         udc->mA = 0;
3182
3183         udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3184
3185         /* init Endpoint */
3186         nbu2ss_drv_ep_init(udc);
3187
3188         /* init Gadget */
3189         udc->gadget.ops = &nbu2ss_gadget_ops;
3190         udc->gadget.ep0 = &udc->ep[0].ep;
3191         udc->gadget.speed = USB_SPEED_UNKNOWN;
3192         udc->gadget.name = driver_name;
3193         /* udc->gadget.is_dualspeed = 1; */
3194
3195         device_initialize(&udc->gadget.dev);
3196
3197         dev_set_name(&udc->gadget.dev, "gadget");
3198         udc->gadget.dev.parent = &pdev->dev;
3199         udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3200
3201         return 0;
3202 }
3203
3204 /*
3205  *      probe - binds to the platform device
3206  */
3207 static int nbu2ss_drv_probe(struct platform_device *pdev)
3208 {
3209         int     status = -ENODEV;
3210         struct nbu2ss_udc       *udc;
3211         struct resource *r;
3212         int irq;
3213         void __iomem *mmio_base;
3214
3215         udc = &udc_controller;
3216         memset(udc, 0, sizeof(struct nbu2ss_udc));
3217
3218         platform_set_drvdata(pdev, udc);
3219
3220         /* require I/O memory and IRQ to be provided as resources */
3221         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3222         mmio_base = devm_ioremap_resource(&pdev->dev, r);
3223         if (IS_ERR(mmio_base))
3224                 return PTR_ERR(mmio_base);
3225
3226         irq = platform_get_irq(pdev, 0);
3227         if (irq < 0) {
3228                 dev_err(&pdev->dev, "failed to get IRQ\n");
3229                 return irq;
3230         }
3231         status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3232                                   0, driver_name, udc);
3233
3234         /* IO Memory */
3235         udc->p_regs = (struct fc_regs *)mmio_base;
3236
3237         /* USB Function Controller Interrupt */
3238         if (status != 0) {
3239                 dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
3240                 return status;
3241         }
3242
3243         /* Driver Initialization */
3244         status = nbu2ss_drv_contest_init(pdev, udc);
3245         if (status < 0) {
3246                 /* Error */
3247                 return status;
3248         }
3249
3250         /* VBUS Interrupt */
3251         irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
3252         status = request_irq(INT_VBUS,
3253                              _nbu2ss_vbus_irq, IRQF_SHARED, driver_name, udc);
3254
3255         if (status != 0) {
3256                 dev_err(udc->dev, "request_irq(INT_VBUS) failed\n");
3257                 return status;
3258         }
3259
3260         return status;
3261 }
3262
3263 /*-------------------------------------------------------------------------*/
3264 static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3265 {
3266         struct nbu2ss_udc       *udc;
3267
3268         udc = platform_get_drvdata(pdev);
3269         if (!udc)
3270                 return;
3271
3272         _nbu2ss_disable_controller(udc);
3273 }
3274
3275 /*-------------------------------------------------------------------------*/
3276 static int nbu2ss_drv_remove(struct platform_device *pdev)
3277 {
3278         struct nbu2ss_udc       *udc;
3279         struct nbu2ss_ep        *ep;
3280         int     i;
3281
3282         udc = &udc_controller;
3283
3284         for (i = 0; i < NUM_ENDPOINTS; i++) {
3285                 ep = &udc->ep[i];
3286                 if (ep->virt_buf)
3287                         dma_free_coherent(NULL, PAGE_SIZE, (void *)ep->virt_buf,
3288                                           ep->phys_buf);
3289         }
3290
3291         /* Interrupt Handler - Release */
3292         free_irq(INT_VBUS, udc);
3293
3294         return 0;
3295 }
3296
3297 /*-------------------------------------------------------------------------*/
3298 static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3299 {
3300         struct nbu2ss_udc       *udc;
3301
3302         udc = platform_get_drvdata(pdev);
3303         if (!udc)
3304                 return 0;
3305
3306         if (udc->vbus_active) {
3307                 udc->vbus_active = 0;
3308                 udc->devstate = USB_STATE_NOTATTACHED;
3309                 udc->linux_suspended = 1;
3310
3311                 if (udc->usb_suspended) {
3312                         udc->usb_suspended = 0;
3313                         _nbu2ss_reset_controller(udc);
3314                 }
3315
3316                 _nbu2ss_quiesce(udc);
3317         }
3318         _nbu2ss_disable_controller(udc);
3319
3320         return 0;
3321 }
3322
3323 /*-------------------------------------------------------------------------*/
3324 static int nbu2ss_drv_resume(struct platform_device *pdev)
3325 {
3326         u32     data;
3327         struct nbu2ss_udc       *udc;
3328
3329         udc = platform_get_drvdata(pdev);
3330         if (!udc)
3331                 return 0;
3332
3333         data = gpio_get_value(VBUS_VALUE);
3334         if (data) {
3335                 udc->vbus_active = 1;
3336                 udc->devstate = USB_STATE_POWERED;
3337                 _nbu2ss_enable_controller(udc);
3338                 _nbu2ss_pullup(udc, 1);
3339         }
3340
3341         udc->linux_suspended = 0;
3342
3343         return 0;
3344 }
3345
3346 static struct platform_driver udc_driver = {
3347         .probe          = nbu2ss_drv_probe,
3348         .shutdown       = nbu2ss_drv_shutdown,
3349         .remove         = nbu2ss_drv_remove,
3350         .suspend        = nbu2ss_drv_suspend,
3351         .resume         = nbu2ss_drv_resume,
3352         .driver         = {
3353                 .name   = driver_name,
3354         },
3355 };
3356
3357 module_platform_driver(udc_driver);
3358
3359 MODULE_DESCRIPTION(DRIVER_DESC);
3360 MODULE_AUTHOR("Renesas Electronics Corporation");
3361 MODULE_LICENSE("GPL");