drivers/staging/emxx_udc/emxx_udc.c

   1 /*
   2  *  drivers/usb/gadget/emxx_udc.c
   3  *     EMXX FCD (Function Controller Driver) for USB.
   4  *
   5  *  Copyright (C) 2010 Renesas Electronics Corporation
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License version 2
   9  *  as published by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  *  GNU General Public License for more details.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/delay.h>
  21 #include <linux/ioport.h>
  22 #include <linux/slab.h>
  23 #include <linux/errno.h>
  24 #include <linux/list.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/proc_fs.h>
  27 #include <linux/clk.h>
  28 #include <linux/ctype.h>
  29 #include <linux/string.h>
  30 #include <linux/dma-mapping.h>
  31 #include <linux/workqueue.h>
  32 #include <linux/device.h>
  33
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36
  37 #include <linux/irq.h>
  38 #include <linux/gpio.h>
  39
  40 #include "emxx_udc.h"
  41
  42 #define DRIVER_DESC     "EMXX UDC driver"
  43 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  44
  45 static const char       driver_name[] = "emxx_udc";
  46 static const char       driver_desc[] = DRIVER_DESC;
  47
  48 /*===========================================================================*/
  49 /* Prototype */
  50 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
  51 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
  52 /*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
  53 static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
  54 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
  55 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
  56
  57 static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
  58 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
  59
  60 /*===========================================================================*/
  61 /* Macro */
  62 #define _nbu2ss_zero_len_pkt(udc, epnum)        \
  63         _nbu2ss_ep_in_end(udc, epnum, 0, 0)
  64
  65 /*===========================================================================*/
  66 /* Global */
  67 struct nbu2ss_udc udc_controller;
  68
  69 /*-------------------------------------------------------------------------*/
  70 /* Read */
  71 static inline u32 _nbu2ss_readl(void *address)
  72 {
  73         return __raw_readl(address);
  74 }
  75
  76 /*-------------------------------------------------------------------------*/
  77 /* Write */
  78 static inline void _nbu2ss_writel(void *address, u32 udata)
  79 {
  80         __raw_writel(udata, address);
  81 }
  82
  83 /*-------------------------------------------------------------------------*/
  84 /* Set Bit */
  85 static inline void _nbu2ss_bitset(void *address, u32 udata)
  86 {
  87         u32     reg_dt = __raw_readl(address) | (udata);
  88
  89         __raw_writel(reg_dt, address);
  90 }
  91
  92 /*-------------------------------------------------------------------------*/
  93 /* Clear Bit */
  94 static inline void _nbu2ss_bitclr(void *address, u32 udata)
  95 {
  96         u32     reg_dt = __raw_readl(address) & ~(udata);
  97
  98         __raw_writel(reg_dt, address);
  99 }
 100
 101 #ifdef UDC_DEBUG_DUMP
 102 /*-------------------------------------------------------------------------*/
 103 static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
 104 {
 105         int             i;
 106         u32 reg_data;
 107
 108         pr_info("=== %s()\n", __func__);
 109
 110         if (!udc) {
 111                 pr_err("%s udc == NULL\n", __func__);
 112                 return;
 113         }
 114
 115         spin_unlock(&udc->lock);
 116
 117         dev_dbg(&udc->dev, "\n-USB REG-\n");
 118         for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
 119                 reg_data =   _nbu2ss_readl(
 120                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
 121                 dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
 122
 123                 reg_data =  _nbu2ss_readl(
 124                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
 125                 dev_dbg(&udc->dev, " %08x", (int)reg_data);
 126
 127                 reg_data =  _nbu2ss_readl(
 128                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
 129                 dev_dbg(&udc->dev, " %08x", (int)reg_data);
 130
 131                 reg_data =  _nbu2ss_readl(
 132                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
 133                 dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
 134         }
 135
 136         spin_lock(&udc->lock);
 137 }
 138 #endif /* UDC_DEBUG_DUMP */
 139
 140 /*-------------------------------------------------------------------------*/
 141 /* Endpoint 0 Callback (Complete) */
 142 static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
 143 {
 144         u8              recipient;
 145         u16             selector;
 146         u32             test_mode;
 147         struct usb_ctrlrequest  *p_ctrl;
 148         struct nbu2ss_udc *udc;
 149
 150         if ((!_ep) || (!_req))
 151                 return;
 152
 153         udc = (struct nbu2ss_udc *)_req->context;
 154         p_ctrl = &udc->ctrl;
 155         if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
 156                 if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
 157                         /*-------------------------------------------------*/
 158                         /* SET_FEATURE */
 159                         recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
 160                         selector  = p_ctrl->wValue;
 161                         if ((recipient == USB_RECIP_DEVICE) &&
 162                             (selector == USB_DEVICE_TEST_MODE)) {
 163                                 test_mode = (u32)(p_ctrl->wIndex >> 8);
 164                                 _nbu2ss_set_test_mode(udc, test_mode);
 165                         }
 166                 }
 167         }
 168 }
 169
 170 /*-------------------------------------------------------------------------*/
 171 /* Initialization usb_request */
 172 static void _nbu2ss_create_ep0_packet(
 173         struct nbu2ss_udc *udc,
 174         void *p_buf,
 175         unsigned length
 176 )
 177 {
 178         udc->ep0_req.req.buf            = p_buf;
 179         udc->ep0_req.req.length         = length;
 180         udc->ep0_req.req.dma            = 0;
 181         udc->ep0_req.req.zero           = TRUE;
 182         udc->ep0_req.req.complete       = _nbu2ss_ep0_complete;
 183         udc->ep0_req.req.status         = -EINPROGRESS;
 184         udc->ep0_req.req.context        = udc;
 185         udc->ep0_req.req.actual         = 0;
 186 }
 187
 188 /*-------------------------------------------------------------------------*/
 189 /* Acquisition of the first address of RAM(FIFO) */
 190 static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
 191 {
 192         u32             num, buf_type;
 193         u32             data, last_ram_adr, use_ram_size;
 194
 195         struct ep_regs *p_ep_regs;
 196
 197         last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
 198         use_ram_size = 0;
 199
 200         for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
 201                 p_ep_regs = &udc->p_regs->EP_REGS[num];
 202                 data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
 203                 buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPn_BUF_TYPE;
 204                 if (buf_type == 0) {
 205                         /* Single Buffer */
 206                         use_ram_size += (data & EPn_MPKT) / sizeof(u32);
 207                 } else {
 208                         /* Double Buffer */
 209                         use_ram_size += ((data & EPn_MPKT) / sizeof(u32)) * 2;
 210                 }
 211
 212                 if ((data >> 16) > last_ram_adr)
 213                         last_ram_adr = data >> 16;
 214         }
 215
 216         return last_ram_adr + use_ram_size;
 217 }
 218
 219 /*-------------------------------------------------------------------------*/
 220 /* Construction of Endpoint */
 221 static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 222 {
 223         u32             num;
 224         u32             data;
 225         u32             begin_adrs;
 226
 227         if (ep->epnum == 0)
 228                 return  -EINVAL;
 229
 230         num = ep->epnum - 1;
 231
 232         /*-------------------------------------------------------------*/
 233         /* RAM Transfer Address */
 234         begin_adrs = _nbu2ss_get_begin_ram_address(udc);
 235         data = (begin_adrs << 16) | ep->ep.maxpacket;
 236         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
 237
 238         /*-------------------------------------------------------------*/
 239         /* Interrupt Enable */
 240         data = 1 << (ep->epnum + 8);
 241         _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
 242
 243         /*-------------------------------------------------------------*/
 244         /* Endpoint Type(Mode) */
 245         /*   Bulk, Interrupt, ISO */
 246         switch (ep->ep_type) {
 247         case USB_ENDPOINT_XFER_BULK:
 248                 data = EPn_BULK;
 249                 break;
 250
 251         case USB_ENDPOINT_XFER_INT:
 252                 data = EPn_BUF_SINGLE | EPn_INTERRUPT;
 253                 break;
 254
 255         case USB_ENDPOINT_XFER_ISOC:
 256                 data = EPn_ISO;
 257                 break;
 258
 259         default:
 260                 data = 0;
 261                 break;
 262         }
 263
 264         _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 265         _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum | ep->direct));
 266
 267         if (ep->direct == USB_DIR_OUT) {
 268                 /*---------------------------------------------------------*/
 269                 /* OUT */
 270                 data = EPn_EN | EPn_BCLR | EPn_DIR0;
 271                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 272
 273                 data = EPn_ONAK | EPn_OSTL_EN | EPn_OSTL;
 274                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 275
 276                 data = EPn_OUT_EN | EPn_OUT_END_EN;
 277                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 278         } else {
 279                 /*---------------------------------------------------------*/
 280                 /* IN */
 281                 data = EPn_EN | EPn_BCLR | EPn_AUTO;
 282                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 283
 284                 data = EPn_ISTL;
 285                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 286
 287                 data = EPn_IN_EN | EPn_IN_END_EN;
 288                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 289         }
 290
 291         return 0;
 292 }
 293
 294 /*-------------------------------------------------------------------------*/
 295 /* Release of Endpoint */
 296 static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 297 {
 298         u32             num;
 299         u32             data;
 300
 301         if ((ep->epnum == 0) || (udc->vbus_active == 0))
 302                 return  -EINVAL;
 303
 304         num = ep->epnum - 1;
 305
 306         /*-------------------------------------------------------------*/
 307         /* RAM Transfer Address */
 308         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
 309
 310         /*-------------------------------------------------------------*/
 311         /* Interrupt Disable */
 312         data = 1 << (ep->epnum + 8);
 313         _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
 314
 315         if (ep->direct == USB_DIR_OUT) {
 316                 /*---------------------------------------------------------*/
 317                 /* OUT */
 318                 data = EPn_ONAK | EPn_BCLR;
 319                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 320
 321                 data = EPn_EN | EPn_DIR0;
 322                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 323
 324                 data = EPn_OUT_EN | EPn_OUT_END_EN;
 325                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 326         } else {
 327                 /*---------------------------------------------------------*/
 328                 /* IN */
 329                 data = EPn_BCLR;
 330                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 331
 332                 data = EPn_EN | EPn_AUTO;
 333                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 334
 335                 data = EPn_IN_EN | EPn_IN_END_EN;
 336                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 337         }
 338
 339         return 0;
 340 }
 341
 342 /*-------------------------------------------------------------------------*/
 343 /* DMA setting (without Endpoint 0) */
 344 static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 345 {
 346         u32             num;
 347         u32             data;
 348
 349         data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
 350         if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
 351                 return;         /* Not Support DMA */
 352
 353         num = ep->epnum - 1;
 354
 355         if (ep->direct == USB_DIR_OUT) {
 356                 /*---------------------------------------------------------*/
 357                 /* OUT */
 358                 data = ep->ep.maxpacket;
 359                 _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
 360
 361                 /*---------------------------------------------------------*/
 362                 /* Transfer Direct */
 363                 data = DCR1_EPn_DIR0;
 364                 _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
 365
 366                 /*---------------------------------------------------------*/
 367                 /* DMA Mode etc. */
 368                 data = EPn_STOP_MODE | EPn_STOP_SET  | EPn_DMAMODE0;
 369                 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 370         } else {
 371                 /*---------------------------------------------------------*/
 372                 /* IN */
 373                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 374
 375                 /*---------------------------------------------------------*/
 376                 /* DMA Mode etc. */
 377                 data = EPn_BURST_SET | EPn_DMAMODE0;
 378                 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 379         }
 380 }
 381
 382 /*-------------------------------------------------------------------------*/
 383 /* DMA setting release */
 384 static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 385 {
 386         u32             num;
 387         u32             data;
 388         struct fc_regs  *preg = udc->p_regs;
 389
 390         if (udc->vbus_active == 0)
 391                 return;         /* VBUS OFF */
 392
 393         data = _nbu2ss_readl(&preg->USBSSCONF);
 394         if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
 395                 return;         /* Not Support DMA */
 396
 397         num = ep->epnum - 1;
 398
 399         _nbu2ss_ep_dma_abort(udc, ep);
 400
 401         if (ep->direct == USB_DIR_OUT) {
 402                 /*---------------------------------------------------------*/
 403                 /* OUT */
 404                 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
 405                 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_DIR0);
 406                 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 407         } else {
 408                 /*---------------------------------------------------------*/
 409                 /* IN */
 410                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 411                 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 412         }
 413 }
 414
 415 /*-------------------------------------------------------------------------*/
 416 /* Abort DMA */
 417 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 418 {
 419         struct fc_regs  *preg = udc->p_regs;
 420
 421         _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum - 1].EP_DCR1, DCR1_EPn_REQEN);
 422         mdelay(DMA_DISABLE_TIME);       /* DCR1_EPn_REQEN Clear */
 423         _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum - 1].EP_DMA_CTRL, EPn_DMA_EN);
 424 }
 425
 426 /*-------------------------------------------------------------------------*/
 427 /* Start IN Transfer */
 428 static void _nbu2ss_ep_in_end(
 429         struct nbu2ss_udc *udc,
 430         u32 epnum,
 431         u32 data32,
 432         u32 length
 433 )
 434 {
 435         u32             data;
 436         u32             num;
 437         struct fc_regs  *preg = udc->p_regs;
 438
 439         if (length >= sizeof(u32))
 440                 return;
 441
 442         if (epnum == 0) {
 443                 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
 444
 445                 /* Writing of 1-4 bytes */
 446                 if (length)
 447                         _nbu2ss_writel(&preg->EP0_WRITE, data32);
 448
 449                 data = ((length << 5) & EP0_DW) | EP0_DEND;
 450                 _nbu2ss_writel(&preg->EP0_CONTROL, data);
 451
 452                 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
 453         } else {
 454                 num = epnum - 1;
 455
 456                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 457
 458                 /* Writing of 1-4 bytes */
 459                 if (length)
 460                         _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
 461
 462                 data = (((length) << 5) & EPn_DW) | EPn_DEND;
 463                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
 464
 465                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 466         }
 467 }
 468
 469 #ifdef USE_DMA
 470 /*-------------------------------------------------------------------------*/
 471 static void _nbu2ss_dma_map_single(
 472         struct nbu2ss_udc *udc,
 473         struct nbu2ss_ep *ep,
 474         struct nbu2ss_req *req,
 475         u8              direct
 476 )
 477 {
 478         if (req->req.dma == DMA_ADDR_INVALID) {
 479                 if (req->unaligned) {
 480                         req->req.dma = ep->phys_buf;
 481                 } else {
 482                         req->req.dma = dma_map_single(
 483                                 udc->gadget.dev.parent,
 484                                 req->req.buf,
 485                                 req->req.length,
 486                                 (direct == USB_DIR_IN)
 487                                 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 488                 }
 489                 req->mapped = 1;
 490         } else {
 491                 if (!req->unaligned)
 492                         dma_sync_single_for_device(
 493                                 udc->gadget.dev.parent,
 494                                 req->req.dma,
 495                                 req->req.length,
 496                                 (direct == USB_DIR_IN)
 497                                 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 498
 499                 req->mapped = 0;
 500         }
 501 }
 502
 503 /*-------------------------------------------------------------------------*/
 504 static void _nbu2ss_dma_unmap_single(
 505         struct nbu2ss_udc *udc,
 506         struct nbu2ss_ep *ep,
 507         struct nbu2ss_req *req,
 508         u8              direct
 509 )
 510 {
 511         u8              data[4];
 512         u8              *p;
 513         u32             count = 0;
 514
 515         if (direct == USB_DIR_OUT) {
 516                 count = req->req.actual % 4;
 517                 if (count) {
 518                         p = req->req.buf;
 519                         p += (req->req.actual - count);
 520                         memcpy(data, p, count);
 521                 }
 522         }
 523
 524         if (req->mapped) {
 525                 if (req->unaligned) {
 526                         if (direct == USB_DIR_OUT)
 527                                 memcpy(req->req.buf, ep->virt_buf,
 528                                        req->req.actual & 0xfffffffc);
 529                 } else
 530                         dma_unmap_single(udc->gadget.dev.parent,
 531                                          req->req.dma, req->req.length,
 532                                 (direct == USB_DIR_IN)
 533                                 ? DMA_TO_DEVICE
 534                                 : DMA_FROM_DEVICE);
 535                 req->req.dma = DMA_ADDR_INVALID;
 536                 req->mapped = 0;
 537         } else {
 538                 if (!req->unaligned)
 539                         dma_sync_single_for_cpu(udc->gadget.dev.parent,
 540                                                 req->req.dma, req->req.length,
 541                                 (direct == USB_DIR_IN)
 542                                 ? DMA_TO_DEVICE
 543                                 : DMA_FROM_DEVICE);
 544         }
 545
 546         if (count) {
 547                 p = req->req.buf;
 548                 p += (req->req.actual - count);
 549                 memcpy(p, data, count);
 550         }
 551 }
 552 #endif
 553
 554 /*-------------------------------------------------------------------------*/
 555 /* Endpoint 0 OUT Transfer (PIO) */
 556 static int ep0_out_pio(struct nbu2ss_udc *udc, u8 *buf, u32 length)
 557 {
 558         u32             i;
 559         u32 numreads = length / sizeof(u32);
 560         union usb_reg_access *buf32 = (union usb_reg_access *)buf;
 561
 562         if (!numreads)
 563                 return 0;
 564
 565         /* PIO Read */
 566         for (i = 0; i < numreads; i++) {
 567                 buf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 568                 buf32++;
 569         }
 570
 571         return  numreads * sizeof(u32);
 572 }
 573
 574 /*-------------------------------------------------------------------------*/
 575 /* Endpoint 0 OUT Transfer (PIO, OverBytes) */
 576 static int EP0_out_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 577 {
 578         u32             i;
 579         u32             iReadSize = 0;
 580         union usb_reg_access  Temp32;
 581         union usb_reg_access  *pBuf32 = (union usb_reg_access *)pBuf;
 582
 583         if ((length > 0) && (length < sizeof(u32))) {
 584                 Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 585                 for (i = 0 ; i < length ; i++)
 586                         pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
 587                 iReadSize += length;
 588         }
 589
 590         return iReadSize;
 591 }
 592
 593 /*-------------------------------------------------------------------------*/
 594 /* Endpoint 0 IN Transfer (PIO) */
 595 static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 596 {
 597         u32             i;
 598         u32             iMaxLength   = EP0_PACKETSIZE;
 599         u32             iWordLength  = 0;
 600         u32             iWriteLength = 0;
 601         union usb_reg_access  *pBuf32 = (union usb_reg_access *)pBuf;
 602
 603         /*------------------------------------------------------------*/
 604         /* Transfer Length */
 605         if (iMaxLength < length)
 606                 iWordLength = iMaxLength / sizeof(u32);
 607         else
 608                 iWordLength = length / sizeof(u32);
 609
 610         /*------------------------------------------------------------*/
 611         /* PIO */
 612         for (i = 0; i < iWordLength; i++) {
 613                 _nbu2ss_writel(&udc->p_regs->EP0_WRITE, pBuf32->dw);
 614                 pBuf32++;
 615                 iWriteLength += sizeof(u32);
 616         }
 617
 618         return iWriteLength;
 619 }
 620
 621 /*-------------------------------------------------------------------------*/
 622 /* Endpoint 0 IN Transfer (PIO, OverBytes) */
 623 static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
 624 {
 625         u32             i;
 626         union usb_reg_access  Temp32;
 627         union usb_reg_access  *pBuf32 = (union usb_reg_access *)pBuf;
 628
 629         if ((iRemainSize > 0) && (iRemainSize < sizeof(u32))) {
 630                 for (i = 0 ; i < iRemainSize ; i++)
 631                         Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
 632                 _nbu2ss_ep_in_end(udc, 0, Temp32.dw, iRemainSize);
 633
 634                 return iRemainSize;
 635         }
 636
 637         return 0;
 638 }
 639
 640 /*-------------------------------------------------------------------------*/
 641 /* Transfer NULL Packet (Epndoint 0) */
 642 static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 643 {
 644         u32             data;
 645
 646         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 647         data &= ~(u32)EP0_INAK;
 648
 649         if (pid_flag)
 650                 data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
 651         else
 652                 data |= (EP0_INAK_EN | EP0_DEND);
 653
 654         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 655
 656         return 0;
 657 }
 658
 659 /*-------------------------------------------------------------------------*/
 660 /* Receive NULL Packet (Endpoint 0) */
 661 static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 662 {
 663         u32             data;
 664
 665         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 666         data &= ~(u32)EP0_ONAK;
 667
 668         if (pid_flag)
 669                 data |= EP0_PIDCLR;
 670
 671         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 672
 673         return 0;
 674 }
 675
 676 /*-------------------------------------------------------------------------*/
 677 static int _nbu2ss_ep0_in_transfer(
 678         struct nbu2ss_udc *udc,
 679         struct nbu2ss_req *req
 680 )
 681 {
 682         u8              *pBuffer;                       /* IN Data Buffer */
 683         u32             data;
 684         u32             iRemainSize = 0;
 685         int             result = 0;
 686
 687         /*-------------------------------------------------------------*/
 688         /* End confirmation */
 689         if (req->req.actual == req->req.length) {
 690                 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 691                         if (req->zero) {
 692                                 req->zero = false;
 693                                 EP0_send_NULL(udc, FALSE);
 694                                 return 1;
 695                         }
 696                 }
 697
 698                 return 0;               /* Transfer End */
 699         }
 700
 701         /*-------------------------------------------------------------*/
 702         /* NAK release */
 703         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 704         data |= EP0_INAK_EN;
 705         data &= ~(u32)EP0_INAK;
 706         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 707
 708         iRemainSize = req->req.length - req->req.actual;
 709         pBuffer = (u8 *)req->req.buf;
 710         pBuffer += req->req.actual;
 711
 712         /*-------------------------------------------------------------*/
 713         /* Data transfer */
 714         result = EP0_in_PIO(udc, pBuffer, iRemainSize);
 715
 716         req->div_len = result;
 717         iRemainSize -= result;
 718
 719         if (iRemainSize == 0) {
 720                 EP0_send_NULL(udc, FALSE);
 721                 return result;
 722         }
 723
 724         if ((iRemainSize < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
 725                 pBuffer += result;
 726                 result += EP0_in_OverBytes(udc, pBuffer, iRemainSize);
 727                 req->div_len = result;
 728         }
 729
 730         return result;
 731 }
 732
 733 /*-------------------------------------------------------------------------*/
 734 static int _nbu2ss_ep0_out_transfer(
 735         struct nbu2ss_udc *udc,
 736         struct nbu2ss_req *req
 737 )
 738 {
 739         u8              *pBuffer;
 740         u32             iRemainSize;
 741         u32             iRecvLength;
 742         int             result = 0;
 743         int             fRcvZero;
 744
 745         /*-------------------------------------------------------------*/
 746         /* Receive data confirmation */
 747         iRecvLength = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
 748         if (iRecvLength != 0) {
 749                 fRcvZero = 0;
 750
 751                 iRemainSize = req->req.length - req->req.actual;
 752                 pBuffer = (u8 *)req->req.buf;
 753                 pBuffer += req->req.actual;
 754
 755                 result = ep0_out_pio(udc, pBuffer
 756                                         , min(iRemainSize, iRecvLength));
 757                 if (result < 0)
 758                         return result;
 759
 760                 req->req.actual += result;
 761                 iRecvLength -= result;
 762
 763                 if ((iRecvLength > 0) && (iRecvLength < sizeof(u32))) {
 764                         pBuffer += result;
 765                         iRemainSize -= result;
 766
 767                         result = EP0_out_OverBytes(udc, pBuffer
 768                                         , min(iRemainSize, iRecvLength));
 769                         req->req.actual += result;
 770                 }
 771         } else {
 772                 fRcvZero = 1;
 773         }
 774
 775         /*-------------------------------------------------------------*/
 776         /* End confirmation */
 777         if (req->req.actual == req->req.length) {
 778                 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 779                         if (req->zero) {
 780                                 req->zero = false;
 781                                 EP0_receive_NULL(udc, FALSE);
 782                                 return 1;
 783                         }
 784                 }
 785
 786                 return 0;               /* Transfer End */
 787         }
 788
 789         if ((req->req.actual % EP0_PACKETSIZE) != 0)
 790                 return 0;               /* Short Packet Transfer End */
 791
 792         if (req->req.actual > req->req.length) {
 793                 dev_err(udc->dev, " *** Overrun Error\n");
 794                 return -EOVERFLOW;
 795         }
 796
 797         if (fRcvZero != 0) {
 798                 iRemainSize = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 799                 if (iRemainSize & EP0_ONAK) {
 800                         /*---------------------------------------------------*/
 801                         /* NACK release */
 802                         _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
 803                 }
 804                 result = 1;
 805         }
 806
 807         return result;
 808 }
 809
 810 /*-------------------------------------------------------------------------*/
 811 static int _nbu2ss_out_dma(
 812         struct nbu2ss_udc *udc,
 813         struct nbu2ss_req *req,
 814         u32             num,
 815         u32             length
 816 )
 817 {
 818         dma_addr_t      pBuffer;
 819         u32             mpkt;
 820         u32             lmpkt;
 821         u32             dmacnt;
 822         u32             burst = 1;
 823         u32             data;
 824         int             result = -EINVAL;
 825         struct fc_regs  *preg = udc->p_regs;
 826
 827         if (req->dma_flag)
 828                 return 1;               /* DMA is forwarded */
 829
 830         req->dma_flag = TRUE;
 831         pBuffer = req->req.dma;
 832         pBuffer += req->req.actual;
 833
 834         /* DMA Address */
 835         _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
 836
 837         /* Number of transfer packets */
 838         mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
 839         dmacnt = length / mpkt;
 840         lmpkt = (length % mpkt) & ~(u32)0x03;
 841
 842         if (dmacnt > DMA_MAX_COUNT) {
 843                 dmacnt = DMA_MAX_COUNT;
 844                 lmpkt = 0;
 845         } else if (lmpkt != 0) {
 846                 if (dmacnt == 0)
 847                         burst = 0;      /* Burst OFF */
 848                 dmacnt++;
 849         }
 850
 851         data = mpkt | (lmpkt << 16);
 852         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
 853
 854         data = ((dmacnt & 0xff) << 16) | DCR1_EPn_DIR0 | DCR1_EPn_REQEN;
 855         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
 856
 857         if (burst == 0) {
 858                 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
 859                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
 860         } else {
 861                 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
 862                                 , (dmacnt << 16));
 863                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
 864         }
 865         _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
 866
 867         result = length & ~(u32)0x03;
 868         req->div_len = result;
 869
 870         return result;
 871 }
 872
 873 /*-------------------------------------------------------------------------*/
 874 static int _nbu2ss_epn_out_pio(
 875         struct nbu2ss_udc *udc,
 876         struct nbu2ss_ep *ep,
 877         struct nbu2ss_req *req,
 878         u32             length
 879 )
 880 {
 881         u8              *pBuffer;
 882         u32             i;
 883         u32             data;
 884         u32             iWordLength;
 885         union usb_reg_access    Temp32;
 886         union usb_reg_access    *pBuf32;
 887         int             result = 0;
 888         struct fc_regs  *preg = udc->p_regs;
 889
 890         if (req->dma_flag)
 891                 return 1;               /* DMA is forwarded */
 892
 893         if (length == 0)
 894                 return 0;
 895
 896         pBuffer = (u8 *)req->req.buf;
 897         pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
 898
 899         iWordLength = length / sizeof(u32);
 900         if (iWordLength > 0) {
 901                 /*---------------------------------------------------------*/
 902                 /* Copy of every four bytes */
 903                 for (i = 0; i < iWordLength; i++) {
 904                         pBuf32->dw =
 905                         _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
 906                         pBuf32++;
 907                 }
 908                 result = iWordLength * sizeof(u32);
 909         }
 910
 911         data = length - result;
 912         if (data > 0) {
 913                 /*---------------------------------------------------------*/
 914                 /* Copy of fraction byte */
 915                 Temp32.dw = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
 916                 for (i = 0 ; i < data ; i++)
 917                         pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
 918                 result += data;
 919         }
 920
 921         req->req.actual += result;
 922
 923         if ((req->req.actual == req->req.length) ||
 924             ((req->req.actual % ep->ep.maxpacket) != 0)) {
 925                 result = 0;
 926         }
 927
 928         return result;
 929 }
 930
 931 /*-------------------------------------------------------------------------*/
 932 static int _nbu2ss_epn_out_data(
 933         struct nbu2ss_udc *udc,
 934         struct nbu2ss_ep *ep,
 935         struct nbu2ss_req *req,
 936         u32             data_size
 937 )
 938 {
 939         u32             num;
 940         u32             iBufSize;
 941         int             nret = 1;
 942
 943         if (ep->epnum == 0)
 944                 return -EINVAL;
 945
 946         num = ep->epnum - 1;
 947
 948         iBufSize = min((req->req.length - req->req.actual), data_size);
 949
 950         if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
 951             (iBufSize  >= sizeof(u32))) {
 952                 nret = _nbu2ss_out_dma(udc, req, num, iBufSize);
 953         } else {
 954                 iBufSize = min_t(u32, iBufSize, ep->ep.maxpacket);
 955                 nret = _nbu2ss_epn_out_pio(udc, ep, req, iBufSize);
 956         }
 957
 958         return nret;
 959 }
 960
 961 /*-------------------------------------------------------------------------*/
 962 static int _nbu2ss_epn_out_transfer(
 963         struct nbu2ss_udc *udc,
 964         struct nbu2ss_ep *ep,
 965         struct nbu2ss_req *req
 966 )
 967 {
 968         u32             num;
 969         u32             iRecvLength;
 970         int             result = 1;
 971         struct fc_regs  *preg = udc->p_regs;
 972
 973         if (ep->epnum == 0)
 974                 return -EINVAL;
 975
 976         num = ep->epnum - 1;
 977
 978         /*-------------------------------------------------------------*/
 979         /* Receive Length */
 980         iRecvLength
 981                 = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPn_LDATA;
 982
 983         if (iRecvLength != 0) {
 984                 result = _nbu2ss_epn_out_data(udc, ep, req, iRecvLength);
 985                 if (iRecvLength < ep->ep.maxpacket) {
 986                         if (iRecvLength == result) {
 987                                 req->req.actual += result;
 988                                 result = 0;
 989                         }
 990                 }
 991         } else {
 992                 if ((req->req.actual == req->req.length) ||
 993                     ((req->req.actual % ep->ep.maxpacket) != 0)) {
 994                         result = 0;
 995                 }
 996         }
 997
 998         if (result == 0) {
 999                 if ((req->req.actual % ep->ep.maxpacket) == 0) {
1000                         if (req->zero) {
1001                                 req->zero = false;
1002                                 return 1;
1003                         }
1004                 }
1005         }
1006
1007         if (req->req.actual > req->req.length) {
1008                 dev_err(udc->dev, " Overrun Error\n");
1009                 dev_err(udc->dev, " actual = %d, length = %d\n",
1010                         req->req.actual, req->req.length);
1011                 result = -EOVERFLOW;
1012         }
1013
1014         return result;
1015 }
1016
1017 /*-------------------------------------------------------------------------*/
1018 static int _nbu2ss_in_dma(
1019         struct nbu2ss_udc *udc,
1020         struct nbu2ss_ep *ep,
1021         struct nbu2ss_req *req,
1022         u32             num,
1023         u32             length
1024 )
1025 {
1026         dma_addr_t      pBuffer;
1027         u32             mpkt;           /* MaxPacketSize */
1028         u32             lmpkt;          /* Last Packet Data Size */
1029         u32             dmacnt;         /* IN Data Size */
1030         u32             iWriteLength;
1031         u32             data;
1032         int             result = -EINVAL;
1033         struct fc_regs  *preg = udc->p_regs;
1034
1035         if (req->dma_flag)
1036                 return 1;               /* DMA is forwarded */
1037
1038 #ifdef USE_DMA
1039         if (req->req.actual == 0)
1040                 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1041 #endif
1042         req->dma_flag = TRUE;
1043
1044         /* MAX Packet Size */
1045         mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
1046
1047         if ((DMA_MAX_COUNT * mpkt) < length)
1048                 iWriteLength = DMA_MAX_COUNT * mpkt;
1049         else
1050                 iWriteLength = length;
1051
1052         /*------------------------------------------------------------*/
1053         /* Number of transmission packets */
1054         if (mpkt < iWriteLength) {
1055                 dmacnt = iWriteLength / mpkt;
1056                 lmpkt  = (iWriteLength % mpkt) & ~(u32)0x3;
1057                 if (lmpkt != 0)
1058                         dmacnt++;
1059                 else
1060                         lmpkt = mpkt & ~(u32)0x3;
1061
1062         } else {
1063                 dmacnt = 1;
1064                 lmpkt  = iWriteLength & ~(u32)0x3;
1065         }
1066
1067         /* Packet setting */
1068         data = mpkt | (lmpkt << 16);
1069         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1070
1071         /* Address setting */
1072         pBuffer = req->req.dma;
1073         pBuffer += req->req.actual;
1074         _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
1075
1076         /* Packet and DMA setting */
1077         data = ((dmacnt & 0xff) << 16) | DCR1_EPn_REQEN;
1078         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1079
1080         /* Packet setting of EPC */
1081         data = dmacnt << 16;
1082         _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1083
1084         /*DMA setting of EPC */
1085         _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
1086
1087         result = iWriteLength & ~(u32)0x3;
1088         req->div_len = result;
1089
1090         return result;
1091 }
1092
1093 /*-------------------------------------------------------------------------*/
1094 static int _nbu2ss_epn_in_pio(
1095         struct nbu2ss_udc *udc,
1096         struct nbu2ss_ep *ep,
1097         struct nbu2ss_req *req,
1098         u32             length
1099 )
1100 {
1101         u8              *pBuffer;
1102         u32             i;
1103         u32             data;
1104         u32             iWordLength;
1105         union usb_reg_access    Temp32;
1106         union usb_reg_access    *pBuf32 = NULL;
1107         int             result = 0;
1108         struct fc_regs  *preg = udc->p_regs;
1109
1110         if (req->dma_flag)
1111                 return 1;               /* DMA is forwarded */
1112
1113         if (length > 0) {
1114                 pBuffer = (u8 *)req->req.buf;
1115                 pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
1116
1117                 iWordLength = length / sizeof(u32);
1118                 if (iWordLength > 0) {
1119                         for (i = 0; i < iWordLength; i++) {
1120                                 _nbu2ss_writel(
1121                                         &preg->EP_REGS[ep->epnum - 1].EP_WRITE
1122                                         , pBuf32->dw
1123                                 );
1124
1125                                 pBuf32++;
1126                         }
1127                         result = iWordLength * sizeof(u32);
1128                 }
1129         }
1130
1131         if (result != ep->ep.maxpacket) {
1132                 data = length - result;
1133                 Temp32.dw = 0;
1134                 for (i = 0 ; i < data ; i++)
1135                         Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
1136
1137                 _nbu2ss_ep_in_end(udc, ep->epnum, Temp32.dw, data);
1138                 result += data;
1139         }
1140
1141         req->div_len = result;
1142
1143         return result;
1144 }
1145
1146 /*-------------------------------------------------------------------------*/
1147 static int _nbu2ss_epn_in_data(
1148         struct nbu2ss_udc *udc,
1149         struct nbu2ss_ep *ep,
1150         struct nbu2ss_req *req,
1151         u32             data_size
1152 )
1153 {
1154         u32             num;
1155         int             nret = 1;
1156
1157         if (ep->epnum == 0)
1158                 return -EINVAL;
1159
1160         num = ep->epnum - 1;
1161
1162         if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
1163             (data_size >= sizeof(u32))) {
1164                 nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1165         } else {
1166                 data_size = min_t(u32, data_size, ep->ep.maxpacket);
1167                 nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1168         }
1169
1170         return nret;
1171 }
1172
1173 /*-------------------------------------------------------------------------*/
1174 static int _nbu2ss_epn_in_transfer(
1175         struct nbu2ss_udc *udc,
1176         struct nbu2ss_ep *ep,
1177         struct nbu2ss_req *req
1178 )
1179 {
1180         u32             num;
1181         u32             iBufSize;
1182         int             result = 0;
1183         u32             status;
1184
1185         if (ep->epnum == 0)
1186                 return -EINVAL;
1187
1188         num = ep->epnum - 1;
1189
1190         status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1191
1192         /*-------------------------------------------------------------*/
1193         /* State confirmation of FIFO */
1194         if (req->req.actual == 0) {
1195                 if ((status & EPn_IN_EMPTY) == 0)
1196                         return 1;       /* Not Empty */
1197
1198         } else {
1199                 if ((status & EPn_IN_FULL) != 0)
1200                         return 1;       /* Not Empty */
1201         }
1202
1203         /*-------------------------------------------------------------*/
1204         /* Start transfer */
1205         iBufSize = req->req.length - req->req.actual;
1206         if (iBufSize > 0)
1207                 result = _nbu2ss_epn_in_data(udc, ep, req, iBufSize);
1208         else if (req->req.length == 0)
1209                 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1210
1211         return result;
1212 }
1213
1214 /*-------------------------------------------------------------------------*/
1215 static int _nbu2ss_start_transfer(
1216         struct nbu2ss_udc *udc,
1217         struct nbu2ss_ep *ep,
1218         struct nbu2ss_req *req,
1219         bool    bflag)
1220 {
1221         int             nret = -EINVAL;
1222
1223         req->dma_flag = FALSE;
1224         req->div_len = 0;
1225
1226         if (req->req.length == 0) {
1227                 req->zero = false;
1228         } else {
1229                 if ((req->req.length % ep->ep.maxpacket) == 0)
1230                         req->zero = req->req.zero;
1231                 else
1232                         req->zero = false;
1233         }
1234
1235         if (ep->epnum == 0) {
1236                 /* EP0 */
1237                 switch (udc->ep0state) {
1238                 case EP0_IN_DATA_PHASE:
1239                         nret = _nbu2ss_ep0_in_transfer(udc, req);
1240                         break;
1241
1242                 case EP0_OUT_DATA_PHASE:
1243                         nret = _nbu2ss_ep0_out_transfer(udc, req);
1244                         break;
1245
1246                 case EP0_IN_STATUS_PHASE:
1247                         nret = EP0_send_NULL(udc, TRUE);
1248                         break;
1249
1250                 default:
1251                         break;
1252                 }
1253
1254         } else {
1255                 /* EPn */
1256                 if (ep->direct == USB_DIR_OUT) {
1257                         /* OUT */
1258                         if (!bflag)
1259                                 nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1260                 } else {
1261                         /* IN */
1262                         nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1263                 }
1264         }
1265
1266         return nret;
1267 }
1268
1269 /*-------------------------------------------------------------------------*/
1270 static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1271 {
1272         u32             length;
1273         bool    bflag = FALSE;
1274         struct nbu2ss_req *req;
1275
1276         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1277         if (!req)
1278                 return;
1279
1280         if (ep->epnum > 0) {
1281                 length = _nbu2ss_readl(
1282                         &ep->udc->p_regs->EP_REGS[ep->epnum - 1].EP_LEN_DCNT);
1283
1284                 length &= EPn_LDATA;
1285                 if (length < ep->ep.maxpacket)
1286                         bflag = TRUE;
1287         }
1288
1289         _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1290 }
1291
1292 /*-------------------------------------------------------------------------*/
1293 /*      Endpoint Toggle Reset */
1294 static void _nbu2ss_endpoint_toggle_reset(
1295         struct nbu2ss_udc *udc,
1296         u8 ep_adrs)
1297 {
1298         u8              num;
1299         u32             data;
1300
1301         if ((ep_adrs == 0) || (ep_adrs == 0x80))
1302                 return;
1303
1304         num = (ep_adrs & 0x7F) - 1;
1305
1306         if (ep_adrs & USB_DIR_IN)
1307                 data = EPn_IPIDCLR;
1308         else
1309                 data = EPn_BCLR | EPn_OPIDCLR;
1310
1311         _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1312 }
1313
1314 /*-------------------------------------------------------------------------*/
1315 /*      Endpoint STALL set */
1316 static void _nbu2ss_set_endpoint_stall(
1317         struct nbu2ss_udc *udc,
1318         u8 ep_adrs,
1319         bool bstall)
1320 {
1321         u8              num, epnum;
1322         u32             data;
1323         struct nbu2ss_ep *ep;
1324         struct fc_regs  *preg = udc->p_regs;
1325
1326         if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1327                 if (bstall) {
1328                         /* Set STALL */
1329                         _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1330                 } else {
1331                         /* Clear STALL */
1332                         _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1333                 }
1334         } else {
1335                 epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1336                 num = epnum - 1;
1337                 ep = &udc->ep[epnum];
1338
1339                 if (bstall) {
1340                         /* Set STALL */
1341                         ep->halted = TRUE;
1342
1343                         if (ep_adrs & USB_DIR_IN)
1344                                 data = EPn_BCLR | EPn_ISTL;
1345                         else
1346                                 data = EPn_OSTL_EN | EPn_OSTL;
1347
1348                         _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1349                 } else {
1350                         /* Clear STALL */
1351                         ep->stalled = FALSE;
1352                         if (ep_adrs & USB_DIR_IN) {
1353                                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1354                                                 , EPn_ISTL);
1355                         } else {
1356                                 data =
1357                                 _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1358
1359                                 data &= ~EPn_OSTL;
1360                                 data |= EPn_OSTL_EN;
1361
1362                                 _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1363                                                 , data);
1364                         }
1365
1366                         ep->stalled = FALSE;
1367                         if (ep->halted) {
1368                                 ep->halted = FALSE;
1369                                 _nbu2ss_restert_transfer(ep);
1370                         }
1371                 }
1372         }
1373 }
1374
1375 /*-------------------------------------------------------------------------*/
1376 /* Device Descriptor */
1377 static struct usb_device_descriptor device_desc = {
1378         .bLength              = sizeof(device_desc),
1379         .bDescriptorType      = USB_DT_DEVICE,
1380         .bcdUSB               = cpu_to_le16(0x0200),
1381         .bDeviceClass         = USB_CLASS_VENDOR_SPEC,
1382         .bDeviceSubClass      = 0x00,
1383         .bDeviceProtocol      = 0x00,
1384         .bMaxPacketSize0      = 64,
1385         .idVendor             = cpu_to_le16(0x0409),
1386         .idProduct            = cpu_to_le16(0xfff0),
1387         .bcdDevice            = 0xffff,
1388         .iManufacturer        = 0x00,
1389         .iProduct             = 0x00,
1390         .iSerialNumber        = 0x00,
1391         .bNumConfigurations   = 0x01,
1392 };
1393
1394 /*-------------------------------------------------------------------------*/
1395 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1396 {
1397         u32             data;
1398
1399         if (mode > MAX_TEST_MODE_NUM)
1400                 return;
1401
1402         dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
1403
1404         data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1405         data &= ~TEST_FORCE_ENABLE;
1406         data |= mode << TEST_MODE_SHIFT;
1407
1408         _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1409         _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1410 }
1411
1412 /*-------------------------------------------------------------------------*/
1413 static int _nbu2ss_set_feature_device(
1414         struct nbu2ss_udc *udc,
1415         u16 selector,
1416         u16 wIndex
1417 )
1418 {
1419         int     result = -EOPNOTSUPP;
1420
1421         switch (selector) {
1422         case USB_DEVICE_REMOTE_WAKEUP:
1423                 if (wIndex == 0x0000) {
1424                         udc->remote_wakeup = U2F_ENABLE;
1425                         result = 0;
1426                 }
1427                 break;
1428
1429         case USB_DEVICE_TEST_MODE:
1430                 wIndex >>= 8;
1431                 if (wIndex <= MAX_TEST_MODE_NUM)
1432                         result = 0;
1433                 break;
1434
1435         default:
1436                 break;
1437         }
1438
1439         return result;
1440 }
1441
1442 /*-------------------------------------------------------------------------*/
1443 static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1444 {
1445         u8              epnum;
1446         u32             data = 0, bit_data;
1447         struct fc_regs  *preg = udc->p_regs;
1448
1449         epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1450         if (epnum == 0) {
1451                 data = _nbu2ss_readl(&preg->EP0_CONTROL);
1452                 bit_data = EP0_STL;
1453
1454         } else {
1455                 data = _nbu2ss_readl(&preg->EP_REGS[epnum - 1].EP_CONTROL);
1456                 if ((data & EPn_EN) == 0)
1457                         return -1;
1458
1459                 if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1460                         bit_data = EPn_ISTL;
1461                 else
1462                         bit_data = EPn_OSTL;
1463         }
1464
1465         if ((data & bit_data) == 0)
1466                 return 0;
1467         return 1;
1468 }
1469
1470 /*-------------------------------------------------------------------------*/
1471 static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1472 {
1473         u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1474         u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1475         u16     selector  = udc->ctrl.wValue;
1476         u16     wIndex    = udc->ctrl.wIndex;
1477         u8      ep_adrs;
1478         int     result = -EOPNOTSUPP;
1479
1480         if ((udc->ctrl.wLength != 0x0000) ||
1481             (direction != USB_DIR_OUT)) {
1482                 return -EINVAL;
1483         }
1484
1485         switch (recipient) {
1486         case USB_RECIP_DEVICE:
1487                 if (bset)
1488                         result =
1489                         _nbu2ss_set_feature_device(udc, selector, wIndex);
1490                 break;
1491
1492         case USB_RECIP_ENDPOINT:
1493                 if (0x0000 == (wIndex & 0xFF70)) {
1494                         if (selector == USB_ENDPOINT_HALT) {
1495                                 ep_adrs = wIndex & 0xFF;
1496                                 if (!bset) {
1497                                         _nbu2ss_endpoint_toggle_reset(
1498                                                 udc, ep_adrs);
1499                                 }
1500
1501                                 _nbu2ss_set_endpoint_stall(
1502                                         udc, ep_adrs, bset);
1503
1504                                 result = 0;
1505                         }
1506                 }
1507                 break;
1508
1509         default:
1510                 break;
1511         }
1512
1513         if (result >= 0)
1514                 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1515
1516         return result;
1517 }
1518
1519 /*-------------------------------------------------------------------------*/
1520 static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1521 {
1522         u32             data;
1523         enum usb_device_speed speed = USB_SPEED_FULL;
1524
1525         data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1526         if (data & HIGH_SPEED)
1527                 speed = USB_SPEED_HIGH;
1528
1529         return speed;
1530 }
1531
1532 /*-------------------------------------------------------------------------*/
1533 static void _nbu2ss_epn_set_stall(
1534         struct nbu2ss_udc *udc,
1535         struct nbu2ss_ep *ep
1536 )
1537 {
1538         u8      ep_adrs;
1539         u32     regdata;
1540         int     limit_cnt = 0;
1541
1542         struct fc_regs  *preg = udc->p_regs;
1543
1544         if (ep->direct == USB_DIR_IN) {
1545                 for (limit_cnt = 0
1546                         ; limit_cnt < IN_DATA_EMPTY_COUNT
1547                         ; limit_cnt++) {
1548                         regdata = _nbu2ss_readl(
1549                                 &preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1550
1551                         if ((regdata & EPn_IN_DATA) == 0)
1552                                 break;
1553
1554                         mdelay(1);
1555                 }
1556         }
1557
1558         ep_adrs = ep->epnum | ep->direct;
1559         _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1560 }
1561
1562 /*-------------------------------------------------------------------------*/
1563 static int std_req_get_status(struct nbu2ss_udc *udc)
1564 {
1565         u32     length;
1566         u16     status_data = 0;
1567         u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1568         u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1569         u8      ep_adrs;
1570         int     result = -EINVAL;
1571
1572         if ((udc->ctrl.wValue != 0x0000) || (direction != USB_DIR_IN))
1573                 return result;
1574
1575         length = min_t(u16, udc->ctrl.wLength, sizeof(status_data));
1576
1577         switch (recipient) {
1578         case USB_RECIP_DEVICE:
1579                 if (udc->ctrl.wIndex == 0x0000) {
1580                         if (udc->gadget.is_selfpowered)
1581                                 status_data |= (1 << USB_DEVICE_SELF_POWERED);
1582
1583                         if (udc->remote_wakeup)
1584                                 status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1585
1586                         result = 0;
1587                 }
1588                 break;
1589
1590         case USB_RECIP_ENDPOINT:
1591                 if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
1592                         ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
1593                         result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1594
1595                         if (result > 0)
1596                                 status_data |= (1 << USB_ENDPOINT_HALT);
1597                 }
1598                 break;
1599
1600         default:
1601                 break;
1602         }
1603
1604         if (result >= 0) {
1605                 memcpy(udc->ep0_buf, &status_data, length);
1606                 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1607                 _nbu2ss_ep0_in_transfer(udc, &udc->ep0_req);
1608
1609         } else {
1610                 dev_err(udc->dev, " Error GET_STATUS\n");
1611         }
1612
1613         return result;
1614 }
1615
1616 /*-------------------------------------------------------------------------*/
1617 static int std_req_clear_feature(struct nbu2ss_udc *udc)
1618 {
1619         return _nbu2ss_req_feature(udc, FALSE);
1620 }
1621
1622 /*-------------------------------------------------------------------------*/
1623 static int std_req_set_feature(struct nbu2ss_udc *udc)
1624 {
1625         return _nbu2ss_req_feature(udc, TRUE);
1626 }
1627
1628 /*-------------------------------------------------------------------------*/
1629 static int std_req_set_address(struct nbu2ss_udc *udc)
1630 {
1631         int             result = 0;
1632         u32             wValue = udc->ctrl.wValue;
1633
1634         if ((udc->ctrl.bRequestType != 0x00)    ||
1635             (udc->ctrl.wIndex != 0x0000)        ||
1636                 (udc->ctrl.wLength != 0x0000)) {
1637                 return -EINVAL;
1638         }
1639
1640         if (wValue != (wValue & 0x007F))
1641                 return -EINVAL;
1642
1643         wValue <<= USB_ADRS_SHIFT;
1644
1645         _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1646         _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1647
1648         return result;
1649 }
1650
1651 /*-------------------------------------------------------------------------*/
1652 static int std_req_set_configuration(struct nbu2ss_udc *udc)
1653 {
1654         u32 ConfigValue = (u32)(udc->ctrl.wValue & 0x00ff);
1655
1656         if ((udc->ctrl.wIndex != 0x0000)        ||
1657             (udc->ctrl.wLength != 0x0000)       ||
1658                 (udc->ctrl.bRequestType != 0x00)) {
1659                 return -EINVAL;
1660         }
1661
1662         udc->curr_config = ConfigValue;
1663
1664         if (ConfigValue > 0) {
1665                 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1666                 udc->devstate = USB_STATE_CONFIGURED;
1667
1668         } else {
1669                 _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1670                 udc->devstate = USB_STATE_ADDRESS;
1671         }
1672
1673         return 0;
1674 }
1675
1676 /*-------------------------------------------------------------------------*/
1677 static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1678 {
1679         if ((!udc) && (!pdata))
1680                 return;
1681
1682         *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1683         pdata++;
1684         *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1685 }
1686
1687 /*-------------------------------------------------------------------------*/
1688 static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1689 {
1690         bool                    bcall_back = TRUE;
1691         int                     nret = -EINVAL;
1692         struct usb_ctrlrequest  *p_ctrl;
1693
1694         p_ctrl = &udc->ctrl;
1695         _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1696
1697         /* ep0 state control */
1698         if (p_ctrl->wLength == 0) {
1699                 udc->ep0state = EP0_IN_STATUS_PHASE;
1700
1701         } else {
1702                 if (p_ctrl->bRequestType & USB_DIR_IN)
1703                         udc->ep0state = EP0_IN_DATA_PHASE;
1704                 else
1705                         udc->ep0state = EP0_OUT_DATA_PHASE;
1706         }
1707
1708         if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1709                 switch (p_ctrl->bRequest) {
1710                 case USB_REQ_GET_STATUS:
1711                         nret = std_req_get_status(udc);
1712                         bcall_back = FALSE;
1713                         break;
1714
1715                 case USB_REQ_CLEAR_FEATURE:
1716                         nret = std_req_clear_feature(udc);
1717                         bcall_back = FALSE;
1718                         break;
1719
1720                 case USB_REQ_SET_FEATURE:
1721                         nret = std_req_set_feature(udc);
1722                         bcall_back = FALSE;
1723                         break;
1724
1725                 case USB_REQ_SET_ADDRESS:
1726                         nret = std_req_set_address(udc);
1727                         bcall_back = FALSE;
1728                         break;
1729
1730                 case USB_REQ_SET_CONFIGURATION:
1731                         nret = std_req_set_configuration(udc);
1732                         break;
1733
1734                 default:
1735                         break;
1736                 }
1737         }
1738
1739         if (!bcall_back) {
1740                 if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1741                         if (nret >= 0) {
1742                                 /*--------------------------------------*/
1743                                 /* Status Stage */
1744                                 nret = EP0_send_NULL(udc, TRUE);
1745                         }
1746                 }
1747
1748         } else {
1749                 spin_unlock(&udc->lock);
1750                 nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1751                 spin_lock(&udc->lock);
1752         }
1753
1754         if (nret < 0)
1755                 udc->ep0state = EP0_IDLE;
1756
1757         return nret;
1758 }
1759
1760 /*-------------------------------------------------------------------------*/
1761 static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1762 {
1763         int                     nret;
1764         struct nbu2ss_req       *req;
1765         struct nbu2ss_ep        *ep = &udc->ep[0];
1766
1767         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1768         if (!req)
1769                 req = &udc->ep0_req;
1770
1771         req->req.actual += req->div_len;
1772         req->div_len = 0;
1773
1774         nret = _nbu2ss_ep0_in_transfer(udc, req);
1775         if (nret == 0) {
1776                 udc->ep0state = EP0_OUT_STATUS_PAHSE;
1777                 EP0_receive_NULL(udc, TRUE);
1778         }
1779
1780         return 0;
1781 }
1782
1783 /*-------------------------------------------------------------------------*/
1784 static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1785 {
1786         int                     nret;
1787         struct nbu2ss_req       *req;
1788         struct nbu2ss_ep        *ep = &udc->ep[0];
1789
1790         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1791         if (!req)
1792                 req = &udc->ep0_req;
1793
1794         nret = _nbu2ss_ep0_out_transfer(udc, req);
1795         if (nret == 0) {
1796                 udc->ep0state = EP0_IN_STATUS_PHASE;
1797                 EP0_send_NULL(udc, TRUE);
1798
1799         } else if (nret < 0) {
1800                 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1801                 req->req.status = nret;
1802         }
1803
1804         return 0;
1805 }
1806
1807 /*-------------------------------------------------------------------------*/
1808 static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1809 {
1810         struct nbu2ss_req       *req;
1811         struct nbu2ss_ep        *ep = &udc->ep[0];
1812
1813         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1814         if (!req) {
1815                 req = &udc->ep0_req;
1816                 if (req->req.complete)
1817                         req->req.complete(&ep->ep, &req->req);
1818
1819         } else {
1820                 if (req->req.complete)
1821                         _nbu2ss_ep_done(ep, req, 0);
1822         }
1823
1824         udc->ep0state = EP0_IDLE;
1825
1826         return 0;
1827 }
1828
1829 /*-------------------------------------------------------------------------*/
1830 static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1831 {
1832         int             i;
1833         u32             status;
1834         u32             intr;
1835         int             nret = -1;
1836
1837         status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1838         intr = status & EP0_STATUS_RW_BIT;
1839         _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~intr);
1840
1841         status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1842                         | STG_END_INT | EP0_OUT_NULL_INT);
1843
1844         if (status == 0) {
1845                 dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
1846                 dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
1847                 return;
1848         }
1849
1850         if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1851                 udc->gadget.speed = _nbu2ss_get_speed(udc);
1852
1853         for (i = 0; i < EP0_END_XFER; i++) {
1854                 switch (udc->ep0state) {
1855                 case EP0_IDLE:
1856                         if (status & SETUP_INT) {
1857                                 status = 0;
1858                                 nret = _nbu2ss_decode_request(udc);
1859                         }
1860                         break;
1861
1862                 case EP0_IN_DATA_PHASE:
1863                         if (status & EP0_IN_INT) {
1864                                 status &= ~EP0_IN_INT;
1865                                 nret = _nbu2ss_ep0_in_data_stage(udc);
1866                         }
1867                         break;
1868
1869                 case EP0_OUT_DATA_PHASE:
1870                         if (status & EP0_OUT_INT) {
1871                                 status &= ~EP0_OUT_INT;
1872                                 nret = _nbu2ss_ep0_out_data_stage(udc);
1873                         }
1874                         break;
1875
1876                 case EP0_IN_STATUS_PHASE:
1877                         if ((status & STG_END_INT) || (status & SETUP_INT)) {
1878                                 status &= ~(STG_END_INT | EP0_IN_INT);
1879                                 nret = _nbu2ss_ep0_status_stage(udc);
1880                         }
1881                         break;
1882
1883                 case EP0_OUT_STATUS_PAHSE:
1884                         if ((status & STG_END_INT) || (status & SETUP_INT) ||
1885                             (status & EP0_OUT_NULL_INT)) {
1886                                 status &= ~(STG_END_INT
1887                                                 | EP0_OUT_INT
1888                                                 | EP0_OUT_NULL_INT);
1889
1890                                 nret = _nbu2ss_ep0_status_stage(udc);
1891                         }
1892
1893                         break;
1894
1895                 default:
1896                         status = 0;
1897                         break;
1898                 }
1899
1900                 if (status == 0)
1901                         break;
1902         }
1903
1904         if (nret < 0) {
1905                 /* Send Stall */
1906                 _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
1907         }
1908 }
1909
1910 /*-------------------------------------------------------------------------*/
1911 static void _nbu2ss_ep_done(
1912         struct nbu2ss_ep *ep,
1913         struct nbu2ss_req *req,
1914         int status)
1915 {
1916         struct nbu2ss_udc *udc = ep->udc;
1917
1918         list_del_init(&req->queue);
1919
1920         if (status == -ECONNRESET)
1921                 _nbu2ss_fifo_flush(udc, ep);
1922
1923         if (likely(req->req.status == -EINPROGRESS))
1924                 req->req.status = status;
1925
1926         if (ep->stalled) {
1927                 _nbu2ss_epn_set_stall(udc, ep);
1928         } else {
1929                 if (!list_empty(&ep->queue))
1930                         _nbu2ss_restert_transfer(ep);
1931         }
1932
1933 #ifdef USE_DMA
1934         if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1935             (req->req.dma != 0))
1936                 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1937 #endif
1938
1939         spin_unlock(&udc->lock);
1940         req->req.complete(&ep->ep, &req->req);
1941         spin_lock(&udc->lock);
1942 }
1943
1944 /*-------------------------------------------------------------------------*/
1945 static inline void _nbu2ss_epn_in_int(
1946         struct nbu2ss_udc *udc,
1947         struct nbu2ss_ep *ep,
1948         struct nbu2ss_req *req)
1949 {
1950         int     result = 0;
1951         u32     status;
1952
1953         struct fc_regs  *preg = udc->p_regs;
1954
1955         if (req->dma_flag)
1956                 return;         /* DMA is forwarded */
1957
1958         req->req.actual += req->div_len;
1959         req->div_len = 0;
1960
1961         if (req->req.actual != req->req.length) {
1962                 /*---------------------------------------------------------*/
1963                 /* remainder of data */
1964                 result = _nbu2ss_epn_in_transfer(udc, ep, req);
1965
1966         } else {
1967                 if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
1968                         status =
1969                         _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1970
1971                         if ((status & EPn_IN_FULL) == 0) {
1972                                 /*-----------------------------------------*/
1973                                 /* 0 Length Packet */
1974                                 req->zero = false;
1975                                 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1976                         }
1977                         return;
1978                 }
1979         }
1980
1981         if (result <= 0) {
1982                 /*---------------------------------------------------------*/
1983                 /* Complete */
1984                 _nbu2ss_ep_done(ep, req, result);
1985         }
1986 }
1987
1988 /*-------------------------------------------------------------------------*/
1989 static inline void _nbu2ss_epn_out_int(
1990         struct nbu2ss_udc *udc,
1991         struct nbu2ss_ep *ep,
1992         struct nbu2ss_req *req)
1993 {
1994         int     result;
1995
1996         result = _nbu2ss_epn_out_transfer(udc, ep, req);
1997         if (result <= 0)
1998                 _nbu2ss_ep_done(ep, req, result);
1999 }
2000
2001 /*-------------------------------------------------------------------------*/
2002 static inline void _nbu2ss_epn_in_dma_int(
2003         struct nbu2ss_udc *udc,
2004         struct nbu2ss_ep *ep,
2005         struct nbu2ss_req *req)
2006 {
2007         u32             mpkt;
2008         u32             size;
2009         struct usb_request *preq;
2010
2011         preq = &req->req;
2012
2013         if (!req->dma_flag)
2014                 return;
2015
2016         preq->actual += req->div_len;
2017         req->div_len = 0;
2018         req->dma_flag = FALSE;
2019
2020 #ifdef USE_DMA
2021         _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
2022 #endif
2023
2024         if (preq->actual != preq->length) {
2025                 _nbu2ss_epn_in_transfer(udc, ep, req);
2026         } else {
2027                 mpkt = ep->ep.maxpacket;
2028                 size = preq->actual % mpkt;
2029                 if (size > 0) {
2030                         if (((preq->actual & 0x03) == 0) && (size < mpkt))
2031                                 _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
2032                 } else {
2033                         _nbu2ss_epn_in_int(udc, ep, req);
2034                 }
2035         }
2036 }
2037
2038 /*-------------------------------------------------------------------------*/
2039 static inline void _nbu2ss_epn_out_dma_int(
2040         struct nbu2ss_udc *udc,
2041         struct nbu2ss_ep *ep,
2042         struct nbu2ss_req *req)
2043 {
2044         int             i;
2045         u32             num;
2046         u32             dmacnt, ep_dmacnt;
2047         u32             mpkt;
2048         struct fc_regs  *preg = udc->p_regs;
2049
2050         num = ep->epnum - 1;
2051
2052         if (req->req.actual == req->req.length) {
2053                 if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
2054                         req->div_len = 0;
2055                         req->dma_flag = FALSE;
2056                         _nbu2ss_ep_done(ep, req, 0);
2057                         return;
2058                 }
2059         }
2060
2061         ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
2062                  & EPn_DMACNT;
2063         ep_dmacnt >>= 16;
2064
2065         for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2066                 dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
2067                          & DCR1_EPn_DMACNT;
2068                 dmacnt >>= 16;
2069                 if (ep_dmacnt == dmacnt)
2070                         break;
2071         }
2072
2073         _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_REQEN);
2074
2075         if (dmacnt != 0) {
2076                 mpkt = ep->ep.maxpacket;
2077                 if ((req->div_len % mpkt) == 0)
2078                         req->div_len -= mpkt * dmacnt;
2079         }
2080
2081         if ((req->req.actual % ep->ep.maxpacket) > 0) {
2082                 if (req->req.actual == req->div_len) {
2083                         req->div_len = 0;
2084                         req->dma_flag = FALSE;
2085                         _nbu2ss_ep_done(ep, req, 0);
2086                         return;
2087                 }
2088         }
2089
2090         req->req.actual += req->div_len;
2091         req->div_len = 0;
2092         req->dma_flag = FALSE;
2093
2094         _nbu2ss_epn_out_int(udc, ep, req);
2095 }
2096
2097 /*-------------------------------------------------------------------------*/
2098 static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2099 {
2100         u32     num;
2101         u32     status;
2102
2103         struct nbu2ss_req       *req;
2104         struct nbu2ss_ep        *ep = &udc->ep[epnum];
2105
2106         num = epnum - 1;
2107
2108         /* Interrupt Status */
2109         status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2110
2111         /* Interrupt Clear */
2112         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~status);
2113
2114         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
2115         if (!req) {
2116                 /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2117                 return;
2118         }
2119
2120         if (status & EPn_OUT_END_INT) {
2121                 status &= ~EPn_OUT_INT;
2122                 _nbu2ss_epn_out_dma_int(udc, ep, req);
2123         }
2124
2125         if (status & EPn_OUT_INT)
2126                 _nbu2ss_epn_out_int(udc, ep, req);
2127
2128         if (status & EPn_IN_END_INT) {
2129                 status &= ~EPn_IN_INT;
2130                 _nbu2ss_epn_in_dma_int(udc, ep, req);
2131         }
2132
2133         if (status & EPn_IN_INT)
2134                 _nbu2ss_epn_in_int(udc, ep, req);
2135 }
2136
2137 /*-------------------------------------------------------------------------*/
2138 static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2139 {
2140         if (epnum == 0)
2141                 _nbu2ss_ep0_int(udc);
2142         else
2143                 _nbu2ss_epn_int(udc, epnum);
2144 }
2145
2146 /*-------------------------------------------------------------------------*/
2147 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2148 {
2149         _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2150         _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2151 }
2152
2153 /*-------------------------------------------------------------------------*/
2154 static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2155                         struct nbu2ss_ep *ep,
2156                         int status)
2157 {
2158         struct nbu2ss_req *req;
2159
2160         /* Endpoint Disable */
2161         _nbu2ss_epn_exit(udc, ep);
2162
2163         /* DMA Disable */
2164         _nbu2ss_ep_dma_exit(udc, ep);
2165
2166         if (list_empty(&ep->queue))
2167                 return 0;
2168
2169         /* called with irqs blocked */
2170         list_for_each_entry(req, &ep->queue, queue) {
2171                 _nbu2ss_ep_done(ep, req, status);
2172         }
2173
2174         return 0;
2175 }
2176
2177 /*-------------------------------------------------------------------------*/
2178 static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2179 {
2180         struct nbu2ss_ep        *ep;
2181
2182         udc->gadget.speed = USB_SPEED_UNKNOWN;
2183
2184         _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2185
2186         /* Endpoint n */
2187         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2188                 _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2189         }
2190 }
2191
2192 /*-------------------------------------------------------------------------*/
2193 static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2194 {
2195         u32     reg_dt;
2196
2197         if (udc->vbus_active == 0)
2198                 return -ESHUTDOWN;
2199
2200         if (is_on) {
2201                 /* D+ Pullup */
2202                 if (udc->driver) {
2203                         reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2204                                 | PUE2) & ~(u32)CONNECTB;
2205
2206                         _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2207                 }
2208
2209         } else {
2210                 /* D+ Pulldown */
2211                 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2212                         & ~(u32)PUE2;
2213
2214                 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2215                 udc->gadget.speed = USB_SPEED_UNKNOWN;
2216         }
2217
2218         return 0;
2219 }
2220
2221 /*-------------------------------------------------------------------------*/
2222 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2223 {
2224         struct fc_regs  *p = udc->p_regs;
2225
2226         if (udc->vbus_active == 0)
2227                 return;
2228
2229         if (ep->epnum == 0) {
2230                 /* EP0 */
2231                 _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2232
2233         } else {
2234                 /* EPn */
2235                 _nbu2ss_ep_dma_abort(udc, ep);
2236                 _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPn_BCLR);
2237         }
2238 }
2239
2240 /*-------------------------------------------------------------------------*/
2241 static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2242 {
2243         int     waitcnt = 0;
2244
2245         if (udc->udc_enabled)
2246                 return 0;
2247
2248         /* Reset */
2249         _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2250         udelay(EPC_RST_DISABLE_TIME);   /* 1us wait */
2251
2252         _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2253         mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2254
2255         _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2256
2257         _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2258
2259                 _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2260                                HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2261
2262         while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2263                 waitcnt++;
2264                 udelay(1);      /* 1us wait */
2265                 if (waitcnt == EPC_PLL_LOCK_COUNT) {
2266                         dev_err(udc->dev, "*** Reset Cancel failed\n");
2267                         return -EINVAL;
2268                 }
2269         }
2270
2271                 _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2272
2273         _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2274
2275         /* EP0 */
2276         _nbu2ss_ep0_enable(udc);
2277
2278         /* USB Interrupt Enable */
2279         _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2280
2281         udc->udc_enabled = TRUE;
2282
2283         return 0;
2284 }
2285
2286 /*-------------------------------------------------------------------------*/
2287 static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2288 {
2289         _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2290         _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2291 }
2292
2293 /*-------------------------------------------------------------------------*/
2294 static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2295 {
2296         if (udc->udc_enabled) {
2297                 udc->udc_enabled = FALSE;
2298                 _nbu2ss_reset_controller(udc);
2299                 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2300         }
2301 }
2302
2303 /*-------------------------------------------------------------------------*/
2304 static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2305 {
2306         int     nret;
2307         u32     reg_dt;
2308
2309         /* chattering */
2310         mdelay(VBUS_CHATTERING_MDELAY);         /* wait (ms) */
2311
2312         /* VBUS ON Check*/
2313         reg_dt = gpio_get_value(VBUS_VALUE);
2314         if (reg_dt == 0) {
2315                 udc->linux_suspended = 0;
2316
2317                 _nbu2ss_reset_controller(udc);
2318                 dev_info(udc->dev, " ----- VBUS OFF\n");
2319
2320                 if (udc->vbus_active == 1) {
2321                         /* VBUS OFF */
2322                         udc->vbus_active = 0;
2323                         if (udc->usb_suspended) {
2324                                 udc->usb_suspended = 0;
2325                                 /* _nbu2ss_reset_controller(udc); */
2326                         }
2327                         udc->devstate = USB_STATE_NOTATTACHED;
2328
2329                         _nbu2ss_quiesce(udc);
2330                         if (udc->driver) {
2331                                 spin_unlock(&udc->lock);
2332                                 udc->driver->disconnect(&udc->gadget);
2333                                 spin_lock(&udc->lock);
2334                         }
2335
2336                         _nbu2ss_disable_controller(udc);
2337                 }
2338         } else {
2339                 mdelay(5);              /* wait (5ms) */
2340                 reg_dt = gpio_get_value(VBUS_VALUE);
2341                 if (reg_dt == 0)
2342                         return;
2343
2344                 dev_info(udc->dev, " ----- VBUS ON\n");
2345
2346                 if (udc->linux_suspended)
2347                         return;
2348
2349                 if (udc->vbus_active == 0) {
2350                         /* VBUS ON */
2351                         udc->vbus_active = 1;
2352                         udc->devstate = USB_STATE_POWERED;
2353
2354                         nret = _nbu2ss_enable_controller(udc);
2355                         if (nret < 0) {
2356                                 _nbu2ss_disable_controller(udc);
2357                                 udc->vbus_active = 0;
2358                                 return;
2359                         }
2360
2361                         _nbu2ss_pullup(udc, 1);
2362
2363 #ifdef UDC_DEBUG_DUMP
2364                         _nbu2ss_dump_register(udc);
2365 #endif /* UDC_DEBUG_DUMP */
2366
2367                 } else {
2368                         if (udc->devstate == USB_STATE_POWERED)
2369                                 _nbu2ss_pullup(udc, 1);
2370                 }
2371         }
2372 }
2373
2374 /*-------------------------------------------------------------------------*/
2375 static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2376 {
2377         udc->devstate           = USB_STATE_DEFAULT;
2378         udc->remote_wakeup      = 0;
2379
2380         _nbu2ss_quiesce(udc);
2381
2382         udc->ep0state = EP0_IDLE;
2383 }
2384
2385 /*-------------------------------------------------------------------------*/
2386 static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2387 {
2388         if (udc->usb_suspended == 1) {
2389                 udc->usb_suspended = 0;
2390                 if (udc->driver && udc->driver->resume) {
2391                         spin_unlock(&udc->lock);
2392                         udc->driver->resume(&udc->gadget);
2393                         spin_lock(&udc->lock);
2394                 }
2395         }
2396 }
2397
2398 /*-------------------------------------------------------------------------*/
2399 static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2400 {
2401         u32     reg_dt;
2402
2403         if (udc->usb_suspended == 0) {
2404                 reg_dt = gpio_get_value(VBUS_VALUE);
2405
2406                 if (reg_dt == 0)
2407                         return;
2408
2409                 udc->usb_suspended = 1;
2410                 if (udc->driver && udc->driver->suspend) {
2411                         spin_unlock(&udc->lock);
2412                         udc->driver->suspend(&udc->gadget);
2413                         spin_lock(&udc->lock);
2414                 }
2415
2416                 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2417         }
2418 }
2419
2420 /*-------------------------------------------------------------------------*/
2421 /* VBUS (GPIO153) Interrupt */
2422 static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2423 {
2424         struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2425
2426         spin_lock(&udc->lock);
2427         _nbu2ss_check_vbus(udc);
2428         spin_unlock(&udc->lock);
2429
2430         return IRQ_HANDLED;
2431 }
2432
2433 /*-------------------------------------------------------------------------*/
2434 /* Interrupt (udc) */
2435 static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2436 {
2437         u8      suspend_flag = 0;
2438         u32     status;
2439         u32     epnum, int_bit;
2440
2441         struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2442         struct fc_regs  *preg = udc->p_regs;
2443
2444         if (gpio_get_value(VBUS_VALUE) == 0) {
2445                 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2446                 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2447                 return IRQ_HANDLED;
2448         }
2449
2450         spin_lock(&udc->lock);
2451
2452         for (;;) {
2453                 if (gpio_get_value(VBUS_VALUE) == 0) {
2454                         _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2455                         _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2456                         status = 0;
2457                 } else {
2458                         status = _nbu2ss_readl(&preg->USB_INT_STA);
2459                 }
2460
2461                 if (status == 0)
2462                         break;
2463
2464                 _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2465
2466                 if (status & USB_RST_INT) {
2467                         /* USB Reset */
2468                         _nbu2ss_int_bus_reset(udc);
2469                 }
2470
2471                 if (status & RSUM_INT) {
2472                         /* Resume */
2473                         _nbu2ss_int_usb_resume(udc);
2474                 }
2475
2476                 if (status & SPND_INT) {
2477                         /* Suspend */
2478                         suspend_flag = 1;
2479                 }
2480
2481                 if (status & EPn_INT) {
2482                         /* EP INT */
2483                         int_bit = status >> 8;
2484
2485                         for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2486                                 if (0x01 & int_bit)
2487                                         _nbu2ss_ep_int(udc, epnum);
2488
2489                                 int_bit >>= 1;
2490
2491                                 if (int_bit == 0)
2492                                         break;
2493                         }
2494                 }
2495         }
2496
2497         if (suspend_flag)
2498                 _nbu2ss_int_usb_suspend(udc);
2499
2500         spin_unlock(&udc->lock);
2501
2502         return IRQ_HANDLED;
2503 }
2504
2505 /*-------------------------------------------------------------------------*/
2506 /* usb_ep_ops */
2507 static int nbu2ss_ep_enable(
2508         struct usb_ep *_ep,
2509         const struct usb_endpoint_descriptor *desc)
2510 {
2511         u8              ep_type;
2512         unsigned long   flags;
2513
2514         struct nbu2ss_ep        *ep;
2515         struct nbu2ss_udc       *udc;
2516
2517         if ((!_ep) || (!desc)) {
2518                 pr_err(" *** %s, bad param\n", __func__);
2519                 return -EINVAL;
2520         }
2521
2522         ep = container_of(_ep, struct nbu2ss_ep, ep);
2523         if ((!ep) || (!ep->udc)) {
2524                 pr_err(" *** %s, ep == NULL !!\n", __func__);
2525                 return -EINVAL;
2526         }
2527
2528         ep_type = usb_endpoint_type(desc);
2529         if ((ep_type == USB_ENDPOINT_XFER_CONTROL) ||
2530             (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2531                 pr_err(" *** %s, bat bmAttributes\n", __func__);
2532                 return -EINVAL;
2533         }
2534
2535         udc = ep->udc;
2536         if (udc->vbus_active == 0)
2537                 return -ESHUTDOWN;
2538
2539         if ((!udc->driver) || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2540                 dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
2541                 return -ESHUTDOWN;
2542         }
2543
2544         spin_lock_irqsave(&udc->lock, flags);
2545
2546         ep->desc = desc;
2547         ep->epnum = usb_endpoint_num(desc);
2548         ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2549         ep->ep_type = ep_type;
2550         ep->wedged = 0;
2551         ep->halted = FALSE;
2552         ep->stalled = FALSE;
2553
2554         ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2555
2556         /* DMA setting */
2557         _nbu2ss_ep_dma_init(udc, ep);
2558
2559         /* Endpoint setting */
2560         _nbu2ss_ep_init(udc, ep);
2561
2562         spin_unlock_irqrestore(&udc->lock, flags);
2563
2564         return 0;
2565 }
2566
2567 /*-------------------------------------------------------------------------*/
2568 static int nbu2ss_ep_disable(struct usb_ep *_ep)
2569 {
2570         struct nbu2ss_ep        *ep;
2571         struct nbu2ss_udc       *udc;
2572         unsigned long           flags;
2573
2574         if (!_ep) {
2575                 pr_err(" *** %s, bad param\n", __func__);
2576                 return -EINVAL;
2577         }
2578
2579         ep = container_of(_ep, struct nbu2ss_ep, ep);
2580         if ((!ep) || (!ep->udc)) {
2581                 pr_err("udc: *** %s, ep == NULL !!\n", __func__);
2582                 return -EINVAL;
2583         }
2584
2585         udc = ep->udc;
2586         if (udc->vbus_active == 0)
2587                 return -ESHUTDOWN;
2588
2589         spin_lock_irqsave(&udc->lock, flags);
2590         _nbu2ss_nuke(udc, ep, -EINPROGRESS);            /* dequeue request */
2591         spin_unlock_irqrestore(&udc->lock, flags);
2592
2593         return 0;
2594 }
2595
2596 /*-------------------------------------------------------------------------*/
2597 static struct usb_request *nbu2ss_ep_alloc_request(
2598         struct usb_ep *ep,
2599         gfp_t gfp_flags)
2600 {
2601         struct nbu2ss_req *req;
2602
2603         req = kzalloc(sizeof(*req), gfp_flags);
2604         if (!req)
2605                 return NULL;
2606
2607 #ifdef USE_DMA
2608         req->req.dma = DMA_ADDR_INVALID;
2609 #endif
2610         INIT_LIST_HEAD(&req->queue);
2611
2612         return &req->req;
2613 }
2614
2615 /*-------------------------------------------------------------------------*/
2616 static void nbu2ss_ep_free_request(
2617         struct usb_ep *_ep,
2618         struct usb_request *_req)
2619 {
2620         struct nbu2ss_req *req;
2621
2622         if (_req) {
2623                 req = container_of(_req, struct nbu2ss_req, req);
2624
2625                 kfree(req);
2626         }
2627 }
2628
2629 /*-------------------------------------------------------------------------*/
2630 static int nbu2ss_ep_queue(
2631         struct usb_ep *_ep,
2632         struct usb_request *_req,
2633         gfp_t gfp_flags)
2634 {
2635         struct nbu2ss_req       *req;
2636         struct nbu2ss_ep        *ep;
2637         struct nbu2ss_udc       *udc;
2638         unsigned long           flags;
2639         bool                    bflag;
2640         int                     result = -EINVAL;
2641
2642         /* catch various bogus parameters */
2643         if ((!_ep) || (!_req)) {
2644                 if (!_ep)
2645                         pr_err("udc: %s --- _ep == NULL\n", __func__);
2646
2647                 if (!_req)
2648                         pr_err("udc: %s --- _req == NULL\n", __func__);
2649
2650                 return -EINVAL;
2651         }
2652
2653         req = container_of(_req, struct nbu2ss_req, req);
2654         if (unlikely(!_req->complete || !_req->buf || !list_empty(&req->queue))) {
2655                 if (!_req->complete)
2656                         pr_err("udc: %s --- !_req->complete\n", __func__);
2657
2658                 if (!_req->buf)
2659                         pr_err("udc:%s --- !_req->buf\n", __func__);
2660
2661                 if (!list_empty(&req->queue))
2662                         pr_err("%s --- !list_empty(&req->queue)\n", __func__);
2663
2664                 return -EINVAL;
2665         }
2666
2667         ep = container_of(_ep, struct nbu2ss_ep, ep);
2668         udc = ep->udc;
2669
2670         if (udc->vbus_active == 0) {
2671                 dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
2672                 return -ESHUTDOWN;
2673         }
2674
2675         if (unlikely(!udc->driver)) {
2676                 dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
2677                         udc->driver);
2678                 return -ESHUTDOWN;
2679         }
2680
2681         spin_lock_irqsave(&udc->lock, flags);
2682
2683 #ifdef USE_DMA
2684         if ((uintptr_t)req->req.buf & 0x3)
2685                 req->unaligned = TRUE;
2686         else
2687                 req->unaligned = FALSE;
2688
2689         if (req->unaligned) {
2690                 if (!ep->virt_buf)
2691                         ep->virt_buf = (u8 *)dma_alloc_coherent(
2692                                 NULL, PAGE_SIZE,
2693                                 &ep->phys_buf, GFP_ATOMIC | GFP_DMA);
2694                 if (ep->epnum > 0)  {
2695                         if (ep->direct == USB_DIR_IN)
2696                                 memcpy(ep->virt_buf, req->req.buf,
2697                                        req->req.length);
2698                 }
2699         }
2700
2701         if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2702             (req->req.dma != 0))
2703                 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2704 #endif
2705
2706         _req->status = -EINPROGRESS;
2707         _req->actual = 0;
2708
2709         bflag = list_empty(&ep->queue);
2710         list_add_tail(&req->queue, &ep->queue);
2711
2712         if (bflag && !ep->stalled) {
2713                 result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
2714                 if (result < 0) {
2715                         dev_err(udc->dev, " *** %s, result = %d\n", __func__,
2716                                 result);
2717                         list_del(&req->queue);
2718                 } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2719 #ifdef USE_DMA
2720                         if (req->req.length < 4 &&
2721                             req->req.length == req->req.actual)
2722 #else
2723                         if (req->req.length == req->req.actual)
2724 #endif
2725                                 _nbu2ss_ep_done(ep, req, result);
2726                 }
2727         }
2728
2729         spin_unlock_irqrestore(&udc->lock, flags);
2730
2731         return 0;
2732 }
2733
2734 /*-------------------------------------------------------------------------*/
2735 static int nbu2ss_ep_dequeue(
2736         struct usb_ep *_ep,
2737         struct usb_request *_req)
2738 {
2739         struct nbu2ss_req       *req;
2740         struct nbu2ss_ep        *ep;
2741         struct nbu2ss_udc       *udc;
2742         unsigned long flags;
2743
2744         /* catch various bogus parameters */
2745         if ((!_ep) || (!_req)) {
2746                 /* pr_err("%s, bad param(1)\n", __func__); */
2747                 return -EINVAL;
2748         }
2749
2750         ep = container_of(_ep, struct nbu2ss_ep, ep);
2751         if (!ep) {
2752                 pr_err("%s, ep == NULL !!\n", __func__);
2753                 return -EINVAL;
2754         }
2755
2756         udc = ep->udc;
2757         if (!udc)
2758                 return -EINVAL;
2759
2760         spin_lock_irqsave(&udc->lock, flags);
2761
2762         /* make sure it's actually queued on this endpoint */
2763         list_for_each_entry(req, &ep->queue, queue) {
2764                 if (&req->req == _req)
2765                         break;
2766         }
2767         if (&req->req != _req) {
2768                 spin_unlock_irqrestore(&udc->lock, flags);
2769                 pr_debug("%s no queue(EINVAL)\n", __func__);
2770                 return -EINVAL;
2771         }
2772
2773         _nbu2ss_ep_done(ep, req, -ECONNRESET);
2774
2775         spin_unlock_irqrestore(&udc->lock, flags);
2776
2777         return 0;
2778 }
2779
2780 /*-------------------------------------------------------------------------*/
2781 static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2782 {
2783         u8              ep_adrs;
2784         unsigned long   flags;
2785
2786         struct nbu2ss_ep        *ep;
2787         struct nbu2ss_udc       *udc;
2788
2789         if (!_ep) {
2790                 pr_err("%s, bad param\n", __func__);
2791                 return -EINVAL;
2792         }
2793
2794         ep = container_of(_ep, struct nbu2ss_ep, ep);
2795         if (!ep) {
2796                 pr_err("%s, bad ep\n", __func__);
2797                 return -EINVAL;
2798         }
2799
2800         udc = ep->udc;
2801         if (!udc) {
2802                 dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
2803                 return -EINVAL;
2804         }
2805
2806         spin_lock_irqsave(&udc->lock, flags);
2807
2808         ep_adrs = ep->epnum | ep->direct;
2809         if (value == 0) {
2810                 _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2811                 ep->stalled = FALSE;
2812         } else {
2813                 if (list_empty(&ep->queue))
2814                         _nbu2ss_epn_set_stall(udc, ep);
2815                 else
2816                         ep->stalled = TRUE;
2817         }
2818
2819         if (value == 0)
2820                 ep->wedged = 0;
2821
2822         spin_unlock_irqrestore(&udc->lock, flags);
2823
2824         return 0;
2825 }
2826
2827 static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2828 {
2829         return nbu2ss_ep_set_halt(_ep, 1);
2830 }
2831
2832 /*-------------------------------------------------------------------------*/
2833 static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2834 {
2835         u32             data;
2836         struct nbu2ss_ep        *ep;
2837         struct nbu2ss_udc       *udc;
2838         unsigned long           flags;
2839         struct fc_regs          *preg;
2840
2841         if (!_ep) {
2842                 pr_err("%s, bad param\n", __func__);
2843                 return -EINVAL;
2844         }
2845
2846         ep = container_of(_ep, struct nbu2ss_ep, ep);
2847         if (!ep) {
2848                 pr_err("%s, bad ep\n", __func__);
2849                 return -EINVAL;
2850         }
2851
2852         udc = ep->udc;
2853         if (!udc) {
2854                 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2855                 return -EINVAL;
2856         }
2857
2858         preg = udc->p_regs;
2859
2860         data = gpio_get_value(VBUS_VALUE);
2861         if (data == 0)
2862                 return -EINVAL;
2863
2864         spin_lock_irqsave(&udc->lock, flags);
2865
2866         if (ep->epnum == 0) {
2867                 data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2868
2869         } else {
2870                 data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_LEN_DCNT)
2871                         & EPn_LDATA;
2872         }
2873
2874         spin_unlock_irqrestore(&udc->lock, flags);
2875
2876         return 0;
2877 }
2878
2879 /*-------------------------------------------------------------------------*/
2880 static void  nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2881 {
2882         u32                     data;
2883         struct nbu2ss_ep        *ep;
2884         struct nbu2ss_udc       *udc;
2885         unsigned long           flags;
2886
2887         if (!_ep) {
2888                 pr_err("udc: %s, bad param\n", __func__);
2889                 return;
2890         }
2891
2892         ep = container_of(_ep, struct nbu2ss_ep, ep);
2893         if (!ep) {
2894                 pr_err("udc: %s, bad ep\n", __func__);
2895                 return;
2896         }
2897
2898         udc = ep->udc;
2899         if (!udc) {
2900                 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2901                 return;
2902         }
2903
2904         data = gpio_get_value(VBUS_VALUE);
2905         if (data == 0)
2906                 return;
2907
2908         spin_lock_irqsave(&udc->lock, flags);
2909         _nbu2ss_fifo_flush(udc, ep);
2910         spin_unlock_irqrestore(&udc->lock, flags);
2911 }
2912
2913 /*-------------------------------------------------------------------------*/
2914 static const struct usb_ep_ops nbu2ss_ep_ops = {
2915         .enable         = nbu2ss_ep_enable,
2916         .disable        = nbu2ss_ep_disable,
2917
2918         .alloc_request  = nbu2ss_ep_alloc_request,
2919         .free_request   = nbu2ss_ep_free_request,
2920
2921         .queue          = nbu2ss_ep_queue,
2922         .dequeue        = nbu2ss_ep_dequeue,
2923
2924         .set_halt       = nbu2ss_ep_set_halt,
2925         .set_wedge      = nbu2ss_ep_set_wedge,
2926
2927         .fifo_status    = nbu2ss_ep_fifo_status,
2928         .fifo_flush     = nbu2ss_ep_fifo_flush,
2929 };
2930
2931 /*-------------------------------------------------------------------------*/
2932 /* usb_gadget_ops */
2933
2934 /*-------------------------------------------------------------------------*/
2935 static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
2936 {
2937         u32                     data;
2938         struct nbu2ss_udc       *udc;
2939
2940         if (!pgadget) {
2941                 pr_err("udc: %s, bad param\n", __func__);
2942                 return -EINVAL;
2943         }
2944
2945         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2946         if (!udc) {
2947                 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2948                 return -EINVAL;
2949         }
2950
2951         data = gpio_get_value(VBUS_VALUE);
2952         if (data == 0)
2953                 return -EINVAL;
2954
2955         return _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
2956 }
2957
2958 /*-------------------------------------------------------------------------*/
2959 static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
2960 {
2961         int     i;
2962         u32     data;
2963
2964         struct nbu2ss_udc       *udc;
2965
2966         if (!pgadget) {
2967                 pr_err("%s, bad param\n", __func__);
2968                 return -EINVAL;
2969         }
2970
2971         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2972         if (!udc) {
2973                 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2974                 return -EINVAL;
2975         }
2976
2977         data = gpio_get_value(VBUS_VALUE);
2978         if (data == 0) {
2979                 dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
2980                 return -EINVAL;
2981         }
2982
2983         _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
2984
2985         for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2986                 data = _nbu2ss_readl(&udc->p_regs->EPCTR);
2987
2988                 if (data & PLL_LOCK)
2989                         break;
2990         }
2991
2992         _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
2993
2994         return 0;
2995 }
2996
2997 /*-------------------------------------------------------------------------*/
2998 static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
2999                                       int is_selfpowered)
3000 {
3001         struct nbu2ss_udc       *udc;
3002         unsigned long           flags;
3003
3004         if (!pgadget) {
3005                 pr_err("%s, bad param\n", __func__);
3006                 return -EINVAL;
3007         }
3008
3009         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3010
3011         spin_lock_irqsave(&udc->lock, flags);
3012         pgadget->is_selfpowered = (is_selfpowered != 0);
3013         spin_unlock_irqrestore(&udc->lock, flags);
3014
3015         return 0;
3016 }
3017
3018 /*-------------------------------------------------------------------------*/
3019 static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
3020 {
3021         return 0;
3022 }
3023
3024 /*-------------------------------------------------------------------------*/
3025 static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned int mA)
3026 {
3027         struct nbu2ss_udc       *udc;
3028         unsigned long           flags;
3029
3030         if (!pgadget) {
3031                 pr_err("%s, bad param\n", __func__);
3032                 return -EINVAL;
3033         }
3034
3035         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3036
3037         spin_lock_irqsave(&udc->lock, flags);
3038         udc->mA = mA;
3039         spin_unlock_irqrestore(&udc->lock, flags);
3040
3041         return 0;
3042 }
3043
3044 /*-------------------------------------------------------------------------*/
3045 static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
3046 {
3047         struct nbu2ss_udc       *udc;
3048         unsigned long           flags;
3049
3050         if (!pgadget) {
3051                 pr_err("%s, bad param\n", __func__);
3052                 return -EINVAL;
3053         }
3054
3055         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3056
3057         if (!udc->driver) {
3058                 pr_warn("%s, Not Regist Driver\n", __func__);
3059                 return -EINVAL;
3060         }
3061
3062         if (udc->vbus_active == 0)
3063                 return -ESHUTDOWN;
3064
3065         spin_lock_irqsave(&udc->lock, flags);
3066         _nbu2ss_pullup(udc, is_on);
3067         spin_unlock_irqrestore(&udc->lock, flags);
3068
3069         return 0;
3070 }
3071
3072 /*-------------------------------------------------------------------------*/
3073 static int nbu2ss_gad_ioctl(
3074         struct usb_gadget *pgadget,
3075         unsigned int code,
3076         unsigned long param)
3077 {
3078         return 0;
3079 }
3080
3081 static const struct usb_gadget_ops nbu2ss_gadget_ops = {
3082         .get_frame              = nbu2ss_gad_get_frame,
3083         .wakeup                 = nbu2ss_gad_wakeup,
3084         .set_selfpowered        = nbu2ss_gad_set_selfpowered,
3085         .vbus_session           = nbu2ss_gad_vbus_session,
3086         .vbus_draw              = nbu2ss_gad_vbus_draw,
3087         .pullup                 = nbu2ss_gad_pullup,
3088         .ioctl                  = nbu2ss_gad_ioctl,
3089 };
3090
3091 static const struct {
3092         const char *name;
3093         const struct usb_ep_caps caps;
3094 } ep_info[NUM_ENDPOINTS] = {
3095 #define EP_INFO(_name, _caps) \
3096         { \
3097                 .name = _name, \
3098                 .caps = _caps, \
3099         }
3100
3101         EP_INFO("ep0",
3102                 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
3103         EP_INFO("ep1-bulk",
3104                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3105         EP_INFO("ep2-bulk",
3106                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3107         EP_INFO("ep3in-int",
3108                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3109         EP_INFO("ep4-iso",
3110                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3111         EP_INFO("ep5-iso",
3112                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3113         EP_INFO("ep6-bulk",
3114                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3115         EP_INFO("ep7-bulk",
3116                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3117         EP_INFO("ep8in-int",
3118                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3119         EP_INFO("ep9-iso",
3120                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3121         EP_INFO("epa-iso",
3122                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3123         EP_INFO("epb-bulk",
3124                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3125         EP_INFO("epc-bulk",
3126                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3127         EP_INFO("epdin-int",
3128                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3129
3130 #undef EP_INFO
3131 };
3132
3133 /*-------------------------------------------------------------------------*/
3134 static void nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3135 {
3136         int     i;
3137
3138         INIT_LIST_HEAD(&udc->gadget.ep_list);
3139         udc->gadget.ep0 = &udc->ep[0].ep;
3140
3141         for (i = 0; i < NUM_ENDPOINTS; i++) {
3142                 struct nbu2ss_ep *ep = &udc->ep[i];
3143
3144                 ep->udc = udc;
3145                 ep->desc = NULL;
3146
3147                 ep->ep.driver_data = NULL;
3148                 ep->ep.name = ep_info[i].name;
3149                 ep->ep.caps = ep_info[i].caps;
3150                 ep->ep.ops = &nbu2ss_ep_ops;
3151
3152                 usb_ep_set_maxpacket_limit(&ep->ep,
3153                                            i == 0 ? EP0_PACKETSIZE
3154                                            : EP_PACKETSIZE);
3155
3156                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3157                 INIT_LIST_HEAD(&ep->queue);
3158         }
3159
3160         list_del_init(&udc->ep[0].ep.ep_list);
3161 }
3162
3163 /*-------------------------------------------------------------------------*/
3164 /* platform_driver */
3165 static int nbu2ss_drv_contest_init(
3166         struct platform_device *pdev,
3167         struct nbu2ss_udc *udc)
3168 {
3169         spin_lock_init(&udc->lock);
3170         udc->dev = &pdev->dev;
3171
3172         udc->gadget.is_selfpowered = 1;
3173         udc->devstate = USB_STATE_NOTATTACHED;
3174         udc->pdev = pdev;
3175         udc->mA = 0;
3176
3177         udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3178
3179         /* init Endpoint */
3180         nbu2ss_drv_ep_init(udc);
3181
3182         /* init Gadget */
3183         udc->gadget.ops = &nbu2ss_gadget_ops;
3184         udc->gadget.ep0 = &udc->ep[0].ep;
3185         udc->gadget.speed = USB_SPEED_UNKNOWN;
3186         udc->gadget.name = driver_name;
3187         /* udc->gadget.is_dualspeed = 1; */
3188
3189         device_initialize(&udc->gadget.dev);
3190
3191         dev_set_name(&udc->gadget.dev, "gadget");
3192         udc->gadget.dev.parent = &pdev->dev;
3193         udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3194
3195         return 0;
3196 }
3197
3198 /*
3199  *      probe - binds to the platform device
3200  */
3201 static int nbu2ss_drv_probe(struct platform_device *pdev)
3202 {
3203         int     status = -ENODEV;
3204         struct nbu2ss_udc       *udc;
3205         struct resource *r;
3206         int irq;
3207         void __iomem *mmio_base;
3208
3209         udc = &udc_controller;
3210         memset(udc, 0, sizeof(struct nbu2ss_udc));
3211
3212         platform_set_drvdata(pdev, udc);
3213
3214         /* require I/O memory and IRQ to be provided as resources */
3215         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3216         mmio_base = devm_ioremap_resource(&pdev->dev, r);
3217         if (IS_ERR(mmio_base))
3218                 return PTR_ERR(mmio_base);
3219
3220         irq = platform_get_irq(pdev, 0);
3221         if (irq < 0) {
3222                 dev_err(&pdev->dev, "failed to get IRQ\n");
3223                 return irq;
3224         }
3225         status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3226                                   0, driver_name, udc);
3227
3228         /* IO Memory */
3229         udc->p_regs = (struct fc_regs *)mmio_base;
3230
3231         /* USB Function Controller Interrupt */
3232         if (status != 0) {
3233                 dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
3234                 return status;
3235         }
3236
3237         /* Driver Initialization */
3238         status = nbu2ss_drv_contest_init(pdev, udc);
3239         if (status < 0) {
3240                 /* Error */
3241                 return status;
3242         }
3243
3244         /* VBUS Interrupt */
3245         irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
3246         status = request_irq(INT_VBUS,
3247                              _nbu2ss_vbus_irq, IRQF_SHARED, driver_name, udc);
3248
3249         if (status != 0) {
3250                 dev_err(udc->dev, "request_irq(INT_VBUS) failed\n");
3251                 return status;
3252         }
3253
3254         return status;
3255 }
3256
3257 /*-------------------------------------------------------------------------*/
3258 static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3259 {
3260         struct nbu2ss_udc       *udc;
3261
3262         udc = platform_get_drvdata(pdev);
3263         if (!udc)
3264                 return;
3265
3266         _nbu2ss_disable_controller(udc);
3267 }
3268
3269 /*-------------------------------------------------------------------------*/
3270 static int nbu2ss_drv_remove(struct platform_device *pdev)
3271 {
3272         struct nbu2ss_udc       *udc;
3273         struct nbu2ss_ep        *ep;
3274         int     i;
3275
3276         udc = &udc_controller;
3277
3278         for (i = 0; i < NUM_ENDPOINTS; i++) {
3279                 ep = &udc->ep[i];
3280                 if (ep->virt_buf)
3281                         dma_free_coherent(NULL, PAGE_SIZE, (void *)ep->virt_buf,
3282                                           ep->phys_buf);
3283         }
3284
3285         /* Interrupt Handler - Release */
3286         free_irq(INT_VBUS, udc);
3287
3288         return 0;
3289 }
3290
3291 /*-------------------------------------------------------------------------*/
3292 static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3293 {
3294         struct nbu2ss_udc       *udc;
3295
3296         udc = platform_get_drvdata(pdev);
3297         if (!udc)
3298                 return 0;
3299
3300         if (udc->vbus_active) {
3301                 udc->vbus_active = 0;
3302                 udc->devstate = USB_STATE_NOTATTACHED;
3303                 udc->linux_suspended = 1;
3304
3305                 if (udc->usb_suspended) {
3306                         udc->usb_suspended = 0;
3307                         _nbu2ss_reset_controller(udc);
3308                 }
3309
3310                 _nbu2ss_quiesce(udc);
3311         }
3312         _nbu2ss_disable_controller(udc);
3313
3314         return 0;
3315 }
3316
3317 /*-------------------------------------------------------------------------*/
3318 static int nbu2ss_drv_resume(struct platform_device *pdev)
3319 {
3320         u32     data;
3321         struct nbu2ss_udc       *udc;
3322
3323         udc = platform_get_drvdata(pdev);
3324         if (!udc)
3325                 return 0;
3326
3327         data = gpio_get_value(VBUS_VALUE);
3328         if (data) {
3329                 udc->vbus_active = 1;
3330                 udc->devstate = USB_STATE_POWERED;
3331                 _nbu2ss_enable_controller(udc);
3332                 _nbu2ss_pullup(udc, 1);
3333         }
3334
3335         udc->linux_suspended = 0;
3336
3337         return 0;
3338 }
3339
3340 static struct platform_driver udc_driver = {
3341         .probe          = nbu2ss_drv_probe,
3342         .shutdown       = nbu2ss_drv_shutdown,
3343         .remove         = nbu2ss_drv_remove,
3344         .suspend        = nbu2ss_drv_suspend,
3345         .resume         = nbu2ss_drv_resume,
3346         .driver         = {
3347                 .name   = driver_name,
3348         },
3349 };
3350
3351 module_platform_driver(udc_driver);
3352
3353 MODULE_DESCRIPTION(DRIVER_DESC);
3354 MODULE_AUTHOR("Renesas Electronics Corporation");
3355 MODULE_LICENSE("GPL");