2 * drivers/usb/gadget/emxx_udc.c
3 * EMXX FCD (Function Controller Driver) for USB.
5 * Copyright (C) 2010 Renesas Electronics Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2
9 * as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/delay.h>
21 #include <linux/ioport.h>
22 #include <linux/slab.h>
23 #include <linux/errno.h>
24 #include <linux/list.h>
25 #include <linux/interrupt.h>
26 #include <linux/proc_fs.h>
27 #include <linux/clk.h>
28 #include <linux/ctype.h>
29 #include <linux/string.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/workqueue.h>
32 #include <linux/device.h>
34 #include <linux/usb/ch9.h>
35 #include <linux/usb/gadget.h>
37 #include <linux/irq.h>
38 #include <linux/gpio.h>
42 #define DRIVER_DESC "EMXX UDC driver"
43 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
45 static const char driver_name[] = "emxx_udc";
46 static const char driver_desc[] = DRIVER_DESC;
48 /*===========================================================================*/
50 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
51 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
52 /*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
53 static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
54 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
55 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
57 static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
58 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
60 /*===========================================================================*/
62 #define _nbu2ss_zero_len_pkt(udc, epnum) \
63 _nbu2ss_ep_in_end(udc, epnum, 0, 0)
65 /*===========================================================================*/
67 struct nbu2ss_udc udc_controller;
69 /*-------------------------------------------------------------------------*/
71 static inline u32 _nbu2ss_readl(void *address)
73 return __raw_readl(address);
76 /*-------------------------------------------------------------------------*/
78 static inline void _nbu2ss_writel(void *address, u32 udata)
80 __raw_writel(udata, address);
83 /*-------------------------------------------------------------------------*/
85 static inline void _nbu2ss_bitset(void *address, u32 udata)
87 u32 reg_dt = __raw_readl(address) | (udata);
89 __raw_writel(reg_dt, address);
92 /*-------------------------------------------------------------------------*/
94 static inline void _nbu2ss_bitclr(void *address, u32 udata)
96 u32 reg_dt = __raw_readl(address) & ~(udata);
98 __raw_writel(reg_dt, address);
101 #ifdef UDC_DEBUG_DUMP
102 /*-------------------------------------------------------------------------*/
103 static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
108 pr_info("=== %s()\n", __func__);
111 pr_err("%s udc == NULL\n", __func__);
115 spin_unlock(&udc->lock);
117 dev_dbg(&udc->dev, "\n-USB REG-\n");
118 for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
119 reg_data = _nbu2ss_readl(
120 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
121 dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
123 reg_data = _nbu2ss_readl(
124 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
125 dev_dbg(&udc->dev, " %08x", (int)reg_data);
127 reg_data = _nbu2ss_readl(
128 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
129 dev_dbg(&udc->dev, " %08x", (int)reg_data);
131 reg_data = _nbu2ss_readl(
132 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
133 dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
137 spin_lock(&udc->lock);
139 #endif /* UDC_DEBUG_DUMP */
141 /*-------------------------------------------------------------------------*/
142 /* Endpoint 0 Callback (Complete) */
143 static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
148 struct usb_ctrlrequest *p_ctrl;
149 struct nbu2ss_udc *udc;
151 if ((!_ep) || (!_req))
154 udc = (struct nbu2ss_udc *)_req->context;
156 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
158 if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
159 /*-------------------------------------------------*/
161 recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
162 selector = p_ctrl->wValue;
163 if ((recipient == USB_RECIP_DEVICE) &&
164 (selector == USB_DEVICE_TEST_MODE)) {
165 test_mode = (u32)(p_ctrl->wIndex >> 8);
166 _nbu2ss_set_test_mode(udc, test_mode);
172 /*-------------------------------------------------------------------------*/
173 /* Initialization usb_request */
174 static void _nbu2ss_create_ep0_packet(
175 struct nbu2ss_udc *udc,
180 udc->ep0_req.req.buf = p_buf;
181 udc->ep0_req.req.length = length;
182 udc->ep0_req.req.dma = 0;
183 udc->ep0_req.req.zero = TRUE;
184 udc->ep0_req.req.complete = _nbu2ss_ep0_complete;
185 udc->ep0_req.req.status = -EINPROGRESS;
186 udc->ep0_req.req.context = udc;
187 udc->ep0_req.req.actual = 0;
190 /*-------------------------------------------------------------------------*/
191 /* Acquisition of the first address of RAM(FIFO) */
192 static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
195 u32 data, last_ram_adr, use_ram_size;
197 struct ep_regs *p_ep_regs;
199 last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
202 for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
203 p_ep_regs = &udc->p_regs->EP_REGS[num];
204 data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
205 buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPn_BUF_TYPE;
208 use_ram_size += (data & EPn_MPKT) / sizeof(u32);
211 use_ram_size += ((data & EPn_MPKT) / sizeof(u32)) * 2;
214 if ((data >> 16) > last_ram_adr)
215 last_ram_adr = data >> 16;
218 return last_ram_adr + use_ram_size;
221 /*-------------------------------------------------------------------------*/
222 /* Construction of Endpoint */
223 static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
234 /*-------------------------------------------------------------*/
235 /* RAM Transfer Address */
236 begin_adrs = _nbu2ss_get_begin_ram_address(udc);
237 data = (begin_adrs << 16) | ep->ep.maxpacket;
238 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
240 /*-------------------------------------------------------------*/
241 /* Interrupt Enable */
242 data = 1 << (ep->epnum + 8);
243 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
245 /*-------------------------------------------------------------*/
246 /* Endpoint Type(Mode) */
247 /* Bulk, Interrupt, ISO */
248 switch (ep->ep_type) {
249 case USB_ENDPOINT_XFER_BULK:
253 case USB_ENDPOINT_XFER_INT:
254 data = EPn_BUF_SINGLE | EPn_INTERRUPT;
257 case USB_ENDPOINT_XFER_ISOC:
266 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
267 _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum|ep->direct));
269 if (ep->direct == USB_DIR_OUT) {
270 /*---------------------------------------------------------*/
272 data = EPn_EN | EPn_BCLR | EPn_DIR0;
273 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
275 data = EPn_ONAK | EPn_OSTL_EN | EPn_OSTL;
276 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
278 data = EPn_OUT_EN | EPn_OUT_END_EN;
279 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
281 /*---------------------------------------------------------*/
283 data = EPn_EN | EPn_BCLR | EPn_AUTO;
284 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
287 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
289 data = EPn_IN_EN | EPn_IN_END_EN;
290 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
296 /*-------------------------------------------------------------------------*/
297 /* Release of Endpoint */
298 static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
303 if ((ep->epnum == 0) || (udc->vbus_active == 0))
308 /*-------------------------------------------------------------*/
309 /* RAM Transfer Address */
310 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
312 /*-------------------------------------------------------------*/
313 /* Interrupt Disable */
314 data = 1 << (ep->epnum + 8);
315 _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
317 if (ep->direct == USB_DIR_OUT) {
318 /*---------------------------------------------------------*/
320 data = EPn_ONAK | EPn_BCLR;
321 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
323 data = EPn_EN | EPn_DIR0;
324 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
326 data = EPn_OUT_EN | EPn_OUT_END_EN;
327 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
329 /*---------------------------------------------------------*/
332 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
334 data = EPn_EN | EPn_AUTO;
335 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
337 data = EPn_IN_EN | EPn_IN_END_EN;
338 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
344 /*-------------------------------------------------------------------------*/
345 /* DMA setting (without Endpoint 0) */
346 static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
351 data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
352 if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
353 return; /* Not Support DMA */
357 if (ep->direct == USB_DIR_OUT) {
358 /*---------------------------------------------------------*/
360 data = ep->ep.maxpacket;
361 _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
363 /*---------------------------------------------------------*/
364 /* Transfer Direct */
365 data = DCR1_EPn_DIR0;
366 _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
368 /*---------------------------------------------------------*/
370 data = EPn_STOP_MODE | EPn_STOP_SET | EPn_DMAMODE0;
371 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
373 /*---------------------------------------------------------*/
375 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPn_AUTO);
377 /*---------------------------------------------------------*/
379 data = EPn_BURST_SET | EPn_DMAMODE0;
380 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
384 /*-------------------------------------------------------------------------*/
385 /* DMA setting release */
386 static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
390 struct fc_regs *preg = udc->p_regs;
392 if (udc->vbus_active == 0)
393 return; /* VBUS OFF */
395 data = _nbu2ss_readl(&preg->USBSSCONF);
396 if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
397 return; /* Not Support DMA */
401 _nbu2ss_ep_dma_abort(udc, ep);
403 if (ep->direct == USB_DIR_OUT) {
404 /*---------------------------------------------------------*/
406 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
407 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_DIR0);
408 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
410 /*---------------------------------------------------------*/
412 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
413 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
417 /*-------------------------------------------------------------------------*/
419 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
421 struct fc_regs *preg = udc->p_regs;
423 _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum - 1].EP_DCR1, DCR1_EPn_REQEN);
424 mdelay(DMA_DISABLE_TIME); /* DCR1_EPn_REQEN Clear */
425 _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum - 1].EP_DMA_CTRL, EPn_DMA_EN);
428 /*-------------------------------------------------------------------------*/
429 /* Start IN Transfer */
430 static void _nbu2ss_ep_in_end(
431 struct nbu2ss_udc *udc,
439 struct fc_regs *preg = udc->p_regs;
441 if (length >= sizeof(u32))
445 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
447 /* Writing of 1-4 bytes */
449 _nbu2ss_writel(&preg->EP0_WRITE, data32);
451 data = ((length << 5) & EP0_DW) | EP0_DEND;
452 _nbu2ss_writel(&preg->EP0_CONTROL, data);
454 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
458 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
460 /* Writing of 1-4 bytes */
462 _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
464 data = ((((u32)length) << 5) & EPn_DW) | EPn_DEND;
465 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
467 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
472 /*-------------------------------------------------------------------------*/
473 static void _nbu2ss_dma_map_single(
474 struct nbu2ss_udc *udc,
475 struct nbu2ss_ep *ep,
476 struct nbu2ss_req *req,
480 if (req->req.dma == DMA_ADDR_INVALID) {
482 req->req.dma = ep->phys_buf;
484 req->req.dma = dma_map_single(
485 udc->gadget.dev.parent,
488 (direct == USB_DIR_IN)
489 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
494 dma_sync_single_for_device(
495 udc->gadget.dev.parent,
498 (direct == USB_DIR_IN)
499 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
505 /*-------------------------------------------------------------------------*/
506 static void _nbu2ss_dma_unmap_single(
507 struct nbu2ss_udc *udc,
508 struct nbu2ss_ep *ep,
509 struct nbu2ss_req *req,
517 if (direct == USB_DIR_OUT) {
518 count = req->req.actual % 4;
521 p += (req->req.actual - count);
522 memcpy(data, p, count);
527 if (req->unaligned) {
528 if (direct == USB_DIR_OUT)
529 memcpy(req->req.buf, ep->virt_buf,
530 req->req.actual & 0xfffffffc);
532 dma_unmap_single(udc->gadget.dev.parent,
533 req->req.dma, req->req.length,
534 (direct == USB_DIR_IN)
537 req->req.dma = DMA_ADDR_INVALID;
541 dma_sync_single_for_cpu(udc->gadget.dev.parent,
542 req->req.dma, req->req.length,
543 (direct == USB_DIR_IN)
550 p += (req->req.actual - count);
551 memcpy(p, data, count);
556 /*-------------------------------------------------------------------------*/
557 /* Endpoint 0 OUT Transfer (PIO) */
558 static int EP0_out_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
563 union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
565 /*------------------------------------------------------------*/
567 iWordLength = length / sizeof(u32);
569 /*------------------------------------------------------------*/
572 for (i = 0; i < iWordLength; i++) {
573 pBuf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
576 nret = iWordLength * sizeof(u32);
582 /*-------------------------------------------------------------------------*/
583 /* Endpoint 0 OUT Transfer (PIO, OverBytes) */
584 static int EP0_out_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
588 union usb_reg_access Temp32;
589 union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
591 if ((length > 0) && (length < sizeof(u32))) {
592 Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
593 for (i = 0 ; i < length ; i++)
594 pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
601 /*-------------------------------------------------------------------------*/
602 /* Endpoint 0 IN Transfer (PIO) */
603 static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
606 u32 iMaxLength = EP0_PACKETSIZE;
608 u32 iWriteLength = 0;
609 union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
611 /*------------------------------------------------------------*/
612 /* Transfer Length */
613 if (iMaxLength < length)
614 iWordLength = iMaxLength / sizeof(u32);
616 iWordLength = length / sizeof(u32);
618 /*------------------------------------------------------------*/
620 for (i = 0; i < iWordLength; i++) {
621 _nbu2ss_writel(&udc->p_regs->EP0_WRITE, pBuf32->dw);
623 iWriteLength += sizeof(u32);
629 /*-------------------------------------------------------------------------*/
630 /* Endpoint 0 IN Transfer (PIO, OverBytes) */
631 static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
634 union usb_reg_access Temp32;
635 union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
637 if ((iRemainSize > 0) && (iRemainSize < sizeof(u32))) {
638 for (i = 0 ; i < iRemainSize ; i++)
639 Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
640 _nbu2ss_ep_in_end(udc, 0, Temp32.dw, iRemainSize);
648 /*-------------------------------------------------------------------------*/
649 /* Transfer NULL Packet (Epndoint 0) */
650 static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
654 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
655 data &= ~(u32)EP0_INAK;
658 data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
660 data |= (EP0_INAK_EN | EP0_DEND);
662 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
667 /*-------------------------------------------------------------------------*/
668 /* Receive NULL Packet (Endpoint 0) */
669 static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
673 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
674 data &= ~(u32)EP0_ONAK;
679 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
684 /*-------------------------------------------------------------------------*/
685 static int _nbu2ss_ep0_in_transfer(
686 struct nbu2ss_udc *udc,
687 struct nbu2ss_req *req
690 u8 *pBuffer; /* IN Data Buffer */
695 /*-------------------------------------------------------------*/
696 /* End confirmation */
697 if (req->req.actual == req->req.length) {
698 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
701 EP0_send_NULL(udc, FALSE);
706 return 0; /* Transfer End */
709 /*-------------------------------------------------------------*/
711 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
713 data &= ~(u32)EP0_INAK;
714 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
716 iRemainSize = req->req.length - req->req.actual;
717 pBuffer = (u8 *)req->req.buf;
718 pBuffer += req->req.actual;
720 /*-------------------------------------------------------------*/
722 result = EP0_in_PIO(udc, pBuffer, iRemainSize);
724 req->div_len = result;
725 iRemainSize -= result;
727 if (iRemainSize == 0) {
728 EP0_send_NULL(udc, FALSE);
732 if ((iRemainSize < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
734 result += EP0_in_OverBytes(udc, pBuffer, iRemainSize);
735 req->div_len = result;
741 /*-------------------------------------------------------------------------*/
742 static int _nbu2ss_ep0_out_transfer(
743 struct nbu2ss_udc *udc,
744 struct nbu2ss_req *req
753 /*-------------------------------------------------------------*/
754 /* Receive data confirmation */
755 iRecvLength = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
756 if (iRecvLength != 0) {
760 iRemainSize = req->req.length - req->req.actual;
761 pBuffer = (u8 *)req->req.buf;
762 pBuffer += req->req.actual;
764 result = EP0_out_PIO(udc, pBuffer
765 , min(iRemainSize, iRecvLength));
769 req->req.actual += result;
770 iRecvLength -= result;
772 if ((iRecvLength > 0) && (iRecvLength < sizeof(u32))) {
774 iRemainSize -= result;
776 result = EP0_out_OverBytes(udc, pBuffer
777 , min(iRemainSize, iRecvLength));
778 req->req.actual += result;
784 /*-------------------------------------------------------------*/
785 /* End confirmation */
786 if (req->req.actual == req->req.length) {
787 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
790 EP0_receive_NULL(udc, FALSE);
795 return 0; /* Transfer End */
798 if ((req->req.actual % EP0_PACKETSIZE) != 0)
799 return 0; /* Short Packet Transfer End */
801 if (req->req.actual > req->req.length) {
802 dev_err(udc->dev, " *** Overrun Error\n");
807 iRemainSize = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
808 if (iRemainSize & EP0_ONAK) {
809 /*---------------------------------------------------*/
811 _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
819 /*-------------------------------------------------------------------------*/
820 static int _nbu2ss_out_dma(
821 struct nbu2ss_udc *udc,
822 struct nbu2ss_req *req,
833 int result = -EINVAL;
834 struct fc_regs *preg = udc->p_regs;
837 return 1; /* DMA is forwarded */
839 req->dma_flag = TRUE;
840 pBuffer = req->req.dma;
841 pBuffer += req->req.actual;
844 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
846 /* Number of transfer packets */
847 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
848 dmacnt = length / mpkt;
849 lmpkt = (length % mpkt) & ~(u32)0x03;
851 if (dmacnt > DMA_MAX_COUNT) {
852 dmacnt = DMA_MAX_COUNT;
854 } else if (lmpkt != 0) {
856 burst = 0; /* Burst OFF */
860 data = mpkt | (lmpkt << 16);
861 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
863 data = ((dmacnt & 0xff) << 16) | DCR1_EPn_DIR0 | DCR1_EPn_REQEN;
864 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
867 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
868 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
870 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
872 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
874 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
876 result = length & ~(u32)0x03;
877 req->div_len = result;
882 /*-------------------------------------------------------------------------*/
883 static int _nbu2ss_epn_out_pio(
884 struct nbu2ss_udc *udc,
885 struct nbu2ss_ep *ep,
886 struct nbu2ss_req *req,
894 union usb_reg_access Temp32;
895 union usb_reg_access *pBuf32;
897 struct fc_regs *preg = udc->p_regs;
900 return 1; /* DMA is forwarded */
905 pBuffer = (u8 *)req->req.buf;
906 pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
908 iWordLength = length / sizeof(u32);
909 if (iWordLength > 0) {
910 /*---------------------------------------------------------*/
911 /* Copy of every four bytes */
912 for (i = 0; i < iWordLength; i++) {
914 _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
917 result = iWordLength * sizeof(u32);
920 data = length - result;
922 /*---------------------------------------------------------*/
923 /* Copy of fraction byte */
924 Temp32.dw = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
925 for (i = 0 ; i < data ; i++)
926 pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
930 req->req.actual += result;
932 if ((req->req.actual == req->req.length)
933 || ((req->req.actual % ep->ep.maxpacket) != 0)) {
941 /*-------------------------------------------------------------------------*/
942 static int _nbu2ss_epn_out_data(
943 struct nbu2ss_udc *udc,
944 struct nbu2ss_ep *ep,
945 struct nbu2ss_req *req,
958 iBufSize = min((req->req.length - req->req.actual), data_size);
960 if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
961 && (req->req.dma != 0)
962 && (iBufSize >= sizeof(u32))) {
963 nret = _nbu2ss_out_dma(udc, req, num, iBufSize);
965 iBufSize = min_t(u32, iBufSize, ep->ep.maxpacket);
966 nret = _nbu2ss_epn_out_pio(udc, ep, req, iBufSize);
972 /*-------------------------------------------------------------------------*/
973 static int _nbu2ss_epn_out_transfer(
974 struct nbu2ss_udc *udc,
975 struct nbu2ss_ep *ep,
976 struct nbu2ss_req *req
982 struct fc_regs *preg = udc->p_regs;
989 /*-------------------------------------------------------------*/
992 = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPn_LDATA;
994 if (iRecvLength != 0) {
995 result = _nbu2ss_epn_out_data(udc, ep, req, iRecvLength);
996 if (iRecvLength < ep->ep.maxpacket) {
997 if (iRecvLength == result) {
998 req->req.actual += result;
1003 if ((req->req.actual == req->req.length)
1004 || ((req->req.actual % ep->ep.maxpacket) != 0)) {
1011 if ((req->req.actual % ep->ep.maxpacket) == 0) {
1019 if (req->req.actual > req->req.length) {
1020 dev_err(udc->dev, " Overrun Error\n");
1021 dev_err(udc->dev, " actual = %d, length = %d\n",
1022 req->req.actual, req->req.length);
1023 result = -EOVERFLOW;
1029 /*-------------------------------------------------------------------------*/
1030 static int _nbu2ss_in_dma(
1031 struct nbu2ss_udc *udc,
1032 struct nbu2ss_ep *ep,
1033 struct nbu2ss_req *req,
1039 u32 mpkt; /* MaxPacketSize */
1040 u32 lmpkt; /* Last Packet Data Size */
1041 u32 dmacnt; /* IN Data Size */
1044 int result = -EINVAL;
1045 struct fc_regs *preg = udc->p_regs;
1048 return 1; /* DMA is forwarded */
1051 if (req->req.actual == 0)
1052 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1054 req->dma_flag = TRUE;
1056 /* MAX Packet Size */
1057 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
1059 if ((DMA_MAX_COUNT * mpkt) < length)
1060 iWriteLength = DMA_MAX_COUNT * mpkt;
1062 iWriteLength = length;
1064 /*------------------------------------------------------------*/
1065 /* Number of transmission packets */
1066 if (mpkt < iWriteLength) {
1067 dmacnt = iWriteLength / mpkt;
1068 lmpkt = (iWriteLength % mpkt) & ~(u32)0x3;
1072 lmpkt = mpkt & ~(u32)0x3;
1076 lmpkt = iWriteLength & ~(u32)0x3;
1079 /* Packet setting */
1080 data = mpkt | (lmpkt << 16);
1081 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1083 /* Address setting */
1084 pBuffer = req->req.dma;
1085 pBuffer += req->req.actual;
1086 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
1088 /* Packet and DMA setting */
1089 data = ((dmacnt & 0xff) << 16) | DCR1_EPn_REQEN;
1090 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1092 /* Packet setting of EPC */
1093 data = dmacnt << 16;
1094 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1096 /*DMA setting of EPC */
1097 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
1099 result = iWriteLength & ~(u32)0x3;
1100 req->div_len = result;
1105 /*-------------------------------------------------------------------------*/
1106 static int _nbu2ss_epn_in_pio(
1107 struct nbu2ss_udc *udc,
1108 struct nbu2ss_ep *ep,
1109 struct nbu2ss_req *req,
1117 union usb_reg_access Temp32;
1118 union usb_reg_access *pBuf32 = NULL;
1120 struct fc_regs *preg = udc->p_regs;
1123 return 1; /* DMA is forwarded */
1126 pBuffer = (u8 *)req->req.buf;
1127 pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
1129 iWordLength = length / sizeof(u32);
1130 if (iWordLength > 0) {
1131 for (i = 0; i < iWordLength; i++) {
1133 &preg->EP_REGS[ep->epnum - 1].EP_WRITE
1139 result = iWordLength * sizeof(u32);
1143 if (result != ep->ep.maxpacket) {
1144 data = length - result;
1146 for (i = 0 ; i < data ; i++)
1147 Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
1149 _nbu2ss_ep_in_end(udc, ep->epnum, Temp32.dw, data);
1153 req->div_len = result;
1158 /*-------------------------------------------------------------------------*/
1159 static int _nbu2ss_epn_in_data(
1160 struct nbu2ss_udc *udc,
1161 struct nbu2ss_ep *ep,
1162 struct nbu2ss_req *req,
1172 num = ep->epnum - 1;
1174 if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
1175 && (req->req.dma != 0)
1176 && (data_size >= sizeof(u32))) {
1177 nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1179 data_size = min_t(u32, data_size, ep->ep.maxpacket);
1180 nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1186 /*-------------------------------------------------------------------------*/
1187 static int _nbu2ss_epn_in_transfer(
1188 struct nbu2ss_udc *udc,
1189 struct nbu2ss_ep *ep,
1190 struct nbu2ss_req *req
1201 num = ep->epnum - 1;
1203 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1205 /*-------------------------------------------------------------*/
1206 /* State confirmation of FIFO */
1207 if (req->req.actual == 0) {
1208 if ((status & EPn_IN_EMPTY) == 0)
1209 return 1; /* Not Empty */
1212 if ((status & EPn_IN_FULL) != 0)
1213 return 1; /* Not Empty */
1216 /*-------------------------------------------------------------*/
1217 /* Start transfer */
1218 iBufSize = req->req.length - req->req.actual;
1220 result = _nbu2ss_epn_in_data(udc, ep, req, iBufSize);
1221 else if (req->req.length == 0)
1222 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1227 /*-------------------------------------------------------------------------*/
1228 static int _nbu2ss_start_transfer(
1229 struct nbu2ss_udc *udc,
1230 struct nbu2ss_ep *ep,
1231 struct nbu2ss_req *req,
1236 req->dma_flag = FALSE;
1239 if (req->req.length == 0)
1242 if ((req->req.length % ep->ep.maxpacket) == 0)
1243 req->zero = req->req.zero;
1248 if (ep->epnum == 0) {
1250 switch (udc->ep0state) {
1251 case EP0_IN_DATA_PHASE:
1252 nret = _nbu2ss_ep0_in_transfer(udc, req);
1255 case EP0_OUT_DATA_PHASE:
1256 nret = _nbu2ss_ep0_out_transfer(udc, req);
1259 case EP0_IN_STATUS_PHASE:
1260 nret = EP0_send_NULL(udc, TRUE);
1269 if (ep->direct == USB_DIR_OUT) {
1272 nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1275 nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1282 /*-------------------------------------------------------------------------*/
1283 static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1287 struct nbu2ss_req *req;
1289 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1293 if (ep->epnum > 0) {
1294 length = _nbu2ss_readl(
1295 &ep->udc->p_regs->EP_REGS[ep->epnum - 1].EP_LEN_DCNT);
1297 length &= EPn_LDATA;
1298 if (length < ep->ep.maxpacket)
1302 _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1305 /*-------------------------------------------------------------------------*/
1306 /* Endpoint Toggle Reset */
1307 static void _nbu2ss_endpoint_toggle_reset(
1308 struct nbu2ss_udc *udc,
1314 if ((ep_adrs == 0) || (ep_adrs == 0x80))
1317 num = (ep_adrs & 0x7F) - 1;
1319 if (ep_adrs & USB_DIR_IN)
1322 data = EPn_BCLR | EPn_OPIDCLR;
1324 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1327 /*-------------------------------------------------------------------------*/
1328 /* Endpoint STALL set */
1329 static void _nbu2ss_set_endpoint_stall(
1330 struct nbu2ss_udc *udc,
1336 struct nbu2ss_ep *ep;
1337 struct fc_regs *preg = udc->p_regs;
1339 if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1342 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1345 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1348 epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1350 ep = &udc->ep[epnum];
1356 if (ep_adrs & USB_DIR_IN)
1357 data = EPn_BCLR | EPn_ISTL;
1359 data = EPn_OSTL_EN | EPn_OSTL;
1361 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1364 ep->stalled = FALSE;
1365 if (ep_adrs & USB_DIR_IN) {
1366 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1370 _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1373 data |= EPn_OSTL_EN;
1375 _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1379 ep->stalled = FALSE;
1382 _nbu2ss_restert_transfer(ep);
1388 /*-------------------------------------------------------------------------*/
1389 /* Device Descriptor */
1390 static struct usb_device_descriptor device_desc = {
1391 .bLength = sizeof(device_desc),
1392 .bDescriptorType = USB_DT_DEVICE,
1393 .bcdUSB = cpu_to_le16(0x0200),
1394 .bDeviceClass = USB_CLASS_VENDOR_SPEC,
1395 .bDeviceSubClass = 0x00,
1396 .bDeviceProtocol = 0x00,
1397 .bMaxPacketSize0 = 64,
1398 .idVendor = cpu_to_le16(0x0409),
1399 .idProduct = cpu_to_le16(0xfff0),
1400 .bcdDevice = 0xffff,
1401 .iManufacturer = 0x00,
1403 .iSerialNumber = 0x00,
1404 .bNumConfigurations = 0x01,
1407 /*-------------------------------------------------------------------------*/
1408 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1412 if (mode > MAX_TEST_MODE_NUM)
1415 dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
1417 data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1418 data &= ~TEST_FORCE_ENABLE;
1419 data |= mode << TEST_MODE_SHIFT;
1421 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1422 _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1425 /*-------------------------------------------------------------------------*/
1426 static int _nbu2ss_set_feature_device(
1427 struct nbu2ss_udc *udc,
1432 int result = -EOPNOTSUPP;
1435 case USB_DEVICE_REMOTE_WAKEUP:
1436 if (wIndex == 0x0000) {
1437 udc->remote_wakeup = U2F_ENABLE;
1442 case USB_DEVICE_TEST_MODE:
1444 if (wIndex <= MAX_TEST_MODE_NUM)
1455 /*-------------------------------------------------------------------------*/
1456 static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1459 u32 data = 0, bit_data;
1460 struct fc_regs *preg = udc->p_regs;
1462 epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1464 data = _nbu2ss_readl(&preg->EP0_CONTROL);
1468 data = _nbu2ss_readl(&preg->EP_REGS[epnum - 1].EP_CONTROL);
1469 if ((data & EPn_EN) == 0)
1472 if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1473 bit_data = EPn_ISTL;
1475 bit_data = EPn_OSTL;
1478 if ((data & bit_data) == 0)
1483 /*-------------------------------------------------------------------------*/
1484 static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1486 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1487 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1488 u16 selector = udc->ctrl.wValue;
1489 u16 wIndex = udc->ctrl.wIndex;
1491 int result = -EOPNOTSUPP;
1493 if ((udc->ctrl.wLength != 0x0000) ||
1494 (direction != USB_DIR_OUT)) {
1498 switch (recipient) {
1499 case USB_RECIP_DEVICE:
1502 _nbu2ss_set_feature_device(udc, selector, wIndex);
1505 case USB_RECIP_ENDPOINT:
1506 if (0x0000 == (wIndex & 0xFF70)) {
1507 if (selector == USB_ENDPOINT_HALT) {
1508 ep_adrs = wIndex & 0xFF;
1510 _nbu2ss_endpoint_toggle_reset(
1514 _nbu2ss_set_endpoint_stall(
1515 udc, ep_adrs, bset);
1527 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1532 /*-------------------------------------------------------------------------*/
1533 static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1536 enum usb_device_speed speed = USB_SPEED_FULL;
1538 data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1539 if (data & HIGH_SPEED)
1540 speed = USB_SPEED_HIGH;
1545 /*-------------------------------------------------------------------------*/
1546 static void _nbu2ss_epn_set_stall(
1547 struct nbu2ss_udc *udc,
1548 struct nbu2ss_ep *ep
1555 struct fc_regs *preg = udc->p_regs;
1557 if (ep->direct == USB_DIR_IN) {
1559 ; limit_cnt < IN_DATA_EMPTY_COUNT
1562 regdata = _nbu2ss_readl(
1563 &preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1565 if ((regdata & EPn_IN_DATA) == 0)
1572 ep_adrs = ep->epnum | ep->direct;
1573 _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1576 /*-------------------------------------------------------------------------*/
1577 static int std_req_get_status(struct nbu2ss_udc *udc)
1580 u16 status_data = 0;
1581 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1582 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1584 int result = -EINVAL;
1586 if ((udc->ctrl.wValue != 0x0000)
1587 || (direction != USB_DIR_IN)) {
1592 length = min_t(u16, udc->ctrl.wLength, sizeof(status_data));
1594 switch (recipient) {
1595 case USB_RECIP_DEVICE:
1596 if (udc->ctrl.wIndex == 0x0000) {
1597 if (udc->gadget.is_selfpowered)
1598 status_data |= (1 << USB_DEVICE_SELF_POWERED);
1600 if (udc->remote_wakeup)
1601 status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1607 case USB_RECIP_ENDPOINT:
1608 if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
1609 ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
1610 result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1613 status_data |= (1 << USB_ENDPOINT_HALT);
1622 memcpy(udc->ep0_buf, &status_data, length);
1623 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1624 _nbu2ss_ep0_in_transfer(udc, &udc->ep0_req);
1627 dev_err(udc->dev, " Error GET_STATUS\n");
1633 /*-------------------------------------------------------------------------*/
1634 static int std_req_clear_feature(struct nbu2ss_udc *udc)
1636 return _nbu2ss_req_feature(udc, FALSE);
1639 /*-------------------------------------------------------------------------*/
1640 static int std_req_set_feature(struct nbu2ss_udc *udc)
1642 return _nbu2ss_req_feature(udc, TRUE);
1645 /*-------------------------------------------------------------------------*/
1646 static int std_req_set_address(struct nbu2ss_udc *udc)
1649 u32 wValue = udc->ctrl.wValue;
1651 if ((udc->ctrl.bRequestType != 0x00) ||
1652 (udc->ctrl.wIndex != 0x0000) ||
1653 (udc->ctrl.wLength != 0x0000)) {
1657 if (wValue != (wValue & 0x007F))
1660 wValue <<= USB_ADRS_SHIFT;
1662 _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1663 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1668 /*-------------------------------------------------------------------------*/
1669 static int std_req_set_configuration(struct nbu2ss_udc *udc)
1671 u32 ConfigValue = (u32)(udc->ctrl.wValue & 0x00ff);
1673 if ((udc->ctrl.wIndex != 0x0000) ||
1674 (udc->ctrl.wLength != 0x0000) ||
1675 (udc->ctrl.bRequestType != 0x00)) {
1679 udc->curr_config = ConfigValue;
1681 if (ConfigValue > 0) {
1682 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1683 udc->devstate = USB_STATE_CONFIGURED;
1686 _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1687 udc->devstate = USB_STATE_ADDRESS;
1693 /*-------------------------------------------------------------------------*/
1694 static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1696 if ((!udc) && (!pdata))
1699 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1701 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1704 /*-------------------------------------------------------------------------*/
1705 static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1707 bool bcall_back = TRUE;
1709 struct usb_ctrlrequest *p_ctrl;
1711 p_ctrl = &udc->ctrl;
1712 _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1714 /* ep0 state control */
1715 if (p_ctrl->wLength == 0) {
1716 udc->ep0state = EP0_IN_STATUS_PHASE;
1719 if (p_ctrl->bRequestType & USB_DIR_IN)
1720 udc->ep0state = EP0_IN_DATA_PHASE;
1722 udc->ep0state = EP0_OUT_DATA_PHASE;
1725 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1726 switch (p_ctrl->bRequest) {
1727 case USB_REQ_GET_STATUS:
1728 nret = std_req_get_status(udc);
1732 case USB_REQ_CLEAR_FEATURE:
1733 nret = std_req_clear_feature(udc);
1737 case USB_REQ_SET_FEATURE:
1738 nret = std_req_set_feature(udc);
1742 case USB_REQ_SET_ADDRESS:
1743 nret = std_req_set_address(udc);
1747 case USB_REQ_SET_CONFIGURATION:
1748 nret = std_req_set_configuration(udc);
1757 if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1759 /*--------------------------------------*/
1761 nret = EP0_send_NULL(udc, TRUE);
1766 spin_unlock(&udc->lock);
1767 nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1768 spin_lock(&udc->lock);
1772 udc->ep0state = EP0_IDLE;
1777 /*-------------------------------------------------------------------------*/
1778 static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1781 struct nbu2ss_req *req;
1782 struct nbu2ss_ep *ep = &udc->ep[0];
1784 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1786 req = &udc->ep0_req;
1788 req->req.actual += req->div_len;
1791 nret = _nbu2ss_ep0_in_transfer(udc, req);
1793 udc->ep0state = EP0_OUT_STATUS_PAHSE;
1794 EP0_receive_NULL(udc, TRUE);
1800 /*-------------------------------------------------------------------------*/
1801 static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1804 struct nbu2ss_req *req;
1805 struct nbu2ss_ep *ep = &udc->ep[0];
1807 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1809 req = &udc->ep0_req;
1811 nret = _nbu2ss_ep0_out_transfer(udc, req);
1813 udc->ep0state = EP0_IN_STATUS_PHASE;
1814 EP0_send_NULL(udc, TRUE);
1816 } else if (nret < 0) {
1817 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1818 req->req.status = nret;
1824 /*-------------------------------------------------------------------------*/
1825 static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1827 struct nbu2ss_req *req;
1828 struct nbu2ss_ep *ep = &udc->ep[0];
1830 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1832 req = &udc->ep0_req;
1833 if (req->req.complete)
1834 req->req.complete(&ep->ep, &req->req);
1837 if (req->req.complete)
1838 _nbu2ss_ep_done(ep, req, 0);
1841 udc->ep0state = EP0_IDLE;
1846 /*-------------------------------------------------------------------------*/
1847 static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1854 status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1855 intr = status & EP0_STATUS_RW_BIT;
1856 _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~(u32)intr);
1858 status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1859 | STG_END_INT | EP0_OUT_NULL_INT);
1862 dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
1863 dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
1867 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1868 udc->gadget.speed = _nbu2ss_get_speed(udc);
1870 for (i = 0; i < EP0_END_XFER; i++) {
1871 switch (udc->ep0state) {
1873 if (status & SETUP_INT) {
1875 nret = _nbu2ss_decode_request(udc);
1879 case EP0_IN_DATA_PHASE:
1880 if (status & EP0_IN_INT) {
1881 status &= ~EP0_IN_INT;
1882 nret = _nbu2ss_ep0_in_data_stage(udc);
1886 case EP0_OUT_DATA_PHASE:
1887 if (status & EP0_OUT_INT) {
1888 status &= ~EP0_OUT_INT;
1889 nret = _nbu2ss_ep0_out_data_stage(udc);
1893 case EP0_IN_STATUS_PHASE:
1894 if ((status & STG_END_INT) || (status & SETUP_INT)) {
1895 status &= ~(STG_END_INT | EP0_IN_INT);
1896 nret = _nbu2ss_ep0_status_stage(udc);
1900 case EP0_OUT_STATUS_PAHSE:
1901 if ((status & STG_END_INT)
1902 || (status & SETUP_INT)
1903 || (status & EP0_OUT_NULL_INT)) {
1904 status &= ~(STG_END_INT
1906 | EP0_OUT_NULL_INT);
1908 nret = _nbu2ss_ep0_status_stage(udc);
1924 _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
1928 /*-------------------------------------------------------------------------*/
1929 static void _nbu2ss_ep_done(
1930 struct nbu2ss_ep *ep,
1931 struct nbu2ss_req *req,
1934 struct nbu2ss_udc *udc = ep->udc;
1936 list_del_init(&req->queue);
1938 if (status == -ECONNRESET)
1939 _nbu2ss_fifo_flush(udc, ep);
1941 if (likely(req->req.status == -EINPROGRESS))
1942 req->req.status = status;
1945 _nbu2ss_epn_set_stall(udc, ep);
1947 if (!list_empty(&ep->queue))
1948 _nbu2ss_restert_transfer(ep);
1952 if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1953 (req->req.dma != 0))
1954 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1957 spin_unlock(&udc->lock);
1958 req->req.complete(&ep->ep, &req->req);
1959 spin_lock(&udc->lock);
1962 /*-------------------------------------------------------------------------*/
1963 static inline void _nbu2ss_epn_in_int(
1964 struct nbu2ss_udc *udc,
1965 struct nbu2ss_ep *ep,
1966 struct nbu2ss_req *req)
1971 struct fc_regs *preg = udc->p_regs;
1974 return; /* DMA is forwarded */
1976 req->req.actual += req->div_len;
1979 if (req->req.actual != req->req.length) {
1980 /*---------------------------------------------------------*/
1981 /* remainder of data */
1982 result = _nbu2ss_epn_in_transfer(udc, ep, req);
1985 if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
1988 _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1990 if ((status & EPn_IN_FULL) == 0) {
1991 /*-----------------------------------------*/
1992 /* 0 Length Packet */
1994 _nbu2ss_zero_len_pkt(udc, ep->epnum);
2001 /*---------------------------------------------------------*/
2003 _nbu2ss_ep_done(ep, req, result);
2007 /*-------------------------------------------------------------------------*/
2008 static inline void _nbu2ss_epn_out_int(
2009 struct nbu2ss_udc *udc,
2010 struct nbu2ss_ep *ep,
2011 struct nbu2ss_req *req)
2015 result = _nbu2ss_epn_out_transfer(udc, ep, req);
2017 _nbu2ss_ep_done(ep, req, result);
2020 /*-------------------------------------------------------------------------*/
2021 static inline void _nbu2ss_epn_in_dma_int(
2022 struct nbu2ss_udc *udc,
2023 struct nbu2ss_ep *ep,
2024 struct nbu2ss_req *req)
2028 struct usb_request *preq;
2035 preq->actual += req->div_len;
2037 req->dma_flag = FALSE;
2040 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
2043 if (preq->actual != preq->length) {
2044 _nbu2ss_epn_in_transfer(udc, ep, req);
2046 mpkt = ep->ep.maxpacket;
2047 size = preq->actual % mpkt;
2049 if (((preq->actual & 0x03) == 0) && (size < mpkt))
2050 _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
2052 _nbu2ss_epn_in_int(udc, ep, req);
2057 /*-------------------------------------------------------------------------*/
2058 static inline void _nbu2ss_epn_out_dma_int(
2059 struct nbu2ss_udc *udc,
2060 struct nbu2ss_ep *ep,
2061 struct nbu2ss_req *req)
2065 u32 dmacnt, ep_dmacnt;
2067 struct fc_regs *preg = udc->p_regs;
2069 num = ep->epnum - 1;
2071 if (req->req.actual == req->req.length) {
2072 if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
2074 req->dma_flag = FALSE;
2075 _nbu2ss_ep_done(ep, req, 0);
2080 ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
2084 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2085 dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
2088 if (ep_dmacnt == dmacnt)
2092 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_REQEN);
2095 mpkt = ep->ep.maxpacket;
2096 if ((req->div_len % mpkt) == 0)
2097 req->div_len -= mpkt * dmacnt;
2100 if ((req->req.actual % ep->ep.maxpacket) > 0) {
2101 if (req->req.actual == req->div_len) {
2103 req->dma_flag = FALSE;
2104 _nbu2ss_ep_done(ep, req, 0);
2109 req->req.actual += req->div_len;
2111 req->dma_flag = FALSE;
2113 _nbu2ss_epn_out_int(udc, ep, req);
2116 /*-------------------------------------------------------------------------*/
2117 static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2122 struct nbu2ss_req *req;
2123 struct nbu2ss_ep *ep = &udc->ep[epnum];
2127 /* Interrupt Status */
2128 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2130 /* Interrupt Clear */
2131 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~(u32)status);
2133 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
2135 /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2139 if (status & EPn_OUT_END_INT) {
2140 status &= ~EPn_OUT_INT;
2141 _nbu2ss_epn_out_dma_int(udc, ep, req);
2144 if (status & EPn_OUT_INT)
2145 _nbu2ss_epn_out_int(udc, ep, req);
2147 if (status & EPn_IN_END_INT) {
2148 status &= ~EPn_IN_INT;
2149 _nbu2ss_epn_in_dma_int(udc, ep, req);
2152 if (status & EPn_IN_INT)
2153 _nbu2ss_epn_in_int(udc, ep, req);
2156 /*-------------------------------------------------------------------------*/
2157 static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2160 _nbu2ss_ep0_int(udc);
2162 _nbu2ss_epn_int(udc, epnum);
2165 /*-------------------------------------------------------------------------*/
2166 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2168 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2169 _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2172 /*-------------------------------------------------------------------------*/
2173 static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2174 struct nbu2ss_ep *ep,
2177 struct nbu2ss_req *req;
2179 /* Endpoint Disable */
2180 _nbu2ss_epn_exit(udc, ep);
2183 _nbu2ss_ep_dma_exit(udc, ep);
2185 if (list_empty(&ep->queue))
2188 /* called with irqs blocked */
2189 list_for_each_entry(req, &ep->queue, queue) {
2190 _nbu2ss_ep_done(ep, req, status);
2196 /*-------------------------------------------------------------------------*/
2197 static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2199 struct nbu2ss_ep *ep;
2201 udc->gadget.speed = USB_SPEED_UNKNOWN;
2203 _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2206 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2207 _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2211 /*-------------------------------------------------------------------------*/
2212 static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2216 if (udc->vbus_active == 0)
2222 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2223 | PUE2) & ~(u32)CONNECTB;
2225 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2230 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2233 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2234 udc->gadget.speed = USB_SPEED_UNKNOWN;
2240 /*-------------------------------------------------------------------------*/
2241 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2243 struct fc_regs *p = udc->p_regs;
2245 if (udc->vbus_active == 0)
2248 if (ep->epnum == 0) {
2250 _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2254 _nbu2ss_ep_dma_abort(udc, ep);
2255 _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPn_BCLR);
2259 /*-------------------------------------------------------------------------*/
2260 static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2264 if (udc->udc_enabled)
2270 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2271 udelay(EPC_RST_DISABLE_TIME); /* 1us wait */
2273 _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2274 mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2276 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2278 _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2280 _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2281 HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2283 while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2285 udelay(1); /* 1us wait */
2286 if (waitcnt == EPC_PLL_LOCK_COUNT) {
2287 dev_err(udc->dev, "*** Reset Cancel failed\n");
2292 _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2294 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2297 _nbu2ss_ep0_enable(udc);
2299 /* USB Interrupt Enable */
2300 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2302 udc->udc_enabled = TRUE;
2307 /*-------------------------------------------------------------------------*/
2308 static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2310 _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2311 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2314 /*-------------------------------------------------------------------------*/
2315 static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2317 if (udc->udc_enabled) {
2318 udc->udc_enabled = FALSE;
2319 _nbu2ss_reset_controller(udc);
2320 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2324 /*-------------------------------------------------------------------------*/
2325 static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2331 mdelay(VBUS_CHATTERING_MDELAY); /* wait (ms) */
2334 reg_dt = gpio_get_value(VBUS_VALUE);
2337 udc->linux_suspended = 0;
2339 _nbu2ss_reset_controller(udc);
2340 dev_info(udc->dev, " ----- VBUS OFF\n");
2342 if (udc->vbus_active == 1) {
2344 udc->vbus_active = 0;
2345 if (udc->usb_suspended) {
2346 udc->usb_suspended = 0;
2347 /* _nbu2ss_reset_controller(udc); */
2349 udc->devstate = USB_STATE_NOTATTACHED;
2351 _nbu2ss_quiesce(udc);
2353 spin_unlock(&udc->lock);
2354 udc->driver->disconnect(&udc->gadget);
2355 spin_lock(&udc->lock);
2358 _nbu2ss_disable_controller(udc);
2361 mdelay(5); /* wait (5ms) */
2362 reg_dt = gpio_get_value(VBUS_VALUE);
2366 dev_info(udc->dev, " ----- VBUS ON\n");
2368 if (udc->linux_suspended)
2371 if (udc->vbus_active == 0) {
2373 udc->vbus_active = 1;
2374 udc->devstate = USB_STATE_POWERED;
2376 nret = _nbu2ss_enable_controller(udc);
2378 _nbu2ss_disable_controller(udc);
2379 udc->vbus_active = 0;
2383 _nbu2ss_pullup(udc, 1);
2385 #ifdef UDC_DEBUG_DUMP
2386 _nbu2ss_dump_register(udc);
2387 #endif /* UDC_DEBUG_DUMP */
2390 if (udc->devstate == USB_STATE_POWERED)
2391 _nbu2ss_pullup(udc, 1);
2396 /*-------------------------------------------------------------------------*/
2397 static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2399 udc->devstate = USB_STATE_DEFAULT;
2400 udc->remote_wakeup = 0;
2402 _nbu2ss_quiesce(udc);
2404 udc->ep0state = EP0_IDLE;
2407 /*-------------------------------------------------------------------------*/
2408 static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2410 if (udc->usb_suspended == 1) {
2411 udc->usb_suspended = 0;
2412 if (udc->driver && udc->driver->resume) {
2413 spin_unlock(&udc->lock);
2414 udc->driver->resume(&udc->gadget);
2415 spin_lock(&udc->lock);
2420 /*-------------------------------------------------------------------------*/
2421 static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2425 if (udc->usb_suspended == 0) {
2426 reg_dt = gpio_get_value(VBUS_VALUE);
2431 udc->usb_suspended = 1;
2432 if (udc->driver && udc->driver->suspend) {
2433 spin_unlock(&udc->lock);
2434 udc->driver->suspend(&udc->gadget);
2435 spin_lock(&udc->lock);
2438 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2442 /*-------------------------------------------------------------------------*/
2443 /* VBUS (GPIO153) Interrupt */
2444 static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2446 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2448 spin_lock(&udc->lock);
2449 _nbu2ss_check_vbus(udc);
2450 spin_unlock(&udc->lock);
2455 /*-------------------------------------------------------------------------*/
2456 /* Interrupt (udc) */
2457 static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2459 u8 suspend_flag = 0;
2463 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2464 struct fc_regs *preg = udc->p_regs;
2466 if (gpio_get_value(VBUS_VALUE) == 0) {
2467 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2468 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2472 spin_lock(&udc->lock);
2475 if (gpio_get_value(VBUS_VALUE) == 0) {
2476 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2477 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2480 status = _nbu2ss_readl(&preg->USB_INT_STA);
2485 _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2487 if (status & USB_RST_INT) {
2489 _nbu2ss_int_bus_reset(udc);
2492 if (status & RSUM_INT) {
2494 _nbu2ss_int_usb_resume(udc);
2497 if (status & SPND_INT) {
2502 if (status & EPn_INT) {
2504 int_bit = status >> 8;
2506 for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2509 _nbu2ss_ep_int(udc, epnum);
2520 _nbu2ss_int_usb_suspend(udc);
2522 spin_unlock(&udc->lock);
2527 /*-------------------------------------------------------------------------*/
2529 static int nbu2ss_ep_enable(
2531 const struct usb_endpoint_descriptor *desc)
2534 unsigned long flags;
2536 struct nbu2ss_ep *ep;
2537 struct nbu2ss_udc *udc;
2539 if ((!_ep) || (!desc)) {
2540 pr_err(" *** %s, bad param\n", __func__);
2544 ep = container_of(_ep, struct nbu2ss_ep, ep);
2545 if ((!ep) || (!ep->udc)) {
2546 pr_err(" *** %s, ep == NULL !!\n", __func__);
2550 ep_type = usb_endpoint_type(desc);
2551 if ((ep_type == USB_ENDPOINT_XFER_CONTROL)
2552 || (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2554 pr_err(" *** %s, bat bmAttributes\n", __func__);
2559 if (udc->vbus_active == 0)
2563 || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2565 dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
2569 spin_lock_irqsave(&udc->lock, flags);
2572 ep->epnum = usb_endpoint_num(desc);
2573 ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2574 ep->ep_type = ep_type;
2577 ep->stalled = FALSE;
2579 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2582 _nbu2ss_ep_dma_init(udc, ep);
2584 /* Endpoint setting */
2585 _nbu2ss_ep_init(udc, ep);
2587 spin_unlock_irqrestore(&udc->lock, flags);
2592 /*-------------------------------------------------------------------------*/
2593 static int nbu2ss_ep_disable(struct usb_ep *_ep)
2595 struct nbu2ss_ep *ep;
2596 struct nbu2ss_udc *udc;
2597 unsigned long flags;
2600 pr_err(" *** %s, bad param\n", __func__);
2604 ep = container_of(_ep, struct nbu2ss_ep, ep);
2605 if ((!ep) || (!ep->udc)) {
2606 pr_err("udc: *** %s, ep == NULL !!\n", __func__);
2611 if (udc->vbus_active == 0)
2614 spin_lock_irqsave(&udc->lock, flags);
2615 _nbu2ss_nuke(udc, ep, -EINPROGRESS); /* dequeue request */
2616 spin_unlock_irqrestore(&udc->lock, flags);
2621 /*-------------------------------------------------------------------------*/
2622 static struct usb_request *nbu2ss_ep_alloc_request(
2626 struct nbu2ss_req *req;
2628 req = kzalloc(sizeof(*req), gfp_flags);
2633 req->req.dma = DMA_ADDR_INVALID;
2635 INIT_LIST_HEAD(&req->queue);
2640 /*-------------------------------------------------------------------------*/
2641 static void nbu2ss_ep_free_request(
2643 struct usb_request *_req)
2645 struct nbu2ss_req *req;
2648 req = container_of(_req, struct nbu2ss_req, req);
2654 /*-------------------------------------------------------------------------*/
2655 static int nbu2ss_ep_queue(
2657 struct usb_request *_req,
2660 struct nbu2ss_req *req;
2661 struct nbu2ss_ep *ep;
2662 struct nbu2ss_udc *udc;
2663 unsigned long flags;
2665 int result = -EINVAL;
2667 /* catch various bogus parameters */
2668 if ((!_ep) || (!_req)) {
2670 pr_err("udc: %s --- _ep == NULL\n", __func__);
2673 pr_err("udc: %s --- _req == NULL\n", __func__);
2678 req = container_of(_req, struct nbu2ss_req, req);
2680 (!_req->complete || !_req->buf
2681 || !list_empty(&req->queue))) {
2683 if (!_req->complete)
2684 pr_err("udc: %s --- !_req->complete\n", __func__);
2687 pr_err("udc:%s --- !_req->buf\n", __func__);
2689 if (!list_empty(&req->queue))
2690 pr_err("%s --- !list_empty(&req->queue)\n", __func__);
2695 ep = container_of(_ep, struct nbu2ss_ep, ep);
2698 if (udc->vbus_active == 0) {
2699 dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
2703 if (unlikely(!udc->driver)) {
2704 dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
2709 spin_lock_irqsave(&udc->lock, flags);
2712 if ((uintptr_t)req->req.buf & 0x3)
2713 req->unaligned = TRUE;
2715 req->unaligned = FALSE;
2717 if (req->unaligned) {
2719 ep->virt_buf = (u8 *)dma_alloc_coherent(
2721 &ep->phys_buf, GFP_ATOMIC | GFP_DMA);
2722 if (ep->epnum > 0) {
2723 if (ep->direct == USB_DIR_IN)
2724 memcpy(ep->virt_buf, req->req.buf,
2729 if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2730 (req->req.dma != 0))
2731 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2734 _req->status = -EINPROGRESS;
2737 bflag = list_empty(&ep->queue);
2738 list_add_tail(&req->queue, &ep->queue);
2740 if (bflag && !ep->stalled) {
2742 result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
2744 dev_err(udc->dev, " *** %s, result = %d\n", __func__,
2746 list_del(&req->queue);
2747 } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2749 if (req->req.length < 4 &&
2750 req->req.length == req->req.actual)
2752 if (req->req.length == req->req.actual)
2754 _nbu2ss_ep_done(ep, req, result);
2758 spin_unlock_irqrestore(&udc->lock, flags);
2763 /*-------------------------------------------------------------------------*/
2764 static int nbu2ss_ep_dequeue(
2766 struct usb_request *_req)
2768 struct nbu2ss_req *req;
2769 struct nbu2ss_ep *ep;
2770 struct nbu2ss_udc *udc;
2771 unsigned long flags;
2773 /* catch various bogus parameters */
2774 if ((!_ep) || (!_req)) {
2775 /* pr_err("%s, bad param(1)\n", __func__); */
2779 ep = container_of(_ep, struct nbu2ss_ep, ep);
2781 pr_err("%s, ep == NULL !!\n", __func__);
2789 spin_lock_irqsave(&udc->lock, flags);
2791 /* make sure it's actually queued on this endpoint */
2792 list_for_each_entry(req, &ep->queue, queue) {
2793 if (&req->req == _req)
2796 if (&req->req != _req) {
2797 spin_unlock_irqrestore(&udc->lock, flags);
2798 pr_debug("%s no queue(EINVAL)\n", __func__);
2802 _nbu2ss_ep_done(ep, req, -ECONNRESET);
2804 spin_unlock_irqrestore(&udc->lock, flags);
2809 /*-------------------------------------------------------------------------*/
2810 static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2813 unsigned long flags;
2815 struct nbu2ss_ep *ep;
2816 struct nbu2ss_udc *udc;
2819 pr_err("%s, bad param\n", __func__);
2823 ep = container_of(_ep, struct nbu2ss_ep, ep);
2825 pr_err("%s, bad ep\n", __func__);
2831 dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
2835 spin_lock_irqsave(&udc->lock, flags);
2837 ep_adrs = ep->epnum | ep->direct;
2839 _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2840 ep->stalled = FALSE;
2842 if (list_empty(&ep->queue))
2843 _nbu2ss_epn_set_stall(udc, ep);
2851 spin_unlock_irqrestore(&udc->lock, flags);
2856 static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2858 return nbu2ss_ep_set_halt(_ep, 1);
2861 /*-------------------------------------------------------------------------*/
2862 static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2865 struct nbu2ss_ep *ep;
2866 struct nbu2ss_udc *udc;
2867 unsigned long flags;
2868 struct fc_regs *preg;
2871 pr_err("%s, bad param\n", __func__);
2875 ep = container_of(_ep, struct nbu2ss_ep, ep);
2877 pr_err("%s, bad ep\n", __func__);
2883 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2889 data = gpio_get_value(VBUS_VALUE);
2893 spin_lock_irqsave(&udc->lock, flags);
2895 if (ep->epnum == 0) {
2896 data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2899 data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_LEN_DCNT)
2903 spin_unlock_irqrestore(&udc->lock, flags);
2908 /*-------------------------------------------------------------------------*/
2909 static void nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2912 struct nbu2ss_ep *ep;
2913 struct nbu2ss_udc *udc;
2914 unsigned long flags;
2917 pr_err("udc: %s, bad param\n", __func__);
2921 ep = container_of(_ep, struct nbu2ss_ep, ep);
2923 pr_err("udc: %s, bad ep\n", __func__);
2929 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2933 data = gpio_get_value(VBUS_VALUE);
2937 spin_lock_irqsave(&udc->lock, flags);
2938 _nbu2ss_fifo_flush(udc, ep);
2939 spin_unlock_irqrestore(&udc->lock, flags);
2942 /*-------------------------------------------------------------------------*/
2943 static struct usb_ep_ops nbu2ss_ep_ops = {
2944 .enable = nbu2ss_ep_enable,
2945 .disable = nbu2ss_ep_disable,
2947 .alloc_request = nbu2ss_ep_alloc_request,
2948 .free_request = nbu2ss_ep_free_request,
2950 .queue = nbu2ss_ep_queue,
2951 .dequeue = nbu2ss_ep_dequeue,
2953 .set_halt = nbu2ss_ep_set_halt,
2954 .set_wedge = nbu2ss_ep_set_wedge,
2956 .fifo_status = nbu2ss_ep_fifo_status,
2957 .fifo_flush = nbu2ss_ep_fifo_flush,
2960 /*-------------------------------------------------------------------------*/
2961 /* usb_gadget_ops */
2963 /*-------------------------------------------------------------------------*/
2964 static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
2967 struct nbu2ss_udc *udc;
2970 pr_err("udc: %s, bad param\n", __func__);
2974 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2976 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2980 data = gpio_get_value(VBUS_VALUE);
2984 data = _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
2989 /*-------------------------------------------------------------------------*/
2990 static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
2995 struct nbu2ss_udc *udc;
2998 pr_err("%s, bad param\n", __func__);
3002 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3004 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
3008 data = gpio_get_value(VBUS_VALUE);
3010 dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
3014 _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
3016 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
3017 data = _nbu2ss_readl(&udc->p_regs->EPCTR);
3019 if (data & PLL_LOCK)
3023 _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
3028 /*-------------------------------------------------------------------------*/
3029 static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
3032 struct nbu2ss_udc *udc;
3033 unsigned long flags;
3036 pr_err("%s, bad param\n", __func__);
3040 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3042 spin_lock_irqsave(&udc->lock, flags);
3043 pgadget->is_selfpowered = (is_selfpowered != 0);
3044 spin_unlock_irqrestore(&udc->lock, flags);
3049 /*-------------------------------------------------------------------------*/
3050 static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
3055 /*-------------------------------------------------------------------------*/
3056 static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned int mA)
3058 struct nbu2ss_udc *udc;
3059 unsigned long flags;
3062 pr_err("%s, bad param\n", __func__);
3066 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3068 spin_lock_irqsave(&udc->lock, flags);
3070 spin_unlock_irqrestore(&udc->lock, flags);
3075 /*-------------------------------------------------------------------------*/
3076 static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
3078 struct nbu2ss_udc *udc;
3079 unsigned long flags;
3082 pr_err("%s, bad param\n", __func__);
3086 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3089 pr_warn("%s, Not Regist Driver\n", __func__);
3093 if (udc->vbus_active == 0)
3096 spin_lock_irqsave(&udc->lock, flags);
3097 _nbu2ss_pullup(udc, is_on);
3098 spin_unlock_irqrestore(&udc->lock, flags);
3103 /*-------------------------------------------------------------------------*/
3104 static int nbu2ss_gad_ioctl(
3105 struct usb_gadget *pgadget,
3107 unsigned long param)
3112 static const struct usb_gadget_ops nbu2ss_gadget_ops = {
3113 .get_frame = nbu2ss_gad_get_frame,
3114 .wakeup = nbu2ss_gad_wakeup,
3115 .set_selfpowered = nbu2ss_gad_set_selfpowered,
3116 .vbus_session = nbu2ss_gad_vbus_session,
3117 .vbus_draw = nbu2ss_gad_vbus_draw,
3118 .pullup = nbu2ss_gad_pullup,
3119 .ioctl = nbu2ss_gad_ioctl,
3122 static const struct {
3124 const struct usb_ep_caps caps;
3125 } ep_info[NUM_ENDPOINTS] = {
3126 #define EP_INFO(_name, _caps) \
3133 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
3135 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3137 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3138 EP_INFO("ep3in-int",
3139 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3141 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3143 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3145 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3147 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3148 EP_INFO("ep8in-int",
3149 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3151 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3153 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3155 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3157 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3158 EP_INFO("epdin-int",
3159 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3164 /*-------------------------------------------------------------------------*/
3165 static void __init nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3169 INIT_LIST_HEAD(&udc->gadget.ep_list);
3170 udc->gadget.ep0 = &udc->ep[0].ep;
3172 for (i = 0; i < NUM_ENDPOINTS; i++) {
3173 struct nbu2ss_ep *ep = &udc->ep[i];
3178 ep->ep.driver_data = NULL;
3179 ep->ep.name = ep_info[i].name;
3180 ep->ep.caps = ep_info[i].caps;
3181 ep->ep.ops = &nbu2ss_ep_ops;
3183 usb_ep_set_maxpacket_limit(&ep->ep,
3184 i == 0 ? EP0_PACKETSIZE
3187 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3188 INIT_LIST_HEAD(&ep->queue);
3191 list_del_init(&udc->ep[0].ep.ep_list);
3194 /*-------------------------------------------------------------------------*/
3195 /* platform_driver */
3196 static int __init nbu2ss_drv_contest_init(
3197 struct platform_device *pdev,
3198 struct nbu2ss_udc *udc)
3200 spin_lock_init(&udc->lock);
3201 udc->dev = &pdev->dev;
3203 udc->gadget.is_selfpowered = 1;
3204 udc->devstate = USB_STATE_NOTATTACHED;
3208 udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3211 nbu2ss_drv_ep_init(udc);
3214 udc->gadget.ops = &nbu2ss_gadget_ops;
3215 udc->gadget.ep0 = &udc->ep[0].ep;
3216 udc->gadget.speed = USB_SPEED_UNKNOWN;
3217 udc->gadget.name = driver_name;
3218 /* udc->gadget.is_dualspeed = 1; */
3220 device_initialize(&udc->gadget.dev);
3222 dev_set_name(&udc->gadget.dev, "gadget");
3223 udc->gadget.dev.parent = &pdev->dev;
3224 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3230 * probe - binds to the platform device
3232 static int nbu2ss_drv_probe(struct platform_device *pdev)
3234 int status = -ENODEV;
3235 struct nbu2ss_udc *udc;
3238 void __iomem *mmio_base;
3240 udc = &udc_controller;
3241 memset(udc, 0, sizeof(struct nbu2ss_udc));
3243 platform_set_drvdata(pdev, udc);
3245 /* require I/O memory and IRQ to be provided as resources */
3246 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3247 mmio_base = devm_ioremap_resource(&pdev->dev, r);
3248 if (IS_ERR(mmio_base))
3249 return PTR_ERR(mmio_base);
3251 irq = platform_get_irq(pdev, 0);
3253 dev_err(&pdev->dev, "failed to get IRQ\n");
3256 status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3257 0, driver_name, udc);
3260 udc->p_regs = (struct fc_regs *)mmio_base;
3262 /* USB Function Controller Interrupt */
3264 dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
3268 /* Driver Initialization */
3269 status = nbu2ss_drv_contest_init(pdev, udc);
3275 /* VBUS Interrupt */
3276 irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
3277 status = request_irq(INT_VBUS,
3278 _nbu2ss_vbus_irq, IRQF_SHARED, driver_name, udc);
3281 dev_err(udc->dev, "request_irq(INT_VBUS) failed\n");
3288 /*-------------------------------------------------------------------------*/
3289 static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3291 struct nbu2ss_udc *udc;
3293 udc = platform_get_drvdata(pdev);
3297 _nbu2ss_disable_controller(udc);
3300 /*-------------------------------------------------------------------------*/
3301 static int nbu2ss_drv_remove(struct platform_device *pdev)
3303 struct nbu2ss_udc *udc;
3304 struct nbu2ss_ep *ep;
3307 udc = &udc_controller;
3309 for (i = 0; i < NUM_ENDPOINTS; i++) {
3312 dma_free_coherent(NULL, PAGE_SIZE,
3313 (void *)ep->virt_buf, ep->phys_buf);
3316 /* Interrupt Handler - Release */
3317 free_irq(INT_VBUS, udc);
3322 /*-------------------------------------------------------------------------*/
3323 static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3325 struct nbu2ss_udc *udc;
3327 udc = platform_get_drvdata(pdev);
3331 if (udc->vbus_active) {
3332 udc->vbus_active = 0;
3333 udc->devstate = USB_STATE_NOTATTACHED;
3334 udc->linux_suspended = 1;
3336 if (udc->usb_suspended) {
3337 udc->usb_suspended = 0;
3338 _nbu2ss_reset_controller(udc);
3341 _nbu2ss_quiesce(udc);
3343 _nbu2ss_disable_controller(udc);
3348 /*-------------------------------------------------------------------------*/
3349 static int nbu2ss_drv_resume(struct platform_device *pdev)
3352 struct nbu2ss_udc *udc;
3354 udc = platform_get_drvdata(pdev);
3358 data = gpio_get_value(VBUS_VALUE);
3360 udc->vbus_active = 1;
3361 udc->devstate = USB_STATE_POWERED;
3362 _nbu2ss_enable_controller(udc);
3363 _nbu2ss_pullup(udc, 1);
3366 udc->linux_suspended = 0;
3371 static struct platform_driver udc_driver = {
3372 .probe = nbu2ss_drv_probe,
3373 .shutdown = nbu2ss_drv_shutdown,
3374 .remove = nbu2ss_drv_remove,
3375 .suspend = nbu2ss_drv_suspend,
3376 .resume = nbu2ss_drv_resume,
3378 .name = driver_name,
3382 module_platform_driver(udc_driver);
3384 MODULE_DESCRIPTION(DRIVER_DESC);
3385 MODULE_AUTHOR("Renesas Electronics Corporation");
3386 MODULE_LICENSE("GPL");