drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c

   1 /* Copyright 2014-2016 Freescale Semiconductor Inc.
   2  * Copyright 2016-2017 NXP
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions are met:
   6  *     * Redistributions of source code must retain the above copyright
   7  *       notice, this list of conditions and the following disclaimer.
   8  *     * Redistributions in binary form must reproduce the above copyright
   9  *       notice, this list of conditions and the following disclaimer in the
  10  *       documentation and/or other materials provided with the distribution.
  11  *     * Neither the name of Freescale Semiconductor nor the
  12  *       names of its contributors may be used to endorse or promote products
  13  *       derived from this software without specific prior written permission.
  14  *
  15  *
  16  * ALTERNATIVELY, this software may be distributed under the terms of the
  17  * GNU General Public License ("GPL") as published by the Free Software
  18  * Foundation, either version 2 of that License or (at your option) any
  19  * later version.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  22  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  23  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  28  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  30  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32 #include <linux/init.h>
  33 #include <linux/module.h>
  34 #include <linux/platform_device.h>
  35 #include <linux/etherdevice.h>
  36 #include <linux/of_net.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/msi.h>
  39 #include <linux/kthread.h>
  40 #include <linux/iommu.h>
  41
  42 #include "../../fsl-mc/include/mc.h"
  43 #include "../../fsl-mc/include/mc-sys.h"
  44 #include "dpaa2-eth.h"
  45
  46 /* CREATE_TRACE_POINTS only needs to be defined once. Other dpa files
  47  * using trace events only need to #include <trace/events/sched.h>
  48  */
  49 #define CREATE_TRACE_POINTS
  50 #include "dpaa2-eth-trace.h"
  51
  52 MODULE_LICENSE("Dual BSD/GPL");
  53 MODULE_AUTHOR("Freescale Semiconductor, Inc");
  54 MODULE_DESCRIPTION("Freescale DPAA2 Ethernet Driver");
  55
  56 const char dpaa2_eth_drv_version[] = "0.1";
  57
  58 static void *dpaa2_iova_to_virt(struct iommu_domain *domain,
  59                                 dma_addr_t iova_addr)
  60 {
  61         phys_addr_t phys_addr;
  62
  63         phys_addr = domain ? iommu_iova_to_phys(domain, iova_addr) : iova_addr;
  64
  65         return phys_to_virt(phys_addr);
  66 }
  67
  68 static void validate_rx_csum(struct dpaa2_eth_priv *priv,
  69                              u32 fd_status,
  70                              struct sk_buff *skb)
  71 {
  72         skb_checksum_none_assert(skb);
  73
  74         /* HW checksum validation is disabled, nothing to do here */
  75         if (!(priv->net_dev->features & NETIF_F_RXCSUM))
  76                 return;
  77
  78         /* Read checksum validation bits */
  79         if (!((fd_status & DPAA2_FAS_L3CV) &&
  80               (fd_status & DPAA2_FAS_L4CV)))
  81                 return;
  82
  83         /* Inform the stack there's no need to compute L3/L4 csum anymore */
  84         skb->ip_summed = CHECKSUM_UNNECESSARY;
  85 }
  86
  87 /* Free a received FD.
  88  * Not to be used for Tx conf FDs or on any other paths.
  89  */
  90 static void free_rx_fd(struct dpaa2_eth_priv *priv,
  91                        const struct dpaa2_fd *fd,
  92                        void *vaddr)
  93 {
  94         struct device *dev = priv->net_dev->dev.parent;
  95         dma_addr_t addr = dpaa2_fd_get_addr(fd);
  96         u8 fd_format = dpaa2_fd_get_format(fd);
  97         struct dpaa2_sg_entry *sgt;
  98         void *sg_vaddr;
  99         int i;
 100
 101         /* If single buffer frame, just free the data buffer */
 102         if (fd_format == dpaa2_fd_single)
 103                 goto free_buf;
 104         else if (fd_format != dpaa2_fd_sg)
 105                 /* We don't support any other format */
 106                 return;
 107
 108         /* For S/G frames, we first need to free all SG entries */
 109         sgt = vaddr + dpaa2_fd_get_offset(fd);
 110         for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
 111                 addr = dpaa2_sg_get_addr(&sgt[i]);
 112                 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
 113                 dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE,
 114                                  DMA_FROM_DEVICE);
 115
 116                 skb_free_frag(sg_vaddr);
 117                 if (dpaa2_sg_is_final(&sgt[i]))
 118                         break;
 119         }
 120
 121 free_buf:
 122         skb_free_frag(vaddr);
 123 }
 124
 125 /* Build a linear skb based on a single-buffer frame descriptor */
 126 static struct sk_buff *build_linear_skb(struct dpaa2_eth_priv *priv,
 127                                         struct dpaa2_eth_channel *ch,
 128                                         const struct dpaa2_fd *fd,
 129                                         void *fd_vaddr)
 130 {
 131         struct sk_buff *skb = NULL;
 132         u16 fd_offset = dpaa2_fd_get_offset(fd);
 133         u32 fd_length = dpaa2_fd_get_len(fd);
 134
 135         skb = build_skb(fd_vaddr, DPAA2_ETH_RX_BUF_SIZE +
 136                         SKB_DATA_ALIGN(sizeof(struct skb_shared_info)));
 137         if (unlikely(!skb))
 138                 return NULL;
 139
 140         skb_reserve(skb, fd_offset);
 141         skb_put(skb, fd_length);
 142
 143         ch->buf_count--;
 144
 145         return skb;
 146 }
 147
 148 /* Build a non linear (fragmented) skb based on a S/G table */
 149 static struct sk_buff *build_frag_skb(struct dpaa2_eth_priv *priv,
 150                                       struct dpaa2_eth_channel *ch,
 151                                       struct dpaa2_sg_entry *sgt)
 152 {
 153         struct sk_buff *skb = NULL;
 154         struct device *dev = priv->net_dev->dev.parent;
 155         void *sg_vaddr;
 156         dma_addr_t sg_addr;
 157         u16 sg_offset;
 158         u32 sg_length;
 159         struct page *page, *head_page;
 160         int page_offset;
 161         int i;
 162
 163         for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
 164                 struct dpaa2_sg_entry *sge = &sgt[i];
 165
 166                 /* NOTE: We only support SG entries in dpaa2_sg_single format,
 167                  * but this is the only format we may receive from HW anyway
 168                  */
 169
 170                 /* Get the address and length from the S/G entry */
 171                 sg_addr = dpaa2_sg_get_addr(sge);
 172                 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, sg_addr);
 173                 dma_unmap_single(dev, sg_addr, DPAA2_ETH_RX_BUF_SIZE,
 174                                  DMA_FROM_DEVICE);
 175
 176                 sg_length = dpaa2_sg_get_len(sge);
 177
 178                 if (i == 0) {
 179                         /* We build the skb around the first data buffer */
 180                         skb = build_skb(sg_vaddr, DPAA2_ETH_RX_BUF_SIZE +
 181                                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)));
 182                         if (unlikely(!skb))
 183                                 return NULL;
 184
 185                         sg_offset = dpaa2_sg_get_offset(sge);
 186                         skb_reserve(skb, sg_offset);
 187                         skb_put(skb, sg_length);
 188                 } else {
 189                         /* Rest of the data buffers are stored as skb frags */
 190                         page = virt_to_page(sg_vaddr);
 191                         head_page = virt_to_head_page(sg_vaddr);
 192
 193                         /* Offset in page (which may be compound).
 194                          * Data in subsequent SG entries is stored from the
 195                          * beginning of the buffer, so we don't need to add the
 196                          * sg_offset.
 197                          */
 198                         page_offset = ((unsigned long)sg_vaddr &
 199                                 (PAGE_SIZE - 1)) +
 200                                 (page_address(page) - page_address(head_page));
 201
 202                         skb_add_rx_frag(skb, i - 1, head_page, page_offset,
 203                                         sg_length, DPAA2_ETH_RX_BUF_SIZE);
 204                 }
 205
 206                 if (dpaa2_sg_is_final(sge))
 207                         break;
 208         }
 209
 210         /* Count all data buffers + SG table buffer */
 211         ch->buf_count -= i + 2;
 212
 213         return skb;
 214 }
 215
 216 /* Main Rx frame processing routine */
 217 static void dpaa2_eth_rx(struct dpaa2_eth_priv *priv,
 218                          struct dpaa2_eth_channel *ch,
 219                          const struct dpaa2_fd *fd,
 220                          struct napi_struct *napi)
 221 {
 222         dma_addr_t addr = dpaa2_fd_get_addr(fd);
 223         u8 fd_format = dpaa2_fd_get_format(fd);
 224         void *vaddr;
 225         struct sk_buff *skb;
 226         struct rtnl_link_stats64 *percpu_stats;
 227         struct dpaa2_eth_drv_stats *percpu_extras;
 228         struct device *dev = priv->net_dev->dev.parent;
 229         struct dpaa2_fas *fas;
 230         void *buf_data;
 231         u32 status = 0;
 232
 233         /* Tracing point */
 234         trace_dpaa2_rx_fd(priv->net_dev, fd);
 235
 236         vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
 237         dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE, DMA_FROM_DEVICE);
 238
 239         fas = dpaa2_get_fas(vaddr);
 240         prefetch(fas);
 241         buf_data = vaddr + dpaa2_fd_get_offset(fd);
 242         prefetch(buf_data);
 243
 244         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 245         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 246
 247         if (fd_format == dpaa2_fd_single) {
 248                 skb = build_linear_skb(priv, ch, fd, vaddr);
 249         } else if (fd_format == dpaa2_fd_sg) {
 250                 skb = build_frag_skb(priv, ch, buf_data);
 251                 skb_free_frag(vaddr);
 252                 percpu_extras->rx_sg_frames++;
 253                 percpu_extras->rx_sg_bytes += dpaa2_fd_get_len(fd);
 254         } else {
 255                 /* We don't support any other format */
 256                 goto err_frame_format;
 257         }
 258
 259         if (unlikely(!skb))
 260                 goto err_build_skb;
 261
 262         prefetch(skb->data);
 263
 264         /* Check if we need to validate the L4 csum */
 265         if (likely(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV)) {
 266                 status = le32_to_cpu(fas->status);
 267                 validate_rx_csum(priv, status, skb);
 268         }
 269
 270         skb->protocol = eth_type_trans(skb, priv->net_dev);
 271
 272         percpu_stats->rx_packets++;
 273         percpu_stats->rx_bytes += dpaa2_fd_get_len(fd);
 274
 275         napi_gro_receive(napi, skb);
 276
 277         return;
 278
 279 err_build_skb:
 280         free_rx_fd(priv, fd, vaddr);
 281 err_frame_format:
 282         percpu_stats->rx_dropped++;
 283 }
 284
 285 /* Consume all frames pull-dequeued into the store. This is the simplest way to
 286  * make sure we don't accidentally issue another volatile dequeue which would
 287  * overwrite (leak) frames already in the store.
 288  *
 289  * Observance of NAPI budget is not our concern, leaving that to the caller.
 290  */
 291 static int consume_frames(struct dpaa2_eth_channel *ch)
 292 {
 293         struct dpaa2_eth_priv *priv = ch->priv;
 294         struct dpaa2_eth_fq *fq;
 295         struct dpaa2_dq *dq;
 296         const struct dpaa2_fd *fd;
 297         int cleaned = 0;
 298         int is_last;
 299
 300         do {
 301                 dq = dpaa2_io_store_next(ch->store, &is_last);
 302                 if (unlikely(!dq)) {
 303                         /* If we're here, we *must* have placed a
 304                          * volatile dequeue comnmand, so keep reading through
 305                          * the store until we get some sort of valid response
 306                          * token (either a valid frame or an "empty dequeue")
 307                          */
 308                         continue;
 309                 }
 310
 311                 fd = dpaa2_dq_fd(dq);
 312                 fq = (struct dpaa2_eth_fq *)dpaa2_dq_fqd_ctx(dq);
 313                 fq->stats.frames++;
 314
 315                 fq->consume(priv, ch, fd, &ch->napi);
 316                 cleaned++;
 317         } while (!is_last);
 318
 319         return cleaned;
 320 }
 321
 322 /* Create a frame descriptor based on a fragmented skb */
 323 static int build_sg_fd(struct dpaa2_eth_priv *priv,
 324                        struct sk_buff *skb,
 325                        struct dpaa2_fd *fd)
 326 {
 327         struct device *dev = priv->net_dev->dev.parent;
 328         void *sgt_buf = NULL;
 329         dma_addr_t addr;
 330         int nr_frags = skb_shinfo(skb)->nr_frags;
 331         struct dpaa2_sg_entry *sgt;
 332         int i, err;
 333         int sgt_buf_size;
 334         struct scatterlist *scl, *crt_scl;
 335         int num_sg;
 336         int num_dma_bufs;
 337         struct dpaa2_eth_swa *swa;
 338         struct dpaa2_fas *fas;
 339
 340         /* Create and map scatterlist.
 341          * We don't advertise NETIF_F_FRAGLIST, so skb_to_sgvec() will not have
 342          * to go beyond nr_frags+1.
 343          * Note: We don't support chained scatterlists
 344          */
 345         if (unlikely(PAGE_SIZE / sizeof(struct scatterlist) < nr_frags + 1))
 346                 return -EINVAL;
 347
 348         scl = kcalloc(nr_frags + 1, sizeof(struct scatterlist), GFP_ATOMIC);
 349         if (unlikely(!scl))
 350                 return -ENOMEM;
 351
 352         sg_init_table(scl, nr_frags + 1);
 353         num_sg = skb_to_sgvec(skb, scl, 0, skb->len);
 354         num_dma_bufs = dma_map_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
 355         if (unlikely(!num_dma_bufs)) {
 356                 err = -ENOMEM;
 357                 goto dma_map_sg_failed;
 358         }
 359
 360         /* Prepare the HW SGT structure */
 361         sgt_buf_size = priv->tx_data_offset +
 362                        sizeof(struct dpaa2_sg_entry) * (1 + num_dma_bufs);
 363         sgt_buf = kzalloc(sgt_buf_size + DPAA2_ETH_TX_BUF_ALIGN, GFP_ATOMIC);
 364         if (unlikely(!sgt_buf)) {
 365                 err = -ENOMEM;
 366                 goto sgt_buf_alloc_failed;
 367         }
 368         sgt_buf = PTR_ALIGN(sgt_buf, DPAA2_ETH_TX_BUF_ALIGN);
 369
 370         /* PTA from egress side is passed as is to the confirmation side so
 371          * we need to clear some fields here in order to find consistent values
 372          * on TX confirmation. We are clearing FAS (Frame Annotation Status)
 373          * field from the hardware annotation area
 374          */
 375         fas = dpaa2_get_fas(sgt_buf);
 376         memset(fas, 0, DPAA2_FAS_SIZE);
 377
 378         sgt = (struct dpaa2_sg_entry *)(sgt_buf + priv->tx_data_offset);
 379
 380         /* Fill in the HW SGT structure.
 381          *
 382          * sgt_buf is zeroed out, so the following fields are implicit
 383          * in all sgt entries:
 384          *   - offset is 0
 385          *   - format is 'dpaa2_sg_single'
 386          */
 387         for_each_sg(scl, crt_scl, num_dma_bufs, i) {
 388                 dpaa2_sg_set_addr(&sgt[i], sg_dma_address(crt_scl));
 389                 dpaa2_sg_set_len(&sgt[i], sg_dma_len(crt_scl));
 390         }
 391         dpaa2_sg_set_final(&sgt[i - 1], true);
 392
 393         /* Store the skb backpointer in the SGT buffer.
 394          * Fit the scatterlist and the number of buffers alongside the
 395          * skb backpointer in the software annotation area. We'll need
 396          * all of them on Tx Conf.
 397          */
 398         swa = (struct dpaa2_eth_swa *)sgt_buf;
 399         swa->skb = skb;
 400         swa->scl = scl;
 401         swa->num_sg = num_sg;
 402         swa->num_dma_bufs = num_dma_bufs;
 403
 404         /* Separately map the SGT buffer */
 405         addr = dma_map_single(dev, sgt_buf, sgt_buf_size, DMA_BIDIRECTIONAL);
 406         if (unlikely(dma_mapping_error(dev, addr))) {
 407                 err = -ENOMEM;
 408                 goto dma_map_single_failed;
 409         }
 410         dpaa2_fd_set_offset(fd, priv->tx_data_offset);
 411         dpaa2_fd_set_format(fd, dpaa2_fd_sg);
 412         dpaa2_fd_set_addr(fd, addr);
 413         dpaa2_fd_set_len(fd, skb->len);
 414         dpaa2_fd_set_ctrl(fd, DPAA2_FD_CTRL_ASAL | DPAA2_FD_CTRL_PTA |
 415                           DPAA2_FD_CTRL_PTV1);
 416
 417         return 0;
 418
 419 dma_map_single_failed:
 420         kfree(sgt_buf);
 421 sgt_buf_alloc_failed:
 422         dma_unmap_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
 423 dma_map_sg_failed:
 424         kfree(scl);
 425         return err;
 426 }
 427
 428 /* Create a frame descriptor based on a linear skb */
 429 static int build_single_fd(struct dpaa2_eth_priv *priv,
 430                            struct sk_buff *skb,
 431                            struct dpaa2_fd *fd)
 432 {
 433         struct device *dev = priv->net_dev->dev.parent;
 434         u8 *buffer_start;
 435         struct dpaa2_fas *fas;
 436         struct sk_buff **skbh;
 437         dma_addr_t addr;
 438
 439         buffer_start = PTR_ALIGN(skb->data - priv->tx_data_offset -
 440                                  DPAA2_ETH_TX_BUF_ALIGN,
 441                                  DPAA2_ETH_TX_BUF_ALIGN);
 442
 443         /* PTA from egress side is passed as is to the confirmation side so
 444          * we need to clear some fields here in order to find consistent values
 445          * on TX confirmation. We are clearing FAS (Frame Annotation Status)
 446          * field from the hardware annotation area
 447          */
 448         fas = dpaa2_get_fas(buffer_start);
 449         memset(fas, 0, DPAA2_FAS_SIZE);
 450
 451         /* Store a backpointer to the skb at the beginning of the buffer
 452          * (in the private data area) such that we can release it
 453          * on Tx confirm
 454          */
 455         skbh = (struct sk_buff **)buffer_start;
 456         *skbh = skb;
 457
 458         addr = dma_map_single(dev, buffer_start,
 459                               skb_tail_pointer(skb) - buffer_start,
 460                               DMA_BIDIRECTIONAL);
 461         if (unlikely(dma_mapping_error(dev, addr)))
 462                 return -ENOMEM;
 463
 464         dpaa2_fd_set_addr(fd, addr);
 465         dpaa2_fd_set_offset(fd, (u16)(skb->data - buffer_start));
 466         dpaa2_fd_set_len(fd, skb->len);
 467         dpaa2_fd_set_format(fd, dpaa2_fd_single);
 468         dpaa2_fd_set_ctrl(fd, DPAA2_FD_CTRL_ASAL | DPAA2_FD_CTRL_PTA |
 469                           DPAA2_FD_CTRL_PTV1);
 470
 471         return 0;
 472 }
 473
 474 /* FD freeing routine on the Tx path
 475  *
 476  * DMA-unmap and free FD and possibly SGT buffer allocated on Tx. The skb
 477  * back-pointed to is also freed.
 478  * This can be called either from dpaa2_eth_tx_conf() or on the error path of
 479  * dpaa2_eth_tx().
 480  * Optionally, return the frame annotation status word (FAS), which needs
 481  * to be checked if we're on the confirmation path.
 482  */
 483 static void free_tx_fd(const struct dpaa2_eth_priv *priv,
 484                        const struct dpaa2_fd *fd,
 485                        u32 *status)
 486 {
 487         struct device *dev = priv->net_dev->dev.parent;
 488         dma_addr_t fd_addr;
 489         struct sk_buff **skbh, *skb;
 490         unsigned char *buffer_start;
 491         int unmap_size;
 492         struct scatterlist *scl;
 493         int num_sg, num_dma_bufs;
 494         struct dpaa2_eth_swa *swa;
 495         u8 fd_format = dpaa2_fd_get_format(fd);
 496         struct dpaa2_fas *fas;
 497
 498         fd_addr = dpaa2_fd_get_addr(fd);
 499         skbh = dpaa2_iova_to_virt(priv->iommu_domain, fd_addr);
 500         fas = dpaa2_get_fas(skbh);
 501
 502         if (fd_format == dpaa2_fd_single) {
 503                 skb = *skbh;
 504                 buffer_start = (unsigned char *)skbh;
 505                 /* Accessing the skb buffer is safe before dma unmap, because
 506                  * we didn't map the actual skb shell.
 507                  */
 508                 dma_unmap_single(dev, fd_addr,
 509                                  skb_tail_pointer(skb) - buffer_start,
 510                                  DMA_BIDIRECTIONAL);
 511         } else if (fd_format == dpaa2_fd_sg) {
 512                 swa = (struct dpaa2_eth_swa *)skbh;
 513                 skb = swa->skb;
 514                 scl = swa->scl;
 515                 num_sg = swa->num_sg;
 516                 num_dma_bufs = swa->num_dma_bufs;
 517
 518                 /* Unmap the scatterlist */
 519                 dma_unmap_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
 520                 kfree(scl);
 521
 522                 /* Unmap the SGT buffer */
 523                 unmap_size = priv->tx_data_offset +
 524                        sizeof(struct dpaa2_sg_entry) * (1 + num_dma_bufs);
 525                 dma_unmap_single(dev, fd_addr, unmap_size, DMA_BIDIRECTIONAL);
 526         } else {
 527                 /* Unsupported format, mark it as errored and give up */
 528                 if (status)
 529                         *status = ~0;
 530                 return;
 531         }
 532
 533         /* Read the status from the Frame Annotation after we unmap the first
 534          * buffer but before we free it. The caller function is responsible
 535          * for checking the status value.
 536          */
 537         if (status && (dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV))
 538                 *status = le32_to_cpu(fas->status);
 539
 540         /* Free SGT buffer kmalloc'ed on tx */
 541         if (fd_format != dpaa2_fd_single)
 542                 kfree(skbh);
 543
 544         /* Move on with skb release */
 545         dev_kfree_skb(skb);
 546 }
 547
 548 static netdev_tx_t dpaa2_eth_tx(struct sk_buff *skb, struct net_device *net_dev)
 549 {
 550         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
 551         struct dpaa2_fd fd;
 552         struct rtnl_link_stats64 *percpu_stats;
 553         struct dpaa2_eth_drv_stats *percpu_extras;
 554         struct dpaa2_eth_fq *fq;
 555         u16 queue_mapping;
 556         int err, i;
 557
 558         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 559         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 560
 561         if (unlikely(skb_headroom(skb) < DPAA2_ETH_NEEDED_HEADROOM(priv))) {
 562                 struct sk_buff *ns;
 563
 564                 ns = skb_realloc_headroom(skb, DPAA2_ETH_NEEDED_HEADROOM(priv));
 565                 if (unlikely(!ns)) {
 566                         percpu_stats->tx_dropped++;
 567                         goto err_alloc_headroom;
 568                 }
 569                 dev_kfree_skb(skb);
 570                 skb = ns;
 571         }
 572
 573         /* We'll be holding a back-reference to the skb until Tx Confirmation;
 574          * we don't want that overwritten by a concurrent Tx with a cloned skb.
 575          */
 576         skb = skb_unshare(skb, GFP_ATOMIC);
 577         if (unlikely(!skb)) {
 578                 /* skb_unshare() has already freed the skb */
 579                 percpu_stats->tx_dropped++;
 580                 return NETDEV_TX_OK;
 581         }
 582
 583         /* Setup the FD fields */
 584         memset(&fd, 0, sizeof(fd));
 585
 586         if (skb_is_nonlinear(skb)) {
 587                 err = build_sg_fd(priv, skb, &fd);
 588                 percpu_extras->tx_sg_frames++;
 589                 percpu_extras->tx_sg_bytes += skb->len;
 590         } else {
 591                 err = build_single_fd(priv, skb, &fd);
 592         }
 593
 594         if (unlikely(err)) {
 595                 percpu_stats->tx_dropped++;
 596                 goto err_build_fd;
 597         }
 598
 599         /* Tracing point */
 600         trace_dpaa2_tx_fd(net_dev, &fd);
 601
 602         /* TxConf FQ selection primarily based on cpu affinity; this is
 603          * non-migratable context, so it's safe to call smp_processor_id().
 604          */
 605         queue_mapping = smp_processor_id() % dpaa2_eth_queue_count(priv);
 606         fq = &priv->fq[queue_mapping];
 607         for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) {
 608                 err = dpaa2_io_service_enqueue_qd(NULL, priv->tx_qdid, 0,
 609                                                   fq->tx_qdbin, &fd);
 610                 if (err != -EBUSY)
 611                         break;
 612         }
 613         percpu_extras->tx_portal_busy += i;
 614         if (unlikely(err < 0)) {
 615                 percpu_stats->tx_errors++;
 616                 /* Clean up everything, including freeing the skb */
 617                 free_tx_fd(priv, &fd, NULL);
 618         } else {
 619                 percpu_stats->tx_packets++;
 620                 percpu_stats->tx_bytes += skb->len;
 621         }
 622
 623         return NETDEV_TX_OK;
 624
 625 err_build_fd:
 626 err_alloc_headroom:
 627         dev_kfree_skb(skb);
 628
 629         return NETDEV_TX_OK;
 630 }
 631
 632 /* Tx confirmation frame processing routine */
 633 static void dpaa2_eth_tx_conf(struct dpaa2_eth_priv *priv,
 634                               struct dpaa2_eth_channel *ch,
 635                               const struct dpaa2_fd *fd,
 636                               struct napi_struct *napi __always_unused)
 637 {
 638         struct rtnl_link_stats64 *percpu_stats;
 639         struct dpaa2_eth_drv_stats *percpu_extras;
 640         u32 status = 0;
 641
 642         /* Tracing point */
 643         trace_dpaa2_tx_conf_fd(priv->net_dev, fd);
 644
 645         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 646         percpu_extras->tx_conf_frames++;
 647         percpu_extras->tx_conf_bytes += dpaa2_fd_get_len(fd);
 648
 649         free_tx_fd(priv, fd, &status);
 650
 651         if (unlikely(status & DPAA2_ETH_TXCONF_ERR_MASK)) {
 652                 percpu_stats = this_cpu_ptr(priv->percpu_stats);
 653                 /* Tx-conf logically pertains to the egress path. */
 654                 percpu_stats->tx_errors++;
 655         }
 656 }
 657
 658 static int set_rx_csum(struct dpaa2_eth_priv *priv, bool enable)
 659 {
 660         int err;
 661
 662         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 663                                DPNI_OFF_RX_L3_CSUM, enable);
 664         if (err) {
 665                 netdev_err(priv->net_dev,
 666                            "dpni_set_offload(RX_L3_CSUM) failed\n");
 667                 return err;
 668         }
 669
 670         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 671                                DPNI_OFF_RX_L4_CSUM, enable);
 672         if (err) {
 673                 netdev_err(priv->net_dev,
 674                            "dpni_set_offload(RX_L4_CSUM) failed\n");
 675                 return err;
 676         }
 677
 678         return 0;
 679 }
 680
 681 static int set_tx_csum(struct dpaa2_eth_priv *priv, bool enable)
 682 {
 683         int err;
 684
 685         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 686                                DPNI_OFF_TX_L3_CSUM, enable);
 687         if (err) {
 688                 netdev_err(priv->net_dev, "dpni_set_offload(TX_L3_CSUM) failed\n");
 689                 return err;
 690         }
 691
 692         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 693                                DPNI_OFF_TX_L4_CSUM, enable);
 694         if (err) {
 695                 netdev_err(priv->net_dev, "dpni_set_offload(TX_L4_CSUM) failed\n");
 696                 return err;
 697         }
 698
 699         return 0;
 700 }
 701
 702 /* Perform a single release command to add buffers
 703  * to the specified buffer pool
 704  */
 705 static int add_bufs(struct dpaa2_eth_priv *priv, u16 bpid)
 706 {
 707         struct device *dev = priv->net_dev->dev.parent;
 708         u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
 709         void *buf;
 710         dma_addr_t addr;
 711         int i;
 712
 713         for (i = 0; i < DPAA2_ETH_BUFS_PER_CMD; i++) {
 714                 /* Allocate buffer visible to WRIOP + skb shared info +
 715                  * alignment padding
 716                  */
 717                 buf = napi_alloc_frag(DPAA2_ETH_BUF_RAW_SIZE);
 718                 if (unlikely(!buf))
 719                         goto err_alloc;
 720
 721                 buf = PTR_ALIGN(buf, DPAA2_ETH_RX_BUF_ALIGN);
 722
 723                 addr = dma_map_single(dev, buf, DPAA2_ETH_RX_BUF_SIZE,
 724                                       DMA_FROM_DEVICE);
 725                 if (unlikely(dma_mapping_error(dev, addr)))
 726                         goto err_map;
 727
 728                 buf_array[i] = addr;
 729
 730                 /* tracing point */
 731                 trace_dpaa2_eth_buf_seed(priv->net_dev,
 732                                          buf, DPAA2_ETH_BUF_RAW_SIZE,
 733                                          addr, DPAA2_ETH_RX_BUF_SIZE,
 734                                          bpid);
 735         }
 736
 737 release_bufs:
 738         /* In case the portal is busy, retry until successful.
 739          * The buffer release function would only fail if the QBMan portal
 740          * was busy, which implies portal contention (i.e. more CPUs than
 741          * portals, i.e. GPPs w/o affine DPIOs). For all practical purposes,
 742          * there is little we can realistically do, short of giving up -
 743          * in which case we'd risk depleting the buffer pool and never again
 744          * receiving the Rx interrupt which would kick-start the refill logic.
 745          * So just keep retrying, at the risk of being moved to ksoftirqd.
 746          */
 747         while (dpaa2_io_service_release(NULL, bpid, buf_array, i))
 748                 cpu_relax();
 749         return i;
 750
 751 err_map:
 752         skb_free_frag(buf);
 753 err_alloc:
 754         if (i)
 755                 goto release_bufs;
 756
 757         return 0;
 758 }
 759
 760 static int seed_pool(struct dpaa2_eth_priv *priv, u16 bpid)
 761 {
 762         int i, j;
 763         int new_count;
 764
 765         /* This is the lazy seeding of Rx buffer pools.
 766          * dpaa2_add_bufs() is also used on the Rx hotpath and calls
 767          * napi_alloc_frag(). The trouble with that is that it in turn ends up
 768          * calling this_cpu_ptr(), which mandates execution in atomic context.
 769          * Rather than splitting up the code, do a one-off preempt disable.
 770          */
 771         preempt_disable();
 772         for (j = 0; j < priv->num_channels; j++) {
 773                 for (i = 0; i < DPAA2_ETH_NUM_BUFS;
 774                      i += DPAA2_ETH_BUFS_PER_CMD) {
 775                         new_count = add_bufs(priv, bpid);
 776                         priv->channel[j]->buf_count += new_count;
 777
 778                         if (new_count < DPAA2_ETH_BUFS_PER_CMD) {
 779                                 preempt_enable();
 780                                 return -ENOMEM;
 781                         }
 782                 }
 783         }
 784         preempt_enable();
 785
 786         return 0;
 787 }
 788
 789 /**
 790  * Drain the specified number of buffers from the DPNI's private buffer pool.
 791  * @count must not exceeed DPAA2_ETH_BUFS_PER_CMD
 792  */
 793 static void drain_bufs(struct dpaa2_eth_priv *priv, int count)
 794 {
 795         struct device *dev = priv->net_dev->dev.parent;
 796         u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
 797         void *vaddr;
 798         int ret, i;
 799
 800         do {
 801                 ret = dpaa2_io_service_acquire(NULL, priv->dpbp_attrs.bpid,
 802                                                buf_array, count);
 803                 if (ret < 0) {
 804                         netdev_err(priv->net_dev, "dpaa2_io_service_acquire() failed\n");
 805                         return;
 806                 }
 807                 for (i = 0; i < ret; i++) {
 808                         /* Same logic as on regular Rx path */
 809                         vaddr = dpaa2_iova_to_virt(priv->iommu_domain,
 810                                                    buf_array[i]);
 811                         dma_unmap_single(dev, buf_array[i],
 812                                          DPAA2_ETH_RX_BUF_SIZE,
 813                                          DMA_FROM_DEVICE);
 814                         skb_free_frag(vaddr);
 815                 }
 816         } while (ret);
 817 }
 818
 819 static void drain_pool(struct dpaa2_eth_priv *priv)
 820 {
 821         int i;
 822
 823         drain_bufs(priv, DPAA2_ETH_BUFS_PER_CMD);
 824         drain_bufs(priv, 1);
 825
 826         for (i = 0; i < priv->num_channels; i++)
 827                 priv->channel[i]->buf_count = 0;
 828 }
 829
 830 /* Function is called from softirq context only, so we don't need to guard
 831  * the access to percpu count
 832  */
 833 static int refill_pool(struct dpaa2_eth_priv *priv,
 834                        struct dpaa2_eth_channel *ch,
 835                        u16 bpid)
 836 {
 837         int new_count;
 838
 839         if (likely(ch->buf_count >= DPAA2_ETH_REFILL_THRESH))
 840                 return 0;
 841
 842         do {
 843                 new_count = add_bufs(priv, bpid);
 844                 if (unlikely(!new_count)) {
 845                         /* Out of memory; abort for now, we'll try later on */
 846                         break;
 847                 }
 848                 ch->buf_count += new_count;
 849         } while (ch->buf_count < DPAA2_ETH_NUM_BUFS);
 850
 851         if (unlikely(ch->buf_count < DPAA2_ETH_NUM_BUFS))
 852                 return -ENOMEM;
 853
 854         return 0;
 855 }
 856
 857 static int pull_channel(struct dpaa2_eth_channel *ch)
 858 {
 859         int err;
 860         int dequeues = -1;
 861
 862         /* Retry while portal is busy */
 863         do {
 864                 err = dpaa2_io_service_pull_channel(NULL, ch->ch_id, ch->store);
 865                 dequeues++;
 866                 cpu_relax();
 867         } while (err == -EBUSY);
 868
 869         ch->stats.dequeue_portal_busy += dequeues;
 870         if (unlikely(err))
 871                 ch->stats.pull_err++;
 872
 873         return err;
 874 }
 875
 876 /* NAPI poll routine
 877  *
 878  * Frames are dequeued from the QMan channel associated with this NAPI context.
 879  * Rx, Tx confirmation and (if configured) Rx error frames all count
 880  * towards the NAPI budget.
 881  */
 882 static int dpaa2_eth_poll(struct napi_struct *napi, int budget)
 883 {
 884         struct dpaa2_eth_channel *ch;
 885         int cleaned = 0, store_cleaned;
 886         struct dpaa2_eth_priv *priv;
 887         int err;
 888
 889         ch = container_of(napi, struct dpaa2_eth_channel, napi);
 890         priv = ch->priv;
 891
 892         while (cleaned < budget) {
 893                 err = pull_channel(ch);
 894                 if (unlikely(err))
 895                         break;
 896
 897                 /* Refill pool if appropriate */
 898                 refill_pool(priv, ch, priv->dpbp_attrs.bpid);
 899
 900                 store_cleaned = consume_frames(ch);
 901                 cleaned += store_cleaned;
 902
 903                 /* If we have enough budget left for a full store,
 904                  * try a new pull dequeue, otherwise we're done here
 905                  */
 906                 if (store_cleaned == 0 ||
 907                     cleaned > budget - DPAA2_ETH_STORE_SIZE)
 908                         break;
 909         }
 910
 911         if (cleaned < budget) {
 912                 napi_complete_done(napi, cleaned);
 913                 /* Re-enable data available notifications */
 914                 do {
 915                         err = dpaa2_io_service_rearm(NULL, &ch->nctx);
 916                         cpu_relax();
 917                 } while (err == -EBUSY);
 918         }
 919
 920         ch->stats.frames += cleaned;
 921
 922         return cleaned;
 923 }
 924
 925 static void enable_ch_napi(struct dpaa2_eth_priv *priv)
 926 {
 927         struct dpaa2_eth_channel *ch;
 928         int i;
 929
 930         for (i = 0; i < priv->num_channels; i++) {
 931                 ch = priv->channel[i];
 932                 napi_enable(&ch->napi);
 933         }
 934 }
 935
 936 static void disable_ch_napi(struct dpaa2_eth_priv *priv)
 937 {
 938         struct dpaa2_eth_channel *ch;
 939         int i;
 940
 941         for (i = 0; i < priv->num_channels; i++) {
 942                 ch = priv->channel[i];
 943                 napi_disable(&ch->napi);
 944         }
 945 }
 946
 947 static int link_state_update(struct dpaa2_eth_priv *priv)
 948 {
 949         struct dpni_link_state state;
 950         int err;
 951
 952         err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
 953         if (unlikely(err)) {
 954                 netdev_err(priv->net_dev,
 955                            "dpni_get_link_state() failed\n");
 956                 return err;
 957         }
 958
 959         /* Chech link state; speed / duplex changes are not treated yet */
 960         if (priv->link_state.up == state.up)
 961                 return 0;
 962
 963         priv->link_state = state;
 964         if (state.up) {
 965                 netif_carrier_on(priv->net_dev);
 966                 netif_tx_start_all_queues(priv->net_dev);
 967         } else {
 968                 netif_tx_stop_all_queues(priv->net_dev);
 969                 netif_carrier_off(priv->net_dev);
 970         }
 971
 972         netdev_info(priv->net_dev, "Link Event: state %s\n",
 973                     state.up ? "up" : "down");
 974
 975         return 0;
 976 }
 977
 978 static int dpaa2_eth_open(struct net_device *net_dev)
 979 {
 980         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
 981         int err;
 982
 983         err = seed_pool(priv, priv->dpbp_attrs.bpid);
 984         if (err) {
 985                 /* Not much to do; the buffer pool, though not filled up,
 986                  * may still contain some buffers which would enable us
 987                  * to limp on.
 988                  */
 989                 netdev_err(net_dev, "Buffer seeding failed for DPBP %d (bpid=%d)\n",
 990                            priv->dpbp_dev->obj_desc.id, priv->dpbp_attrs.bpid);
 991         }
 992
 993         /* We'll only start the txqs when the link is actually ready; make sure
 994          * we don't race against the link up notification, which may come
 995          * immediately after dpni_enable();
 996          */
 997         netif_tx_stop_all_queues(net_dev);
 998         enable_ch_napi(priv);
 999         /* Also, explicitly set carrier off, otherwise netif_carrier_ok() will
1000          * return true and cause 'ip link show' to report the LOWER_UP flag,
1001          * even though the link notification wasn't even received.
1002          */
1003         netif_carrier_off(net_dev);
1004
1005         err = dpni_enable(priv->mc_io, 0, priv->mc_token);
1006         if (err < 0) {
1007                 netdev_err(net_dev, "dpni_enable() failed\n");
1008                 goto enable_err;
1009         }
1010
1011         /* If the DPMAC object has already processed the link up interrupt,
1012          * we have to learn the link state ourselves.
1013          */
1014         err = link_state_update(priv);
1015         if (err < 0) {
1016                 netdev_err(net_dev, "Can't update link state\n");
1017                 goto link_state_err;
1018         }
1019
1020         return 0;
1021
1022 link_state_err:
1023 enable_err:
1024         disable_ch_napi(priv);
1025         drain_pool(priv);
1026         return err;
1027 }
1028
1029 /* The DPIO store must be empty when we call this,
1030  * at the end of every NAPI cycle.
1031  */
1032 static u32 drain_channel(struct dpaa2_eth_priv *priv,
1033                          struct dpaa2_eth_channel *ch)
1034 {
1035         u32 drained = 0, total = 0;
1036
1037         do {
1038                 pull_channel(ch);
1039                 drained = consume_frames(ch);
1040                 total += drained;
1041         } while (drained);
1042
1043         return total;
1044 }
1045
1046 static u32 drain_ingress_frames(struct dpaa2_eth_priv *priv)
1047 {
1048         struct dpaa2_eth_channel *ch;
1049         int i;
1050         u32 drained = 0;
1051
1052         for (i = 0; i < priv->num_channels; i++) {
1053                 ch = priv->channel[i];
1054                 drained += drain_channel(priv, ch);
1055         }
1056
1057         return drained;
1058 }
1059
1060 static int dpaa2_eth_stop(struct net_device *net_dev)
1061 {
1062         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1063         int dpni_enabled;
1064         int retries = 10;
1065         u32 drained;
1066
1067         netif_tx_stop_all_queues(net_dev);
1068         netif_carrier_off(net_dev);
1069
1070         /* Loop while dpni_disable() attempts to drain the egress FQs
1071          * and confirm them back to us.
1072          */
1073         do {
1074                 dpni_disable(priv->mc_io, 0, priv->mc_token);
1075                 dpni_is_enabled(priv->mc_io, 0, priv->mc_token, &dpni_enabled);
1076                 if (dpni_enabled)
1077                         /* Allow the hardware some slack */
1078                         msleep(100);
1079         } while (dpni_enabled && --retries);
1080         if (!retries) {
1081                 netdev_warn(net_dev, "Retry count exceeded disabling DPNI\n");
1082                 /* Must go on and disable NAPI nonetheless, so we don't crash at
1083                  * the next "ifconfig up"
1084                  */
1085         }
1086
1087         /* Wait for NAPI to complete on every core and disable it.
1088          * In particular, this will also prevent NAPI from being rescheduled if
1089          * a new CDAN is serviced, effectively discarding the CDAN. We therefore
1090          * don't even need to disarm the channels, except perhaps for the case
1091          * of a huge coalescing value.
1092          */
1093         disable_ch_napi(priv);
1094
1095          /* Manually drain the Rx and TxConf queues */
1096         drained = drain_ingress_frames(priv);
1097         if (drained)
1098                 netdev_dbg(net_dev, "Drained %d frames.\n", drained);
1099
1100         /* Empty the buffer pool */
1101         drain_pool(priv);
1102
1103         return 0;
1104 }
1105
1106 static int dpaa2_eth_init(struct net_device *net_dev)
1107 {
1108         u64 supported = 0;
1109         u64 not_supported = 0;
1110         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1111         u32 options = priv->dpni_attrs.options;
1112
1113         /* Capabilities listing */
1114         supported |= IFF_LIVE_ADDR_CHANGE;
1115
1116         if (options & DPNI_OPT_NO_MAC_FILTER)
1117                 not_supported |= IFF_UNICAST_FLT;
1118         else
1119                 supported |= IFF_UNICAST_FLT;
1120
1121         net_dev->priv_flags |= supported;
1122         net_dev->priv_flags &= ~not_supported;
1123
1124         /* Features */
1125         net_dev->features = NETIF_F_RXCSUM |
1126                             NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1127                             NETIF_F_SG | NETIF_F_HIGHDMA |
1128                             NETIF_F_LLTX;
1129         net_dev->hw_features = net_dev->features;
1130
1131         return 0;
1132 }
1133
1134 static int dpaa2_eth_set_addr(struct net_device *net_dev, void *addr)
1135 {
1136         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1137         struct device *dev = net_dev->dev.parent;
1138         int err;
1139
1140         err = eth_mac_addr(net_dev, addr);
1141         if (err < 0) {
1142                 dev_err(dev, "eth_mac_addr() failed (%d)\n", err);
1143                 return err;
1144         }
1145
1146         err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
1147                                         net_dev->dev_addr);
1148         if (err) {
1149                 dev_err(dev, "dpni_set_primary_mac_addr() failed (%d)\n", err);
1150                 return err;
1151         }
1152
1153         return 0;
1154 }
1155
1156 /** Fill in counters maintained by the GPP driver. These may be different from
1157  * the hardware counters obtained by ethtool.
1158  */
1159 static void dpaa2_eth_get_stats(struct net_device *net_dev,
1160                                 struct rtnl_link_stats64 *stats)
1161 {
1162         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1163         struct rtnl_link_stats64 *percpu_stats;
1164         u64 *cpustats;
1165         u64 *netstats = (u64 *)stats;
1166         int i, j;
1167         int num = sizeof(struct rtnl_link_stats64) / sizeof(u64);
1168
1169         for_each_possible_cpu(i) {
1170                 percpu_stats = per_cpu_ptr(priv->percpu_stats, i);
1171                 cpustats = (u64 *)percpu_stats;
1172                 for (j = 0; j < num; j++)
1173                         netstats[j] += cpustats[j];
1174         }
1175 }
1176
1177 static int dpaa2_eth_change_mtu(struct net_device *net_dev, int mtu)
1178 {
1179         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1180         int err;
1181
1182         /* Set the maximum Rx frame length to match the transmit side;
1183          * account for L2 headers when computing the MFL
1184          */
1185         err = dpni_set_max_frame_length(priv->mc_io, 0, priv->mc_token,
1186                                         (u16)DPAA2_ETH_L2_MAX_FRM(mtu));
1187         if (err) {
1188                 netdev_err(net_dev, "dpni_set_max_frame_length() failed\n");
1189                 return err;
1190         }
1191
1192         net_dev->mtu = mtu;
1193         return 0;
1194 }
1195
1196 /* Copy mac unicast addresses from @net_dev to @priv.
1197  * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1198  */
1199 static void add_uc_hw_addr(const struct net_device *net_dev,
1200                            struct dpaa2_eth_priv *priv)
1201 {
1202         struct netdev_hw_addr *ha;
1203         int err;
1204
1205         netdev_for_each_uc_addr(ha, net_dev) {
1206                 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1207                                         ha->addr);
1208                 if (err)
1209                         netdev_warn(priv->net_dev,
1210                                     "Could not add ucast MAC %pM to the filtering table (err %d)\n",
1211                                     ha->addr, err);
1212         }
1213 }
1214
1215 /* Copy mac multicast addresses from @net_dev to @priv
1216  * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1217  */
1218 static void add_mc_hw_addr(const struct net_device *net_dev,
1219                            struct dpaa2_eth_priv *priv)
1220 {
1221         struct netdev_hw_addr *ha;
1222         int err;
1223
1224         netdev_for_each_mc_addr(ha, net_dev) {
1225                 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1226                                         ha->addr);
1227                 if (err)
1228                         netdev_warn(priv->net_dev,
1229                                     "Could not add mcast MAC %pM to the filtering table (err %d)\n",
1230                                     ha->addr, err);
1231         }
1232 }
1233
1234 static void dpaa2_eth_set_rx_mode(struct net_device *net_dev)
1235 {
1236         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1237         int uc_count = netdev_uc_count(net_dev);
1238         int mc_count = netdev_mc_count(net_dev);
1239         u8 max_mac = priv->dpni_attrs.mac_filter_entries;
1240         u32 options = priv->dpni_attrs.options;
1241         u16 mc_token = priv->mc_token;
1242         struct fsl_mc_io *mc_io = priv->mc_io;
1243         int err;
1244
1245         /* Basic sanity checks; these probably indicate a misconfiguration */
1246         if (options & DPNI_OPT_NO_MAC_FILTER && max_mac != 0)
1247                 netdev_info(net_dev,
1248                             "mac_filter_entries=%d, DPNI_OPT_NO_MAC_FILTER option must be disabled\n",
1249                             max_mac);
1250
1251         /* Force promiscuous if the uc or mc counts exceed our capabilities. */
1252         if (uc_count > max_mac) {
1253                 netdev_info(net_dev,
1254                             "Unicast addr count reached %d, max allowed is %d; forcing promisc\n",
1255                             uc_count, max_mac);
1256                 goto force_promisc;
1257         }
1258         if (mc_count + uc_count > max_mac) {
1259                 netdev_info(net_dev,
1260                             "Unicast + multicast addr count reached %d, max allowed is %d; forcing promisc\n",
1261                             uc_count + mc_count, max_mac);
1262                 goto force_mc_promisc;
1263         }
1264
1265         /* Adjust promisc settings due to flag combinations */
1266         if (net_dev->flags & IFF_PROMISC)
1267                 goto force_promisc;
1268         if (net_dev->flags & IFF_ALLMULTI) {
1269                 /* First, rebuild unicast filtering table. This should be done
1270                  * in promisc mode, in order to avoid frame loss while we
1271                  * progressively add entries to the table.
1272                  * We don't know whether we had been in promisc already, and
1273                  * making an MC call to find out is expensive; so set uc promisc
1274                  * nonetheless.
1275                  */
1276                 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1277                 if (err)
1278                         netdev_warn(net_dev, "Can't set uc promisc\n");
1279
1280                 /* Actual uc table reconstruction. */
1281                 err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 0);
1282                 if (err)
1283                         netdev_warn(net_dev, "Can't clear uc filters\n");
1284                 add_uc_hw_addr(net_dev, priv);
1285
1286                 /* Finally, clear uc promisc and set mc promisc as requested. */
1287                 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1288                 if (err)
1289                         netdev_warn(net_dev, "Can't clear uc promisc\n");
1290                 goto force_mc_promisc;
1291         }
1292
1293         /* Neither unicast, nor multicast promisc will be on... eventually.
1294          * For now, rebuild mac filtering tables while forcing both of them on.
1295          */
1296         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1297         if (err)
1298                 netdev_warn(net_dev, "Can't set uc promisc (%d)\n", err);
1299         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1300         if (err)
1301                 netdev_warn(net_dev, "Can't set mc promisc (%d)\n", err);
1302
1303         /* Actual mac filtering tables reconstruction */
1304         err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 1);
1305         if (err)
1306                 netdev_warn(net_dev, "Can't clear mac filters\n");
1307         add_mc_hw_addr(net_dev, priv);
1308         add_uc_hw_addr(net_dev, priv);
1309
1310         /* Now we can clear both ucast and mcast promisc, without risking
1311          * to drop legitimate frames anymore.
1312          */
1313         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1314         if (err)
1315                 netdev_warn(net_dev, "Can't clear ucast promisc\n");
1316         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 0);
1317         if (err)
1318                 netdev_warn(net_dev, "Can't clear mcast promisc\n");
1319
1320         return;
1321
1322 force_promisc:
1323         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1324         if (err)
1325                 netdev_warn(net_dev, "Can't set ucast promisc\n");
1326 force_mc_promisc:
1327         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1328         if (err)
1329                 netdev_warn(net_dev, "Can't set mcast promisc\n");
1330 }
1331
1332 static int dpaa2_eth_set_features(struct net_device *net_dev,
1333                                   netdev_features_t features)
1334 {
1335         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1336         netdev_features_t changed = features ^ net_dev->features;
1337         bool enable;
1338         int err;
1339
1340         if (changed & NETIF_F_RXCSUM) {
1341                 enable = !!(features & NETIF_F_RXCSUM);
1342                 err = set_rx_csum(priv, enable);
1343                 if (err)
1344                         return err;
1345         }
1346
1347         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) {
1348                 enable = !!(features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
1349                 err = set_tx_csum(priv, enable);
1350                 if (err)
1351                         return err;
1352         }
1353
1354         return 0;
1355 }
1356
1357 static const struct net_device_ops dpaa2_eth_ops = {
1358         .ndo_open = dpaa2_eth_open,
1359         .ndo_start_xmit = dpaa2_eth_tx,
1360         .ndo_stop = dpaa2_eth_stop,
1361         .ndo_init = dpaa2_eth_init,
1362         .ndo_set_mac_address = dpaa2_eth_set_addr,
1363         .ndo_get_stats64 = dpaa2_eth_get_stats,
1364         .ndo_change_mtu = dpaa2_eth_change_mtu,
1365         .ndo_set_rx_mode = dpaa2_eth_set_rx_mode,
1366         .ndo_set_features = dpaa2_eth_set_features,
1367 };
1368
1369 static void cdan_cb(struct dpaa2_io_notification_ctx *ctx)
1370 {
1371         struct dpaa2_eth_channel *ch;
1372
1373         ch = container_of(ctx, struct dpaa2_eth_channel, nctx);
1374
1375         /* Update NAPI statistics */
1376         ch->stats.cdan++;
1377
1378         napi_schedule_irqoff(&ch->napi);
1379 }
1380
1381 /* Allocate and configure a DPCON object */
1382 static struct fsl_mc_device *setup_dpcon(struct dpaa2_eth_priv *priv)
1383 {
1384         struct fsl_mc_device *dpcon;
1385         struct device *dev = priv->net_dev->dev.parent;
1386         struct dpcon_attr attrs;
1387         int err;
1388
1389         err = fsl_mc_object_allocate(to_fsl_mc_device(dev),
1390                                      FSL_MC_POOL_DPCON, &dpcon);
1391         if (err) {
1392                 dev_info(dev, "Not enough DPCONs, will go on as-is\n");
1393                 return NULL;
1394         }
1395
1396         err = dpcon_open(priv->mc_io, 0, dpcon->obj_desc.id, &dpcon->mc_handle);
1397         if (err) {
1398                 dev_err(dev, "dpcon_open() failed\n");
1399                 goto err_open;
1400         }
1401
1402         err = dpcon_reset(priv->mc_io, 0, dpcon->mc_handle);
1403         if (err) {
1404                 dev_err(dev, "dpcon_reset() failed\n");
1405                 goto err_reset;
1406         }
1407
1408         err = dpcon_get_attributes(priv->mc_io, 0, dpcon->mc_handle, &attrs);
1409         if (err) {
1410                 dev_err(dev, "dpcon_get_attributes() failed\n");
1411                 goto err_get_attr;
1412         }
1413
1414         err = dpcon_enable(priv->mc_io, 0, dpcon->mc_handle);
1415         if (err) {
1416                 dev_err(dev, "dpcon_enable() failed\n");
1417                 goto err_enable;
1418         }
1419
1420         return dpcon;
1421
1422 err_enable:
1423 err_get_attr:
1424 err_reset:
1425         dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
1426 err_open:
1427         fsl_mc_object_free(dpcon);
1428
1429         return NULL;
1430 }
1431
1432 static void free_dpcon(struct dpaa2_eth_priv *priv,
1433                        struct fsl_mc_device *dpcon)
1434 {
1435         dpcon_disable(priv->mc_io, 0, dpcon->mc_handle);
1436         dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
1437         fsl_mc_object_free(dpcon);
1438 }
1439
1440 static struct dpaa2_eth_channel *
1441 alloc_channel(struct dpaa2_eth_priv *priv)
1442 {
1443         struct dpaa2_eth_channel *channel;
1444         struct dpcon_attr attr;
1445         struct device *dev = priv->net_dev->dev.parent;
1446         int err;
1447
1448         channel = kzalloc(sizeof(*channel), GFP_KERNEL);
1449         if (!channel)
1450                 return NULL;
1451
1452         channel->dpcon = setup_dpcon(priv);
1453         if (!channel->dpcon)
1454                 goto err_setup;
1455
1456         err = dpcon_get_attributes(priv->mc_io, 0, channel->dpcon->mc_handle,
1457                                    &attr);
1458         if (err) {
1459                 dev_err(dev, "dpcon_get_attributes() failed\n");
1460                 goto err_get_attr;
1461         }
1462
1463         channel->dpcon_id = attr.id;
1464         channel->ch_id = attr.qbman_ch_id;
1465         channel->priv = priv;
1466
1467         return channel;
1468
1469 err_get_attr:
1470         free_dpcon(priv, channel->dpcon);
1471 err_setup:
1472         kfree(channel);
1473         return NULL;
1474 }
1475
1476 static void free_channel(struct dpaa2_eth_priv *priv,
1477                          struct dpaa2_eth_channel *channel)
1478 {
1479         free_dpcon(priv, channel->dpcon);
1480         kfree(channel);
1481 }
1482
1483 /* DPIO setup: allocate and configure QBMan channels, setup core affinity
1484  * and register data availability notifications
1485  */
1486 static int setup_dpio(struct dpaa2_eth_priv *priv)
1487 {
1488         struct dpaa2_io_notification_ctx *nctx;
1489         struct dpaa2_eth_channel *channel;
1490         struct dpcon_notification_cfg dpcon_notif_cfg;
1491         struct device *dev = priv->net_dev->dev.parent;
1492         int i, err;
1493
1494         /* We want the ability to spread ingress traffic (RX, TX conf) to as
1495          * many cores as possible, so we need one channel for each core
1496          * (unless there's fewer queues than cores, in which case the extra
1497          * channels would be wasted).
1498          * Allocate one channel per core and register it to the core's
1499          * affine DPIO. If not enough channels are available for all cores
1500          * or if some cores don't have an affine DPIO, there will be no
1501          * ingress frame processing on those cores.
1502          */
1503         cpumask_clear(&priv->dpio_cpumask);
1504         for_each_online_cpu(i) {
1505                 /* Try to allocate a channel */
1506                 channel = alloc_channel(priv);
1507                 if (!channel) {
1508                         dev_info(dev,
1509                                  "No affine channel for cpu %d and above\n", i);
1510                         err = -ENODEV;
1511                         goto err_alloc_ch;
1512                 }
1513
1514                 priv->channel[priv->num_channels] = channel;
1515
1516                 nctx = &channel->nctx;
1517                 nctx->is_cdan = 1;
1518                 nctx->cb = cdan_cb;
1519                 nctx->id = channel->ch_id;
1520                 nctx->desired_cpu = i;
1521
1522                 /* Register the new context */
1523                 err = dpaa2_io_service_register(NULL, nctx);
1524                 if (err) {
1525                         dev_dbg(dev, "No affine DPIO for cpu %d\n", i);
1526                         /* If no affine DPIO for this core, there's probably
1527                          * none available for next cores either. Signal we want
1528                          * to retry later, in case the DPIO devices weren't
1529                          * probed yet.
1530                          */
1531                         err = -EPROBE_DEFER;
1532                         goto err_service_reg;
1533                 }
1534
1535                 /* Register DPCON notification with MC */
1536                 dpcon_notif_cfg.dpio_id = nctx->dpio_id;
1537                 dpcon_notif_cfg.priority = 0;
1538                 dpcon_notif_cfg.user_ctx = nctx->qman64;
1539                 err = dpcon_set_notification(priv->mc_io, 0,
1540                                              channel->dpcon->mc_handle,
1541                                              &dpcon_notif_cfg);
1542                 if (err) {
1543                         dev_err(dev, "dpcon_set_notification failed()\n");
1544                         goto err_set_cdan;
1545                 }
1546
1547                 /* If we managed to allocate a channel and also found an affine
1548                  * DPIO for this core, add it to the final mask
1549                  */
1550                 cpumask_set_cpu(i, &priv->dpio_cpumask);
1551                 priv->num_channels++;
1552
1553                 /* Stop if we already have enough channels to accommodate all
1554                  * RX and TX conf queues
1555                  */
1556                 if (priv->num_channels == dpaa2_eth_queue_count(priv))
1557                         break;
1558         }
1559
1560         return 0;
1561
1562 err_set_cdan:
1563         dpaa2_io_service_deregister(NULL, nctx);
1564 err_service_reg:
1565         free_channel(priv, channel);
1566 err_alloc_ch:
1567         if (cpumask_empty(&priv->dpio_cpumask)) {
1568                 dev_err(dev, "No cpu with an affine DPIO/DPCON\n");
1569                 return err;
1570         }
1571
1572         dev_info(dev, "Cores %*pbl available for processing ingress traffic\n",
1573                  cpumask_pr_args(&priv->dpio_cpumask));
1574
1575         return 0;
1576 }
1577
1578 static void free_dpio(struct dpaa2_eth_priv *priv)
1579 {
1580         int i;
1581         struct dpaa2_eth_channel *ch;
1582
1583         /* deregister CDAN notifications and free channels */
1584         for (i = 0; i < priv->num_channels; i++) {
1585                 ch = priv->channel[i];
1586                 dpaa2_io_service_deregister(NULL, &ch->nctx);
1587                 free_channel(priv, ch);
1588         }
1589 }
1590
1591 static struct dpaa2_eth_channel *get_affine_channel(struct dpaa2_eth_priv *priv,
1592                                                     int cpu)
1593 {
1594         struct device *dev = priv->net_dev->dev.parent;
1595         int i;
1596
1597         for (i = 0; i < priv->num_channels; i++)
1598                 if (priv->channel[i]->nctx.desired_cpu == cpu)
1599                         return priv->channel[i];
1600
1601         /* We should never get here. Issue a warning and return
1602          * the first channel, because it's still better than nothing
1603          */
1604         dev_warn(dev, "No affine channel found for cpu %d\n", cpu);
1605
1606         return priv->channel[0];
1607 }
1608
1609 static void set_fq_affinity(struct dpaa2_eth_priv *priv)
1610 {
1611         struct device *dev = priv->net_dev->dev.parent;
1612         struct dpaa2_eth_fq *fq;
1613         int rx_cpu, txc_cpu;
1614         int i;
1615
1616         /* For each FQ, pick one channel/CPU to deliver frames to.
1617          * This may well change at runtime, either through irqbalance or
1618          * through direct user intervention.
1619          */
1620         rx_cpu = txc_cpu = cpumask_first(&priv->dpio_cpumask);
1621
1622         for (i = 0; i < priv->num_fqs; i++) {
1623                 fq = &priv->fq[i];
1624                 switch (fq->type) {
1625                 case DPAA2_RX_FQ:
1626                         fq->target_cpu = rx_cpu;
1627                         rx_cpu = cpumask_next(rx_cpu, &priv->dpio_cpumask);
1628                         if (rx_cpu >= nr_cpu_ids)
1629                                 rx_cpu = cpumask_first(&priv->dpio_cpumask);
1630                         break;
1631                 case DPAA2_TX_CONF_FQ:
1632                         fq->target_cpu = txc_cpu;
1633                         txc_cpu = cpumask_next(txc_cpu, &priv->dpio_cpumask);
1634                         if (txc_cpu >= nr_cpu_ids)
1635                                 txc_cpu = cpumask_first(&priv->dpio_cpumask);
1636                         break;
1637                 default:
1638                         dev_err(dev, "Unknown FQ type: %d\n", fq->type);
1639                 }
1640                 fq->channel = get_affine_channel(priv, fq->target_cpu);
1641         }
1642 }
1643
1644 static void setup_fqs(struct dpaa2_eth_priv *priv)
1645 {
1646         int i;
1647
1648         /* We have one TxConf FQ per Tx flow.
1649          * The number of Tx and Rx queues is the same.
1650          * Tx queues come first in the fq array.
1651          */
1652         for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
1653                 priv->fq[priv->num_fqs].type = DPAA2_TX_CONF_FQ;
1654                 priv->fq[priv->num_fqs].consume = dpaa2_eth_tx_conf;
1655                 priv->fq[priv->num_fqs++].flowid = (u16)i;
1656         }
1657
1658         for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
1659                 priv->fq[priv->num_fqs].type = DPAA2_RX_FQ;
1660                 priv->fq[priv->num_fqs].consume = dpaa2_eth_rx;
1661                 priv->fq[priv->num_fqs++].flowid = (u16)i;
1662         }
1663
1664         /* For each FQ, decide on which core to process incoming frames */
1665         set_fq_affinity(priv);
1666 }
1667
1668 /* Allocate and configure one buffer pool for each interface */
1669 static int setup_dpbp(struct dpaa2_eth_priv *priv)
1670 {
1671         int err;
1672         struct fsl_mc_device *dpbp_dev;
1673         struct device *dev = priv->net_dev->dev.parent;
1674
1675         err = fsl_mc_object_allocate(to_fsl_mc_device(dev), FSL_MC_POOL_DPBP,
1676                                      &dpbp_dev);
1677         if (err) {
1678                 dev_err(dev, "DPBP device allocation failed\n");
1679                 return err;
1680         }
1681
1682         priv->dpbp_dev = dpbp_dev;
1683
1684         err = dpbp_open(priv->mc_io, 0, priv->dpbp_dev->obj_desc.id,
1685                         &dpbp_dev->mc_handle);
1686         if (err) {
1687                 dev_err(dev, "dpbp_open() failed\n");
1688                 goto err_open;
1689         }
1690
1691         err = dpbp_reset(priv->mc_io, 0, dpbp_dev->mc_handle);
1692         if (err) {
1693                 dev_err(dev, "dpbp_reset() failed\n");
1694                 goto err_reset;
1695         }
1696
1697         err = dpbp_enable(priv->mc_io, 0, dpbp_dev->mc_handle);
1698         if (err) {
1699                 dev_err(dev, "dpbp_enable() failed\n");
1700                 goto err_enable;
1701         }
1702
1703         err = dpbp_get_attributes(priv->mc_io, 0, dpbp_dev->mc_handle,
1704                                   &priv->dpbp_attrs);
1705         if (err) {
1706                 dev_err(dev, "dpbp_get_attributes() failed\n");
1707                 goto err_get_attr;
1708         }
1709
1710         return 0;
1711
1712 err_get_attr:
1713         dpbp_disable(priv->mc_io, 0, dpbp_dev->mc_handle);
1714 err_enable:
1715 err_reset:
1716         dpbp_close(priv->mc_io, 0, dpbp_dev->mc_handle);
1717 err_open:
1718         fsl_mc_object_free(dpbp_dev);
1719
1720         return err;
1721 }
1722
1723 static void free_dpbp(struct dpaa2_eth_priv *priv)
1724 {
1725         drain_pool(priv);
1726         dpbp_disable(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
1727         dpbp_close(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
1728         fsl_mc_object_free(priv->dpbp_dev);
1729 }
1730
1731 /* Configure the DPNI object this interface is associated with */
1732 static int setup_dpni(struct fsl_mc_device *ls_dev)
1733 {
1734         struct device *dev = &ls_dev->dev;
1735         struct dpaa2_eth_priv *priv;
1736         struct net_device *net_dev;
1737         struct dpni_buffer_layout buf_layout = {0};
1738         int err;
1739
1740         net_dev = dev_get_drvdata(dev);
1741         priv = netdev_priv(net_dev);
1742
1743         /* get a handle for the DPNI object */
1744         err = dpni_open(priv->mc_io, 0, ls_dev->obj_desc.id, &priv->mc_token);
1745         if (err) {
1746                 dev_err(dev, "dpni_open() failed\n");
1747                 goto err_open;
1748         }
1749
1750         ls_dev->mc_io = priv->mc_io;
1751         ls_dev->mc_handle = priv->mc_token;
1752
1753         err = dpni_reset(priv->mc_io, 0, priv->mc_token);
1754         if (err) {
1755                 dev_err(dev, "dpni_reset() failed\n");
1756                 goto err_reset;
1757         }
1758
1759         err = dpni_get_attributes(priv->mc_io, 0, priv->mc_token,
1760                                   &priv->dpni_attrs);
1761         if (err) {
1762                 dev_err(dev, "dpni_get_attributes() failed (err=%d)\n", err);
1763                 goto err_get_attr;
1764         }
1765
1766         /* Configure buffer layouts */
1767         /* rx buffer */
1768         buf_layout.pass_parser_result = true;
1769         buf_layout.pass_frame_status = true;
1770         buf_layout.private_data_size = DPAA2_ETH_SWA_SIZE;
1771         buf_layout.data_align = DPAA2_ETH_RX_BUF_ALIGN;
1772         buf_layout.options = DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
1773                              DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
1774                              DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE |
1775                              DPNI_BUF_LAYOUT_OPT_DATA_ALIGN;
1776         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
1777                                      DPNI_QUEUE_RX, &buf_layout);
1778         if (err) {
1779                 dev_err(dev, "dpni_set_buffer_layout(RX) failed\n");
1780                 goto err_buf_layout;
1781         }
1782
1783         /* tx buffer */
1784         buf_layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
1785                              DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE;
1786         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
1787                                      DPNI_QUEUE_TX, &buf_layout);
1788         if (err) {
1789                 dev_err(dev, "dpni_set_buffer_layout(TX) failed\n");
1790                 goto err_buf_layout;
1791         }
1792
1793         /* tx-confirm buffer */
1794         buf_layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1795         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
1796                                      DPNI_QUEUE_TX_CONFIRM, &buf_layout);
1797         if (err) {
1798                 dev_err(dev, "dpni_set_buffer_layout(TX_CONF) failed\n");
1799                 goto err_buf_layout;
1800         }
1801
1802         /* Now that we've set our tx buffer layout, retrieve the minimum
1803          * required tx data offset.
1804          */
1805         err = dpni_get_tx_data_offset(priv->mc_io, 0, priv->mc_token,
1806                                       &priv->tx_data_offset);
1807         if (err) {
1808                 dev_err(dev, "dpni_get_tx_data_offset() failed\n");
1809                 goto err_data_offset;
1810         }
1811
1812         if ((priv->tx_data_offset % 64) != 0)
1813                 dev_warn(dev, "Tx data offset (%d) not a multiple of 64B\n",
1814                          priv->tx_data_offset);
1815
1816         /* Accommodate software annotation space (SWA) */
1817         priv->tx_data_offset += DPAA2_ETH_SWA_SIZE;
1818
1819         return 0;
1820
1821 err_data_offset:
1822 err_buf_layout:
1823 err_get_attr:
1824 err_reset:
1825         dpni_close(priv->mc_io, 0, priv->mc_token);
1826 err_open:
1827         return err;
1828 }
1829
1830 static void free_dpni(struct dpaa2_eth_priv *priv)
1831 {
1832         int err;
1833
1834         err = dpni_reset(priv->mc_io, 0, priv->mc_token);
1835         if (err)
1836                 netdev_warn(priv->net_dev, "dpni_reset() failed (err %d)\n",
1837                             err);
1838
1839         dpni_close(priv->mc_io, 0, priv->mc_token);
1840 }
1841
1842 static int setup_rx_flow(struct dpaa2_eth_priv *priv,
1843                          struct dpaa2_eth_fq *fq)
1844 {
1845         struct device *dev = priv->net_dev->dev.parent;
1846         struct dpni_queue queue;
1847         struct dpni_queue_id qid;
1848         struct dpni_taildrop td;
1849         int err;
1850
1851         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
1852                              DPNI_QUEUE_RX, 0, fq->flowid, &queue, &qid);
1853         if (err) {
1854                 dev_err(dev, "dpni_get_queue(RX) failed\n");
1855                 return err;
1856         }
1857
1858         fq->fqid = qid.fqid;
1859
1860         queue.destination.id = fq->channel->dpcon_id;
1861         queue.destination.type = DPNI_DEST_DPCON;
1862         queue.destination.priority = 1;
1863         queue.user_context = (u64)fq;
1864         err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
1865                              DPNI_QUEUE_RX, 0, fq->flowid,
1866                              DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
1867                              &queue);
1868         if (err) {
1869                 dev_err(dev, "dpni_set_queue(RX) failed\n");
1870                 return err;
1871         }
1872
1873         td.enable = 1;
1874         td.threshold = DPAA2_ETH_TAILDROP_THRESH;
1875         err = dpni_set_taildrop(priv->mc_io, 0, priv->mc_token, DPNI_CP_QUEUE,
1876                                 DPNI_QUEUE_RX, 0, fq->flowid, &td);
1877         if (err) {
1878                 dev_err(dev, "dpni_set_threshold() failed\n");
1879                 return err;
1880         }
1881
1882         return 0;
1883 }
1884
1885 static int setup_tx_flow(struct dpaa2_eth_priv *priv,
1886                          struct dpaa2_eth_fq *fq)
1887 {
1888         struct device *dev = priv->net_dev->dev.parent;
1889         struct dpni_queue queue;
1890         struct dpni_queue_id qid;
1891         int err;
1892
1893         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
1894                              DPNI_QUEUE_TX, 0, fq->flowid, &queue, &qid);
1895         if (err) {
1896                 dev_err(dev, "dpni_get_queue(TX) failed\n");
1897                 return err;
1898         }
1899
1900         fq->tx_qdbin = qid.qdbin;
1901
1902         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
1903                              DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
1904                              &queue, &qid);
1905         if (err) {
1906                 dev_err(dev, "dpni_get_queue(TX_CONF) failed\n");
1907                 return err;
1908         }
1909
1910         fq->fqid = qid.fqid;
1911
1912         queue.destination.id = fq->channel->dpcon_id;
1913         queue.destination.type = DPNI_DEST_DPCON;
1914         queue.destination.priority = 0;
1915         queue.user_context = (u64)fq;
1916         err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
1917                              DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
1918                              DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
1919                              &queue);
1920         if (err) {
1921                 dev_err(dev, "dpni_set_queue(TX_CONF) failed\n");
1922                 return err;
1923         }
1924
1925         return 0;
1926 }
1927
1928 /* Hash key is a 5-tuple: IPsrc, IPdst, IPnextproto, L4src, L4dst */
1929 static const struct dpaa2_eth_hash_fields hash_fields[] = {
1930         {
1931                 /* IP header */
1932                 .rxnfc_field = RXH_IP_SRC,
1933                 .cls_prot = NET_PROT_IP,
1934                 .cls_field = NH_FLD_IP_SRC,
1935                 .size = 4,
1936         }, {
1937                 .rxnfc_field = RXH_IP_DST,
1938                 .cls_prot = NET_PROT_IP,
1939                 .cls_field = NH_FLD_IP_DST,
1940                 .size = 4,
1941         }, {
1942                 .rxnfc_field = RXH_L3_PROTO,
1943                 .cls_prot = NET_PROT_IP,
1944                 .cls_field = NH_FLD_IP_PROTO,
1945                 .size = 1,
1946         }, {
1947                 /* Using UDP ports, this is functionally equivalent to raw
1948                  * byte pairs from L4 header.
1949                  */
1950                 .rxnfc_field = RXH_L4_B_0_1,
1951                 .cls_prot = NET_PROT_UDP,
1952                 .cls_field = NH_FLD_UDP_PORT_SRC,
1953                 .size = 2,
1954         }, {
1955                 .rxnfc_field = RXH_L4_B_2_3,
1956                 .cls_prot = NET_PROT_UDP,
1957                 .cls_field = NH_FLD_UDP_PORT_DST,
1958                 .size = 2,
1959         },
1960 };
1961
1962 /* Set RX hash options
1963  * flags is a combination of RXH_ bits
1964  */
1965 static int dpaa2_eth_set_hash(struct net_device *net_dev, u64 flags)
1966 {
1967         struct device *dev = net_dev->dev.parent;
1968         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1969         struct dpkg_profile_cfg cls_cfg;
1970         struct dpni_rx_tc_dist_cfg dist_cfg;
1971         u8 *dma_mem;
1972         int i;
1973         int err = 0;
1974
1975         if (!dpaa2_eth_hash_enabled(priv)) {
1976                 dev_dbg(dev, "Hashing support is not enabled\n");
1977                 return 0;
1978         }
1979
1980         memset(&cls_cfg, 0, sizeof(cls_cfg));
1981
1982         for (i = 0; i < ARRAY_SIZE(hash_fields); i++) {
1983                 struct dpkg_extract *key =
1984                         &cls_cfg.extracts[cls_cfg.num_extracts];
1985
1986                 if (!(flags & hash_fields[i].rxnfc_field))
1987                         continue;
1988
1989                 if (cls_cfg.num_extracts >= DPKG_MAX_NUM_OF_EXTRACTS) {
1990                         dev_err(dev, "error adding key extraction rule, too many rules?\n");
1991                         return -E2BIG;
1992                 }
1993
1994                 key->type = DPKG_EXTRACT_FROM_HDR;
1995                 key->extract.from_hdr.prot = hash_fields[i].cls_prot;
1996                 key->extract.from_hdr.type = DPKG_FULL_FIELD;
1997                 key->extract.from_hdr.field = hash_fields[i].cls_field;
1998                 cls_cfg.num_extracts++;
1999
2000                 priv->rx_hash_fields |= hash_fields[i].rxnfc_field;
2001         }
2002
2003         dma_mem = kzalloc(DPAA2_CLASSIFIER_DMA_SIZE, GFP_KERNEL);
2004         if (!dma_mem)
2005                 return -ENOMEM;
2006
2007         err = dpni_prepare_key_cfg(&cls_cfg, dma_mem);
2008         if (err) {
2009                 dev_err(dev, "dpni_prepare_key_cfg error %d\n", err);
2010                 goto err_prep_key;
2011         }
2012
2013         memset(&dist_cfg, 0, sizeof(dist_cfg));
2014
2015         /* Prepare for setting the rx dist */
2016         dist_cfg.key_cfg_iova = dma_map_single(dev, dma_mem,
2017                                                DPAA2_CLASSIFIER_DMA_SIZE,
2018                                                DMA_TO_DEVICE);
2019         if (dma_mapping_error(dev, dist_cfg.key_cfg_iova)) {
2020                 dev_err(dev, "DMA mapping failed\n");
2021                 err = -ENOMEM;
2022                 goto err_dma_map;
2023         }
2024
2025         dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
2026         dist_cfg.dist_mode = DPNI_DIST_MODE_HASH;
2027
2028         err = dpni_set_rx_tc_dist(priv->mc_io, 0, priv->mc_token, 0, &dist_cfg);
2029         dma_unmap_single(dev, dist_cfg.key_cfg_iova,
2030                          DPAA2_CLASSIFIER_DMA_SIZE, DMA_TO_DEVICE);
2031         if (err)
2032                 dev_err(dev, "dpni_set_rx_tc_dist() error %d\n", err);
2033
2034 err_dma_map:
2035 err_prep_key:
2036         kfree(dma_mem);
2037         return err;
2038 }
2039
2040 /* Bind the DPNI to its needed objects and resources: buffer pool, DPIOs,
2041  * frame queues and channels
2042  */
2043 static int bind_dpni(struct dpaa2_eth_priv *priv)
2044 {
2045         struct net_device *net_dev = priv->net_dev;
2046         struct device *dev = net_dev->dev.parent;
2047         struct dpni_pools_cfg pools_params;
2048         struct dpni_error_cfg err_cfg;
2049         int err = 0;
2050         int i;
2051
2052         pools_params.num_dpbp = 1;
2053         pools_params.pools[0].dpbp_id = priv->dpbp_dev->obj_desc.id;
2054         pools_params.pools[0].backup_pool = 0;
2055         pools_params.pools[0].buffer_size = DPAA2_ETH_RX_BUF_SIZE;
2056         err = dpni_set_pools(priv->mc_io, 0, priv->mc_token, &pools_params);
2057         if (err) {
2058                 dev_err(dev, "dpni_set_pools() failed\n");
2059                 return err;
2060         }
2061
2062         /* have the interface implicitly distribute traffic based on supported
2063          * header fields
2064          */
2065         err = dpaa2_eth_set_hash(net_dev, DPAA2_RXH_SUPPORTED);
2066         if (err)
2067                 netdev_err(net_dev, "Failed to configure hashing\n");
2068
2069         /* Configure handling of error frames */
2070         err_cfg.errors = DPAA2_ETH_RX_ERR_MASK;
2071         err_cfg.set_frame_annotation = 1;
2072         err_cfg.error_action = DPNI_ERROR_ACTION_DISCARD;
2073         err = dpni_set_errors_behavior(priv->mc_io, 0, priv->mc_token,
2074                                        &err_cfg);
2075         if (err) {
2076                 dev_err(dev, "dpni_set_errors_behavior failed\n");
2077                 return err;
2078         }
2079
2080         /* Configure Rx and Tx conf queues to generate CDANs */
2081         for (i = 0; i < priv->num_fqs; i++) {
2082                 switch (priv->fq[i].type) {
2083                 case DPAA2_RX_FQ:
2084                         err = setup_rx_flow(priv, &priv->fq[i]);
2085                         break;
2086                 case DPAA2_TX_CONF_FQ:
2087                         err = setup_tx_flow(priv, &priv->fq[i]);
2088                         break;
2089                 default:
2090                         dev_err(dev, "Invalid FQ type %d\n", priv->fq[i].type);
2091                         return -EINVAL;
2092                 }
2093                 if (err)
2094                         return err;
2095         }
2096
2097         err = dpni_get_qdid(priv->mc_io, 0, priv->mc_token,
2098                             DPNI_QUEUE_TX, &priv->tx_qdid);
2099         if (err) {
2100                 dev_err(dev, "dpni_get_qdid() failed\n");
2101                 return err;
2102         }
2103
2104         return 0;
2105 }
2106
2107 /* Allocate rings for storing incoming frame descriptors */
2108 static int alloc_rings(struct dpaa2_eth_priv *priv)
2109 {
2110         struct net_device *net_dev = priv->net_dev;
2111         struct device *dev = net_dev->dev.parent;
2112         int i;
2113
2114         for (i = 0; i < priv->num_channels; i++) {
2115                 priv->channel[i]->store =
2116                         dpaa2_io_store_create(DPAA2_ETH_STORE_SIZE, dev);
2117                 if (!priv->channel[i]->store) {
2118                         netdev_err(net_dev, "dpaa2_io_store_create() failed\n");
2119                         goto err_ring;
2120                 }
2121         }
2122
2123         return 0;
2124
2125 err_ring:
2126         for (i = 0; i < priv->num_channels; i++) {
2127                 if (!priv->channel[i]->store)
2128                         break;
2129                 dpaa2_io_store_destroy(priv->channel[i]->store);
2130         }
2131
2132         return -ENOMEM;
2133 }
2134
2135 static void free_rings(struct dpaa2_eth_priv *priv)
2136 {
2137         int i;
2138
2139         for (i = 0; i < priv->num_channels; i++)
2140                 dpaa2_io_store_destroy(priv->channel[i]->store);
2141 }
2142
2143 static int netdev_init(struct net_device *net_dev)
2144 {
2145         int err;
2146         struct device *dev = net_dev->dev.parent;
2147         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2148         u8 mac_addr[ETH_ALEN], dpni_mac_addr[ETH_ALEN];
2149         u8 bcast_addr[ETH_ALEN];
2150
2151         net_dev->netdev_ops = &dpaa2_eth_ops;
2152
2153         /* Get firmware address, if any */
2154         err = dpni_get_port_mac_addr(priv->mc_io, 0, priv->mc_token, mac_addr);
2155         if (err) {
2156                 dev_err(dev, "dpni_get_port_mac_addr() failed\n");
2157                 return err;
2158         }
2159
2160         /* Get DPNI attributes address, if any */
2161         err = dpni_get_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
2162                                         dpni_mac_addr);
2163         if (err) {
2164                 dev_err(dev, "dpni_get_primary_mac_addr() failed (%d)\n", err);
2165                 return err;
2166         }
2167
2168         /* First check if firmware has any address configured by bootloader */
2169         if (!is_zero_ether_addr(mac_addr)) {
2170                 /* If the DPMAC addr != DPNI addr, update it */
2171                 if (!ether_addr_equal(mac_addr, dpni_mac_addr)) {
2172                         err = dpni_set_primary_mac_addr(priv->mc_io, 0,
2173                                                         priv->mc_token,
2174                                                         mac_addr);
2175                         if (err) {
2176                                 dev_err(dev, "dpni_set_primary_mac_addr() failed\n");
2177                                 return err;
2178                         }
2179                 }
2180                 memcpy(net_dev->dev_addr, mac_addr, net_dev->addr_len);
2181         } else if (is_zero_ether_addr(dpni_mac_addr)) {
2182                 /* Fills in net_dev->dev_addr, as required by
2183                  * register_netdevice()
2184                  */
2185                 eth_hw_addr_random(net_dev);
2186                 /* Make the user aware, without cluttering the boot log */
2187                 dev_dbg_once(dev, " device(s) have all-zero hwaddr, replaced with random\n");
2188                 err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
2189                                                 net_dev->dev_addr);
2190                 if (err) {
2191                         dev_err(dev, "dpni_set_primary_mac_addr(): %d\n", err);
2192                         return err;
2193                 }
2194                 /* Override NET_ADDR_RANDOM set by eth_hw_addr_random(); for all
2195                  * practical purposes, this will be our "permanent" mac address,
2196                  * at least until the next reboot. This move will also permit
2197                  * register_netdevice() to properly fill up net_dev->perm_addr.
2198                  */
2199                 net_dev->addr_assign_type = NET_ADDR_PERM;
2200         } else {
2201                 /* NET_ADDR_PERM is default, all we have to do is
2202                  * fill in the device addr.
2203                  */
2204                 memcpy(net_dev->dev_addr, dpni_mac_addr, net_dev->addr_len);
2205         }
2206
2207         /* Explicitly add the broadcast address to the MAC filtering table;
2208          * the MC won't do that for us.
2209          */
2210         eth_broadcast_addr(bcast_addr);
2211         err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token, bcast_addr);
2212         if (err) {
2213                 dev_warn(dev, "dpni_add_mac_addr() failed (%d)\n", err);
2214                 /* Won't return an error; at least, we'd have egress traffic */
2215         }
2216
2217         /* Reserve enough space to align buffer as per hardware requirement;
2218          * NOTE: priv->tx_data_offset MUST be initialized at this point.
2219          */
2220         net_dev->needed_headroom = DPAA2_ETH_NEEDED_HEADROOM(priv);
2221
2222         /* Set MTU limits */
2223         net_dev->min_mtu = 68;
2224         net_dev->max_mtu = DPAA2_ETH_MAX_MTU;
2225
2226         /* Our .ndo_init will be called herein */
2227         err = register_netdev(net_dev);
2228         if (err < 0) {
2229                 dev_err(dev, "register_netdev() failed\n");
2230                 return err;
2231         }
2232
2233         return 0;
2234 }
2235
2236 static int poll_link_state(void *arg)
2237 {
2238         struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)arg;
2239         int err;
2240
2241         while (!kthread_should_stop()) {
2242                 err = link_state_update(priv);
2243                 if (unlikely(err))
2244                         return err;
2245
2246                 msleep(DPAA2_ETH_LINK_STATE_REFRESH);
2247         }
2248
2249         return 0;
2250 }
2251
2252 static irqreturn_t dpni_irq0_handler(int irq_num, void *arg)
2253 {
2254         return IRQ_WAKE_THREAD;
2255 }
2256
2257 static irqreturn_t dpni_irq0_handler_thread(int irq_num, void *arg)
2258 {
2259         u32 status = 0, clear = 0;
2260         struct device *dev = (struct device *)arg;
2261         struct fsl_mc_device *dpni_dev = to_fsl_mc_device(dev);
2262         struct net_device *net_dev = dev_get_drvdata(dev);
2263         int err;
2264
2265         err = dpni_get_irq_status(dpni_dev->mc_io, 0, dpni_dev->mc_handle,
2266                                   DPNI_IRQ_INDEX, &status);
2267         if (unlikely(err)) {
2268                 netdev_err(net_dev, "Can't get irq status (err %d)\n", err);
2269                 clear = 0xffffffff;
2270                 goto out;
2271         }
2272
2273         if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
2274                 clear |= DPNI_IRQ_EVENT_LINK_CHANGED;
2275                 link_state_update(netdev_priv(net_dev));
2276         }
2277
2278 out:
2279         dpni_clear_irq_status(dpni_dev->mc_io, 0, dpni_dev->mc_handle,
2280                               DPNI_IRQ_INDEX, clear);
2281         return IRQ_HANDLED;
2282 }
2283
2284 static int setup_irqs(struct fsl_mc_device *ls_dev)
2285 {
2286         int err = 0;
2287         struct fsl_mc_device_irq *irq;
2288
2289         err = fsl_mc_allocate_irqs(ls_dev);
2290         if (err) {
2291                 dev_err(&ls_dev->dev, "MC irqs allocation failed\n");
2292                 return err;
2293         }
2294
2295         irq = ls_dev->irqs[0];
2296         err = devm_request_threaded_irq(&ls_dev->dev, irq->msi_desc->irq,
2297                                         dpni_irq0_handler,
2298                                         dpni_irq0_handler_thread,
2299                                         IRQF_NO_SUSPEND | IRQF_ONESHOT,
2300                                         dev_name(&ls_dev->dev), &ls_dev->dev);
2301         if (err < 0) {
2302                 dev_err(&ls_dev->dev, "devm_request_threaded_irq(): %d\n", err);
2303                 goto free_mc_irq;
2304         }
2305
2306         err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle,
2307                                 DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED);
2308         if (err < 0) {
2309                 dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d\n", err);
2310                 goto free_irq;
2311         }
2312
2313         err = dpni_set_irq_enable(ls_dev->mc_io, 0, ls_dev->mc_handle,
2314                                   DPNI_IRQ_INDEX, 1);
2315         if (err < 0) {
2316                 dev_err(&ls_dev->dev, "dpni_set_irq_enable(): %d\n", err);
2317                 goto free_irq;
2318         }
2319
2320         return 0;
2321
2322 free_irq:
2323         devm_free_irq(&ls_dev->dev, irq->msi_desc->irq, &ls_dev->dev);
2324 free_mc_irq:
2325         fsl_mc_free_irqs(ls_dev);
2326
2327         return err;
2328 }
2329
2330 static void add_ch_napi(struct dpaa2_eth_priv *priv)
2331 {
2332         int i;
2333         struct dpaa2_eth_channel *ch;
2334
2335         for (i = 0; i < priv->num_channels; i++) {
2336                 ch = priv->channel[i];
2337                 /* NAPI weight *MUST* be a multiple of DPAA2_ETH_STORE_SIZE */
2338                 netif_napi_add(priv->net_dev, &ch->napi, dpaa2_eth_poll,
2339                                NAPI_POLL_WEIGHT);
2340         }
2341 }
2342
2343 static void del_ch_napi(struct dpaa2_eth_priv *priv)
2344 {
2345         int i;
2346         struct dpaa2_eth_channel *ch;
2347
2348         for (i = 0; i < priv->num_channels; i++) {
2349                 ch = priv->channel[i];
2350                 netif_napi_del(&ch->napi);
2351         }
2352 }
2353
2354 static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)
2355 {
2356         struct device *dev;
2357         struct net_device *net_dev = NULL;
2358         struct dpaa2_eth_priv *priv = NULL;
2359         int err = 0;
2360
2361         dev = &dpni_dev->dev;
2362
2363         /* Net device */
2364         net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA2_ETH_MAX_TX_QUEUES);
2365         if (!net_dev) {
2366                 dev_err(dev, "alloc_etherdev_mq() failed\n");
2367                 return -ENOMEM;
2368         }
2369
2370         SET_NETDEV_DEV(net_dev, dev);
2371         dev_set_drvdata(dev, net_dev);
2372
2373         priv = netdev_priv(net_dev);
2374         priv->net_dev = net_dev;
2375
2376         priv->iommu_domain = iommu_get_domain_for_dev(dev);
2377
2378         /* Obtain a MC portal */
2379         err = fsl_mc_portal_allocate(dpni_dev, FSL_MC_IO_ATOMIC_CONTEXT_PORTAL,
2380                                      &priv->mc_io);
2381         if (err) {
2382                 dev_err(dev, "MC portal allocation failed\n");
2383                 goto err_portal_alloc;
2384         }
2385
2386         /* MC objects initialization and configuration */
2387         err = setup_dpni(dpni_dev);
2388         if (err)
2389                 goto err_dpni_setup;
2390
2391         err = setup_dpio(priv);
2392         if (err)
2393                 goto err_dpio_setup;
2394
2395         setup_fqs(priv);
2396
2397         err = setup_dpbp(priv);
2398         if (err)
2399                 goto err_dpbp_setup;
2400
2401         err = bind_dpni(priv);
2402         if (err)
2403                 goto err_bind;
2404
2405         /* Add a NAPI context for each channel */
2406         add_ch_napi(priv);
2407
2408         /* Percpu statistics */
2409         priv->percpu_stats = alloc_percpu(*priv->percpu_stats);
2410         if (!priv->percpu_stats) {
2411                 dev_err(dev, "alloc_percpu(percpu_stats) failed\n");
2412                 err = -ENOMEM;
2413                 goto err_alloc_percpu_stats;
2414         }
2415         priv->percpu_extras = alloc_percpu(*priv->percpu_extras);
2416         if (!priv->percpu_extras) {
2417                 dev_err(dev, "alloc_percpu(percpu_extras) failed\n");
2418                 err = -ENOMEM;
2419                 goto err_alloc_percpu_extras;
2420         }
2421
2422         err = netdev_init(net_dev);
2423         if (err)
2424                 goto err_netdev_init;
2425
2426         /* Configure checksum offload based on current interface flags */
2427         err = set_rx_csum(priv, !!(net_dev->features & NETIF_F_RXCSUM));
2428         if (err)
2429                 goto err_csum;
2430
2431         err = set_tx_csum(priv, !!(net_dev->features &
2432                                    (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)));
2433         if (err)
2434                 goto err_csum;
2435
2436         err = alloc_rings(priv);
2437         if (err)
2438                 goto err_alloc_rings;
2439
2440         net_dev->ethtool_ops = &dpaa2_ethtool_ops;
2441
2442         err = setup_irqs(dpni_dev);
2443         if (err) {
2444                 netdev_warn(net_dev, "Failed to set link interrupt, fall back to polling\n");
2445                 priv->poll_thread = kthread_run(poll_link_state, priv,
2446                                                 "%s_poll_link", net_dev->name);
2447                 if (IS_ERR(priv->poll_thread)) {
2448                         netdev_err(net_dev, "Error starting polling thread\n");
2449                         goto err_poll_thread;
2450                 }
2451                 priv->do_link_poll = true;
2452         }
2453
2454         dev_info(dev, "Probed interface %s\n", net_dev->name);
2455         return 0;
2456
2457 err_poll_thread:
2458         free_rings(priv);
2459 err_alloc_rings:
2460 err_csum:
2461         unregister_netdev(net_dev);
2462 err_netdev_init:
2463         free_percpu(priv->percpu_extras);
2464 err_alloc_percpu_extras:
2465         free_percpu(priv->percpu_stats);
2466 err_alloc_percpu_stats:
2467         del_ch_napi(priv);
2468 err_bind:
2469         free_dpbp(priv);
2470 err_dpbp_setup:
2471         free_dpio(priv);
2472 err_dpio_setup:
2473         free_dpni(priv);
2474 err_dpni_setup:
2475         fsl_mc_portal_free(priv->mc_io);
2476 err_portal_alloc:
2477         dev_set_drvdata(dev, NULL);
2478         free_netdev(net_dev);
2479
2480         return err;
2481 }
2482
2483 static int dpaa2_eth_remove(struct fsl_mc_device *ls_dev)
2484 {
2485         struct device *dev;
2486         struct net_device *net_dev;
2487         struct dpaa2_eth_priv *priv;
2488
2489         dev = &ls_dev->dev;
2490         net_dev = dev_get_drvdata(dev);
2491         priv = netdev_priv(net_dev);
2492
2493         unregister_netdev(net_dev);
2494         dev_info(net_dev->dev.parent, "Removed interface %s\n", net_dev->name);
2495
2496         if (priv->do_link_poll)
2497                 kthread_stop(priv->poll_thread);
2498         else
2499                 fsl_mc_free_irqs(ls_dev);
2500
2501         free_rings(priv);
2502         free_percpu(priv->percpu_stats);
2503         free_percpu(priv->percpu_extras);
2504
2505         del_ch_napi(priv);
2506         free_dpbp(priv);
2507         free_dpio(priv);
2508         free_dpni(priv);
2509
2510         fsl_mc_portal_free(priv->mc_io);
2511
2512         dev_set_drvdata(dev, NULL);
2513         free_netdev(net_dev);
2514
2515         return 0;
2516 }
2517
2518 static const struct fsl_mc_device_id dpaa2_eth_match_id_table[] = {
2519         {
2520                 .vendor = FSL_MC_VENDOR_FREESCALE,
2521                 .obj_type = "dpni",
2522         },
2523         { .vendor = 0x0 }
2524 };
2525 MODULE_DEVICE_TABLE(fslmc, dpaa2_eth_match_id_table);
2526
2527 static struct fsl_mc_driver dpaa2_eth_driver = {
2528         .driver = {
2529                 .name = KBUILD_MODNAME,
2530                 .owner = THIS_MODULE,
2531         },
2532         .probe = dpaa2_eth_probe,
2533         .remove = dpaa2_eth_remove,
2534         .match_id_table = dpaa2_eth_match_id_table
2535 };
2536
2537 module_fsl_mc_driver(dpaa2_eth_driver);