4 * Copyright 2014 Google Inc.
5 * Copyright 2014 Linaro Ltd.
7 * Released under the GPLv2 only.
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/slab.h>
13 #include <linux/gpio.h>
14 #include <linux/irq.h>
15 #include <linux/irqdomain.h>
16 #include <linux/mutex.h>
21 /* The following has to be an array of line_max entries */
22 /* --> make them just a flags field */
24 direction: 1, /* 0 = output, 1 = input */
25 value: 1; /* 0 = low, 1 = high */
29 bool irq_type_pending;
34 struct gb_gpio_controller {
35 struct gb_connection *connection;
38 u8 line_max; /* max line number */
39 struct gb_gpio_line *lines;
41 struct gpio_chip chip;
43 struct irq_chip *irqchip;
44 struct irq_domain *irqdomain;
45 unsigned int irq_base;
46 irq_flow_handler_t irq_handler;
47 unsigned int irq_default_type;
48 struct mutex irq_lock;
50 #define gpio_chip_to_gb_gpio_controller(chip) \
51 container_of(chip, struct gb_gpio_controller, chip)
52 #define irq_data_to_gpio_chip(d) (d->domain->host_data)
54 /* Define get_version() routine */
55 define_get_version(gb_gpio_controller, GPIO);
57 static int gb_gpio_line_count_operation(struct gb_gpio_controller *ggc)
59 struct gb_gpio_line_count_response response;
62 ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_LINE_COUNT,
63 NULL, 0, &response, sizeof(response));
65 ggc->line_max = response.count;
69 static int gb_gpio_activate_operation(struct gb_gpio_controller *ggc, u8 which)
71 struct gb_gpio_activate_request request;
74 request.which = which;
75 ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_ACTIVATE,
76 &request, sizeof(request), NULL, 0);
78 ggc->lines[which].active = true;
82 static void gb_gpio_deactivate_operation(struct gb_gpio_controller *ggc,
85 struct gb_gpio_deactivate_request request;
88 request.which = which;
89 ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_DEACTIVATE,
90 &request, sizeof(request), NULL, 0);
92 dev_err(ggc->chip.dev, "failed to deactivate gpio %u\n",
97 ggc->lines[which].active = false;
100 static int gb_gpio_get_direction_operation(struct gb_gpio_controller *ggc,
103 struct gb_gpio_get_direction_request request;
104 struct gb_gpio_get_direction_response response;
108 request.which = which;
109 ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_GET_DIRECTION,
110 &request, sizeof(request),
111 &response, sizeof(response));
115 direction = response.direction;
116 if (direction && direction != 1) {
117 dev_warn(ggc->chip.dev,
118 "gpio %u direction was %u (should be 0 or 1)\n",
121 ggc->lines[which].direction = direction ? 1 : 0;
125 static int gb_gpio_direction_in_operation(struct gb_gpio_controller *ggc,
128 struct gb_gpio_direction_in_request request;
131 request.which = which;
132 ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_DIRECTION_IN,
133 &request, sizeof(request), NULL, 0);
135 ggc->lines[which].direction = 1;
139 static int gb_gpio_direction_out_operation(struct gb_gpio_controller *ggc,
140 u8 which, bool value_high)
142 struct gb_gpio_direction_out_request request;
145 request.which = which;
146 request.value = value_high ? 1 : 0;
147 ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_DIRECTION_OUT,
148 &request, sizeof(request), NULL, 0);
150 ggc->lines[which].direction = 0;
154 static int gb_gpio_get_value_operation(struct gb_gpio_controller *ggc,
157 struct gb_gpio_get_value_request request;
158 struct gb_gpio_get_value_response response;
162 request.which = which;
163 ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_GET_VALUE,
164 &request, sizeof(request),
165 &response, sizeof(response));
167 dev_err(ggc->chip.dev, "failed to get value of gpio %u\n",
172 value = response.value;
173 if (value && value != 1) {
174 dev_warn(ggc->chip.dev,
175 "gpio %u value was %u (should be 0 or 1)\n",
178 ggc->lines[which].value = value ? 1 : 0;
182 static void gb_gpio_set_value_operation(struct gb_gpio_controller *ggc,
183 u8 which, bool value_high)
185 struct gb_gpio_set_value_request request;
188 if (ggc->lines[which].direction == 1) {
189 dev_warn(ggc->chip.dev,
190 "refusing to set value of input gpio %u\n", which);
194 request.which = which;
195 request.value = value_high ? 1 : 0;
196 ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_SET_VALUE,
197 &request, sizeof(request), NULL, 0);
199 dev_err(ggc->chip.dev, "failed to set value of gpio %u\n",
204 ggc->lines[which].value = request.value;
207 static int gb_gpio_set_debounce_operation(struct gb_gpio_controller *ggc,
208 u8 which, u16 debounce_usec)
210 struct gb_gpio_set_debounce_request request;
213 request.which = which;
214 request.usec = cpu_to_le16(debounce_usec);
215 ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_SET_DEBOUNCE,
216 &request, sizeof(request), NULL, 0);
218 ggc->lines[which].debounce_usec = debounce_usec;
222 static void _gb_gpio_irq_mask(struct gb_gpio_controller *ggc, u8 hwirq)
224 struct gb_gpio_irq_mask_request request;
227 request.which = hwirq;
228 ret = gb_operation_sync(ggc->connection,
229 GB_GPIO_TYPE_IRQ_MASK,
230 &request, sizeof(request), NULL, 0);
232 dev_err(ggc->chip.dev, "failed to mask irq: %d\n", ret);
235 static void _gb_gpio_irq_unmask(struct gb_gpio_controller *ggc, u8 hwirq)
237 struct gb_gpio_irq_unmask_request request;
240 request.which = hwirq;
241 ret = gb_operation_sync(ggc->connection,
242 GB_GPIO_TYPE_IRQ_UNMASK,
243 &request, sizeof(request), NULL, 0);
245 dev_err(ggc->chip.dev, "failed to unmask irq: %d\n", ret);
248 static void _gb_gpio_irq_set_type(struct gb_gpio_controller *ggc,
251 struct gb_gpio_irq_type_request request;
254 request.which = hwirq;
257 ret = gb_operation_sync(ggc->connection,
258 GB_GPIO_TYPE_IRQ_TYPE,
259 &request, sizeof(request), NULL, 0);
261 dev_err(ggc->chip.dev, "failed to set irq type: %d\n", ret);
264 static void gb_gpio_irq_mask(struct irq_data *d)
266 struct gpio_chip *chip = irq_data_to_gpio_chip(d);
267 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
268 struct gb_gpio_line *line = &ggc->lines[d->hwirq];
271 line->masked_pending = true;
274 static void gb_gpio_irq_unmask(struct irq_data *d)
276 struct gpio_chip *chip = irq_data_to_gpio_chip(d);
277 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
278 struct gb_gpio_line *line = &ggc->lines[d->hwirq];
280 line->masked = false;
281 line->masked_pending = true;
284 static int gb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
286 struct gpio_chip *chip = irq_data_to_gpio_chip(d);
287 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
288 struct gb_gpio_line *line = &ggc->lines[d->hwirq];
293 irq_type = GB_GPIO_IRQ_TYPE_NONE;
295 case IRQ_TYPE_EDGE_RISING:
296 irq_type = GB_GPIO_IRQ_TYPE_EDGE_RISING;
298 case IRQ_TYPE_EDGE_FALLING:
299 irq_type = GB_GPIO_IRQ_TYPE_EDGE_FALLING;
301 case IRQ_TYPE_EDGE_BOTH:
302 irq_type = GB_GPIO_IRQ_TYPE_EDGE_BOTH;
304 case IRQ_TYPE_LEVEL_LOW:
305 irq_type = GB_GPIO_IRQ_TYPE_LEVEL_LOW;
307 case IRQ_TYPE_LEVEL_HIGH:
308 irq_type = GB_GPIO_IRQ_TYPE_LEVEL_HIGH;
311 dev_err(chip->dev, "unsupported irq type: %u\n", type);
315 line->irq_type = irq_type;
316 line->irq_type_pending = true;
321 static void gb_gpio_irq_bus_lock(struct irq_data *d)
323 struct gpio_chip *chip = irq_data_to_gpio_chip(d);
324 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
326 mutex_lock(&ggc->irq_lock);
329 static void gb_gpio_irq_bus_sync_unlock(struct irq_data *d)
331 struct gpio_chip *chip = irq_data_to_gpio_chip(d);
332 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
333 struct gb_gpio_line *line = &ggc->lines[d->hwirq];
335 if (line->irq_type_pending) {
336 _gb_gpio_irq_set_type(ggc, d->hwirq, line->irq_type);
337 line->irq_type_pending = false;
340 if (line->masked_pending) {
342 _gb_gpio_irq_mask(ggc, d->hwirq);
344 _gb_gpio_irq_unmask(ggc, d->hwirq);
345 line->masked_pending = false;
348 mutex_unlock(&ggc->irq_lock);
351 static int gb_gpio_request_recv(u8 type, struct gb_operation *op)
353 struct gb_connection *connection = op->connection;
354 struct gb_gpio_controller *ggc = connection->private;
355 struct gb_message *request;
356 struct gb_gpio_irq_event_request *event;
358 struct irq_desc *desc;
360 if (type != GB_GPIO_TYPE_IRQ_EVENT) {
361 dev_err(&connection->dev,
362 "unsupported unsolicited request: %u\n", type);
366 request = op->request;
368 if (request->payload_size < sizeof(*event)) {
369 dev_err(ggc->chip.dev, "short event received (%zu < %zu)\n",
370 request->payload_size, sizeof(*event));
374 event = request->payload;
375 if (event->which > ggc->line_max) {
376 dev_err(ggc->chip.dev, "invalid hw irq: %d\n", event->which);
380 irq = irq_find_mapping(ggc->irqdomain, event->which);
382 dev_err(ggc->chip.dev, "failed to find IRQ\n");
385 desc = irq_to_desc(irq);
387 dev_err(ggc->chip.dev, "failed to look up irq\n");
392 generic_handle_irq_desc(irq, desc);
398 static int gb_gpio_request(struct gpio_chip *chip, unsigned offset)
400 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
402 return gb_gpio_activate_operation(ggc, (u8)offset);
405 static void gb_gpio_free(struct gpio_chip *chip, unsigned offset)
407 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
409 gb_gpio_deactivate_operation(ggc, (u8)offset);
412 static int gb_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
414 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
419 ret = gb_gpio_get_direction_operation(ggc, which);
423 return ggc->lines[which].direction ? 1 : 0;
426 static int gb_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
428 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
430 return gb_gpio_direction_in_operation(ggc, (u8)offset);
433 static int gb_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
436 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
438 return gb_gpio_direction_out_operation(ggc, (u8)offset, !!value);
441 static int gb_gpio_get(struct gpio_chip *chip, unsigned offset)
443 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
448 ret = gb_gpio_get_value_operation(ggc, which);
452 return ggc->lines[which].value;
455 static void gb_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
457 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
459 gb_gpio_set_value_operation(ggc, (u8)offset, !!value);
462 static int gb_gpio_set_debounce(struct gpio_chip *chip, unsigned offset,
465 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
468 if (debounce > U16_MAX)
470 usec = (u16)debounce;
472 return gb_gpio_set_debounce_operation(ggc, (u8)offset, usec);
475 static int gb_gpio_controller_setup(struct gb_gpio_controller *ggc)
479 /* First thing we need to do is check the version */
480 ret = get_version(ggc);
484 /* Now find out how many lines there are */
485 ret = gb_gpio_line_count_operation(ggc);
489 ggc->lines = kcalloc(ggc->line_max + 1, sizeof(*ggc->lines),
498 * gb_gpio_irq_map() - maps an IRQ into a GB gpio irqchip
499 * @d: the irqdomain used by this irqchip
500 * @irq: the global irq number used by this GB gpio irqchip irq
501 * @hwirq: the local IRQ/GPIO line offset on this GB gpio
503 * This function will set up the mapping for a certain IRQ line on a
504 * GB gpio by assigning the GB gpio as chip data, and using the irqchip
505 * stored inside the GB gpio.
507 static int gb_gpio_irq_map(struct irq_domain *domain, unsigned int irq,
508 irq_hw_number_t hwirq)
510 struct gpio_chip *chip = domain->host_data;
511 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
513 irq_set_chip_data(irq, ggc);
514 irq_set_chip_and_handler(irq, ggc->irqchip, ggc->irq_handler);
516 set_irq_flags(irq, IRQF_VALID);
518 irq_set_noprobe(irq);
521 * No set-up of the hardware will happen if IRQ_TYPE_NONE
522 * is passed as default type.
524 if (ggc->irq_default_type != IRQ_TYPE_NONE)
525 irq_set_irq_type(irq, ggc->irq_default_type);
530 static void gb_gpio_irq_unmap(struct irq_domain *d, unsigned int irq)
533 set_irq_flags(irq, 0);
535 irq_set_chip_and_handler(irq, NULL, NULL);
536 irq_set_chip_data(irq, NULL);
539 static const struct irq_domain_ops gb_gpio_domain_ops = {
540 .map = gb_gpio_irq_map,
541 .unmap = gb_gpio_irq_unmap,
545 * gb_gpio_irqchip_remove() - removes an irqchip added to a gb_gpio_controller
546 * @ggc: the gb_gpio_controller to remove the irqchip from
548 * This is called only from gb_gpio_remove()
550 static void gb_gpio_irqchip_remove(struct gb_gpio_controller *ggc)
554 /* Remove all IRQ mappings and delete the domain */
555 if (ggc->irqdomain) {
556 for (offset = 0; offset < (ggc->line_max + 1); offset++)
557 irq_dispose_mapping(irq_find_mapping(ggc->irqdomain, offset));
558 irq_domain_remove(ggc->irqdomain);
568 * gb_gpio_irqchip_add() - adds an irqchip to a gpio chip
569 * @chip: the gpio chip to add the irqchip to
570 * @irqchip: the irqchip to add to the adapter
571 * @first_irq: if not dynamically assigned, the base (first) IRQ to
572 * allocate gpio irqs from
573 * @handler: the irq handler to use (often a predefined irq core function)
574 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
575 * to have the core avoid setting up any default type in the hardware.
577 * This function closely associates a certain irqchip with a certain
578 * gpio chip, providing an irq domain to translate the local IRQs to
579 * global irqs, and making sure that the gpio chip
580 * is passed as chip data to all related functions. Driver callbacks
581 * need to use container_of() to get their local state containers back
582 * from the gpio chip passed as chip data. An irqdomain will be stored
583 * in the gpio chip that shall be used by the driver to handle IRQ number
584 * translation. The gpio chip will need to be initialized and registered
585 * before calling this function.
587 static int gb_gpio_irqchip_add(struct gpio_chip *chip,
588 struct irq_chip *irqchip,
589 unsigned int first_irq,
590 irq_flow_handler_t handler,
593 struct gb_gpio_controller *ggc;
597 if (!chip || !irqchip)
600 ggc = gpio_chip_to_gb_gpio_controller(chip);
602 ggc->irqchip = irqchip;
603 ggc->irq_handler = handler;
604 ggc->irq_default_type = type;
605 ggc->irqdomain = irq_domain_add_simple(NULL,
606 ggc->line_max + 1, first_irq,
607 &gb_gpio_domain_ops, chip);
608 if (!ggc->irqdomain) {
614 * Prepare the mapping since the irqchip shall be orthogonal to
615 * any gpio calls. If the first_irq was zero, this is
616 * necessary to allocate descriptors for all IRQs.
618 for (offset = 0; offset < (ggc->line_max + 1); offset++) {
619 irq_base = irq_create_mapping(ggc->irqdomain, offset);
621 ggc->irq_base = irq_base;
627 static int gb_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
629 struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip);
631 return irq_find_mapping(ggc->irqdomain, offset);
634 static int gb_gpio_connection_init(struct gb_connection *connection)
636 struct gb_gpio_controller *ggc;
637 struct gpio_chip *gpio;
638 struct irq_chip *irqc;
641 ggc = kzalloc(sizeof(*ggc), GFP_KERNEL);
644 ggc->connection = connection;
645 connection->private = ggc;
647 ret = gb_gpio_controller_setup(ggc);
649 goto err_free_controller;
652 irqc->irq_mask = gb_gpio_irq_mask;
653 irqc->irq_unmask = gb_gpio_irq_unmask;
654 irqc->irq_set_type = gb_gpio_irq_set_type;
655 irqc->irq_bus_lock = gb_gpio_irq_bus_lock;
656 irqc->irq_bus_sync_unlock = gb_gpio_irq_bus_sync_unlock;
657 irqc->name = "greybus_gpio";
659 mutex_init(&ggc->irq_lock);
663 gpio->label = "greybus_gpio";
664 gpio->dev = &connection->dev;
665 gpio->owner = THIS_MODULE;
667 gpio->request = gb_gpio_request;
668 gpio->free = gb_gpio_free;
669 gpio->get_direction = gb_gpio_get_direction;
670 gpio->direction_input = gb_gpio_direction_input;
671 gpio->direction_output = gb_gpio_direction_output;
672 gpio->get = gb_gpio_get;
673 gpio->set = gb_gpio_set;
674 gpio->set_debounce = gb_gpio_set_debounce;
675 gpio->to_irq = gb_gpio_to_irq;
676 gpio->base = -1; /* Allocate base dynamically */
677 gpio->ngpio = ggc->line_max + 1;
678 gpio->can_sleep = true;
680 ret = gpiochip_add(gpio);
682 dev_err(&connection->dev, "failed to add gpio chip: %d\n",
687 ret = gb_gpio_irqchip_add(gpio, irqc, 0,
688 handle_level_irq, IRQ_TYPE_NONE);
690 dev_err(&connection->dev, "failed to add irq chip: %d\n", ret);
697 gb_gpiochip_remove(gpio);
705 static void gb_gpio_connection_exit(struct gb_connection *connection)
707 struct gb_gpio_controller *ggc = connection->private;
712 gb_gpio_irqchip_remove(ggc);
713 gb_gpiochip_remove(&ggc->chip);
714 /* kref_put(ggc->connection) */
719 static struct gb_protocol gpio_protocol = {
721 .id = GREYBUS_PROTOCOL_GPIO,
722 .major = GB_GPIO_VERSION_MAJOR,
723 .minor = GB_GPIO_VERSION_MINOR,
724 .connection_init = gb_gpio_connection_init,
725 .connection_exit = gb_gpio_connection_exit,
726 .request_recv = gb_gpio_request_recv,
729 gb_builtin_protocol_driver(gpio_protocol);