drivers/staging/iio/accel/lis3l02dq_ring.c

   1 #include <linux/interrupt.h>
   2 #include <linux/irq.h>
   3 #include <linux/gpio.h>
   4 #include <linux/mutex.h>
   5 #include <linux/device.h>
   6 #include <linux/kernel.h>
   7 #include <linux/spi/spi.h>
   8 #include <linux/sysfs.h>
   9 #include <linux/slab.h>
  10
  11 #include "../iio.h"
  12 #include "../sysfs.h"
  13 #include "../ring_sw.h"
  14 #include "../kfifo_buf.h"
  15 #include "accel.h"
  16 #include "../trigger.h"
  17 #include "lis3l02dq.h"
  18
  19 /**
  20  * combine_8_to_16() utility function to munge to u8s into u16
  21  **/
  22 static inline u16 combine_8_to_16(u8 lower, u8 upper)
  23 {
  24         u16 _lower = lower;
  25         u16 _upper = upper;
  26         return _lower | (_upper << 8);
  27 }
  28
  29 /**
  30  * lis3l02dq_data_rdy_trig_poll() the event handler for the data rdy trig
  31  **/
  32 irqreturn_t lis3l02dq_data_rdy_trig_poll(int irq, void *private)
  33 {
  34         struct iio_dev *indio_dev = private;
  35         struct iio_sw_ring_helper_state *h =  iio_dev_get_devdata(indio_dev);
  36         struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
  37
  38         if (st->trigger_on) {
  39                 iio_trigger_poll(st->trig, iio_get_time_ns());
  40                 return IRQ_HANDLED;
  41         } else
  42                 return IRQ_WAKE_THREAD;
  43 }
  44
  45 /**
  46  * lis3l02dq_read_accel_from_ring() individual acceleration read from ring
  47  **/
  48 ssize_t lis3l02dq_read_accel_from_ring(struct iio_ring_buffer *ring,
  49                                        int index,
  50                                        int *val)
  51 {
  52         int ret;
  53         s16 *data;
  54         if (!iio_scan_mask_query(ring, index))
  55                 return -EINVAL;
  56
  57         data = kmalloc(ring->access.get_bytes_per_datum(ring),
  58                        GFP_KERNEL);
  59         if (data == NULL)
  60                 return -ENOMEM;
  61
  62         ret = ring->access.read_last(ring, (u8 *)data);
  63         if (ret)
  64                 goto error_free_data;
  65         *val = data[iio_scan_mask_count_to_right(ring, index)];
  66 error_free_data:
  67         kfree(data);
  68         return ret;
  69 }
  70
  71 static const u8 read_all_tx_array[] = {
  72         LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_L_ADDR), 0,
  73         LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_H_ADDR), 0,
  74         LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_L_ADDR), 0,
  75         LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_H_ADDR), 0,
  76         LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_L_ADDR), 0,
  77         LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_H_ADDR), 0,
  78 };
  79
  80 /**
  81  * lis3l02dq_read_all() Reads all channels currently selected
  82  * @st:         device specific state
  83  * @rx_array:   (dma capable) receive array, must be at least
  84  *              4*number of channels
  85  **/
  86 static int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array)
  87 {
  88         struct iio_ring_buffer *ring = st->help.indio_dev->ring;
  89         struct spi_transfer *xfers;
  90         struct spi_message msg;
  91         int ret, i, j = 0;
  92
  93         xfers = kzalloc((ring->scan_count) * 2
  94                         * sizeof(*xfers), GFP_KERNEL);
  95         if (!xfers)
  96                 return -ENOMEM;
  97
  98         mutex_lock(&st->buf_lock);
  99
 100         for (i = 0; i < ARRAY_SIZE(read_all_tx_array)/4; i++)
 101                 if (ring->scan_mask & (1 << i)) {
 102                         /* lower byte */
 103                         xfers[j].tx_buf = st->tx + 2*j;
 104                         st->tx[2*j] = read_all_tx_array[i*4];
 105                         st->tx[2*j + 1] = 0;
 106                         if (rx_array)
 107                                 xfers[j].rx_buf = rx_array + j*2;
 108                         xfers[j].bits_per_word = 8;
 109                         xfers[j].len = 2;
 110                         xfers[j].cs_change = 1;
 111                         j++;
 112
 113                         /* upper byte */
 114                         xfers[j].tx_buf = st->tx + 2*j;
 115                         st->tx[2*j] = read_all_tx_array[i*4 + 2];
 116                         st->tx[2*j + 1] = 0;
 117                         if (rx_array)
 118                                 xfers[j].rx_buf = rx_array + j*2;
 119                         xfers[j].bits_per_word = 8;
 120                         xfers[j].len = 2;
 121                         xfers[j].cs_change = 1;
 122                         j++;
 123                 }
 124
 125         /* After these are transmitted, the rx_buff should have
 126          * values in alternate bytes
 127          */
 128         spi_message_init(&msg);
 129         for (j = 0; j < ring->scan_count * 2; j++)
 130                 spi_message_add_tail(&xfers[j], &msg);
 131
 132         ret = spi_sync(st->us, &msg);
 133         mutex_unlock(&st->buf_lock);
 134         kfree(xfers);
 135
 136         return ret;
 137 }
 138
 139 static irqreturn_t lis3l02dq_trigger_handler(int irq, void *p)
 140 {
 141         struct iio_poll_func *pf = p;
 142         struct iio_dev *indio_dev = pf->private_data;
 143         struct iio_sw_ring_helper_state *h = iio_dev_get_devdata(indio_dev);
 144
 145         h->last_timestamp = pf->timestamp;
 146         iio_sw_trigger_to_ring(h);
 147
 148         return IRQ_HANDLED;
 149 }
 150
 151 static int lis3l02dq_get_ring_element(struct iio_sw_ring_helper_state *h,
 152                                 u8 *buf)
 153 {
 154         int ret, i;
 155         u8 *rx_array ;
 156         s16 *data = (s16 *)buf;
 157
 158         rx_array = kzalloc(4 * (h->indio_dev->ring->scan_count), GFP_KERNEL);
 159         if (rx_array == NULL)
 160                 return -ENOMEM;
 161         ret = lis3l02dq_read_all(lis3l02dq_h_to_s(h), rx_array);
 162         if (ret < 0)
 163                 return ret;
 164         for (i = 0; i < h->indio_dev->ring->scan_count; i++)
 165                 data[i] = combine_8_to_16(rx_array[i*4+1],
 166                                         rx_array[i*4+3]);
 167         kfree(rx_array);
 168
 169         return i*sizeof(data[0]);
 170 }
 171
 172 /* Caller responsible for locking as necessary. */
 173 static int
 174 __lis3l02dq_write_data_ready_config(struct device *dev, bool state)
 175 {
 176         int ret;
 177         u8 valold;
 178         bool currentlyset;
 179         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 180         struct iio_sw_ring_helper_state *h
 181                                 = iio_dev_get_devdata(indio_dev);
 182         struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
 183
 184 /* Get the current event mask register */
 185         ret = lis3l02dq_spi_read_reg_8(indio_dev,
 186                                        LIS3L02DQ_REG_CTRL_2_ADDR,
 187                                        &valold);
 188         if (ret)
 189                 goto error_ret;
 190 /* Find out if data ready is already on */
 191         currentlyset
 192                 = valold & LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
 193
 194 /* Disable requested */
 195         if (!state && currentlyset) {
 196                 /* disable the data ready signal */
 197                 valold &= ~LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
 198
 199                 /* The double write is to overcome a hardware bug?*/
 200                 ret = lis3l02dq_spi_write_reg_8(indio_dev,
 201                                                 LIS3L02DQ_REG_CTRL_2_ADDR,
 202                                                 &valold);
 203                 if (ret)
 204                         goto error_ret;
 205                 ret = lis3l02dq_spi_write_reg_8(indio_dev,
 206                                                 LIS3L02DQ_REG_CTRL_2_ADDR,
 207                                                 &valold);
 208                 if (ret)
 209                         goto error_ret;
 210                 st->trigger_on = false;
 211 /* Enable requested */
 212         } else if (state && !currentlyset) {
 213                 /* if not set, enable requested */
 214                 /* first disable all events */
 215                 ret = lis3l02dq_disable_all_events(indio_dev);
 216                 if (ret < 0)
 217                         goto error_ret;
 218
 219                 valold = ret |
 220                         LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
 221
 222                 st->trigger_on = true;
 223                 ret = lis3l02dq_spi_write_reg_8(indio_dev,
 224                                                 LIS3L02DQ_REG_CTRL_2_ADDR,
 225                                                 &valold);
 226                 if (ret)
 227                         goto error_ret;
 228         }
 229
 230         return 0;
 231 error_ret:
 232         return ret;
 233 }
 234
 235 /**
 236  * lis3l02dq_data_rdy_trigger_set_state() set datardy interrupt state
 237  *
 238  * If disabling the interrupt also does a final read to ensure it is clear.
 239  * This is only important in some cases where the scan enable elements are
 240  * switched before the ring is reenabled.
 241  **/
 242 static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
 243                                                 bool state)
 244 {
 245         struct lis3l02dq_state *st = trig->private_data;
 246         int ret = 0;
 247         u8 t;
 248
 249         __lis3l02dq_write_data_ready_config(&st->help.indio_dev->dev, state);
 250         if (state == false) {
 251                 /*
 252                  * A possible quirk with teh handler is currently worked around
 253                  *  by ensuring outstanding read events are cleared.
 254                  */
 255                 ret = lis3l02dq_read_all(st, NULL);
 256         }
 257         lis3l02dq_spi_read_reg_8(st->help.indio_dev,
 258                                  LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
 259                                  &t);
 260         return ret;
 261 }
 262
 263 static IIO_TRIGGER_NAME_ATTR;
 264
 265 static struct attribute *lis3l02dq_trigger_attrs[] = {
 266         &dev_attr_name.attr,
 267         NULL,
 268 };
 269
 270 static const struct attribute_group lis3l02dq_trigger_attr_group = {
 271         .attrs = lis3l02dq_trigger_attrs,
 272 };
 273
 274 /**
 275  * lis3l02dq_trig_try_reen() try renabling irq for data rdy trigger
 276  * @trig:       the datardy trigger
 277  */
 278 static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
 279 {
 280         struct lis3l02dq_state *st = trig->private_data;
 281         int i;
 282
 283         /* If gpio still high (or high again) */
 284         /* In theory possible we will need to do this several times */
 285         for (i = 0; i < 5; i++)
 286                 if (gpio_get_value(irq_to_gpio(st->us->irq)))
 287                         lis3l02dq_read_all(st, NULL);
 288                 else
 289                         break;
 290         if (i == 5)
 291                 printk(KERN_INFO
 292                        "Failed to clear the interrupt for lis3l02dq\n");
 293
 294         /* irq reenabled so success! */
 295         return 0;
 296 }
 297
 298 int lis3l02dq_probe_trigger(struct iio_dev *indio_dev)
 299 {
 300         int ret;
 301         struct iio_sw_ring_helper_state *h
 302                 = iio_dev_get_devdata(indio_dev);
 303         struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
 304         char *name;
 305
 306         name = kasprintf(GFP_KERNEL,
 307                          "lis3l02dq-dev%d",
 308                          indio_dev->id);
 309         if (name == NULL) {
 310                 ret = -ENOMEM;
 311                 goto error_ret;
 312         }
 313         st->trig = iio_allocate_trigger_named(name);
 314         if (!st->trig) {
 315                 ret = -ENOMEM;
 316                 goto error_free_name;
 317         }
 318
 319         st->trig->dev.parent = &st->us->dev;
 320         st->trig->owner = THIS_MODULE;
 321         st->trig->private_data = st;
 322         st->trig->set_trigger_state = &lis3l02dq_data_rdy_trigger_set_state;
 323         st->trig->try_reenable = &lis3l02dq_trig_try_reen;
 324         st->trig->control_attrs = &lis3l02dq_trigger_attr_group;
 325         ret = iio_trigger_register(st->trig);
 326         if (ret)
 327                 goto error_free_trig;
 328
 329         return 0;
 330
 331 error_free_trig:
 332         iio_free_trigger(st->trig);
 333 error_free_name:
 334         kfree(name);
 335 error_ret:
 336         return ret;
 337 }
 338
 339 void lis3l02dq_remove_trigger(struct iio_dev *indio_dev)
 340 {
 341         struct iio_sw_ring_helper_state *h
 342                 = iio_dev_get_devdata(indio_dev);
 343         struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
 344
 345         iio_trigger_unregister(st->trig);
 346         kfree(st->trig->name);
 347         iio_free_trigger(st->trig);
 348 }
 349
 350 void lis3l02dq_unconfigure_ring(struct iio_dev *indio_dev)
 351 {
 352         kfree(indio_dev->pollfunc->name);
 353         kfree(indio_dev->pollfunc);
 354         lis3l02dq_free_buf(indio_dev->ring);
 355 }
 356
 357 static int lis3l02dq_ring_postenable(struct iio_dev *indio_dev)
 358 {
 359         /* Disable unwanted channels otherwise the interrupt will not clear */
 360         u8 t;
 361         int ret;
 362         bool oneenabled = false;
 363
 364         ret = lis3l02dq_spi_read_reg_8(indio_dev,
 365                                        LIS3L02DQ_REG_CTRL_1_ADDR,
 366                                        &t);
 367         if (ret)
 368                 goto error_ret;
 369
 370         if (iio_scan_mask_query(indio_dev->ring, 0)) {
 371                 t |= LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
 372                 oneenabled = true;
 373         } else
 374                 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
 375         if (iio_scan_mask_query(indio_dev->ring, 1)) {
 376                 t |= LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
 377                 oneenabled = true;
 378         } else
 379                 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
 380         if (iio_scan_mask_query(indio_dev->ring, 2)) {
 381                 t |= LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
 382                 oneenabled = true;
 383         } else
 384                 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
 385
 386         if (!oneenabled) /* what happens in this case is unknown */
 387                 return -EINVAL;
 388         ret = lis3l02dq_spi_write_reg_8(indio_dev,
 389                                         LIS3L02DQ_REG_CTRL_1_ADDR,
 390                                         &t);
 391         if (ret)
 392                 goto error_ret;
 393
 394         return iio_triggered_ring_postenable(indio_dev);
 395 error_ret:
 396         return ret;
 397 }
 398
 399 /* Turn all channels on again */
 400 static int lis3l02dq_ring_predisable(struct iio_dev *indio_dev)
 401 {
 402         u8 t;
 403         int ret;
 404
 405         ret = iio_triggered_ring_predisable(indio_dev);
 406         if (ret)
 407                 goto error_ret;
 408
 409         ret = lis3l02dq_spi_read_reg_8(indio_dev,
 410                                        LIS3L02DQ_REG_CTRL_1_ADDR,
 411                                        &t);
 412         if (ret)
 413                 goto error_ret;
 414         t |= LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE |
 415                 LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE |
 416                 LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
 417
 418         ret = lis3l02dq_spi_write_reg_8(indio_dev,
 419                                         LIS3L02DQ_REG_CTRL_1_ADDR,
 420                                         &t);
 421
 422 error_ret:
 423         return ret;
 424 }
 425
 426
 427 int lis3l02dq_configure_ring(struct iio_dev *indio_dev)
 428 {
 429         int ret;
 430         struct iio_sw_ring_helper_state *h = iio_dev_get_devdata(indio_dev);
 431         struct iio_ring_buffer *ring;
 432
 433         h->get_ring_element = &lis3l02dq_get_ring_element;
 434
 435         ring = lis3l02dq_alloc_buf(indio_dev);
 436         if (!ring)
 437                 return -ENOMEM;
 438
 439         indio_dev->ring = ring;
 440         /* Effectively select the ring buffer implementation */
 441         lis3l02dq_register_buf_funcs(&ring->access);
 442         ring->bpe = 2;
 443
 444         ring->scan_timestamp = true;
 445         ring->preenable = &iio_sw_ring_preenable;
 446         ring->postenable = &lis3l02dq_ring_postenable;
 447         ring->predisable = &lis3l02dq_ring_predisable;
 448         ring->owner = THIS_MODULE;
 449
 450         /* Set default scan mode */
 451         iio_scan_mask_set(ring, 0);
 452         iio_scan_mask_set(ring, 1);
 453         iio_scan_mask_set(ring, 2);
 454
 455         /* Functions are NULL as we set handler below */
 456         indio_dev->pollfunc = kzalloc(sizeof(*indio_dev->pollfunc), GFP_KERNEL);
 457
 458         if (indio_dev->pollfunc == NULL) {
 459                 ret = -ENOMEM;
 460                 goto error_iio_sw_rb_free;
 461         }
 462         indio_dev->pollfunc->private_data = indio_dev;
 463         indio_dev->pollfunc->thread = &lis3l02dq_trigger_handler;
 464         indio_dev->pollfunc->h = &iio_pollfunc_store_time;
 465         indio_dev->pollfunc->type = 0;
 466         indio_dev->pollfunc->name
 467                 = kasprintf(GFP_KERNEL, "lis3l02dq_consumer%d", indio_dev->id);
 468
 469         indio_dev->modes |= INDIO_RING_TRIGGERED;
 470         return 0;
 471
 472 error_iio_sw_rb_free:
 473         lis3l02dq_free_buf(indio_dev->ring);
 474         return ret;
 475 }