drivers/staging/iio/cdc/ad7152.c

   1 /*
   2  * AD7152 capacitive sensor driver supporting AD7152/3
   3  *
   4  * Copyright 2010-2011a Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/device.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/sysfs.h>
  14 #include <linux/i2c.h>
  15 #include <linux/module.h>
  16 #include <linux/delay.h>
  17
  18 #include <linux/iio/iio.h>
  19 #include <linux/iio/sysfs.h>
  20
  21 /*
  22  * TODO: Check compliance of calibbias with abi (units)
  23  */
  24 /*
  25  * AD7152 registers definition
  26  */
  27
  28 #define AD7152_REG_STATUS               0
  29 #define AD7152_REG_CH1_DATA_HIGH        1
  30 #define AD7152_REG_CH2_DATA_HIGH        3
  31 #define AD7152_REG_CH1_OFFS_HIGH        5
  32 #define AD7152_REG_CH2_OFFS_HIGH        7
  33 #define AD7152_REG_CH1_GAIN_HIGH        9
  34 #define AD7152_REG_CH1_SETUP            11
  35 #define AD7152_REG_CH2_GAIN_HIGH        12
  36 #define AD7152_REG_CH2_SETUP            14
  37 #define AD7152_REG_CFG                  15
  38 #define AD7152_REG_RESEVERD             16
  39 #define AD7152_REG_CAPDAC_POS           17
  40 #define AD7152_REG_CAPDAC_NEG           18
  41 #define AD7152_REG_CFG2                 26
  42
  43 /* Status Register Bit Designations (AD7152_REG_STATUS) */
  44 #define AD7152_STATUS_RDY1              BIT(0)
  45 #define AD7152_STATUS_RDY2              BIT(1)
  46 #define AD7152_STATUS_C1C2              BIT(2)
  47 #define AD7152_STATUS_PWDN              BIT(7)
  48
  49 /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
  50 #define AD7152_SETUP_CAPDIFF            (1 << 5)
  51 #define AD7152_SETUP_RANGE_2pF          (0 << 6)
  52 #define AD7152_SETUP_RANGE_0_5pF        (1 << 6)
  53 #define AD7152_SETUP_RANGE_1pF          (2 << 6)
  54 #define AD7152_SETUP_RANGE_4pF          (3 << 6)
  55 #define AD7152_SETUP_RANGE(x)           ((x) << 6)
  56
  57 /* Config Register Bit Designations (AD7152_REG_CFG) */
  58 #define AD7152_CONF_CH2EN               (1 << 3)
  59 #define AD7152_CONF_CH1EN               (1 << 4)
  60 #define AD7152_CONF_MODE_IDLE           (0 << 0)
  61 #define AD7152_CONF_MODE_CONT_CONV      (1 << 0)
  62 #define AD7152_CONF_MODE_SINGLE_CONV    (2 << 0)
  63 #define AD7152_CONF_MODE_OFFS_CAL       (5 << 0)
  64 #define AD7152_CONF_MODE_GAIN_CAL       (6 << 0)
  65
  66 /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
  67 #define AD7152_CAPDAC_DACEN             (1 << 7)
  68 #define AD7152_CAPDAC_DACP(x)           ((x) & 0x1F)
  69
  70 /* CFG2 Register Bit Designations (AD7152_REG_CFG2) */
  71 #define AD7152_CFG2_OSR(x)              (((x) & 0x3) << 4)
  72
  73 enum {
  74         AD7152_DATA,
  75         AD7152_OFFS,
  76         AD7152_GAIN,
  77         AD7152_SETUP
  78 };
  79
  80 /*
  81  * struct ad7152_chip_info - chip specific information
  82  */
  83
  84 struct ad7152_chip_info {
  85         struct i2c_client *client;
  86         /*
  87          * Capacitive channel digital filter setup;
  88          * conversion time/update rate setup per channel
  89          */
  90         u8      filter_rate_setup;
  91         u8      setup[2];
  92         struct mutex state_lock;        /* protect hardware state */
  93 };
  94
  95 static inline ssize_t ad7152_start_calib(struct device *dev,
  96                                          struct device_attribute *attr,
  97                                          const char *buf,
  98                                          size_t len,
  99                                          u8 regval)
 100 {
 101         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 102         struct ad7152_chip_info *chip = iio_priv(indio_dev);
 103         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 104         bool doit;
 105         int ret, timeout = 10;
 106
 107         ret = strtobool(buf, &doit);
 108         if (ret < 0)
 109                 return ret;
 110
 111         if (!doit)
 112                 return 0;
 113
 114         if (this_attr->address == 0)
 115                 regval |= AD7152_CONF_CH1EN;
 116         else
 117                 regval |= AD7152_CONF_CH2EN;
 118
 119         mutex_lock(&chip->state_lock);
 120         ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG, regval);
 121         if (ret < 0) {
 122                 mutex_unlock(&chip->state_lock);
 123                 return ret;
 124         }
 125
 126         do {
 127                 mdelay(20);
 128                 ret = i2c_smbus_read_byte_data(chip->client, AD7152_REG_CFG);
 129                 if (ret < 0) {
 130                         mutex_unlock(&chip->state_lock);
 131                         return ret;
 132                 }
 133         } while ((ret == regval) && timeout--);
 134
 135         mutex_unlock(&chip->state_lock);
 136         return len;
 137 }
 138
 139 static ssize_t ad7152_start_offset_calib(struct device *dev,
 140                                          struct device_attribute *attr,
 141                                          const char *buf,
 142                                          size_t len)
 143 {
 144         return ad7152_start_calib(dev, attr, buf, len,
 145                                   AD7152_CONF_MODE_OFFS_CAL);
 146 }
 147
 148 static ssize_t ad7152_start_gain_calib(struct device *dev,
 149                                        struct device_attribute *attr,
 150                                        const char *buf,
 151                                        size_t len)
 152 {
 153         return ad7152_start_calib(dev, attr, buf, len,
 154                                   AD7152_CONF_MODE_GAIN_CAL);
 155 }
 156
 157 static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
 158                        0200, NULL, ad7152_start_offset_calib, 0);
 159 static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration,
 160                        0200, NULL, ad7152_start_offset_calib, 1);
 161 static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration,
 162                        0200, NULL, ad7152_start_gain_calib, 0);
 163 static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration,
 164                        0200, NULL, ad7152_start_gain_calib, 1);
 165
 166 /* Values are Update Rate (Hz), Conversion Time (ms) + 1*/
 167 static const unsigned char ad7152_filter_rate_table[][2] = {
 168         {200, 5 + 1}, {50, 20 + 1}, {20, 50 + 1}, {17, 60 + 1},
 169 };
 170
 171 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("200 50 20 17");
 172
 173 static IIO_CONST_ATTR(in_capacitance_scale_available,
 174                       "0.000061050 0.000030525 0.000015263 0.000007631");
 175
 176 static struct attribute *ad7152_attributes[] = {
 177         &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr,
 178         &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr,
 179         &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr,
 180         &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr,
 181         &iio_const_attr_in_capacitance_scale_available.dev_attr.attr,
 182         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 183         NULL,
 184 };
 185
 186 static const struct attribute_group ad7152_attribute_group = {
 187         .attrs = ad7152_attributes,
 188 };
 189
 190 static const u8 ad7152_addresses[][4] = {
 191         { AD7152_REG_CH1_DATA_HIGH, AD7152_REG_CH1_OFFS_HIGH,
 192           AD7152_REG_CH1_GAIN_HIGH, AD7152_REG_CH1_SETUP },
 193         { AD7152_REG_CH2_DATA_HIGH, AD7152_REG_CH2_OFFS_HIGH,
 194           AD7152_REG_CH2_GAIN_HIGH, AD7152_REG_CH2_SETUP },
 195 };
 196
 197 /* Values are nano relative to pf base. */
 198 static const int ad7152_scale_table[] = {
 199         30525, 7631, 15263, 61050
 200 };
 201
 202 /**
 203  * read_raw handler for IIO_CHAN_INFO_SAMP_FREQ
 204  *
 205  * lock must be held
 206  **/
 207 static int ad7152_read_raw_samp_freq(struct device *dev, int *val)
 208 {
 209         struct ad7152_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
 210
 211         *val = ad7152_filter_rate_table[chip->filter_rate_setup][0];
 212
 213         return 0;
 214 }
 215
 216 /**
 217  * write_raw handler for IIO_CHAN_INFO_SAMP_FREQ
 218  *
 219  * lock must be held
 220  **/
 221 static int ad7152_write_raw_samp_freq(struct device *dev, int val)
 222 {
 223         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 224         struct ad7152_chip_info *chip = iio_priv(indio_dev);
 225         int ret, i;
 226
 227         for (i = 0; i < ARRAY_SIZE(ad7152_filter_rate_table); i++)
 228                 if (val >= ad7152_filter_rate_table[i][0])
 229                         break;
 230
 231         if (i >= ARRAY_SIZE(ad7152_filter_rate_table))
 232                 i = ARRAY_SIZE(ad7152_filter_rate_table) - 1;
 233
 234         ret = i2c_smbus_write_byte_data(chip->client,
 235                                         AD7152_REG_CFG2, AD7152_CFG2_OSR(i));
 236         if (ret < 0)
 237                 return ret;
 238
 239         chip->filter_rate_setup = i;
 240
 241         return ret;
 242 }
 243
 244 static int ad7152_write_raw(struct iio_dev *indio_dev,
 245                             struct iio_chan_spec const *chan,
 246                             int val,
 247                             int val2,
 248                             long mask)
 249 {
 250         struct ad7152_chip_info *chip = iio_priv(indio_dev);
 251         int ret, i;
 252
 253         mutex_lock(&chip->state_lock);
 254
 255         switch (mask) {
 256         case IIO_CHAN_INFO_CALIBSCALE:
 257                 if (val != 1) {
 258                         ret = -EINVAL;
 259                         goto out;
 260                 }
 261
 262                 val = (val2 * 1024) / 15625;
 263
 264                 ret = i2c_smbus_write_word_data(chip->client,
 265                                 ad7152_addresses[chan->channel][AD7152_GAIN],
 266                                 swab16(val));
 267                 if (ret < 0)
 268                         goto out;
 269
 270                 ret = 0;
 271                 break;
 272
 273         case IIO_CHAN_INFO_CALIBBIAS:
 274                 if ((val < 0) | (val > 0xFFFF)) {
 275                         ret = -EINVAL;
 276                         goto out;
 277                 }
 278                 ret = i2c_smbus_write_word_data(chip->client,
 279                                 ad7152_addresses[chan->channel][AD7152_OFFS],
 280                                 swab16(val));
 281                 if (ret < 0)
 282                         goto out;
 283
 284                 ret = 0;
 285                 break;
 286         case IIO_CHAN_INFO_SCALE:
 287                 if (val) {
 288                         ret = -EINVAL;
 289                         goto out;
 290                 }
 291                 for (i = 0; i < ARRAY_SIZE(ad7152_scale_table); i++)
 292                         if (val2 == ad7152_scale_table[i])
 293                                 break;
 294
 295                 chip->setup[chan->channel] &= ~AD7152_SETUP_RANGE_4pF;
 296                 chip->setup[chan->channel] |= AD7152_SETUP_RANGE(i);
 297
 298                 ret = i2c_smbus_write_byte_data(chip->client,
 299                                 ad7152_addresses[chan->channel][AD7152_SETUP],
 300                                 chip->setup[chan->channel]);
 301                 if (ret < 0)
 302                         goto out;
 303
 304                 ret = 0;
 305                 break;
 306         case IIO_CHAN_INFO_SAMP_FREQ:
 307                 if (val2) {
 308                         ret = -EINVAL;
 309                         goto out;
 310                 }
 311                 ret = ad7152_write_raw_samp_freq(&indio_dev->dev, val);
 312                 if (ret < 0)
 313                         goto out;
 314
 315                 ret = 0;
 316                 break;
 317         default:
 318                 ret = -EINVAL;
 319         }
 320
 321 out:
 322         mutex_unlock(&chip->state_lock);
 323         return ret;
 324 }
 325
 326 static int ad7152_read_raw(struct iio_dev *indio_dev,
 327                            struct iio_chan_spec const *chan,
 328                            int *val, int *val2,
 329                            long mask)
 330 {
 331         struct ad7152_chip_info *chip = iio_priv(indio_dev);
 332         int ret;
 333         u8 regval = 0;
 334
 335         mutex_lock(&chip->state_lock);
 336
 337         switch (mask) {
 338         case IIO_CHAN_INFO_RAW:
 339                 /* First set whether in differential mode */
 340
 341                 regval = chip->setup[chan->channel];
 342
 343                 if (chan->differential)
 344                         chip->setup[chan->channel] |= AD7152_SETUP_CAPDIFF;
 345                 else
 346                         chip->setup[chan->channel] &= ~AD7152_SETUP_CAPDIFF;
 347
 348                 if (regval != chip->setup[chan->channel]) {
 349                         ret = i2c_smbus_write_byte_data(chip->client,
 350                                 ad7152_addresses[chan->channel][AD7152_SETUP],
 351                                 chip->setup[chan->channel]);
 352                         if (ret < 0)
 353                                 goto out;
 354                 }
 355                 /* Make sure the channel is enabled */
 356                 if (chan->channel == 0)
 357                         regval = AD7152_CONF_CH1EN;
 358                 else
 359                         regval = AD7152_CONF_CH2EN;
 360
 361                 /* Trigger a single read */
 362                 regval |= AD7152_CONF_MODE_SINGLE_CONV;
 363                 ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG,
 364                                 regval);
 365                 if (ret < 0)
 366                         goto out;
 367
 368                 msleep(ad7152_filter_rate_table[chip->filter_rate_setup][1]);
 369                 /* Now read the actual register */
 370                 ret = i2c_smbus_read_word_data(chip->client,
 371                                 ad7152_addresses[chan->channel][AD7152_DATA]);
 372                 if (ret < 0)
 373                         goto out;
 374                 *val = swab16(ret);
 375
 376                 if (chan->differential)
 377                         *val -= 0x8000;
 378
 379                 ret = IIO_VAL_INT;
 380                 break;
 381         case IIO_CHAN_INFO_CALIBSCALE:
 382
 383                 ret = i2c_smbus_read_word_data(chip->client,
 384                                 ad7152_addresses[chan->channel][AD7152_GAIN]);
 385                 if (ret < 0)
 386                         goto out;
 387                 /* 1 + gain_val / 2^16 */
 388                 *val = 1;
 389                 *val2 = (15625 * swab16(ret)) / 1024;
 390
 391                 ret = IIO_VAL_INT_PLUS_MICRO;
 392                 break;
 393         case IIO_CHAN_INFO_CALIBBIAS:
 394                 ret = i2c_smbus_read_word_data(chip->client,
 395                                 ad7152_addresses[chan->channel][AD7152_OFFS]);
 396                 if (ret < 0)
 397                         goto out;
 398                 *val = swab16(ret);
 399
 400                 ret = IIO_VAL_INT;
 401                 break;
 402         case IIO_CHAN_INFO_SCALE:
 403                 ret = i2c_smbus_read_byte_data(chip->client,
 404                                 ad7152_addresses[chan->channel][AD7152_SETUP]);
 405                 if (ret < 0)
 406                         goto out;
 407                 *val = 0;
 408                 *val2 = ad7152_scale_table[ret >> 6];
 409
 410                 ret = IIO_VAL_INT_PLUS_NANO;
 411                 break;
 412         case IIO_CHAN_INFO_SAMP_FREQ:
 413                 ret = ad7152_read_raw_samp_freq(&indio_dev->dev, val);
 414                 if (ret < 0)
 415                         goto out;
 416
 417                 ret = IIO_VAL_INT;
 418                 break;
 419         default:
 420                 ret = -EINVAL;
 421         }
 422 out:
 423         mutex_unlock(&chip->state_lock);
 424         return ret;
 425 }
 426
 427 static int ad7152_write_raw_get_fmt(struct iio_dev *indio_dev,
 428                                struct iio_chan_spec const *chan,
 429                                long mask)
 430 {
 431         switch (mask) {
 432         case IIO_CHAN_INFO_SCALE:
 433                 return IIO_VAL_INT_PLUS_NANO;
 434         default:
 435                 return IIO_VAL_INT_PLUS_MICRO;
 436         }
 437 }
 438
 439 static const struct iio_info ad7152_info = {
 440         .attrs = &ad7152_attribute_group,
 441         .read_raw = ad7152_read_raw,
 442         .write_raw = ad7152_write_raw,
 443         .write_raw_get_fmt = ad7152_write_raw_get_fmt,
 444         .driver_module = THIS_MODULE,
 445 };
 446
 447 static const struct iio_chan_spec ad7152_channels[] = {
 448         {
 449                 .type = IIO_CAPACITANCE,
 450                 .indexed = 1,
 451                 .channel = 0,
 452                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 453                 BIT(IIO_CHAN_INFO_CALIBSCALE) |
 454                 BIT(IIO_CHAN_INFO_CALIBBIAS) |
 455                 BIT(IIO_CHAN_INFO_SCALE),
 456                 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
 457         }, {
 458                 .type = IIO_CAPACITANCE,
 459                 .differential = 1,
 460                 .indexed = 1,
 461                 .channel = 0,
 462                 .channel2 = 2,
 463                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 464                 BIT(IIO_CHAN_INFO_CALIBSCALE) |
 465                 BIT(IIO_CHAN_INFO_CALIBBIAS) |
 466                 BIT(IIO_CHAN_INFO_SCALE),
 467                 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
 468         }, {
 469                 .type = IIO_CAPACITANCE,
 470                 .indexed = 1,
 471                 .channel = 1,
 472                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 473                 BIT(IIO_CHAN_INFO_CALIBSCALE) |
 474                 BIT(IIO_CHAN_INFO_CALIBBIAS) |
 475                 BIT(IIO_CHAN_INFO_SCALE),
 476                 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
 477         }, {
 478                 .type = IIO_CAPACITANCE,
 479                 .differential = 1,
 480                 .indexed = 1,
 481                 .channel = 1,
 482                 .channel2 = 3,
 483                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 484                 BIT(IIO_CHAN_INFO_CALIBSCALE) |
 485                 BIT(IIO_CHAN_INFO_CALIBBIAS) |
 486                 BIT(IIO_CHAN_INFO_SCALE),
 487                 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
 488         }
 489 };
 490
 491 /*
 492  * device probe and remove
 493  */
 494
 495 static int ad7152_probe(struct i2c_client *client,
 496                 const struct i2c_device_id *id)
 497 {
 498         int ret = 0;
 499         struct ad7152_chip_info *chip;
 500         struct iio_dev *indio_dev;
 501
 502         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
 503         if (!indio_dev)
 504                 return -ENOMEM;
 505         chip = iio_priv(indio_dev);
 506         /* this is only used for device removal purposes */
 507         i2c_set_clientdata(client, indio_dev);
 508
 509         chip->client = client;
 510         mutex_init(&chip->state_lock);
 511
 512         /* Establish that the iio_dev is a child of the i2c device */
 513         indio_dev->name = id->name;
 514         indio_dev->dev.parent = &client->dev;
 515         indio_dev->info = &ad7152_info;
 516         indio_dev->channels = ad7152_channels;
 517         if (id->driver_data == 0)
 518                 indio_dev->num_channels = ARRAY_SIZE(ad7152_channels);
 519         else
 520                 indio_dev->num_channels = 2;
 521         indio_dev->num_channels = ARRAY_SIZE(ad7152_channels);
 522         indio_dev->modes = INDIO_DIRECT_MODE;
 523
 524         ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev);
 525         if (ret)
 526                 return ret;
 527
 528         dev_err(&client->dev, "%s capacitive sensor registered\n", id->name);
 529
 530         return 0;
 531 }
 532
 533 static const struct i2c_device_id ad7152_id[] = {
 534         { "ad7152", 0 },
 535         { "ad7153", 1 },
 536         {}
 537 };
 538
 539 MODULE_DEVICE_TABLE(i2c, ad7152_id);
 540
 541 static struct i2c_driver ad7152_driver = {
 542         .driver = {
 543                 .name = KBUILD_MODNAME,
 544         },
 545         .probe = ad7152_probe,
 546         .id_table = ad7152_id,
 547 };
 548 module_i2c_driver(ad7152_driver);
 549
 550 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
 551 MODULE_DESCRIPTION("Analog Devices AD7152/3 capacitive sensor driver");
 552 MODULE_LICENSE("GPL v2");