2 * i.MX drm driver - LVDS display bridge
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 #include <linux/module.h>
22 #include <linux/clk.h>
24 #include <drm/drm_fb_helper.h>
25 #include <drm/drm_crtc_helper.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
28 #include <linux/of_address.h>
29 #include <linux/of_device.h>
30 #include <video/of_videomode.h>
31 #include <linux/regmap.h>
32 #include <linux/videodev2.h>
36 #define DRIVER_NAME "imx-ldb"
38 #define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
39 #define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
40 #define LDB_CH0_MODE_EN_MASK (3 << 0)
41 #define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
42 #define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
43 #define LDB_CH1_MODE_EN_MASK (3 << 2)
44 #define LDB_SPLIT_MODE_EN (1 << 4)
45 #define LDB_DATA_WIDTH_CH0_24 (1 << 5)
46 #define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
47 #define LDB_DATA_WIDTH_CH1_24 (1 << 7)
48 #define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
49 #define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
50 #define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
51 #define LDB_BGREF_RMODE_INT (1 << 15)
53 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
54 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
58 struct imx_ldb_channel {
60 struct drm_connector connector;
61 struct imx_drm_connector *imx_drm_connector;
62 struct drm_encoder encoder;
63 struct imx_drm_encoder *imx_drm_encoder;
67 struct drm_display_mode mode;
78 struct regmap *regmap;
80 struct imx_ldb_channel channel[2];
81 struct clk *clk[2]; /* our own clock */
82 struct clk *clk_sel[4]; /* parent of display clock */
83 struct clk *clk_pll[2]; /* upstream clock we can adjust */
85 const struct bus_mux *lvds_mux;
88 static enum drm_connector_status imx_ldb_connector_detect(
89 struct drm_connector *connector, bool force)
91 return connector_status_connected;
94 static void imx_ldb_connector_destroy(struct drm_connector *connector)
96 /* do not free here */
99 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
101 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
104 if (imx_ldb_ch->edid) {
105 drm_mode_connector_update_edid_property(connector,
107 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
110 if (imx_ldb_ch->mode_valid) {
111 struct drm_display_mode *mode;
113 mode = drm_mode_create(connector->dev);
114 drm_mode_copy(mode, &imx_ldb_ch->mode);
115 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
116 drm_mode_probed_add(connector, mode);
123 static int imx_ldb_connector_mode_valid(struct drm_connector *connector,
124 struct drm_display_mode *mode)
129 static struct drm_encoder *imx_ldb_connector_best_encoder(
130 struct drm_connector *connector)
132 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
134 return &imx_ldb_ch->encoder;
137 static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
141 static bool imx_ldb_encoder_mode_fixup(struct drm_encoder *encoder,
142 const struct drm_display_mode *mode,
143 struct drm_display_mode *adjusted_mode)
148 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
149 unsigned long serial_clk, unsigned long di_clk)
153 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
154 clk_get_rate(ldb->clk_pll[chno]), serial_clk);
155 clk_set_rate(ldb->clk_pll[chno], serial_clk);
157 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
158 clk_get_rate(ldb->clk_pll[chno]));
160 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
161 clk_get_rate(ldb->clk[chno]),
163 clk_set_rate(ldb->clk[chno], di_clk);
165 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
166 clk_get_rate(ldb->clk[chno]));
168 /* set display clock mux to LDB input clock */
169 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
171 dev_err(ldb->dev, "unable to set di%d parent clock to ldb_di%d\n", mux, chno);
175 static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
177 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
178 struct imx_ldb *ldb = imx_ldb_ch->ldb;
179 struct drm_display_mode *mode = &encoder->crtc->mode;
181 unsigned long serial_clk;
182 unsigned long di_clk = mode->clock * 1000;
183 int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->imx_drm_encoder,
186 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
187 /* dual channel LVDS mode */
188 serial_clk = 3500UL * mode->clock;
189 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
190 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
192 serial_clk = 7000UL * mode->clock;
193 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk, di_clk);
196 switch (imx_ldb_ch->chno) {
198 pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH0_24) ?
199 V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
202 pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH1_24) ?
203 V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
206 dev_err(ldb->dev, "unable to config di%d panel format\n",
208 pixel_fmt = V4L2_PIX_FMT_RGB24;
211 imx_drm_crtc_panel_format(encoder->crtc, DRM_MODE_ENCODER_LVDS,
215 static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
217 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
218 struct imx_ldb *ldb = imx_ldb_ch->ldb;
219 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
220 int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->imx_drm_encoder,
224 clk_prepare_enable(ldb->clk[0]);
225 clk_prepare_enable(ldb->clk[1]);
228 if (imx_ldb_ch == &ldb->channel[0] || dual) {
229 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
230 if (mux == 0 || ldb->lvds_mux)
231 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
233 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
235 if (imx_ldb_ch == &ldb->channel[1] || dual) {
236 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
237 if (mux == 1 || ldb->lvds_mux)
238 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
240 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
244 const struct bus_mux *lvds_mux = NULL;
246 if (imx_ldb_ch == &ldb->channel[0])
247 lvds_mux = &ldb->lvds_mux[0];
248 else if (imx_ldb_ch == &ldb->channel[1])
249 lvds_mux = &ldb->lvds_mux[1];
251 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
252 mux << lvds_mux->shift);
255 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
258 static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
259 struct drm_display_mode *mode,
260 struct drm_display_mode *adjusted_mode)
262 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
263 struct imx_ldb *ldb = imx_ldb_ch->ldb;
264 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
266 if (mode->clock > 170000) {
268 "%s: mode exceeds 170 MHz pixel clock\n", __func__);
270 if (mode->clock > 85000 && !dual) {
272 "%s: mode exceeds 85 MHz pixel clock\n", __func__);
275 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
276 if (imx_ldb_ch == &ldb->channel[0]) {
277 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
278 ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
279 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
280 ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
282 if (imx_ldb_ch == &ldb->channel[1]) {
283 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
284 ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
285 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
286 ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
290 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
292 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
293 struct imx_ldb *ldb = imx_ldb_ch->ldb;
296 * imx_ldb_encoder_disable is called by
297 * drm_helper_disable_unused_functions without
298 * the encoder being enabled before.
300 if (imx_ldb_ch == &ldb->channel[0] &&
301 (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
303 else if (imx_ldb_ch == &ldb->channel[1] &&
304 (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
307 if (imx_ldb_ch == &ldb->channel[0])
308 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
309 else if (imx_ldb_ch == &ldb->channel[1])
310 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
312 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
314 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
315 clk_disable_unprepare(ldb->clk[0]);
316 clk_disable_unprepare(ldb->clk[1]);
320 static void imx_ldb_encoder_destroy(struct drm_encoder *encoder)
322 /* do not free here */
325 static struct drm_connector_funcs imx_ldb_connector_funcs = {
326 .dpms = drm_helper_connector_dpms,
327 .fill_modes = drm_helper_probe_single_connector_modes,
328 .detect = imx_ldb_connector_detect,
329 .destroy = imx_ldb_connector_destroy,
332 static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
333 .get_modes = imx_ldb_connector_get_modes,
334 .best_encoder = imx_ldb_connector_best_encoder,
335 .mode_valid = imx_ldb_connector_mode_valid,
338 static struct drm_encoder_funcs imx_ldb_encoder_funcs = {
339 .destroy = imx_ldb_encoder_destroy,
342 static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
343 .dpms = imx_ldb_encoder_dpms,
344 .mode_fixup = imx_ldb_encoder_mode_fixup,
345 .prepare = imx_ldb_encoder_prepare,
346 .commit = imx_ldb_encoder_commit,
347 .mode_set = imx_ldb_encoder_mode_set,
348 .disable = imx_ldb_encoder_disable,
351 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
355 sprintf(clkname, "di%d", chno);
356 ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
357 if (IS_ERR(ldb->clk[chno]))
358 return PTR_ERR(ldb->clk[chno]);
360 sprintf(clkname, "di%d_pll", chno);
361 ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
362 if (IS_ERR(ldb->clk_pll[chno]))
363 return PTR_ERR(ldb->clk_pll[chno]);
368 static int imx_ldb_register(struct imx_ldb_channel *imx_ldb_ch)
371 struct imx_ldb *ldb = imx_ldb_ch->ldb;
373 ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
376 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
377 ret |= imx_ldb_get_clk(ldb, 1);
382 imx_ldb_ch->connector.funcs = &imx_ldb_connector_funcs;
383 imx_ldb_ch->encoder.funcs = &imx_ldb_encoder_funcs;
385 imx_ldb_ch->encoder.encoder_type = DRM_MODE_ENCODER_LVDS;
386 imx_ldb_ch->connector.connector_type = DRM_MODE_CONNECTOR_LVDS;
388 drm_encoder_helper_add(&imx_ldb_ch->encoder,
389 &imx_ldb_encoder_helper_funcs);
390 ret = imx_drm_add_encoder(&imx_ldb_ch->encoder,
391 &imx_ldb_ch->imx_drm_encoder, THIS_MODULE);
393 dev_err(ldb->dev, "adding encoder failed with %d\n", ret);
397 drm_connector_helper_add(&imx_ldb_ch->connector,
398 &imx_ldb_connector_helper_funcs);
400 ret = imx_drm_add_connector(&imx_ldb_ch->connector,
401 &imx_ldb_ch->imx_drm_connector, THIS_MODULE);
403 imx_drm_remove_encoder(imx_ldb_ch->imx_drm_encoder);
404 dev_err(ldb->dev, "adding connector failed with %d\n", ret);
408 drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
409 &imx_ldb_ch->encoder);
419 static const char *imx_ldb_bit_mappings[] = {
420 [LVDS_BIT_MAP_SPWG] = "spwg",
421 [LVDS_BIT_MAP_JEIDA] = "jeida",
424 static const int of_get_data_mapping(struct device_node *np)
429 ret = of_property_read_string(np, "fsl,data-mapping", &bm);
433 for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++)
434 if (!strcasecmp(bm, imx_ldb_bit_mappings[i]))
440 static struct bus_mux imx6q_lvds_mux[2] = {
444 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
448 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
453 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
454 * of_match_device will walk through this list and take the first entry
455 * matching any of its compatible values. Therefore, the more generic
456 * entries (in this case fsl,imx53-ldb) need to be ordered last.
458 static const struct of_device_id imx_ldb_dt_ids[] = {
459 { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
460 { .compatible = "fsl,imx53-ldb", .data = NULL, },
463 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
465 static int imx_ldb_probe(struct platform_device *pdev)
467 struct device_node *np = pdev->dev.of_node;
468 const struct of_device_id *of_id =
469 of_match_device(imx_ldb_dt_ids, &pdev->dev);
470 struct device_node *child;
472 struct imx_ldb *imx_ldb;
479 imx_ldb = devm_kzalloc(&pdev->dev, sizeof(*imx_ldb), GFP_KERNEL);
483 imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
484 if (IS_ERR(imx_ldb->regmap)) {
485 dev_err(&pdev->dev, "failed to get parent regmap\n");
486 return PTR_ERR(imx_ldb->regmap);
489 imx_ldb->dev = &pdev->dev;
492 imx_ldb->lvds_mux = of_id->data;
494 dual = of_property_read_bool(np, "fsl,dual-channel");
496 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
499 * There are three different possible clock mux configurations:
500 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
501 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
502 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
503 * Map them all to di0_sel...di3_sel.
505 for (i = 0; i < 4; i++) {
508 sprintf(clkname, "di%d_sel", i);
509 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
510 if (IS_ERR(imx_ldb->clk_sel[i])) {
511 ret = PTR_ERR(imx_ldb->clk_sel[i]);
512 imx_ldb->clk_sel[i] = NULL;
519 for_each_child_of_node(np, child) {
520 struct imx_ldb_channel *channel;
522 ret = of_property_read_u32(child, "reg", &i);
523 if (ret || i < 0 || i > 1)
527 dev_warn(&pdev->dev, "dual-channel mode, ignoring second output\n");
531 if (!of_device_is_available(child))
534 channel = &imx_ldb->channel[i];
535 channel->ldb = imx_ldb;
538 edidp = of_get_property(child, "edid", &channel->edid_len);
540 channel->edid = kmemdup(edidp, channel->edid_len,
543 ret = of_get_drm_display_mode(child, &channel->mode, 0);
545 channel->mode_valid = 1;
548 ret = of_property_read_u32(child, "fsl,data-width", &datawidth);
551 else if (datawidth != 18 && datawidth != 24)
554 mapping = of_get_data_mapping(child);
556 case LVDS_BIT_MAP_SPWG:
557 if (datawidth == 24) {
559 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
561 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
564 case LVDS_BIT_MAP_JEIDA:
565 if (datawidth == 18) {
566 dev_err(&pdev->dev, "JEIDA standard only supported in 24 bit\n");
570 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 | LDB_BIT_MAP_CH0_JEIDA;
572 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 | LDB_BIT_MAP_CH1_JEIDA;
575 dev_err(&pdev->dev, "data mapping not specified or invalid\n");
579 ret = imx_ldb_register(channel);
583 imx_drm_encoder_add_possible_crtcs(channel->imx_drm_encoder, child);
586 platform_set_drvdata(pdev, imx_ldb);
591 static int imx_ldb_remove(struct platform_device *pdev)
593 struct imx_ldb *imx_ldb = platform_get_drvdata(pdev);
596 for (i = 0; i < 2; i++) {
597 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
598 struct drm_connector *connector = &channel->connector;
599 struct drm_encoder *encoder = &channel->encoder;
601 drm_mode_connector_detach_encoder(connector, encoder);
603 imx_drm_remove_connector(channel->imx_drm_connector);
604 imx_drm_remove_encoder(channel->imx_drm_encoder);
610 static struct platform_driver imx_ldb_driver = {
611 .probe = imx_ldb_probe,
612 .remove = imx_ldb_remove,
614 .of_match_table = imx_ldb_dt_ids,
616 .owner = THIS_MODULE,
620 module_platform_driver(imx_ldb_driver);
622 MODULE_DESCRIPTION("i.MX LVDS driver");
623 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
624 MODULE_LICENSE("GPL");
625 MODULE_ALIAS("platform:" DRIVER_NAME);