2 * i.MX drm driver - Television Encoder (TVEv2)
4 * Copyright (C) 2013 Philipp Zabel, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 #include <linux/clk.h>
22 #include <linux/clk-provider.h>
23 #include <linux/module.h>
24 #include <linux/i2c.h>
25 #include <linux/regmap.h>
26 #include <linux/regulator/consumer.h>
27 #include <linux/spinlock.h>
28 #include <linux/videodev2.h>
30 #include <drm/drm_fb_helper.h>
31 #include <drm/drm_crtc_helper.h>
35 #define TVE_COM_CONF_REG 0x00
36 #define TVE_TVDAC0_CONT_REG 0x28
37 #define TVE_TVDAC1_CONT_REG 0x2c
38 #define TVE_TVDAC2_CONT_REG 0x30
39 #define TVE_CD_CONT_REG 0x34
40 #define TVE_INT_CONT_REG 0x64
41 #define TVE_STAT_REG 0x68
42 #define TVE_TST_MODE_REG 0x6c
43 #define TVE_MV_CONT_REG 0xdc
45 /* TVE_COM_CONF_REG */
46 #define TVE_SYNC_CH_2_EN BIT(22)
47 #define TVE_SYNC_CH_1_EN BIT(21)
48 #define TVE_SYNC_CH_0_EN BIT(20)
49 #define TVE_TV_OUT_MODE_MASK (0x7 << 12)
50 #define TVE_TV_OUT_DISABLE (0x0 << 12)
51 #define TVE_TV_OUT_CVBS_0 (0x1 << 12)
52 #define TVE_TV_OUT_CVBS_2 (0x2 << 12)
53 #define TVE_TV_OUT_CVBS_0_2 (0x3 << 12)
54 #define TVE_TV_OUT_SVIDEO_0_1 (0x4 << 12)
55 #define TVE_TV_OUT_SVIDEO_0_1_CVBS2_2 (0x5 << 12)
56 #define TVE_TV_OUT_YPBPR (0x6 << 12)
57 #define TVE_TV_OUT_RGB (0x7 << 12)
58 #define TVE_TV_STAND_MASK (0xf << 8)
59 #define TVE_TV_STAND_HD_1080P30 (0xc << 8)
60 #define TVE_P2I_CONV_EN BIT(7)
61 #define TVE_INP_VIDEO_FORM BIT(6)
62 #define TVE_INP_YCBCR_422 (0x0 << 6)
63 #define TVE_INP_YCBCR_444 (0x1 << 6)
64 #define TVE_DATA_SOURCE_MASK (0x3 << 4)
65 #define TVE_DATA_SOURCE_BUS1 (0x0 << 4)
66 #define TVE_DATA_SOURCE_BUS2 (0x1 << 4)
67 #define TVE_DATA_SOURCE_EXT (0x2 << 4)
68 #define TVE_DATA_SOURCE_TESTGEN (0x3 << 4)
69 #define TVE_IPU_CLK_EN_OFS 3
70 #define TVE_IPU_CLK_EN BIT(3)
71 #define TVE_DAC_SAMP_RATE_OFS 1
72 #define TVE_DAC_SAMP_RATE_WIDTH 2
73 #define TVE_DAC_SAMP_RATE_MASK (0x3 << 1)
74 #define TVE_DAC_FULL_RATE (0x0 << 1)
75 #define TVE_DAC_DIV2_RATE (0x1 << 1)
76 #define TVE_DAC_DIV4_RATE (0x2 << 1)
79 /* TVE_TVDACx_CONT_REG */
80 #define TVE_TVDAC_GAIN_MASK (0x3f << 0)
83 #define TVE_CD_CH_2_SM_EN BIT(22)
84 #define TVE_CD_CH_1_SM_EN BIT(21)
85 #define TVE_CD_CH_0_SM_EN BIT(20)
86 #define TVE_CD_CH_2_LM_EN BIT(18)
87 #define TVE_CD_CH_1_LM_EN BIT(17)
88 #define TVE_CD_CH_0_LM_EN BIT(16)
89 #define TVE_CD_CH_2_REF_LVL BIT(10)
90 #define TVE_CD_CH_1_REF_LVL BIT(9)
91 #define TVE_CD_CH_0_REF_LVL BIT(8)
92 #define TVE_CD_EN BIT(0)
94 /* TVE_INT_CONT_REG */
95 #define TVE_FRAME_END_IEN BIT(13)
96 #define TVE_CD_MON_END_IEN BIT(2)
97 #define TVE_CD_SM_IEN BIT(1)
98 #define TVE_CD_LM_IEN BIT(0)
100 /* TVE_TST_MODE_REG */
101 #define TVE_TVDAC_TEST_MODE_MASK (0x7 << 0)
103 #define con_to_tve(x) container_of(x, struct imx_tve, connector)
104 #define enc_to_tve(x) container_of(x, struct imx_tve, encoder)
112 struct drm_connector connector;
113 struct imx_drm_connector *imx_drm_connector;
114 struct drm_encoder encoder;
115 struct imx_drm_encoder *imx_drm_encoder;
117 spinlock_t enable_lock; /* serializes tve_enable/disable */
118 spinlock_t lock; /* register lock */
122 struct regmap *regmap;
123 struct regulator *dac_reg;
124 struct i2c_adapter *ddc;
126 struct clk *di_sel_clk;
127 struct clk_hw clk_hw_di;
133 static void tve_lock(void *__tve)
134 __acquires(&tve->lock)
136 struct imx_tve *tve = __tve;
137 spin_lock(&tve->lock);
140 static void tve_unlock(void *__tve)
141 __releases(&tve->lock)
143 struct imx_tve *tve = __tve;
144 spin_unlock(&tve->lock);
147 static void tve_enable(struct imx_tve *tve)
152 spin_lock_irqsave(&tve->enable_lock, flags);
155 clk_prepare_enable(tve->clk);
156 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
157 TVE_IPU_CLK_EN | TVE_EN,
158 TVE_IPU_CLK_EN | TVE_EN);
161 /* clear interrupt status register */
162 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff);
164 /* cable detection irq disabled in VGA mode, enabled in TVOUT mode */
165 if (tve->mode == TVE_MODE_VGA)
166 regmap_write(tve->regmap, TVE_INT_CONT_REG, 0);
168 regmap_write(tve->regmap, TVE_INT_CONT_REG,
173 spin_unlock_irqrestore(&tve->enable_lock, flags);
176 static void tve_disable(struct imx_tve *tve)
181 spin_lock_irqsave(&tve->enable_lock, flags);
184 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
185 TVE_IPU_CLK_EN | TVE_EN, 0);
186 clk_disable_unprepare(tve->clk);
188 spin_unlock_irqrestore(&tve->enable_lock, flags);
191 static int tve_setup_tvout(struct imx_tve *tve)
196 static int tve_setup_vga(struct imx_tve *tve)
202 /* set gain to (1 + 10/128) to provide 0.7V peak-to-peak amplitude */
203 ret = regmap_update_bits(tve->regmap, TVE_TVDAC0_CONT_REG,
204 TVE_TVDAC_GAIN_MASK, 0x0a);
205 ret = regmap_update_bits(tve->regmap, TVE_TVDAC1_CONT_REG,
206 TVE_TVDAC_GAIN_MASK, 0x0a);
207 ret = regmap_update_bits(tve->regmap, TVE_TVDAC2_CONT_REG,
208 TVE_TVDAC_GAIN_MASK, 0x0a);
210 /* set configuration register */
211 mask = TVE_DATA_SOURCE_MASK | TVE_INP_VIDEO_FORM;
212 val = TVE_DATA_SOURCE_BUS2 | TVE_INP_YCBCR_444;
213 mask |= TVE_TV_STAND_MASK | TVE_P2I_CONV_EN;
214 val |= TVE_TV_STAND_HD_1080P30 | 0;
215 mask |= TVE_TV_OUT_MODE_MASK | TVE_SYNC_CH_0_EN;
216 val |= TVE_TV_OUT_RGB | TVE_SYNC_CH_0_EN;
217 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, mask, val);
219 dev_err(tve->dev, "failed to set configuration: %d\n", ret);
223 /* set test mode (as documented) */
224 ret = regmap_update_bits(tve->regmap, TVE_TST_MODE_REG,
225 TVE_TVDAC_TEST_MODE_MASK, 1);
230 static enum drm_connector_status imx_tve_connector_detect(
231 struct drm_connector *connector, bool force)
233 return connector_status_connected;
236 static void imx_tve_connector_destroy(struct drm_connector *connector)
238 /* do not free here */
241 static int imx_tve_connector_get_modes(struct drm_connector *connector)
243 struct imx_tve *tve = con_to_tve(connector);
250 edid = drm_get_edid(connector, tve->ddc);
252 drm_mode_connector_update_edid_property(connector, edid);
253 ret = drm_add_edid_modes(connector, edid);
260 static int imx_tve_connector_mode_valid(struct drm_connector *connector,
261 struct drm_display_mode *mode)
263 struct imx_tve *tve = con_to_tve(connector);
266 /* pixel clock with 2x oversampling */
267 rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
268 if (rate == mode->clock)
271 /* pixel clock without oversampling */
272 rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
273 if (rate == mode->clock)
276 dev_warn(tve->dev, "ignoring mode %dx%d\n",
277 mode->hdisplay, mode->vdisplay);
282 static struct drm_encoder *imx_tve_connector_best_encoder(
283 struct drm_connector *connector)
285 struct imx_tve *tve = con_to_tve(connector);
287 return &tve->encoder;
290 static void imx_tve_encoder_dpms(struct drm_encoder *encoder, int mode)
292 struct imx_tve *tve = enc_to_tve(encoder);
295 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
296 TVE_TV_OUT_MODE_MASK, TVE_TV_OUT_DISABLE);
298 dev_err(tve->dev, "failed to disable TVOUT: %d\n", ret);
301 static bool imx_tve_encoder_mode_fixup(struct drm_encoder *encoder,
302 const struct drm_display_mode *mode,
303 struct drm_display_mode *adjusted_mode)
308 static void imx_tve_encoder_prepare(struct drm_encoder *encoder)
310 struct imx_tve *tve = enc_to_tve(encoder);
316 imx_drm_crtc_panel_format_pins(encoder->crtc,
317 DRM_MODE_ENCODER_DAC, IPU_PIX_FMT_GBR24,
318 tve->hsync_pin, tve->vsync_pin);
321 imx_drm_crtc_panel_format(encoder->crtc, DRM_MODE_ENCODER_TVDAC,
322 V4L2_PIX_FMT_YUV444);
327 static void imx_tve_encoder_mode_set(struct drm_encoder *encoder,
328 struct drm_display_mode *mode,
329 struct drm_display_mode *adjusted_mode)
331 struct imx_tve *tve = enc_to_tve(encoder);
332 unsigned long rounded_rate;
339 * we should try 4k * mode->clock first,
340 * and enable 4x oversampling for lower resolutions
342 rate = 2000UL * mode->clock;
343 clk_set_rate(tve->clk, rate);
344 rounded_rate = clk_get_rate(tve->clk);
345 if (rounded_rate >= rate)
347 clk_set_rate(tve->di_clk, rounded_rate / div);
349 ret = clk_set_parent(tve->di_sel_clk, tve->di_clk);
351 dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n",
355 if (tve->mode == TVE_MODE_VGA)
358 tve_setup_tvout(tve);
361 static void imx_tve_encoder_commit(struct drm_encoder *encoder)
363 struct imx_tve *tve = enc_to_tve(encoder);
368 static void imx_tve_encoder_disable(struct drm_encoder *encoder)
370 struct imx_tve *tve = enc_to_tve(encoder);
375 static void imx_tve_encoder_destroy(struct drm_encoder *encoder)
377 /* do not free here */
380 static struct drm_connector_funcs imx_tve_connector_funcs = {
381 .dpms = drm_helper_connector_dpms,
382 .fill_modes = drm_helper_probe_single_connector_modes,
383 .detect = imx_tve_connector_detect,
384 .destroy = imx_tve_connector_destroy,
387 static struct drm_connector_helper_funcs imx_tve_connector_helper_funcs = {
388 .get_modes = imx_tve_connector_get_modes,
389 .best_encoder = imx_tve_connector_best_encoder,
390 .mode_valid = imx_tve_connector_mode_valid,
393 static struct drm_encoder_funcs imx_tve_encoder_funcs = {
394 .destroy = imx_tve_encoder_destroy,
397 static struct drm_encoder_helper_funcs imx_tve_encoder_helper_funcs = {
398 .dpms = imx_tve_encoder_dpms,
399 .mode_fixup = imx_tve_encoder_mode_fixup,
400 .prepare = imx_tve_encoder_prepare,
401 .mode_set = imx_tve_encoder_mode_set,
402 .commit = imx_tve_encoder_commit,
403 .disable = imx_tve_encoder_disable,
406 static irqreturn_t imx_tve_irq_handler(int irq, void *data)
408 struct imx_tve *tve = data;
411 regmap_read(tve->regmap, TVE_STAT_REG, &val);
413 /* clear interrupt status register */
414 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff);
419 static unsigned long clk_tve_di_recalc_rate(struct clk_hw *hw,
420 unsigned long parent_rate)
422 struct imx_tve *tve = container_of(hw, struct imx_tve, clk_hw_di);
426 ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val);
430 switch (val & TVE_DAC_SAMP_RATE_MASK) {
431 case TVE_DAC_DIV4_RATE:
432 return parent_rate / 4;
433 case TVE_DAC_DIV2_RATE:
434 return parent_rate / 2;
435 case TVE_DAC_FULL_RATE:
443 static long clk_tve_di_round_rate(struct clk_hw *hw, unsigned long rate,
444 unsigned long *prate)
457 static int clk_tve_di_set_rate(struct clk_hw *hw, unsigned long rate,
458 unsigned long parent_rate)
460 struct imx_tve *tve = container_of(hw, struct imx_tve, clk_hw_di);
465 div = parent_rate / rate;
467 val = TVE_DAC_DIV4_RATE;
469 val = TVE_DAC_DIV2_RATE;
471 val = TVE_DAC_FULL_RATE;
473 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
474 TVE_DAC_SAMP_RATE_MASK, val);
477 dev_err(tve->dev, "failed to set divider: %d\n", ret);
484 static struct clk_ops clk_tve_di_ops = {
485 .round_rate = clk_tve_di_round_rate,
486 .set_rate = clk_tve_di_set_rate,
487 .recalc_rate = clk_tve_di_recalc_rate,
490 static int tve_clk_init(struct imx_tve *tve, void __iomem *base)
492 const char *tve_di_parent[1];
493 struct clk_init_data init = {
495 .ops = &clk_tve_di_ops,
500 tve_di_parent[0] = __clk_get_name(tve->clk);
501 init.parent_names = (const char **)&tve_di_parent;
503 tve->clk_hw_di.init = &init;
504 tve->di_clk = clk_register(tve->dev, &tve->clk_hw_di);
505 if (IS_ERR(tve->di_clk)) {
506 dev_err(tve->dev, "failed to register TVE output clock: %ld\n",
507 PTR_ERR(tve->di_clk));
508 return PTR_ERR(tve->di_clk);
514 static int imx_tve_register(struct imx_tve *tve)
518 tve->connector.funcs = &imx_tve_connector_funcs;
519 tve->encoder.funcs = &imx_tve_encoder_funcs;
521 tve->encoder.encoder_type = DRM_MODE_ENCODER_NONE;
522 tve->connector.connector_type = DRM_MODE_CONNECTOR_VGA;
524 drm_encoder_helper_add(&tve->encoder, &imx_tve_encoder_helper_funcs);
525 ret = imx_drm_add_encoder(&tve->encoder, &tve->imx_drm_encoder,
528 dev_err(tve->dev, "adding encoder failed with %d\n", ret);
532 drm_connector_helper_add(&tve->connector,
533 &imx_tve_connector_helper_funcs);
535 ret = imx_drm_add_connector(&tve->connector,
536 &tve->imx_drm_connector, THIS_MODULE);
538 imx_drm_remove_encoder(tve->imx_drm_encoder);
539 dev_err(tve->dev, "adding connector failed with %d\n", ret);
543 drm_mode_connector_attach_encoder(&tve->connector, &tve->encoder);
548 static bool imx_tve_readable_reg(struct device *dev, unsigned int reg)
550 return (reg % 4 == 0) && (reg <= 0xdc);
553 static struct regmap_config tve_regmap_config = {
558 .readable_reg = imx_tve_readable_reg,
561 .unlock = tve_unlock,
563 .max_register = 0xdc,
566 static const char *imx_tve_modes[] = {
567 [TVE_MODE_TVOUT] = "tvout",
568 [TVE_MODE_VGA] = "vga",
571 const int of_get_tve_mode(struct device_node *np)
576 ret = of_property_read_string(np, "fsl,tve-mode", &bm);
580 for (i = 0; i < ARRAY_SIZE(imx_tve_modes); i++)
581 if (!strcasecmp(bm, imx_tve_modes[i]))
587 static int imx_tve_probe(struct platform_device *pdev)
589 struct device_node *np = pdev->dev.of_node;
590 struct device_node *ddc_node;
592 struct resource *res;
598 tve = devm_kzalloc(&pdev->dev, sizeof(*tve), GFP_KERNEL);
602 tve->dev = &pdev->dev;
603 spin_lock_init(&tve->lock);
604 spin_lock_init(&tve->enable_lock);
606 ddc_node = of_parse_phandle(np, "ddc", 0);
608 tve->ddc = of_find_i2c_adapter_by_node(ddc_node);
609 of_node_put(ddc_node);
612 tve->mode = of_get_tve_mode(np);
613 if (tve->mode != TVE_MODE_VGA) {
614 dev_err(&pdev->dev, "only VGA mode supported, currently\n");
618 if (tve->mode == TVE_MODE_VGA) {
619 ret = of_property_read_u32(np, "fsl,hsync-pin",
623 dev_err(&pdev->dev, "failed to get vsync pin\n");
627 ret |= of_property_read_u32(np, "fsl,vsync-pin",
631 dev_err(&pdev->dev, "failed to get vsync pin\n");
636 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
637 base = devm_ioremap_resource(&pdev->dev, res);
639 return PTR_ERR(base);
641 tve_regmap_config.lock_arg = tve;
642 tve->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "tve", base,
644 if (IS_ERR(tve->regmap)) {
645 dev_err(&pdev->dev, "failed to init regmap: %ld\n",
646 PTR_ERR(tve->regmap));
647 return PTR_ERR(tve->regmap);
650 irq = platform_get_irq(pdev, 0);
652 dev_err(&pdev->dev, "failed to get irq\n");
656 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
657 imx_tve_irq_handler, IRQF_ONESHOT,
660 dev_err(&pdev->dev, "failed to request irq: %d\n", ret);
664 tve->dac_reg = devm_regulator_get(&pdev->dev, "dac");
665 if (!IS_ERR(tve->dac_reg)) {
666 regulator_set_voltage(tve->dac_reg, 2750000, 2750000);
667 ret = regulator_enable(tve->dac_reg);
672 tve->clk = devm_clk_get(&pdev->dev, "tve");
673 if (IS_ERR(tve->clk)) {
674 dev_err(&pdev->dev, "failed to get high speed tve clock: %ld\n",
676 return PTR_ERR(tve->clk);
679 /* this is the IPU DI clock input selector, can be parented to tve_di */
680 tve->di_sel_clk = devm_clk_get(&pdev->dev, "di_sel");
681 if (IS_ERR(tve->di_sel_clk)) {
682 dev_err(&pdev->dev, "failed to get ipu di mux clock: %ld\n",
683 PTR_ERR(tve->di_sel_clk));
684 return PTR_ERR(tve->di_sel_clk);
687 ret = tve_clk_init(tve, base);
691 ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val);
693 dev_err(&pdev->dev, "failed to read configuration register: %d\n", ret);
696 if (val != 0x00100000) {
697 dev_err(&pdev->dev, "configuration register default value indicates this is not a TVEv2\n");
701 /* disable cable detection for VGA mode */
702 ret = regmap_write(tve->regmap, TVE_CD_CONT_REG, 0);
704 ret = imx_tve_register(tve);
708 ret = imx_drm_encoder_add_possible_crtcs(tve->imx_drm_encoder, np);
710 platform_set_drvdata(pdev, tve);
715 static int imx_tve_remove(struct platform_device *pdev)
717 struct imx_tve *tve = platform_get_drvdata(pdev);
718 struct drm_connector *connector = &tve->connector;
719 struct drm_encoder *encoder = &tve->encoder;
721 drm_mode_connector_detach_encoder(connector, encoder);
723 imx_drm_remove_connector(tve->imx_drm_connector);
724 imx_drm_remove_encoder(tve->imx_drm_encoder);
726 if (!IS_ERR(tve->dac_reg))
727 regulator_disable(tve->dac_reg);
732 static const struct of_device_id imx_tve_dt_ids[] = {
733 { .compatible = "fsl,imx53-tve", },
737 static struct platform_driver imx_tve_driver = {
738 .probe = imx_tve_probe,
739 .remove = imx_tve_remove,
741 .of_match_table = imx_tve_dt_ids,
743 .owner = THIS_MODULE,
747 module_platform_driver(imx_tve_driver);
749 MODULE_DESCRIPTION("i.MX Television Encoder driver");
750 MODULE_AUTHOR("Philipp Zabel, Pengutronix");
751 MODULE_LICENSE("GPL");
752 MODULE_ALIAS("platform:imx-tve");