drivers/staging/imx-drm/ipu-v3/ipu-dp.c

   1 /*
   2  * Copyright (c) 2010 Sascha Hauer <s.hauer@pengutronix.de>
   3  * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2 of the License, or (at your
   8  * option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * for more details.
  14  */
  15 #include <linux/export.h>
  16 #include <linux/kernel.h>
  17 #include <linux/types.h>
  18 #include <linux/errno.h>
  19 #include <linux/io.h>
  20 #include <linux/err.h>
  21
  22 #include "imx-ipu-v3.h"
  23 #include "ipu-prv.h"
  24
  25 #define DP_SYNC 0
  26 #define DP_ASYNC0 0x60
  27 #define DP_ASYNC1 0xBC
  28
  29 #define DP_COM_CONF             0x0
  30 #define DP_GRAPH_WIND_CTRL      0x0004
  31 #define DP_FG_POS               0x0008
  32 #define DP_CSC_A_0              0x0044
  33 #define DP_CSC_A_1              0x0048
  34 #define DP_CSC_A_2              0x004C
  35 #define DP_CSC_A_3              0x0050
  36 #define DP_CSC_0                0x0054
  37 #define DP_CSC_1                0x0058
  38
  39 #define DP_COM_CONF_FG_EN               (1 << 0)
  40 #define DP_COM_CONF_GWSEL               (1 << 1)
  41 #define DP_COM_CONF_GWAM                (1 << 2)
  42 #define DP_COM_CONF_GWCKE               (1 << 3)
  43 #define DP_COM_CONF_CSC_DEF_MASK        (3 << 8)
  44 #define DP_COM_CONF_CSC_DEF_OFFSET      8
  45 #define DP_COM_CONF_CSC_DEF_FG          (3 << 8)
  46 #define DP_COM_CONF_CSC_DEF_BG          (2 << 8)
  47 #define DP_COM_CONF_CSC_DEF_BOTH        (1 << 8)
  48
  49 struct ipu_dp_priv;
  50
  51 struct ipu_dp {
  52         u32 flow;
  53         bool in_use;
  54         bool foreground;
  55         enum ipu_color_space in_cs;
  56 };
  57
  58 struct ipu_flow {
  59         struct ipu_dp foreground;
  60         struct ipu_dp background;
  61         enum ipu_color_space out_cs;
  62         void __iomem *base;
  63         struct ipu_dp_priv *priv;
  64 };
  65
  66 struct ipu_dp_priv {
  67         struct ipu_soc *ipu;
  68         struct device *dev;
  69         void __iomem *base;
  70         struct ipu_flow flow[3];
  71         struct mutex mutex;
  72         int use_count;
  73 };
  74
  75 static u32 ipu_dp_flow_base[] = {DP_SYNC, DP_ASYNC0, DP_ASYNC1};
  76
  77 static inline struct ipu_flow *to_flow(struct ipu_dp *dp)
  78 {
  79         if (dp->foreground)
  80                 return container_of(dp, struct ipu_flow, foreground);
  81         else
  82                 return container_of(dp, struct ipu_flow, background);
  83 }
  84
  85 int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable,
  86                 u8 alpha, bool bg_chan)
  87 {
  88         struct ipu_flow *flow = to_flow(dp);
  89         struct ipu_dp_priv *priv = flow->priv;
  90         u32 reg;
  91
  92         mutex_lock(&priv->mutex);
  93
  94         reg = readl(flow->base + DP_COM_CONF);
  95         if (bg_chan)
  96                 reg &= ~DP_COM_CONF_GWSEL;
  97         else
  98                 reg |= DP_COM_CONF_GWSEL;
  99         writel(reg, flow->base + DP_COM_CONF);
 100
 101         if (enable) {
 102                 reg = readl(flow->base + DP_GRAPH_WIND_CTRL) & 0x00FFFFFFL;
 103                 writel(reg | ((u32) alpha << 24),
 104                              flow->base + DP_GRAPH_WIND_CTRL);
 105
 106                 reg = readl(flow->base + DP_COM_CONF);
 107                 writel(reg | DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
 108         } else {
 109                 reg = readl(flow->base + DP_COM_CONF);
 110                 writel(reg & ~DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
 111         }
 112
 113         ipu_srm_dp_sync_update(priv->ipu);
 114
 115         mutex_unlock(&priv->mutex);
 116
 117         return 0;
 118 }
 119 EXPORT_SYMBOL_GPL(ipu_dp_set_global_alpha);
 120
 121 int ipu_dp_set_window_pos(struct ipu_dp *dp, u16 x_pos, u16 y_pos)
 122 {
 123         struct ipu_flow *flow = to_flow(dp);
 124         struct ipu_dp_priv *priv = flow->priv;
 125
 126         writel((x_pos << 16) | y_pos, flow->base + DP_FG_POS);
 127
 128         ipu_srm_dp_sync_update(priv->ipu);
 129
 130         return 0;
 131 }
 132 EXPORT_SYMBOL_GPL(ipu_dp_set_window_pos);
 133
 134 static void ipu_dp_csc_init(struct ipu_flow *flow,
 135                 enum ipu_color_space in,
 136                 enum ipu_color_space out,
 137                 u32 place)
 138 {
 139         u32 reg;
 140
 141         reg = readl(flow->base + DP_COM_CONF);
 142         reg &= ~DP_COM_CONF_CSC_DEF_MASK;
 143
 144         if (in == out) {
 145                 writel(reg, flow->base + DP_COM_CONF);
 146                 return;
 147         }
 148
 149         if (in == IPUV3_COLORSPACE_RGB && out == IPUV3_COLORSPACE_YUV) {
 150                 writel(0x099 | (0x12d << 16), flow->base + DP_CSC_A_0);
 151                 writel(0x03a | (0x3a9 << 16), flow->base + DP_CSC_A_1);
 152                 writel(0x356 | (0x100 << 16), flow->base + DP_CSC_A_2);
 153                 writel(0x100 | (0x329 << 16), flow->base + DP_CSC_A_3);
 154                 writel(0x3d6 | (0x0000 << 16) | (2 << 30),
 155                                 flow->base + DP_CSC_0);
 156                 writel(0x200 | (2 << 14) | (0x200 << 16) | (2 << 30),
 157                                 flow->base + DP_CSC_1);
 158         } else {
 159                 writel(0x095 | (0x000 << 16), flow->base + DP_CSC_A_0);
 160                 writel(0x0cc | (0x095 << 16), flow->base + DP_CSC_A_1);
 161                 writel(0x3ce | (0x398 << 16), flow->base + DP_CSC_A_2);
 162                 writel(0x095 | (0x0ff << 16), flow->base + DP_CSC_A_3);
 163                 writel(0x000 | (0x3e42 << 16) | (1 << 30),
 164                                 flow->base + DP_CSC_0);
 165                 writel(0x10a | (1 << 14) | (0x3dd6 << 16) | (1 << 30),
 166                                 flow->base + DP_CSC_1);
 167         }
 168
 169         reg |= place;
 170
 171         writel(reg, flow->base + DP_COM_CONF);
 172 }
 173
 174 int ipu_dp_setup_channel(struct ipu_dp *dp,
 175                 enum ipu_color_space in,
 176                 enum ipu_color_space out)
 177 {
 178         struct ipu_flow *flow = to_flow(dp);
 179         struct ipu_dp_priv *priv = flow->priv;
 180
 181         mutex_lock(&priv->mutex);
 182
 183         dp->in_cs = in;
 184
 185         if (!dp->foreground)
 186                 flow->out_cs = out;
 187
 188         if (flow->foreground.in_cs == flow->background.in_cs) {
 189                 /*
 190                  * foreground and background are of same colorspace, put
 191                  * colorspace converter after combining unit.
 192                  */
 193                 ipu_dp_csc_init(flow, flow->foreground.in_cs, flow->out_cs,
 194                                 DP_COM_CONF_CSC_DEF_BOTH);
 195         } else {
 196                 if (flow->foreground.in_cs == flow->out_cs)
 197                         /*
 198                          * foreground identical to output, apply color
 199                          * conversion on background
 200                          */
 201                         ipu_dp_csc_init(flow, flow->background.in_cs,
 202                                         flow->out_cs, DP_COM_CONF_CSC_DEF_BG);
 203                 else
 204                         ipu_dp_csc_init(flow, flow->foreground.in_cs,
 205                                         flow->out_cs, DP_COM_CONF_CSC_DEF_FG);
 206         }
 207
 208         ipu_srm_dp_sync_update(priv->ipu);
 209
 210         mutex_unlock(&priv->mutex);
 211
 212         return 0;
 213 }
 214 EXPORT_SYMBOL_GPL(ipu_dp_setup_channel);
 215
 216 int ipu_dp_enable_channel(struct ipu_dp *dp)
 217 {
 218         struct ipu_flow *flow = to_flow(dp);
 219         struct ipu_dp_priv *priv = flow->priv;
 220
 221         mutex_lock(&priv->mutex);
 222
 223         if (!priv->use_count)
 224                 ipu_module_enable(priv->ipu, IPU_CONF_DP_EN);
 225
 226         priv->use_count++;
 227
 228         if (dp->foreground) {
 229                 u32 reg;
 230
 231                 reg = readl(flow->base + DP_COM_CONF);
 232                 reg |= DP_COM_CONF_FG_EN;
 233                 writel(reg, flow->base + DP_COM_CONF);
 234
 235                 ipu_srm_dp_sync_update(priv->ipu);
 236         }
 237
 238         mutex_unlock(&priv->mutex);
 239
 240         return 0;
 241 }
 242 EXPORT_SYMBOL_GPL(ipu_dp_enable_channel);
 243
 244 void ipu_dp_disable_channel(struct ipu_dp *dp)
 245 {
 246         struct ipu_flow *flow = to_flow(dp);
 247         struct ipu_dp_priv *priv = flow->priv;
 248
 249         mutex_lock(&priv->mutex);
 250
 251         priv->use_count--;
 252
 253         if (dp->foreground) {
 254                 u32 reg, csc;
 255
 256                 reg = readl(flow->base + DP_COM_CONF);
 257                 csc = reg & DP_COM_CONF_CSC_DEF_MASK;
 258                 if (csc == DP_COM_CONF_CSC_DEF_FG)
 259                         reg &= ~DP_COM_CONF_CSC_DEF_MASK;
 260
 261                 reg &= ~DP_COM_CONF_FG_EN;
 262                 writel(reg, flow->base + DP_COM_CONF);
 263
 264                 writel(0, flow->base + DP_FG_POS);
 265                 ipu_srm_dp_sync_update(priv->ipu);
 266         }
 267
 268         if (!priv->use_count)
 269                 ipu_module_disable(priv->ipu, IPU_CONF_DP_EN);
 270
 271         if (priv->use_count < 0)
 272                 priv->use_count = 0;
 273
 274         mutex_unlock(&priv->mutex);
 275 }
 276 EXPORT_SYMBOL_GPL(ipu_dp_disable_channel);
 277
 278 struct ipu_dp *ipu_dp_get(struct ipu_soc *ipu, unsigned int flow)
 279 {
 280         struct ipu_dp_priv *priv = ipu->dp_priv;
 281         struct ipu_dp *dp;
 282
 283         if (flow > 5)
 284                 return ERR_PTR(-EINVAL);
 285
 286         if (flow & 1)
 287                 dp = &priv->flow[flow >> 1].foreground;
 288         else
 289                 dp = &priv->flow[flow >> 1].background;
 290
 291         if (dp->in_use)
 292                 return ERR_PTR(-EBUSY);
 293
 294         dp->in_use = true;
 295
 296         return dp;
 297 }
 298 EXPORT_SYMBOL_GPL(ipu_dp_get);
 299
 300 void ipu_dp_put(struct ipu_dp *dp)
 301 {
 302         dp->in_use = false;
 303 }
 304 EXPORT_SYMBOL_GPL(ipu_dp_put);
 305
 306 int ipu_dp_init(struct ipu_soc *ipu, struct device *dev, unsigned long base)
 307 {
 308         struct ipu_dp_priv *priv;
 309         int i;
 310
 311         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 312         priv->dev = dev;
 313         priv->ipu = ipu;
 314
 315         ipu->dp_priv = priv;
 316
 317         priv->base = devm_ioremap(dev, base, PAGE_SIZE);
 318         if (!priv->base) {
 319                 kfree(priv);
 320                 return -ENOMEM;
 321         }
 322
 323         mutex_init(&priv->mutex);
 324
 325         for (i = 0; i < 3; i++) {
 326                 priv->flow[i].foreground.foreground = 1;
 327                 priv->flow[i].base = priv->base + ipu_dp_flow_base[i];
 328                 priv->flow[i].priv = priv;
 329         }
 330
 331         return 0;
 332 }
 333
 334 void ipu_dp_exit(struct ipu_soc *ipu)
 335 {
 336 }