2 * dim2_hdm.c - MediaLB DIM2 Hardware Dependent Module
4 * Copyright (C) 2015-2016, Microchip Technology Germany II GmbH & Co. KG
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * This file is licensed under GPLv2.
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16 #include <linux/module.h>
17 #include <linux/printk.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/interrupt.h>
22 #include <linux/slab.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/sched.h>
26 #include <linux/kthread.h>
29 #include <networking.h>
32 #include "dim2_errors.h"
33 #include "dim2_sysfs.h"
35 #define DMA_CHANNELS (32 - 1) /* channel 0 is a system channel */
37 #define MAX_BUFFERS_PACKET 32
38 #define MAX_BUFFERS_STREAMING 32
39 #define MAX_BUF_SIZE_PACKET 2048
40 #define MAX_BUF_SIZE_STREAMING (8 * 1024)
42 /* command line parameter to select clock speed */
43 static char *clock_speed;
44 module_param(clock_speed, charp, 0);
45 MODULE_PARM_DESC(clock_speed, "MediaLB Clock Speed");
48 * The parameter representing the number of frames per sub-buffer for
49 * synchronous channels. Valid values: [0 .. 6].
51 * The values 0, 1, 2, 3, 4, 5, 6 represent corresponding number of frames per
52 * sub-buffer 1, 2, 4, 8, 16, 32, 64.
54 static u8 fcnt = 4; /* (1 << fcnt) frames per subbuffer */
55 module_param(fcnt, byte, 0);
56 MODULE_PARM_DESC(fcnt, "Num of frames per sub-buffer for sync channels as a power of 2");
58 static DEFINE_SPINLOCK(dim_lock);
60 static void dim2_tasklet_fn(unsigned long data);
61 static DECLARE_TASKLET(dim2_tasklet, dim2_tasklet_fn, 0);
64 * struct hdm_channel - private structure to keep channel specific data
65 * @is_initialized: identifier to know whether the channel is initialized
66 * @ch: HAL specific channel data
67 * @pending_list: list to keep MBO's before starting transfer
68 * @started_list: list to keep MBO's after starting transfer
69 * @direction: channel direction (TX or RX)
70 * @data_type: channel data type
73 char name[sizeof "caNNN"];
75 struct dim_channel ch;
76 struct list_head pending_list; /* before dim_enqueue_buffer() */
77 struct list_head started_list; /* after dim_enqueue_buffer() */
78 enum most_channel_direction direction;
79 enum most_channel_data_type data_type;
83 * struct dim2_hdm - private structure to keep interface specific data
84 * @hch: an array of channel specific data
85 * @most_iface: most interface structure
86 * @capabilities: an array of channel capability data
87 * @io_base: I/O register base address
88 * @clk_speed: user selectable (through command line parameter) clock speed
89 * @netinfo_task: thread to deliver network status
90 * @netinfo_waitq: waitq for the thread to sleep
91 * @deliver_netinfo: to identify whether network status received
92 * @mac_addrs: INIC mac address
93 * @link_state: network link state
94 * @atx_idx: index of async tx channel
97 struct hdm_channel hch[DMA_CHANNELS];
98 struct most_channel_capability capabilities[DMA_CHANNELS];
99 struct most_interface most_iface;
100 char name[16 + sizeof "dim2-"];
101 void __iomem *io_base;
103 struct task_struct *netinfo_task;
104 wait_queue_head_t netinfo_waitq;
106 unsigned char mac_addrs[6];
107 unsigned char link_state;
109 struct medialb_bus bus;
112 #define iface_to_hdm(iface) container_of(iface, struct dim2_hdm, most_iface)
114 /* Macro to identify a network status message */
115 #define PACKET_IS_NET_INFO(p) \
116 (((p)[1] == 0x18) && ((p)[2] == 0x05) && ((p)[3] == 0x0C) && \
117 ((p)[13] == 0x3C) && ((p)[14] == 0x00) && ((p)[15] == 0x0A))
119 bool dim2_sysfs_get_state_cb(void)
124 spin_lock_irqsave(&dim_lock, flags);
125 state = dim_get_lock_state();
126 spin_unlock_irqrestore(&dim_lock, flags);
132 * dimcb_io_read - callback from HAL to read an I/O register
133 * @ptr32: register address
135 u32 dimcb_io_read(u32 __iomem *ptr32)
141 * dimcb_io_write - callback from HAL to write value to an I/O register
142 * @ptr32: register address
143 * @value: value to write
145 void dimcb_io_write(u32 __iomem *ptr32, u32 value)
147 writel(value, ptr32);
151 * dimcb_on_error - callback from HAL to report miscommunication between
153 * @error_id: Error ID
154 * @error_message: Error message. Some text in a free format
156 void dimcb_on_error(u8 error_id, const char *error_message)
158 pr_err("dimcb_on_error: error_id - %d, error_message - %s\n", error_id,
163 * startup_dim - initialize the dim2 interface
164 * @pdev: platform device
166 * Get the value of command line parameter "clock_speed" if given or use the
167 * default value, enable the clock and PLL, and initialize the dim2 interface.
169 static int startup_dim(struct platform_device *pdev)
171 struct dim2_hdm *dev = platform_get_drvdata(pdev);
172 struct dim2_platform_data *pdata = pdev->dev.platform_data;
178 if (!strcmp(clock_speed, "256fs"))
179 dev->clk_speed = CLK_256FS;
180 else if (!strcmp(clock_speed, "512fs"))
181 dev->clk_speed = CLK_512FS;
182 else if (!strcmp(clock_speed, "1024fs"))
183 dev->clk_speed = CLK_1024FS;
184 else if (!strcmp(clock_speed, "2048fs"))
185 dev->clk_speed = CLK_2048FS;
186 else if (!strcmp(clock_speed, "3072fs"))
187 dev->clk_speed = CLK_3072FS;
188 else if (!strcmp(clock_speed, "4096fs"))
189 dev->clk_speed = CLK_4096FS;
190 else if (!strcmp(clock_speed, "6144fs"))
191 dev->clk_speed = CLK_6144FS;
192 else if (!strcmp(clock_speed, "8192fs"))
193 dev->clk_speed = CLK_8192FS;
196 if (dev->clk_speed == -1) {
197 pr_info("Bad or missing clock speed parameter, using default value: 3072fs\n");
198 dev->clk_speed = CLK_3072FS;
200 pr_info("Selected clock speed: %s\n", clock_speed);
202 if (pdata && pdata->init) {
203 int ret = pdata->init(pdata, dev->io_base, dev->clk_speed);
209 pr_info("sync: num of frames per sub-buffer: %u\n", fcnt);
210 hal_ret = dim_startup(dev->io_base, dev->clk_speed, fcnt);
211 if (hal_ret != DIM_NO_ERROR) {
212 pr_err("dim_startup failed: %d\n", hal_ret);
213 if (pdata && pdata->destroy)
214 pdata->destroy(pdata);
222 * try_start_dim_transfer - try to transfer a buffer on a channel
223 * @hdm_ch: channel specific data
225 * Transfer a buffer from pending_list if the channel is ready
227 static int try_start_dim_transfer(struct hdm_channel *hdm_ch)
230 struct list_head *head = &hdm_ch->pending_list;
233 struct dim_ch_state_t st;
236 BUG_ON(!hdm_ch->is_initialized);
238 spin_lock_irqsave(&dim_lock, flags);
239 if (list_empty(head)) {
240 spin_unlock_irqrestore(&dim_lock, flags);
244 if (!dim_get_channel_state(&hdm_ch->ch, &st)->ready) {
245 spin_unlock_irqrestore(&dim_lock, flags);
249 mbo = list_first_entry(head, struct mbo, list);
250 buf_size = mbo->buffer_length;
252 if (dim_dbr_space(&hdm_ch->ch) < buf_size) {
253 spin_unlock_irqrestore(&dim_lock, flags);
257 BUG_ON(mbo->bus_address == 0);
258 if (!dim_enqueue_buffer(&hdm_ch->ch, mbo->bus_address, buf_size)) {
259 list_del(head->next);
260 spin_unlock_irqrestore(&dim_lock, flags);
261 mbo->processed_length = 0;
262 mbo->status = MBO_E_INVAL;
267 list_move_tail(head->next, &hdm_ch->started_list);
268 spin_unlock_irqrestore(&dim_lock, flags);
274 * deliver_netinfo_thread - thread to deliver network status to mostcore
275 * @data: private data
277 * Wait for network status and deliver it to mostcore once it is received
279 static int deliver_netinfo_thread(void *data)
281 struct dim2_hdm *dev = data;
283 while (!kthread_should_stop()) {
284 wait_event_interruptible(dev->netinfo_waitq,
285 dev->deliver_netinfo ||
286 kthread_should_stop());
288 if (dev->deliver_netinfo) {
289 dev->deliver_netinfo--;
290 most_deliver_netinfo(&dev->most_iface, dev->link_state,
299 * retrieve_netinfo - retrieve network status from received buffer
303 * Parse the message in buffer and get node address, link state, MAC address.
304 * Wake up a thread to deliver this status to mostcore
306 static void retrieve_netinfo(struct dim2_hdm *dev, struct mbo *mbo)
308 u8 *data = mbo->virt_address;
310 pr_info("Node Address: 0x%03x\n", (u16)data[16] << 8 | data[17]);
311 dev->link_state = data[18];
312 pr_info("NIState: %d\n", dev->link_state);
313 memcpy(dev->mac_addrs, data + 19, 6);
314 dev->deliver_netinfo++;
315 wake_up_interruptible(&dev->netinfo_waitq);
319 * service_done_flag - handle completed buffers
321 * @ch_idx: channel index
323 * Return back the completed buffers to mostcore, using completion callback
325 static void service_done_flag(struct dim2_hdm *dev, int ch_idx)
327 struct hdm_channel *hdm_ch = dev->hch + ch_idx;
328 struct dim_ch_state_t st;
329 struct list_head *head;
336 BUG_ON(!hdm_ch->is_initialized);
338 spin_lock_irqsave(&dim_lock, flags);
340 done_buffers = dim_get_channel_state(&hdm_ch->ch, &st)->done_buffers;
342 spin_unlock_irqrestore(&dim_lock, flags);
346 if (!dim_detach_buffers(&hdm_ch->ch, done_buffers)) {
347 spin_unlock_irqrestore(&dim_lock, flags);
350 spin_unlock_irqrestore(&dim_lock, flags);
352 head = &hdm_ch->started_list;
354 while (done_buffers) {
355 spin_lock_irqsave(&dim_lock, flags);
356 if (list_empty(head)) {
357 spin_unlock_irqrestore(&dim_lock, flags);
358 pr_crit("hard error: started_mbo list is empty whereas DIM2 has sent buffers\n");
362 mbo = list_first_entry(head, struct mbo, list);
363 list_del(head->next);
364 spin_unlock_irqrestore(&dim_lock, flags);
366 data = mbo->virt_address;
368 if (hdm_ch->data_type == MOST_CH_ASYNC &&
369 hdm_ch->direction == MOST_CH_RX &&
370 PACKET_IS_NET_INFO(data)) {
371 retrieve_netinfo(dev, mbo);
373 spin_lock_irqsave(&dim_lock, flags);
374 list_add_tail(&mbo->list, &hdm_ch->pending_list);
375 spin_unlock_irqrestore(&dim_lock, flags);
377 if (hdm_ch->data_type == MOST_CH_CONTROL ||
378 hdm_ch->data_type == MOST_CH_ASYNC) {
379 u32 const data_size =
380 (u32)data[0] * 256 + data[1] + 2;
382 mbo->processed_length =
383 min_t(u32, data_size,
386 mbo->processed_length = mbo->buffer_length;
388 mbo->status = MBO_SUCCESS;
396 static struct dim_channel **get_active_channels(struct dim2_hdm *dev,
397 struct dim_channel **buffer)
402 for (ch_idx = 0; ch_idx < DMA_CHANNELS; ch_idx++) {
403 if (dev->hch[ch_idx].is_initialized)
404 buffer[idx++] = &dev->hch[ch_idx].ch;
406 buffer[idx++] = NULL;
411 static irqreturn_t dim2_mlb_isr(int irq, void *_dev)
413 struct dim2_hdm *dev = _dev;
416 spin_lock_irqsave(&dim_lock, flags);
417 dim_service_mlb_int_irq();
418 spin_unlock_irqrestore(&dim_lock, flags);
420 if (dev->atx_idx >= 0 && dev->hch[dev->atx_idx].is_initialized)
421 while (!try_start_dim_transfer(dev->hch + dev->atx_idx))
428 * dim2_tasklet_fn - tasklet function
429 * @data: private data
431 * Service each initialized channel, if needed
433 static void dim2_tasklet_fn(unsigned long data)
435 struct dim2_hdm *dev = (struct dim2_hdm *)data;
439 for (ch_idx = 0; ch_idx < DMA_CHANNELS; ch_idx++) {
440 if (!dev->hch[ch_idx].is_initialized)
443 spin_lock_irqsave(&dim_lock, flags);
444 dim_service_channel(&dev->hch[ch_idx].ch);
445 spin_unlock_irqrestore(&dim_lock, flags);
447 service_done_flag(dev, ch_idx);
448 while (!try_start_dim_transfer(dev->hch + ch_idx))
454 * dim2_ahb_isr - interrupt service routine
456 * @_dev: private data
458 * Acknowledge the interrupt and schedule a tasklet to service channels.
459 * Return IRQ_HANDLED.
461 static irqreturn_t dim2_ahb_isr(int irq, void *_dev)
463 struct dim2_hdm *dev = _dev;
464 struct dim_channel *buffer[DMA_CHANNELS + 1];
467 spin_lock_irqsave(&dim_lock, flags);
468 dim_service_ahb_int_irq(get_active_channels(dev, buffer));
469 spin_unlock_irqrestore(&dim_lock, flags);
471 dim2_tasklet.data = (unsigned long)dev;
472 tasklet_schedule(&dim2_tasklet);
477 * complete_all_mbos - complete MBO's in a list
480 * Delete all the entries in list and return back MBO's to mostcore using
481 * completion call back.
483 static void complete_all_mbos(struct list_head *head)
489 spin_lock_irqsave(&dim_lock, flags);
490 if (list_empty(head)) {
491 spin_unlock_irqrestore(&dim_lock, flags);
495 mbo = list_first_entry(head, struct mbo, list);
496 list_del(head->next);
497 spin_unlock_irqrestore(&dim_lock, flags);
499 mbo->processed_length = 0;
500 mbo->status = MBO_E_CLOSE;
506 * configure_channel - initialize a channel
507 * @iface: interface the channel belongs to
508 * @channel: channel to be configured
509 * @channel_config: structure that holds the configuration information
511 * Receives configuration information from mostcore and initialize
512 * the corresponding channel. Return 0 on success, negative on failure.
514 static int configure_channel(struct most_interface *most_iface, int ch_idx,
515 struct most_channel_config *ccfg)
517 struct dim2_hdm *dev = iface_to_hdm(most_iface);
518 bool const is_tx = ccfg->direction == MOST_CH_TX;
519 u16 const sub_size = ccfg->subbuffer_size;
520 u16 const buf_size = ccfg->buffer_size;
524 int const ch_addr = ch_idx * 2 + 2;
525 struct hdm_channel *const hdm_ch = dev->hch + ch_idx;
527 BUG_ON(ch_idx < 0 || ch_idx >= DMA_CHANNELS);
529 if (hdm_ch->is_initialized)
532 switch (ccfg->data_type) {
533 case MOST_CH_CONTROL:
534 new_size = dim_norm_ctrl_async_buffer_size(buf_size);
536 pr_err("%s: too small buffer size\n", hdm_ch->name);
539 ccfg->buffer_size = new_size;
540 if (new_size != buf_size)
541 pr_warn("%s: fixed buffer size (%d -> %d)\n",
542 hdm_ch->name, buf_size, new_size);
543 spin_lock_irqsave(&dim_lock, flags);
544 hal_ret = dim_init_control(&hdm_ch->ch, is_tx, ch_addr,
545 is_tx ? new_size * 2 : new_size);
548 new_size = dim_norm_ctrl_async_buffer_size(buf_size);
550 pr_err("%s: too small buffer size\n", hdm_ch->name);
553 ccfg->buffer_size = new_size;
554 if (new_size != buf_size)
555 pr_warn("%s: fixed buffer size (%d -> %d)\n",
556 hdm_ch->name, buf_size, new_size);
557 spin_lock_irqsave(&dim_lock, flags);
558 hal_ret = dim_init_async(&hdm_ch->ch, is_tx, ch_addr,
559 is_tx ? new_size * 2 : new_size);
562 new_size = dim_norm_isoc_buffer_size(buf_size, sub_size);
564 pr_err("%s: invalid sub-buffer size or too small buffer size\n",
568 ccfg->buffer_size = new_size;
569 if (new_size != buf_size)
570 pr_warn("%s: fixed buffer size (%d -> %d)\n",
571 hdm_ch->name, buf_size, new_size);
572 spin_lock_irqsave(&dim_lock, flags);
573 hal_ret = dim_init_isoc(&hdm_ch->ch, is_tx, ch_addr, sub_size);
576 new_size = dim_norm_sync_buffer_size(buf_size, sub_size);
578 pr_err("%s: invalid sub-buffer size or too small buffer size\n",
582 ccfg->buffer_size = new_size;
583 if (new_size != buf_size)
584 pr_warn("%s: fixed buffer size (%d -> %d)\n",
585 hdm_ch->name, buf_size, new_size);
586 spin_lock_irqsave(&dim_lock, flags);
587 hal_ret = dim_init_sync(&hdm_ch->ch, is_tx, ch_addr, sub_size);
590 pr_err("%s: configure failed, bad channel type: %d\n",
591 hdm_ch->name, ccfg->data_type);
595 if (hal_ret != DIM_NO_ERROR) {
596 spin_unlock_irqrestore(&dim_lock, flags);
597 pr_err("%s: configure failed (%d), type: %d, is_tx: %d\n",
598 hdm_ch->name, hal_ret, ccfg->data_type, (int)is_tx);
602 hdm_ch->data_type = ccfg->data_type;
603 hdm_ch->direction = ccfg->direction;
604 hdm_ch->is_initialized = true;
606 if (hdm_ch->data_type == MOST_CH_ASYNC &&
607 hdm_ch->direction == MOST_CH_TX &&
609 dev->atx_idx = ch_idx;
611 spin_unlock_irqrestore(&dim_lock, flags);
617 * enqueue - enqueue a buffer for data transfer
618 * @iface: intended interface
619 * @channel: ID of the channel the buffer is intended for
620 * @mbo: pointer to the buffer object
622 * Push the buffer into pending_list and try to transfer one buffer from
623 * pending_list. Return 0 on success, negative on failure.
625 static int enqueue(struct most_interface *most_iface, int ch_idx,
628 struct dim2_hdm *dev = iface_to_hdm(most_iface);
629 struct hdm_channel *hdm_ch = dev->hch + ch_idx;
632 BUG_ON(ch_idx < 0 || ch_idx >= DMA_CHANNELS);
634 if (!hdm_ch->is_initialized)
637 if (mbo->bus_address == 0)
640 spin_lock_irqsave(&dim_lock, flags);
641 list_add_tail(&mbo->list, &hdm_ch->pending_list);
642 spin_unlock_irqrestore(&dim_lock, flags);
644 (void)try_start_dim_transfer(hdm_ch);
650 * request_netinfo - triggers retrieving of network info
651 * @iface: pointer to the interface
652 * @channel_id: corresponding channel ID
654 * Send a command to INIC which triggers retrieving of network info by means of
655 * "Message exchange over MDP/MEP". Return 0 on success, negative on failure.
657 static void request_netinfo(struct most_interface *most_iface, int ch_idx)
659 struct dim2_hdm *dev = iface_to_hdm(most_iface);
663 if (dev->atx_idx < 0) {
664 pr_err("Async Tx Not initialized\n");
668 mbo = most_get_mbo(&dev->most_iface, dev->atx_idx, NULL);
672 mbo->buffer_length = 5;
674 data = mbo->virt_address;
676 data[0] = 0x00; /* PML High byte */
677 data[1] = 0x03; /* PML Low byte */
678 data[2] = 0x02; /* PMHL */
679 data[3] = 0x08; /* FPH */
680 data[4] = 0x40; /* FMF (FIFO cmd msg - Triggers NAOverMDP) */
682 most_submit_mbo(mbo);
686 * poison_channel - poison buffers of a channel
687 * @iface: pointer to the interface the channel to be poisoned belongs to
688 * @channel_id: corresponding channel ID
690 * Destroy a channel and complete all the buffers in both started_list &
691 * pending_list. Return 0 on success, negative on failure.
693 static int poison_channel(struct most_interface *most_iface, int ch_idx)
695 struct dim2_hdm *dev = iface_to_hdm(most_iface);
696 struct hdm_channel *hdm_ch = dev->hch + ch_idx;
701 BUG_ON(ch_idx < 0 || ch_idx >= DMA_CHANNELS);
703 if (!hdm_ch->is_initialized)
706 tasklet_disable(&dim2_tasklet);
707 spin_lock_irqsave(&dim_lock, flags);
708 hal_ret = dim_destroy_channel(&hdm_ch->ch);
709 hdm_ch->is_initialized = false;
710 if (ch_idx == dev->atx_idx)
712 spin_unlock_irqrestore(&dim_lock, flags);
713 tasklet_enable(&dim2_tasklet);
714 if (hal_ret != DIM_NO_ERROR) {
715 pr_err("HAL Failed to close channel %s\n", hdm_ch->name);
719 complete_all_mbos(&hdm_ch->started_list);
720 complete_all_mbos(&hdm_ch->pending_list);
726 * dim2_probe - dim2 probe handler
727 * @pdev: platform device structure
729 * Register the dim2 interface with mostcore and initialize it.
730 * Return 0 on success, negative on failure.
732 static int dim2_probe(struct platform_device *pdev)
734 struct dim2_hdm *dev;
735 struct resource *res;
737 struct kobject *kobj;
740 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
746 platform_set_drvdata(pdev, dev);
747 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
748 dev->io_base = devm_ioremap_resource(&pdev->dev, res);
749 if (IS_ERR(dev->io_base))
750 return PTR_ERR(dev->io_base);
752 irq = platform_get_irq(pdev, 0);
754 dev_err(&pdev->dev, "failed to get ahb0_int irq\n");
758 ret = devm_request_irq(&pdev->dev, irq, dim2_ahb_isr, 0,
759 "dim2_ahb0_int", dev);
761 dev_err(&pdev->dev, "failed to request ahb0_int irq %d\n", irq);
765 irq = platform_get_irq(pdev, 1);
767 dev_err(&pdev->dev, "failed to get mlb_int irq\n");
771 ret = devm_request_irq(&pdev->dev, irq, dim2_mlb_isr, 0,
772 "dim2_mlb_int", dev);
774 dev_err(&pdev->dev, "failed to request mlb_int irq %d\n", irq);
778 init_waitqueue_head(&dev->netinfo_waitq);
779 dev->deliver_netinfo = 0;
780 dev->netinfo_task = kthread_run(&deliver_netinfo_thread, (void *)dev,
782 if (IS_ERR(dev->netinfo_task))
783 return PTR_ERR(dev->netinfo_task);
785 for (i = 0; i < DMA_CHANNELS; i++) {
786 struct most_channel_capability *cap = dev->capabilities + i;
787 struct hdm_channel *hdm_ch = dev->hch + i;
789 INIT_LIST_HEAD(&hdm_ch->pending_list);
790 INIT_LIST_HEAD(&hdm_ch->started_list);
791 hdm_ch->is_initialized = false;
792 snprintf(hdm_ch->name, sizeof(hdm_ch->name), "ca%d", i * 2 + 2);
794 cap->name_suffix = hdm_ch->name;
795 cap->direction = MOST_CH_RX | MOST_CH_TX;
796 cap->data_type = MOST_CH_CONTROL | MOST_CH_ASYNC |
797 MOST_CH_ISOC | MOST_CH_SYNC;
798 cap->num_buffers_packet = MAX_BUFFERS_PACKET;
799 cap->buffer_size_packet = MAX_BUF_SIZE_PACKET;
800 cap->num_buffers_streaming = MAX_BUFFERS_STREAMING;
801 cap->buffer_size_streaming = MAX_BUF_SIZE_STREAMING;
807 if (sizeof(res->start) == sizeof(long long))
808 fmt = "dim2-%016llx";
809 else if (sizeof(res->start) == sizeof(long))
814 snprintf(dev->name, sizeof(dev->name), fmt, res->start);
817 dev->most_iface.interface = ITYPE_MEDIALB_DIM2;
818 dev->most_iface.description = dev->name;
819 dev->most_iface.num_channels = DMA_CHANNELS;
820 dev->most_iface.channel_vector = dev->capabilities;
821 dev->most_iface.configure = configure_channel;
822 dev->most_iface.enqueue = enqueue;
823 dev->most_iface.poison_channel = poison_channel;
824 dev->most_iface.request_netinfo = request_netinfo;
826 kobj = most_register_interface(&dev->most_iface);
829 dev_err(&pdev->dev, "failed to register MOST interface\n");
830 goto err_stop_thread;
833 ret = dim2_sysfs_probe(&dev->bus, kobj);
835 goto err_unreg_iface;
837 ret = startup_dim(pdev);
839 dev_err(&pdev->dev, "failed to initialize DIM2\n");
840 goto err_destroy_bus;
846 dim2_sysfs_destroy(&dev->bus);
848 most_deregister_interface(&dev->most_iface);
850 kthread_stop(dev->netinfo_task);
856 * dim2_remove - dim2 remove handler
857 * @pdev: platform device structure
859 * Unregister the interface from mostcore
861 static int dim2_remove(struct platform_device *pdev)
863 struct dim2_hdm *dev = platform_get_drvdata(pdev);
864 struct dim2_platform_data *pdata = pdev->dev.platform_data;
867 spin_lock_irqsave(&dim_lock, flags);
869 spin_unlock_irqrestore(&dim_lock, flags);
871 if (pdata && pdata->destroy)
872 pdata->destroy(pdata);
874 dim2_sysfs_destroy(&dev->bus);
875 most_deregister_interface(&dev->most_iface);
876 kthread_stop(dev->netinfo_task);
879 * break link to local platform_device_id struct
880 * to prevent crash by unload platform device module
882 pdev->id_entry = NULL;
887 static struct platform_device_id dim2_id[] = {
889 { }, /* Terminating entry */
892 MODULE_DEVICE_TABLE(platform, dim2_id);
894 static struct platform_driver dim2_driver = {
896 .remove = dim2_remove,
903 module_platform_driver(dim2_driver);
905 MODULE_AUTHOR("Jain Roy Ambi <JainRoy.Ambi@microchip.com>");
906 MODULE_AUTHOR("Andrey Shvetsov <andrey.shvetsov@k2l.de>");
907 MODULE_DESCRIPTION("MediaLB DIM2 Hardware Dependent Module");
908 MODULE_LICENSE("GPL");