3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2015 Intel Corporation.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
21 * Copyright(c) 2015 Intel Corporation.
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51 #include <linux/spinlock.h>
52 #include <linux/pci.h>
54 #include <linux/delay.h>
55 #include <linux/netdevice.h>
56 #include <linux/vmalloc.h>
57 #include <linux/module.h>
58 #include <linux/prefetch.h>
66 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
69 * The size has to be longer than this string, so we can append
70 * board/chip information to it in the initialization code.
72 const char ib_hfi1_version[] = HFI1_DRIVER_VERSION "\n";
74 DEFINE_SPINLOCK(hfi1_devs_lock);
75 LIST_HEAD(hfi1_dev_list);
76 DEFINE_MUTEX(hfi1_mutex); /* general driver use */
78 unsigned int hfi1_max_mtu = HFI1_DEFAULT_MAX_MTU;
79 module_param_named(max_mtu, hfi1_max_mtu, uint, S_IRUGO);
80 MODULE_PARM_DESC(max_mtu, "Set max MTU bytes, default is 8192");
82 unsigned int hfi1_cu = 1;
83 module_param_named(cu, hfi1_cu, uint, S_IRUGO);
84 MODULE_PARM_DESC(cu, "Credit return units");
86 unsigned long hfi1_cap_mask = HFI1_CAP_MASK_DEFAULT;
87 static int hfi1_caps_set(const char *, const struct kernel_param *);
88 static int hfi1_caps_get(char *, const struct kernel_param *);
89 static const struct kernel_param_ops cap_ops = {
93 module_param_cb(cap_mask, &cap_ops, &hfi1_cap_mask, S_IWUSR | S_IRUGO);
94 MODULE_PARM_DESC(cap_mask, "Bit mask of enabled/disabled HW features");
96 MODULE_LICENSE("Dual BSD/GPL");
97 MODULE_DESCRIPTION("Intel Omni-Path Architecture driver");
98 MODULE_VERSION(HFI1_DRIVER_VERSION);
101 * MAX_PKT_RCV is the max # if packets processed per receive interrupt.
103 #define MAX_PKT_RECV 64
104 #define EGR_HEAD_UPDATE_THRESHOLD 16
106 struct hfi1_ib_stats hfi1_stats;
108 static int hfi1_caps_set(const char *val, const struct kernel_param *kp)
111 unsigned long *cap_mask_ptr = (unsigned long *)kp->arg,
112 cap_mask = *cap_mask_ptr, value, diff,
113 write_mask = ((HFI1_CAP_WRITABLE_MASK << HFI1_CAP_USER_SHIFT) |
114 HFI1_CAP_WRITABLE_MASK);
116 ret = kstrtoul(val, 0, &value);
118 pr_warn("Invalid module parameter value for 'cap_mask'\n");
121 /* Get the changed bits (except the locked bit) */
122 diff = value ^ (cap_mask & ~HFI1_CAP_LOCKED_SMASK);
124 /* Remove any bits that are not allowed to change after driver load */
125 if (HFI1_CAP_LOCKED() && (diff & ~write_mask)) {
126 pr_warn("Ignoring non-writable capability bits %#lx\n",
131 /* Mask off any reserved bits */
132 diff &= ~HFI1_CAP_RESERVED_MASK;
133 /* Clear any previously set and changing bits */
135 /* Update the bits with the new capability */
136 cap_mask |= (value & diff);
137 /* Check for any kernel/user restrictions */
138 diff = (cap_mask & (HFI1_CAP_MUST_HAVE_KERN << HFI1_CAP_USER_SHIFT)) ^
139 ((cap_mask & HFI1_CAP_MUST_HAVE_KERN) << HFI1_CAP_USER_SHIFT);
141 /* Set the bitmask to the final set */
142 *cap_mask_ptr = cap_mask;
147 static int hfi1_caps_get(char *buffer, const struct kernel_param *kp)
149 unsigned long cap_mask = *(unsigned long *)kp->arg;
151 cap_mask &= ~HFI1_CAP_LOCKED_SMASK;
152 cap_mask |= ((cap_mask & HFI1_CAP_K2U) << HFI1_CAP_USER_SHIFT);
154 return scnprintf(buffer, PAGE_SIZE, "0x%lx", cap_mask);
157 const char *get_unit_name(int unit)
159 static char iname[16];
161 snprintf(iname, sizeof(iname), DRIVER_NAME "_%u", unit);
166 * Return count of units with at least one port ACTIVE.
168 int hfi1_count_active_units(void)
170 struct hfi1_devdata *dd;
171 struct hfi1_pportdata *ppd;
173 int pidx, nunits_active = 0;
175 spin_lock_irqsave(&hfi1_devs_lock, flags);
176 list_for_each_entry(dd, &hfi1_dev_list, list) {
177 if (!(dd->flags & HFI1_PRESENT) || !dd->kregbase)
179 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
180 ppd = dd->pport + pidx;
181 if (ppd->lid && ppd->linkup) {
187 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
188 return nunits_active;
192 * Return count of all units, optionally return in arguments
193 * the number of usable (present) units, and the number of
196 int hfi1_count_units(int *npresentp, int *nupp)
198 int nunits = 0, npresent = 0, nup = 0;
199 struct hfi1_devdata *dd;
202 struct hfi1_pportdata *ppd;
204 spin_lock_irqsave(&hfi1_devs_lock, flags);
206 list_for_each_entry(dd, &hfi1_dev_list, list) {
208 if ((dd->flags & HFI1_PRESENT) && dd->kregbase)
210 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
211 ppd = dd->pport + pidx;
212 if (ppd->lid && ppd->linkup)
217 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
220 *npresentp = npresent;
228 * Get address of eager buffer from it's index (allocated in chunks, not
231 static inline void *get_egrbuf(const struct hfi1_ctxtdata *rcd, u64 rhf,
234 u32 idx = rhf_egr_index(rhf), offset = rhf_egr_buf_offset(rhf);
236 *update |= !(idx & (rcd->egrbufs.threshold - 1)) && !offset;
237 return (void *)(((u64)(rcd->egrbufs.rcvtids[idx].addr)) +
238 (offset * RCV_BUF_BLOCK_SIZE));
242 * Validate and encode the a given RcvArray Buffer size.
243 * The function will check whether the given size falls within
244 * allowed size ranges for the respective type and, optionally,
245 * return the proper encoding.
247 inline int hfi1_rcvbuf_validate(u32 size, u8 type, u16 *encoded)
249 if (unlikely(!IS_ALIGNED(size, PAGE_SIZE)))
251 if (unlikely(size < MIN_EAGER_BUFFER))
254 (type == PT_EAGER ? MAX_EAGER_BUFFER : MAX_EXPECTED_BUFFER))
257 *encoded = ilog2(size / PAGE_SIZE) + 1;
261 static void rcv_hdrerr(struct hfi1_ctxtdata *rcd, struct hfi1_pportdata *ppd,
262 struct hfi1_packet *packet)
264 struct hfi1_message_header *rhdr = packet->hdr;
265 u32 rte = rhf_rcv_type_err(packet->rhf);
266 int lnh = be16_to_cpu(rhdr->lrh[0]) & 3;
267 struct hfi1_ibport *ibp = &ppd->ibport_data;
269 if (packet->rhf & (RHF_VCRC_ERR | RHF_ICRC_ERR))
272 if (packet->rhf & RHF_TID_ERR) {
273 /* For TIDERR and RC QPs preemptively schedule a NAK */
274 struct hfi1_ib_header *hdr = (struct hfi1_ib_header *)rhdr;
275 struct hfi1_other_headers *ohdr = NULL;
276 u32 tlen = rhf_pkt_len(packet->rhf); /* in bytes */
277 u16 lid = be16_to_cpu(hdr->lrh[1]);
281 /* Sanity check packet */
286 if (lnh == HFI1_LRH_BTH)
288 else if (lnh == HFI1_LRH_GRH) {
291 ohdr = &hdr->u.l.oth;
292 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
294 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
295 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
297 rcv_flags |= HFI1_HAS_GRH;
301 /* Get the destination QP number. */
302 qp_num = be32_to_cpu(ohdr->bth[1]) & HFI1_QPN_MASK;
303 if (lid < HFI1_MULTICAST_LID_BASE) {
308 qp = hfi1_lookup_qpn(ibp, qp_num);
315 * Handle only RC QPs - for other QP types drop error
318 spin_lock_irqsave(&qp->r_lock, flags);
320 /* Check for valid receive state. */
321 if (!(ib_hfi1_state_ops[qp->state] &
322 HFI1_PROCESS_RECV_OK)) {
326 switch (qp->ibqp.qp_type) {
335 /* For now don't handle any other QP types */
339 spin_unlock_irqrestore(&qp->r_lock, flags);
342 } /* Valid packet with TIDErr */
344 /* handle "RcvTypeErr" flags */
346 case RHF_RTE_ERROR_OP_CODE_ERR:
352 if (rhf_use_egr_bfr(packet->rhf))
356 goto drop; /* this should never happen */
358 if (lnh == HFI1_LRH_BTH)
359 bth = (__be32 *)ebuf;
360 else if (lnh == HFI1_LRH_GRH)
361 bth = (__be32 *)((char *)ebuf + sizeof(struct ib_grh));
365 opcode = be32_to_cpu(bth[0]) >> 24;
368 if (opcode == IB_OPCODE_CNP) {
370 * Only in pre-B0 h/w is the CNP_OPCODE handled
371 * via this code path (errata 291394).
373 struct hfi1_qp *qp = NULL;
376 u8 svc_type, sl, sc5;
378 sc5 = (be16_to_cpu(rhdr->lrh[0]) >> 12) & 0xf;
379 if (rhf_dc_info(packet->rhf))
381 sl = ibp->sc_to_sl[sc5];
383 lqpn = be32_to_cpu(bth[1]) & HFI1_QPN_MASK;
385 qp = hfi1_lookup_qpn(ibp, lqpn);
391 switch (qp->ibqp.qp_type) {
395 svc_type = IB_CC_SVCTYPE_UD;
398 rlid = be16_to_cpu(rhdr->lrh[3]);
399 rqpn = qp->remote_qpn;
400 svc_type = IB_CC_SVCTYPE_UC;
406 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
410 packet->rhf &= ~RHF_RCV_TYPE_ERR_SMASK;
421 static inline void init_packet(struct hfi1_ctxtdata *rcd,
422 struct hfi1_packet *packet)
425 packet->rsize = rcd->rcvhdrqentsize; /* words */
426 packet->maxcnt = rcd->rcvhdrq_cnt * packet->rsize; /* words */
430 packet->rhf_addr = get_rhf_addr(rcd);
431 packet->rhf = rhf_to_cpu(packet->rhf_addr);
432 packet->rhqoff = rcd->head;
434 packet->rcv_flags = 0;
437 #ifndef CONFIG_PRESCAN_RXQ
438 static void prescan_rxq(struct hfi1_packet *packet) {}
439 #else /* !CONFIG_PRESCAN_RXQ */
440 static int prescan_receive_queue;
442 static void process_ecn(struct hfi1_qp *qp, struct hfi1_ib_header *hdr,
443 struct hfi1_other_headers *ohdr,
444 u64 rhf, u32 bth1, struct ib_grh *grh)
446 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
451 switch (qp->ibqp.qp_type) {
455 rlid = be16_to_cpu(hdr->lrh[3]);
456 rqpn = be32_to_cpu(ohdr->u.ud.deth[1]) & HFI1_QPN_MASK;
457 svc_type = IB_CC_SVCTYPE_UD;
460 rlid = qp->remote_ah_attr.dlid;
461 rqpn = qp->remote_qpn;
462 svc_type = IB_CC_SVCTYPE_UC;
465 rlid = qp->remote_ah_attr.dlid;
466 rqpn = qp->remote_qpn;
467 svc_type = IB_CC_SVCTYPE_RC;
473 sc5 = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf;
474 if (rhf_dc_info(rhf))
477 if (bth1 & HFI1_FECN_SMASK) {
478 u16 pkey = (u16)be32_to_cpu(ohdr->bth[0]);
479 u16 dlid = be16_to_cpu(hdr->lrh[1]);
481 return_cnp(ibp, qp, rqpn, pkey, dlid, rlid, sc5, grh);
484 if (bth1 & HFI1_BECN_SMASK) {
485 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
486 u32 lqpn = bth1 & HFI1_QPN_MASK;
487 u8 sl = ibp->sc_to_sl[sc5];
489 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
494 struct hfi1_ctxtdata *rcd;
502 static inline void init_ps_mdata(struct ps_mdata *mdata,
503 struct hfi1_packet *packet)
505 struct hfi1_ctxtdata *rcd = packet->rcd;
508 mdata->rsize = packet->rsize;
509 mdata->maxcnt = packet->maxcnt;
510 mdata->ps_head = packet->rhqoff;
512 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
513 mdata->ps_tail = get_rcvhdrtail(rcd);
514 if (rcd->ctxt == HFI1_CTRL_CTXT)
515 mdata->ps_seq = rcd->seq_cnt;
517 mdata->ps_seq = 0; /* not used with DMA_RTAIL */
519 mdata->ps_tail = 0; /* used only with DMA_RTAIL*/
520 mdata->ps_seq = rcd->seq_cnt;
524 static inline int ps_done(struct ps_mdata *mdata, u64 rhf,
525 struct hfi1_ctxtdata *rcd)
527 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL))
528 return mdata->ps_head == mdata->ps_tail;
529 return mdata->ps_seq != rhf_rcv_seq(rhf);
532 static inline int ps_skip(struct ps_mdata *mdata, u64 rhf,
533 struct hfi1_ctxtdata *rcd)
536 * Control context can potentially receive an invalid rhf.
539 if ((rcd->ctxt == HFI1_CTRL_CTXT) && (mdata->ps_head != mdata->ps_tail))
540 return mdata->ps_seq != rhf_rcv_seq(rhf);
545 static inline void update_ps_mdata(struct ps_mdata *mdata,
546 struct hfi1_ctxtdata *rcd)
548 mdata->ps_head += mdata->rsize;
549 if (mdata->ps_head >= mdata->maxcnt)
552 /* Control context must do seq counting */
553 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL) ||
554 (rcd->ctxt == HFI1_CTRL_CTXT)) {
555 if (++mdata->ps_seq > 13)
561 * prescan_rxq - search through the receive queue looking for packets
562 * containing Excplicit Congestion Notifications (FECNs, or BECNs).
563 * When an ECN is found, process the Congestion Notification, and toggle
566 static void prescan_rxq(struct hfi1_packet *packet)
568 struct hfi1_ctxtdata *rcd = packet->rcd;
569 struct ps_mdata mdata;
571 if (!prescan_receive_queue)
574 init_ps_mdata(&mdata, packet);
577 struct hfi1_devdata *dd = rcd->dd;
578 struct hfi1_ibport *ibp = &rcd->ppd->ibport_data;
579 __le32 *rhf_addr = (__le32 *) rcd->rcvhdrq + mdata.ps_head +
582 struct hfi1_ib_header *hdr;
583 struct hfi1_other_headers *ohdr;
584 struct ib_grh *grh = NULL;
585 u64 rhf = rhf_to_cpu(rhf_addr);
586 u32 etype = rhf_rcv_type(rhf), qpn, bth1;
590 if (ps_done(&mdata, rhf, rcd))
593 if (ps_skip(&mdata, rhf, rcd))
596 if (etype != RHF_RCV_TYPE_IB)
599 hdr = (struct hfi1_ib_header *)
600 hfi1_get_msgheader(dd, rhf_addr);
601 lnh = be16_to_cpu(hdr->lrh[0]) & 3;
603 if (lnh == HFI1_LRH_BTH)
605 else if (lnh == HFI1_LRH_GRH) {
606 ohdr = &hdr->u.l.oth;
609 goto next; /* just in case */
611 bth1 = be32_to_cpu(ohdr->bth[1]);
612 is_ecn = !!(bth1 & (HFI1_FECN_SMASK | HFI1_BECN_SMASK));
617 qpn = bth1 & HFI1_QPN_MASK;
619 qp = hfi1_lookup_qpn(ibp, qpn);
626 process_ecn(qp, hdr, ohdr, rhf, bth1, grh);
629 /* turn off BECN, FECN */
630 bth1 &= ~(HFI1_FECN_SMASK | HFI1_BECN_SMASK);
631 ohdr->bth[1] = cpu_to_be32(bth1);
633 update_ps_mdata(&mdata, rcd);
636 #endif /* CONFIG_PRESCAN_RXQ */
638 static inline int skip_rcv_packet(struct hfi1_packet *packet, int thread)
640 int ret = RCV_PKT_OK;
642 /* Set up for the next packet */
643 packet->rhqoff += packet->rsize;
644 if (packet->rhqoff >= packet->maxcnt)
648 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
653 this_cpu_inc(*packet->rcd->dd->rcv_limit);
657 packet->rhf_addr = (__le32 *)packet->rcd->rcvhdrq + packet->rhqoff +
658 packet->rcd->dd->rhf_offset;
659 packet->rhf = rhf_to_cpu(packet->rhf_addr);
664 static inline int process_rcv_packet(struct hfi1_packet *packet, int thread)
666 int ret = RCV_PKT_OK;
668 packet->hdr = hfi1_get_msgheader(packet->rcd->dd,
670 packet->hlen = (u8 *)packet->rhf_addr - (u8 *)packet->hdr;
671 packet->etype = rhf_rcv_type(packet->rhf);
673 packet->tlen = rhf_pkt_len(packet->rhf); /* in bytes */
674 /* retrieve eager buffer details */
676 if (rhf_use_egr_bfr(packet->rhf)) {
677 packet->etail = rhf_egr_index(packet->rhf);
678 packet->ebuf = get_egrbuf(packet->rcd, packet->rhf,
681 * Prefetch the contents of the eager buffer. It is
682 * OK to send a negative length to prefetch_range().
683 * The +2 is the size of the RHF.
685 prefetch_range(packet->ebuf,
686 packet->tlen - ((packet->rcd->rcvhdrqentsize -
687 (rhf_hdrq_offset(packet->rhf)+2)) * 4));
691 * Call a type specific handler for the packet. We
692 * should be able to trust that etype won't be beyond
693 * the range of valid indexes. If so something is really
694 * wrong and we can probably just let things come
695 * crashing down. There is no need to eat another
696 * comparison in this performance critical code.
698 packet->rcd->dd->rhf_rcv_function_map[packet->etype](packet);
701 /* Set up for the next packet */
702 packet->rhqoff += packet->rsize;
703 if (packet->rhqoff >= packet->maxcnt)
706 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
711 this_cpu_inc(*packet->rcd->dd->rcv_limit);
715 packet->rhf_addr = (__le32 *) packet->rcd->rcvhdrq + packet->rhqoff +
716 packet->rcd->dd->rhf_offset;
717 packet->rhf = rhf_to_cpu(packet->rhf_addr);
722 static inline void process_rcv_update(int last, struct hfi1_packet *packet)
725 * Update head regs etc., every 16 packets, if not last pkt,
726 * to help prevent rcvhdrq overflows, when many packets
727 * are processed and queue is nearly full.
728 * Don't request an interrupt for intermediate updates.
730 if (!last && !(packet->numpkt & 0xf)) {
731 update_usrhead(packet->rcd, packet->rhqoff, packet->updegr,
732 packet->etail, 0, 0);
735 packet->rcv_flags = 0;
738 static inline void finish_packet(struct hfi1_packet *packet)
742 * Nothing we need to free for the packet.
744 * The only thing we need to do is a final update and call for an
747 update_usrhead(packet->rcd, packet->rcd->head, packet->updegr,
748 packet->etail, rcv_intr_dynamic, packet->numpkt);
752 static inline void process_rcv_qp_work(struct hfi1_packet *packet)
755 struct hfi1_ctxtdata *rcd;
756 struct hfi1_qp *qp, *nqp;
759 rcd->head = packet->rhqoff;
762 * Iterate over all QPs waiting to respond.
763 * The list won't change since the IRQ is only run on one CPU.
765 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
766 list_del_init(&qp->rspwait);
767 if (qp->r_flags & HFI1_R_RSP_DEFERED_ACK) {
768 qp->r_flags &= ~HFI1_R_RSP_DEFERED_ACK;
769 hfi1_send_rc_ack(rcd, qp, 0);
771 if (qp->r_flags & HFI1_R_RSP_SEND) {
774 qp->r_flags &= ~HFI1_R_RSP_SEND;
775 spin_lock_irqsave(&qp->s_lock, flags);
776 if (ib_hfi1_state_ops[qp->state] &
777 HFI1_PROCESS_OR_FLUSH_SEND)
778 hfi1_schedule_send(qp);
779 spin_unlock_irqrestore(&qp->s_lock, flags);
781 if (atomic_dec_and_test(&qp->refcount))
787 * Handle receive interrupts when using the no dma rtail option.
789 int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *rcd, int thread)
792 int last = RCV_PKT_OK;
793 struct hfi1_packet packet;
795 init_packet(rcd, &packet);
796 seq = rhf_rcv_seq(packet.rhf);
797 if (seq != rcd->seq_cnt) {
802 prescan_rxq(&packet);
804 while (last == RCV_PKT_OK) {
805 last = process_rcv_packet(&packet, thread);
806 seq = rhf_rcv_seq(packet.rhf);
807 if (++rcd->seq_cnt > 13)
809 if (seq != rcd->seq_cnt)
811 process_rcv_update(last, &packet);
813 process_rcv_qp_work(&packet);
815 finish_packet(&packet);
819 int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *rcd, int thread)
822 int last = RCV_PKT_OK;
823 struct hfi1_packet packet;
825 init_packet(rcd, &packet);
826 hdrqtail = get_rcvhdrtail(rcd);
827 if (packet.rhqoff == hdrqtail) {
831 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
833 prescan_rxq(&packet);
835 while (last == RCV_PKT_OK) {
836 last = process_rcv_packet(&packet, thread);
837 if (packet.rhqoff == hdrqtail)
839 process_rcv_update(last, &packet);
841 process_rcv_qp_work(&packet);
843 finish_packet(&packet);
847 static inline void set_all_nodma_rtail(struct hfi1_devdata *dd)
851 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
852 dd->rcd[i]->do_interrupt =
853 &handle_receive_interrupt_nodma_rtail;
856 static inline void set_all_dma_rtail(struct hfi1_devdata *dd)
860 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
861 dd->rcd[i]->do_interrupt =
862 &handle_receive_interrupt_dma_rtail;
866 * handle_receive_interrupt - receive a packet
869 * Called from interrupt handler for errors or receive interrupt.
870 * This is the slow path interrupt handler.
872 int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread)
874 struct hfi1_devdata *dd = rcd->dd;
876 int needset, last = RCV_PKT_OK;
877 struct hfi1_packet packet;
880 /* Control context will always use the slow path interrupt handler */
881 needset = (rcd->ctxt == HFI1_CTRL_CTXT) ? 0 : 1;
883 init_packet(rcd, &packet);
885 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
886 u32 seq = rhf_rcv_seq(packet.rhf);
888 if (seq != rcd->seq_cnt) {
894 hdrqtail = get_rcvhdrtail(rcd);
895 if (packet.rhqoff == hdrqtail) {
899 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
902 * Control context can potentially receive an invalid
903 * rhf. Drop such packets.
905 if (rcd->ctxt == HFI1_CTRL_CTXT) {
906 u32 seq = rhf_rcv_seq(packet.rhf);
908 if (seq != rcd->seq_cnt)
913 prescan_rxq(&packet);
915 while (last == RCV_PKT_OK) {
917 if (unlikely(dd->do_drop && atomic_xchg(&dd->drop_packet,
918 DROP_PACKET_OFF) == DROP_PACKET_ON)) {
921 /* On to the next packet */
922 packet.rhqoff += packet.rsize;
923 packet.rhf_addr = (__le32 *) rcd->rcvhdrq +
926 packet.rhf = rhf_to_cpu(packet.rhf_addr);
928 } else if (skip_pkt) {
929 last = skip_rcv_packet(&packet, thread);
932 last = process_rcv_packet(&packet, thread);
935 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
936 u32 seq = rhf_rcv_seq(packet.rhf);
938 if (++rcd->seq_cnt > 13)
940 if (seq != rcd->seq_cnt)
944 "Switching to NO_DMA_RTAIL\n");
945 set_all_nodma_rtail(dd);
949 if (packet.rhqoff == hdrqtail)
952 * Control context can potentially receive an invalid
953 * rhf. Drop such packets.
955 if (rcd->ctxt == HFI1_CTRL_CTXT) {
956 u32 seq = rhf_rcv_seq(packet.rhf);
958 if (++rcd->seq_cnt > 13)
960 if (!last && (seq != rcd->seq_cnt))
966 "Switching to DMA_RTAIL\n");
967 set_all_dma_rtail(dd);
972 process_rcv_update(last, &packet);
975 process_rcv_qp_work(&packet);
979 * Always write head at end, and setup rcv interrupt, even
980 * if no packets were processed.
982 finish_packet(&packet);
987 * Convert a given MTU size to the on-wire MAD packet enumeration.
988 * Return -1 if the size is invalid.
990 int mtu_to_enum(u32 mtu, int default_if_bad)
993 case 0: return OPA_MTU_0;
994 case 256: return OPA_MTU_256;
995 case 512: return OPA_MTU_512;
996 case 1024: return OPA_MTU_1024;
997 case 2048: return OPA_MTU_2048;
998 case 4096: return OPA_MTU_4096;
999 case 8192: return OPA_MTU_8192;
1000 case 10240: return OPA_MTU_10240;
1002 return default_if_bad;
1005 u16 enum_to_mtu(int mtu)
1008 case OPA_MTU_0: return 0;
1009 case OPA_MTU_256: return 256;
1010 case OPA_MTU_512: return 512;
1011 case OPA_MTU_1024: return 1024;
1012 case OPA_MTU_2048: return 2048;
1013 case OPA_MTU_4096: return 4096;
1014 case OPA_MTU_8192: return 8192;
1015 case OPA_MTU_10240: return 10240;
1016 default: return 0xffff;
1021 * set_mtu - set the MTU
1022 * @ppd: the per port data
1024 * We can handle "any" incoming size, the issue here is whether we
1025 * need to restrict our outgoing size. We do not deal with what happens
1026 * to programs that are already running when the size changes.
1028 int set_mtu(struct hfi1_pportdata *ppd)
1030 struct hfi1_devdata *dd = ppd->dd;
1031 int i, drain, ret = 0, is_up = 0;
1034 for (i = 0; i < ppd->vls_supported; i++)
1035 if (ppd->ibmtu < dd->vld[i].mtu)
1036 ppd->ibmtu = dd->vld[i].mtu;
1037 ppd->ibmaxlen = ppd->ibmtu + lrh_max_header_bytes(ppd->dd);
1039 mutex_lock(&ppd->hls_lock);
1040 if (ppd->host_link_state == HLS_UP_INIT
1041 || ppd->host_link_state == HLS_UP_ARMED
1042 || ppd->host_link_state == HLS_UP_ACTIVE)
1045 drain = !is_ax(dd) && is_up;
1049 * MTU is specified per-VL. To ensure that no packet gets
1050 * stuck (due, e.g., to the MTU for the packet's VL being
1051 * reduced), empty the per-VL FIFOs before adjusting MTU.
1053 ret = stop_drain_data_vls(dd);
1056 dd_dev_err(dd, "%s: cannot stop/drain VLs - refusing to change per-VL MTUs\n",
1061 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_MTU, 0);
1064 open_fill_data_vls(dd); /* reopen all VLs */
1067 mutex_unlock(&ppd->hls_lock);
1072 int hfi1_set_lid(struct hfi1_pportdata *ppd, u32 lid, u8 lmc)
1074 struct hfi1_devdata *dd = ppd->dd;
1078 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LIDLMC, 0);
1080 dd_dev_info(dd, "IB%u:%u got a lid: 0x%x\n", dd->unit, ppd->port, lid);
1086 * Following deal with the "obviously simple" task of overriding the state
1087 * of the LEDs, which normally indicate link physical and logical status.
1088 * The complications arise in dealing with different hardware mappings
1089 * and the board-dependent routine being called from interrupts.
1090 * and then there's the requirement to _flash_ them.
1092 #define LED_OVER_FREQ_SHIFT 8
1093 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
1094 /* Below is "non-zero" to force override, but both actual LEDs are off */
1095 #define LED_OVER_BOTH_OFF (8)
1097 static void run_led_override(unsigned long opaque)
1099 struct hfi1_pportdata *ppd = (struct hfi1_pportdata *)opaque;
1100 struct hfi1_devdata *dd = ppd->dd;
1104 if (!(dd->flags & HFI1_INITTED))
1107 ph_idx = ppd->led_override_phase++ & 1;
1108 ppd->led_override = ppd->led_override_vals[ph_idx];
1109 timeoff = ppd->led_override_timeoff;
1112 * don't re-fire the timer if user asked for it to be off; we let
1113 * it fire one more time after they turn it off to simplify
1115 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
1116 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
1119 void hfi1_set_led_override(struct hfi1_pportdata *ppd, unsigned int val)
1121 struct hfi1_devdata *dd = ppd->dd;
1124 if (!(dd->flags & HFI1_INITTED))
1127 /* First check if we are blinking. If not, use 1HZ polling */
1129 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
1132 /* For blink, set each phase from one nybble of val */
1133 ppd->led_override_vals[0] = val & 0xF;
1134 ppd->led_override_vals[1] = (val >> 4) & 0xF;
1135 timeoff = (HZ << 4)/freq;
1137 /* Non-blink set both phases the same. */
1138 ppd->led_override_vals[0] = val & 0xF;
1139 ppd->led_override_vals[1] = val & 0xF;
1141 ppd->led_override_timeoff = timeoff;
1144 * If the timer has not already been started, do so. Use a "quick"
1145 * timeout so the function will be called soon, to look at our request.
1147 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
1148 /* Need to start timer */
1149 setup_timer(&ppd->led_override_timer, run_led_override,
1150 (unsigned long)ppd);
1152 ppd->led_override_timer.expires = jiffies + 1;
1153 add_timer(&ppd->led_override_timer);
1155 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
1156 mod_timer(&ppd->led_override_timer, jiffies + 1);
1157 atomic_dec(&ppd->led_override_timer_active);
1162 * hfi1_reset_device - reset the chip if possible
1163 * @unit: the device to reset
1165 * Whether or not reset is successful, we attempt to re-initialize the chip
1166 * (that is, much like a driver unload/reload). We clear the INITTED flag
1167 * so that the various entry points will fail until we reinitialize. For
1168 * now, we only allow this if no user contexts are open that use chip resources
1170 int hfi1_reset_device(int unit)
1173 struct hfi1_devdata *dd = hfi1_lookup(unit);
1174 struct hfi1_pportdata *ppd;
1175 unsigned long flags;
1183 dd_dev_info(dd, "Reset on unit %u requested\n", unit);
1185 if (!dd->kregbase || !(dd->flags & HFI1_PRESENT)) {
1187 "Invalid unit number %u or not initialized or not present\n",
1193 spin_lock_irqsave(&dd->uctxt_lock, flags);
1195 for (i = dd->first_user_ctxt; i < dd->num_rcv_contexts; i++) {
1196 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
1198 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1202 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1204 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1205 ppd = dd->pport + pidx;
1206 if (atomic_read(&ppd->led_override_timer_active)) {
1207 /* Need to stop LED timer, _then_ shut off LEDs */
1208 del_timer_sync(&ppd->led_override_timer);
1209 atomic_set(&ppd->led_override_timer_active, 0);
1212 /* Shut off LEDs after we are sure timer is not running */
1213 ppd->led_override = LED_OVER_BOTH_OFF;
1215 if (dd->flags & HFI1_HAS_SEND_DMA)
1218 hfi1_reset_cpu_counters(dd);
1220 ret = hfi1_init(dd, 1);
1224 "Reinitialize unit %u after reset failed with %d\n",
1227 dd_dev_info(dd, "Reinitialized unit %u after resetting\n",
1234 void handle_eflags(struct hfi1_packet *packet)
1236 struct hfi1_ctxtdata *rcd = packet->rcd;
1237 u32 rte = rhf_rcv_type_err(packet->rhf);
1239 rcv_hdrerr(rcd, rcd->ppd, packet);
1240 if (rhf_err_flags(packet->rhf))
1242 "receive context %d: rhf 0x%016llx, errs [ %s%s%s%s%s%s%s%s] rte 0x%x\n",
1243 rcd->ctxt, packet->rhf,
1244 packet->rhf & RHF_K_HDR_LEN_ERR ? "k_hdr_len " : "",
1245 packet->rhf & RHF_DC_UNC_ERR ? "dc_unc " : "",
1246 packet->rhf & RHF_DC_ERR ? "dc " : "",
1247 packet->rhf & RHF_TID_ERR ? "tid " : "",
1248 packet->rhf & RHF_LEN_ERR ? "len " : "",
1249 packet->rhf & RHF_ECC_ERR ? "ecc " : "",
1250 packet->rhf & RHF_VCRC_ERR ? "vcrc " : "",
1251 packet->rhf & RHF_ICRC_ERR ? "icrc " : "",
1256 * The following functions are called by the interrupt handler. They are type
1257 * specific handlers for each packet type.
1259 int process_receive_ib(struct hfi1_packet *packet)
1261 trace_hfi1_rcvhdr(packet->rcd->ppd->dd,
1263 rhf_err_flags(packet->rhf),
1268 rhf_egr_index(packet->rhf));
1270 if (unlikely(rhf_err_flags(packet->rhf))) {
1271 handle_eflags(packet);
1272 return RHF_RCV_CONTINUE;
1275 hfi1_ib_rcv(packet);
1276 return RHF_RCV_CONTINUE;
1279 int process_receive_bypass(struct hfi1_packet *packet)
1281 if (unlikely(rhf_err_flags(packet->rhf)))
1282 handle_eflags(packet);
1284 dd_dev_err(packet->rcd->dd,
1285 "Bypass packets are not supported in normal operation. Dropping\n");
1286 return RHF_RCV_CONTINUE;
1289 int process_receive_error(struct hfi1_packet *packet)
1291 handle_eflags(packet);
1293 if (unlikely(rhf_err_flags(packet->rhf)))
1294 dd_dev_err(packet->rcd->dd,
1295 "Unhandled error packet received. Dropping.\n");
1297 return RHF_RCV_CONTINUE;
1300 int kdeth_process_expected(struct hfi1_packet *packet)
1302 if (unlikely(rhf_err_flags(packet->rhf)))
1303 handle_eflags(packet);
1305 dd_dev_err(packet->rcd->dd,
1306 "Unhandled expected packet received. Dropping.\n");
1307 return RHF_RCV_CONTINUE;
1310 int kdeth_process_eager(struct hfi1_packet *packet)
1312 if (unlikely(rhf_err_flags(packet->rhf)))
1313 handle_eflags(packet);
1315 dd_dev_err(packet->rcd->dd,
1316 "Unhandled eager packet received. Dropping.\n");
1317 return RHF_RCV_CONTINUE;
1320 int process_receive_invalid(struct hfi1_packet *packet)
1322 dd_dev_err(packet->rcd->dd, "Invalid packet type %d. Dropping\n",
1323 rhf_rcv_type(packet->rhf));
1324 return RHF_RCV_CONTINUE;