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[mv-sheeva.git] / drivers / staging / rtl8187se / r8180_rtl8225.c
1 /*
2   This is part of the rtl8180-sa2400 driver
3   released under the GPL (See file COPYING for details).
4   Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
5
6   This files contains programming code for the rtl8225
7   radio frontend.
8
9   *Many* thanks to Realtek Corp. for their great support!
10
11 */
12
13
14
15 #include "r8180_hw.h"
16 #include "r8180_rtl8225.h"
17
18
19 u8 rtl8225_gain[]={
20         0x23,0x88,0x7c,0xa5,// -82dbm
21         0x23,0x88,0x7c,0xb5,// -82dbm
22         0x23,0x88,0x7c,0xc5,// -82dbm
23         0x33,0x80,0x79,0xc5,// -78dbm
24         0x43,0x78,0x76,0xc5,// -74dbm
25         0x53,0x60,0x73,0xc5,// -70dbm
26         0x63,0x58,0x70,0xc5,// -66dbm
27 };
28
29 u32 rtl8225_chan[] ={
30               0,
31                 0x0080, //ch1
32                 0x0100, //ch2
33                 0x0180, //ch3
34                 0x0200, //ch4
35                 0x0280,
36                 0x0300,
37                 0x0380,
38                 0x0400,
39                 0x0480,
40                 0x0500,
41                 0x0580,
42                 0x0600,
43                 0x0680,
44                 0x074A, //ch14
45 };
46
47 u16 rtl8225bcd_rxgain[]={
48         0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
49         0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
50         0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
51         0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
52         0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
53         0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
54         0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
55         0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
56         0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
57         0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
58         0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,
59         0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
60
61 };
62
63 u8 rtl8225_agc[]={
64         0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9d,0x9c,0x9b,0x9a,0x99,0x98,0x97,0x96,
65         0x95,0x94,0x93,0x92,0x91,0x90,0x8f,0x8e,0x8d,0x8c,0x8b,0x8a,0x89,0x88,0x87,0x86,
66         0x85,0x84,0x83,0x82,0x81,0x80,0x3f,0x3e,0x3d,0x3c,0x3b,0x3a,0x39,0x38,0x37,0x36,
67         0x35,0x34,0x33,0x32,0x31,0x30,0x2f,0x2e,0x2d,0x2c,0x2b,0x2a,0x29,0x28,0x27,0x26,
68         0x25,0x24,0x23,0x22,0x21,0x20,0x1f,0x1e,0x1d,0x1c,0x1b,0x1a,0x19,0x18,0x17,0x16,
69         0x15,0x14,0x13,0x12,0x11,0x10,0x0f,0x0e,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,
70         0x05,0x04,0x03,0x02,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
71         0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
72 };
73
74
75 u8 rtl8225_tx_gain_cck_ofdm[]={
76         0x02,0x06,0x0e,0x1e,0x3e,0x7e
77 };
78
79
80 u8 rtl8225_tx_power_ofdm[]={
81         0x80,0x90,0xa2,0xb5,0xcb,0xe4
82 };
83
84
85 u8 rtl8225_tx_power_cck_ch14[]={
86         0x18,0x17,0x15,0x0c,0x00,0x00,0x00,0x00,
87         0x1b,0x1a,0x17,0x0e,0x00,0x00,0x00,0x00,
88         0x1f,0x1e,0x1a,0x0f,0x00,0x00,0x00,0x00,
89         0x22,0x21,0x1d,0x11,0x00,0x00,0x00,0x00,
90         0x26,0x25,0x21,0x13,0x00,0x00,0x00,0x00,
91         0x2b,0x2a,0x25,0x15,0x00,0x00,0x00,0x00
92 };
93
94
95 u8 rtl8225_tx_power_cck[]={
96         0x18,0x17,0x15,0x11,0x0c,0x08,0x04,0x02,
97         0x1b,0x1a,0x17,0x13,0x0e,0x09,0x04,0x02,
98         0x1f,0x1e,0x1a,0x15,0x10,0x0a,0x05,0x02,
99         0x22,0x21,0x1d,0x18,0x11,0x0b,0x06,0x02,
100         0x26,0x25,0x21,0x1b,0x14,0x0d,0x06,0x03,
101         0x2b,0x2a,0x25,0x1e,0x16,0x0e,0x07,0x03
102 };
103
104
105 void rtl8225_set_gain(struct net_device *dev, short gain)
106 {
107         write_phy_ofdm(dev, 0x0d, rtl8225_gain[gain * 4]);
108         write_phy_ofdm(dev, 0x23, rtl8225_gain[gain * 4 + 1]);
109         write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 4 + 2]);
110         write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 4 + 3]);
111 }
112
113 void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
114 {
115         int i;
116         u16 out,select;
117         u8 bit;
118         u32 bangdata = (data << 4) | (adr & 0xf);
119         struct r8180_priv *priv = ieee80211_priv(dev);
120
121         out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
122
123         write_nic_word(dev,RFPinsEnable,
124                 (read_nic_word(dev,RFPinsEnable) | 0x7));
125
126         select = read_nic_word(dev, RFPinsSelect);
127
128         write_nic_word(dev, RFPinsSelect, select | 0x7 |
129                 ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
130
131         force_pci_posting(dev);
132         udelay(10);
133
134         write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
135
136         force_pci_posting(dev);
137         udelay(2);
138
139         write_nic_word(dev, RFPinsOutput, out);
140
141         force_pci_posting(dev);
142         udelay(10);
143
144
145         for(i=15; i>=0;i--){
146
147                 bit = (bangdata & (1<<i)) >> i;
148
149                 write_nic_word(dev, RFPinsOutput, bit | out);
150
151                 write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
152                 write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
153
154                 i--;
155                 bit = (bangdata & (1<<i)) >> i;
156
157                 write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
158                 write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
159
160                 write_nic_word(dev, RFPinsOutput, bit | out);
161
162         }
163
164         write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
165
166         force_pci_posting(dev);
167         udelay(10);
168
169         write_nic_word(dev, RFPinsOutput, out |
170                 ((priv->card_type == USB) ? 4 : BB_HOST_BANG_EN));
171
172         write_nic_word(dev, RFPinsSelect, select |
173                 ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
174
175         if(priv->card_type == USB)
176                 mdelay(2);
177         else
178                 rtl8185_rf_pins_enable(dev);
179 }
180
181 void rtl8225_rf_close(struct net_device *dev)
182 {
183         write_rtl8225(dev, 0x4, 0x1f);
184
185         force_pci_posting(dev);
186         mdelay(1);
187
188         rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_OFF);
189         rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_OFF);
190 }
191
192 void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch)
193 {
194         struct r8180_priv *priv = ieee80211_priv(dev);
195
196         int GainIdx;
197         int GainSetting;
198         int i;
199         u8 power;
200         u8 *cck_power_table;
201         u8 max_cck_power_level;
202         u8 max_ofdm_power_level;
203         u8 min_ofdm_power_level;
204         u8 cck_power_level = 0xff & priv->chtxpwr[ch];
205         u8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
206
207         if(priv->card_type == USB){
208                 max_cck_power_level = 11;
209                 max_ofdm_power_level = 25; //  12 -> 25
210                 min_ofdm_power_level = 10;
211         }else{
212                 max_cck_power_level = 35;
213                 max_ofdm_power_level = 35;
214                 min_ofdm_power_level = 0;
215         }
216         /* CCK power setting */
217         if(cck_power_level > max_cck_power_level)
218                 cck_power_level = max_cck_power_level;
219         GainIdx=cck_power_level % 6;
220         GainSetting=cck_power_level / 6;
221
222         if(ch == 14)
223                 cck_power_table = rtl8225_tx_power_cck_ch14;
224         else
225                 cck_power_table = rtl8225_tx_power_cck;
226
227 //      if(priv->card_8185 == 1 && priv->card_8185_Bversion ){
228                 /*Ver B*/
229 //              write_nic_byte(dev, TX_GAIN_CCK, rtl8225_tx_gain_cck_ofdm[GainSetting]);
230 //      }else{
231                 /*Ver C - D */
232         write_nic_byte(dev, TX_GAIN_CCK, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
233 //      }
234
235         for(i=0;i<8;i++){
236
237                 power = cck_power_table[GainIdx * 8 + i];
238                 write_phy_cck(dev, 0x44 + i, power);
239         }
240
241         /* FIXME Is this delay really needeed ? */
242         force_pci_posting(dev);
243         mdelay(1);
244
245         /* OFDM power setting */
246 //  Old:
247 //      if(ofdm_power_level > max_ofdm_power_level)
248 //              ofdm_power_level = 35;
249 //      ofdm_power_level += min_ofdm_power_level;
250 //  Latest:
251         if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
252                 ofdm_power_level = max_ofdm_power_level;
253         else
254                 ofdm_power_level += min_ofdm_power_level;
255         if(ofdm_power_level > 35)
256                 ofdm_power_level = 35;
257 //
258
259         GainIdx=ofdm_power_level % 6;
260         GainSetting=ofdm_power_level / 6;
261 #if 1
262 //      if(priv->card_type == USB){
263                 rtl8185_set_anaparam2(dev,RTL8225_ANAPARAM2_ON);
264
265                 write_phy_ofdm(dev,2,0x42);
266                 write_phy_ofdm(dev,6,0);
267                 write_phy_ofdm(dev,8,0);
268 //      }
269 #endif
270 //      if(priv->card_8185 == 1 && priv->card_8185_Bversion){
271 //              /*Ver B*/
272 //              write_nic_byte(dev, TX_GAIN_OFDM, rtl8225_tx_gain_cck_ofdm[GainSetting]);
273 //      }else{
274                 /*Ver C - D */
275         write_nic_byte(dev, TX_GAIN_OFDM, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
276 //      }
277
278
279         power = rtl8225_tx_power_ofdm[GainIdx];
280
281         write_phy_ofdm(dev, 0x5, power);
282         write_phy_ofdm(dev, 0x7, power);
283
284         force_pci_posting(dev);
285         mdelay(1);
286         //write_nic_byte(dev, TX_AGC_CONTROL,4);
287 }
288
289 void rtl8225_rf_set_chan(struct net_device *dev, short ch)
290 {
291         struct r8180_priv *priv = ieee80211_priv(dev);
292         short gset = (priv->ieee80211->state == IEEE80211_LINKED &&
293                 ieee80211_is_54g(priv->ieee80211->current_network)) ||
294                 priv->ieee80211->iw_mode == IW_MODE_MONITOR;
295
296         rtl8225_SetTXPowerLevel(dev, ch);
297
298         write_rtl8225(dev, 0x7, rtl8225_chan[ch]);
299
300         force_pci_posting(dev);
301         mdelay(10);
302
303         // A mode sifs 0x44, difs 34-14, slot 9, eifs 23, cwm 3, cwM 7, ctstoself 0x10
304         if(gset){
305                 write_nic_byte(dev,SIFS,0x22);// SIFS: 0x22
306                 write_nic_byte(dev,DIFS,0x14); //DIFS: 20
307                 //write_nic_byte(dev,DIFS,20); //DIFS: 20
308         }else{
309                 write_nic_byte(dev,SIFS,0x44);// SIFS: 0x22
310                 write_nic_byte(dev,DIFS,50 - 14); //DIFS: 36
311         }
312         if(priv->ieee80211->state == IEEE80211_LINKED &&
313                 ieee80211_is_shortslot(priv->ieee80211->current_network))
314                 write_nic_byte(dev,SLOT,0x9); //SLOT: 9
315
316         else
317                 write_nic_byte(dev,SLOT,0x14); //SLOT: 20 (0x14)
318
319
320         if(gset){
321                 write_nic_byte(dev,EIFS,81);//91 - 20); // EIFS: 91 (0x5B)
322                 write_nic_byte(dev,CW_VAL,0x73); //CW VALUE: 0x37
323                 //DMESG("using G net params");
324         }else{
325                 write_nic_byte(dev,EIFS,81); // EIFS: 91 (0x5B)
326                 write_nic_byte(dev,CW_VAL,0xa5); //CW VALUE: 0x37
327                 //DMESG("using B net params");
328         }
329
330
331 }
332
333 void rtl8225_host_pci_init(struct net_device *dev)
334 {
335         write_nic_word(dev, RFPinsOutput, 0x480);
336
337         rtl8185_rf_pins_enable(dev);
338
339         //if(priv->card_8185 == 2 && priv->enable_gpio0 ) /* version D */
340         //write_nic_word(dev, RFPinsSelect, 0x88);
341         //else
342         write_nic_word(dev, RFPinsSelect, 0x88 | SW_CONTROL_GPIO); /* 0x488 | SW_CONTROL_GPIO */
343
344         write_nic_byte(dev, GP_ENABLE, 0);
345
346         force_pci_posting(dev);
347         mdelay(200);
348
349         write_nic_word(dev, GP_ENABLE, 0xff & (~(1<<6))); /* bit 6 is for RF on/off detection */
350
351
352 }
353
354 void rtl8225_host_usb_init(struct net_device *dev)
355 {
356 }
357
358 void rtl8225_rf_sleep(struct net_device *dev)
359 {
360         write_rtl8225(dev,0x4,0xdff);
361         force_pci_posting(dev);
362         mdelay(1);
363         rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_SLEEP);
364         rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_SLEEP);
365         force_pci_posting(dev);
366 }
367
368 void rtl8225_rf_wakeup(struct net_device *dev)
369 {
370         write_rtl8225(dev,0x4,0x9ff);
371         rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
372         rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
373         force_pci_posting(dev);
374 }
375
376 void rtl8225_rf_init(struct net_device *dev)
377 {
378         struct r8180_priv *priv = ieee80211_priv(dev);
379         int i;
380         short channel = 1;
381         u16 brsr;
382
383         priv->chan = channel;
384
385         rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
386
387
388         if(priv->card_type == USB)
389                 rtl8225_host_usb_init(dev);
390         else
391                 rtl8225_host_pci_init(dev);
392
393         write_nic_dword(dev, RF_TIMING, 0x000a8008);
394
395         brsr = read_nic_word(dev, BRSR);
396
397         write_nic_word(dev, BRSR, 0xffff);
398
399         write_nic_dword(dev, RF_PARA, 0x100044);
400
401         #if 1  //0->1
402         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
403         write_nic_byte(dev, CONFIG3, 0x44);
404         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
405         #endif
406
407         if(priv->card_type == USB){
408                 rtl8185_rf_pins_enable(dev);
409
410                 mdelay(1000);
411         }
412
413         write_rtl8225(dev, 0x0, 0x67); mdelay(1);
414
415
416         write_rtl8225(dev, 0x1, 0xfe0); mdelay(1);
417
418         write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
419
420         write_rtl8225(dev, 0x3, 0x441); mdelay(1);
421
422         if(priv->card_type == USB)
423                 write_rtl8225(dev, 0x4, 0x486);
424         else
425                 write_rtl8225(dev, 0x4, 0x8be);
426
427         mdelay(1);
428
429         /* version B & C */
430
431         if(priv->card_type == USB)
432                 write_rtl8225(dev, 0x5, 0xbc0);
433         else if(priv->card_type == MINIPCI)
434                 write_rtl8225(dev, 0x5, 0xbc0 + 3 +(6<<3));
435         else
436                 write_rtl8225(dev, 0x5, 0xbc0 + (6<<3));
437
438          mdelay(1);
439 //      }
440
441         write_rtl8225(dev, 0x6, 0xae6);  mdelay(1);
442
443         write_rtl8225(dev, 0x7, ((priv->card_type == USB)? 0x82a : rtl8225_chan[channel]));  mdelay(1);
444
445         write_rtl8225(dev, 0x8, 0x1f);  mdelay(1);
446
447         write_rtl8225(dev, 0x9, 0x334);  mdelay(1);
448
449         write_rtl8225(dev, 0xa, 0xfd4);  mdelay(1);
450
451         write_rtl8225(dev, 0xb, 0x391);  mdelay(1);
452
453         write_rtl8225(dev, 0xc, 0x50);  mdelay(1);
454
455
456         write_rtl8225(dev, 0xd, 0x6db);   mdelay(1);
457
458         write_rtl8225(dev, 0xe, 0x29);  mdelay(1);
459
460         write_rtl8225(dev, 0xf, 0x914);
461
462         if(priv->card_type == USB){
463                 //force_pci_posting(dev);
464                 mdelay(100);
465         }
466
467         write_rtl8225(dev, 0x2, 0xc4d);
468
469         if(priv->card_type == USB){
470         //      force_pci_posting(dev);
471                 mdelay(200);
472
473                 write_rtl8225(dev, 0x2, 0x44d);
474
475         //      force_pci_posting(dev);
476                 mdelay(100);
477
478         }//End of if(priv->card_type == USB)
479         /* FIXME!! rtl8187 we have to check if calibrarion
480          * is successful and eventually cal. again (repeat
481          * the two write on reg 2)
482         */
483         force_pci_posting(dev);
484
485         mdelay(100); //200 for 8187
486
487         //if(priv->card_type != USB) /* maybe not needed even for 8185 */
488 //      write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
489
490         write_rtl8225(dev, 0x0, 0x127);
491
492         for(i=0;i<95;i++){
493                 write_rtl8225(dev, 0x1, (u8)(i+1));
494
495                 /* version B & C & D*/
496
497                 write_rtl8225(dev, 0x2, rtl8225bcd_rxgain[i]);
498         }
499
500         write_rtl8225(dev, 0x0, 0x27);
501
502
503 //      //if(priv->card_type != USB){
504 //              write_rtl8225(dev, 0x2, 0x44d);
505 //              write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
506 //              write_rtl8225(dev, 0x2, 0x47d);
507 //
508 //              force_pci_posting(dev);
509 //              mdelay(100);
510 //
511 //              write_rtl8225(dev, 0x2, 0x44d);
512 //      //}
513
514         write_rtl8225(dev, 0x0, 0x22f);
515
516         if(priv->card_type != USB)
517                 rtl8185_rf_pins_enable(dev);
518
519         for(i=0;i<128;i++){
520                 write_phy_ofdm(dev, 0xb, rtl8225_agc[i]);
521
522                 mdelay(1);
523                 write_phy_ofdm(dev, 0xa, (u8)i+ 0x80);
524
525                 mdelay(1);
526         }
527
528         force_pci_posting(dev);
529         mdelay(1);
530
531         write_phy_ofdm(dev, 0x0, 0x1); mdelay(1);
532         write_phy_ofdm(dev, 0x1, 0x2); mdelay(1);
533         write_phy_ofdm(dev, 0x2, ((priv->card_type == USB)? 0x42 : 0x62)); mdelay(1);
534         write_phy_ofdm(dev, 0x3, 0x0); mdelay(1);
535         write_phy_ofdm(dev, 0x4, 0x0); mdelay(1);
536         write_phy_ofdm(dev, 0x5, 0x0); mdelay(1);
537         write_phy_ofdm(dev, 0x6, 0x40); mdelay(1);
538         write_phy_ofdm(dev, 0x7, 0x0); mdelay(1);
539         write_phy_ofdm(dev, 0x8, 0x40); mdelay(1);
540         write_phy_ofdm(dev, 0x9, 0xfe); mdelay(1);
541
542                         /* ver C & D */
543         write_phy_ofdm(dev, 0xa, 0x9); mdelay(1);
544
545         //write_phy_ofdm(dev, 0x18, 0xef);
546         //      }
547         //}
548         write_phy_ofdm(dev, 0xb, 0x80); mdelay(1);
549
550         write_phy_ofdm(dev, 0xc, 0x1);mdelay(1);
551
552
553         //if(priv->card_type != USB)
554         //write_phy_ofdm(dev, 0xd, 0x33); // <>
555
556         write_phy_ofdm(dev, 0xe, 0xd3);mdelay(1);
557
558
559         write_phy_ofdm(dev, 0xf, 0x38);mdelay(1);
560 /*ver D & 8187*/
561 //      }
562
563 //      if(priv->card_8185 == 1 && priv->card_8185_Bversion)
564 //              write_phy_ofdm(dev, 0x10, 0x04);/*ver B*/
565 //      else
566         write_phy_ofdm(dev, 0x10, 0x84);mdelay(1);
567 /*ver C & D & 8187*/
568
569         write_phy_ofdm(dev, 0x11, 0x06);mdelay(1);
570 /*agc resp time 700*/
571
572
573 //      if(priv->card_8185 == 2){
574         /* Ver D & 8187*/
575         write_phy_ofdm(dev, 0x12, 0x20);mdelay(1);
576
577         write_phy_ofdm(dev, 0x13, 0x20);mdelay(1);
578
579         write_phy_ofdm(dev, 0x14, 0x0); mdelay(1);
580         write_phy_ofdm(dev, 0x15, 0x40); mdelay(1);
581         write_phy_ofdm(dev, 0x16, 0x0); mdelay(1);
582         write_phy_ofdm(dev, 0x17, 0x40); mdelay(1);
583
584 //      if (priv->card_type == USB)
585 //              write_phy_ofdm(dev, 0x18, 0xef);
586
587         write_phy_ofdm(dev, 0x18, 0xef);mdelay(1);
588
589
590         write_phy_ofdm(dev, 0x19, 0x19); mdelay(1);
591         write_phy_ofdm(dev, 0x1a, 0x20); mdelay(1);
592
593 //      if (priv->card_type != USB){
594 //              if(priv->card_8185 == 1 && priv->card_8185_Bversion)
595 //                      write_phy_ofdm(dev, 0x1b, 0x66); /* Ver B */
596 //              else
597         write_phy_ofdm(dev, 0x1b, 0x76);mdelay(1);
598  /* Ver C & D */ //FIXME:MAYBE not needed
599 //      }
600
601         write_phy_ofdm(dev, 0x1c, 0x4);mdelay(1);
602
603                 /*ver D & 8187*/
604         write_phy_ofdm(dev, 0x1e, 0x95);mdelay(1);
605
606         write_phy_ofdm(dev, 0x1f, 0x75);        mdelay(1);
607
608 //      }
609
610         write_phy_ofdm(dev, 0x20, 0x1f);mdelay(1);
611
612         write_phy_ofdm(dev, 0x21, 0x27);mdelay(1);
613
614         write_phy_ofdm(dev, 0x22, 0x16);mdelay(1);
615
616 //      if(priv->card_type != USB)
617         //write_phy_ofdm(dev, 0x23, 0x43); //FIXME maybe not needed // <>
618
619         write_phy_ofdm(dev, 0x24, 0x46); mdelay(1);
620         write_phy_ofdm(dev, 0x25, 0x20); mdelay(1);
621         write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
622         write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
623 /* Ver C & D & 8187*/
624
625         // <> Set init. gain to m74dBm.
626         write_phy_ofdm(dev, 0x0d, 0x43);         mdelay(1);
627         write_phy_ofdm(dev, 0x1b, 0x76);         mdelay(1);
628         write_phy_ofdm(dev, 0x1d, 0xc5);         mdelay(1);
629         write_phy_ofdm(dev, 0x23, 0x78);         mdelay(1);
630
631         //if(priv->card_type == USB);
632         //      rtl8225_set_gain_usb(dev, 1); /* FIXME this '2' is random */
633
634         write_phy_cck(dev, 0x0, 0x98); mdelay(1);
635         write_phy_cck(dev, 0x3, 0x20); mdelay(1);
636         write_phy_cck(dev, 0x4, 0x7e); mdelay(1);
637         write_phy_cck(dev, 0x5, 0x12); mdelay(1);
638         write_phy_cck(dev, 0x6, 0xfc); mdelay(1);
639         write_phy_cck(dev, 0x7, 0x78);mdelay(1);
640  /* Ver C & D & 8187*/
641
642         write_phy_cck(dev, 0x8, 0x2e);mdelay(1);
643
644         write_phy_cck(dev, 0x10, ((priv->card_type == USB) ? 0x9b: 0x93)); mdelay(1);
645         write_phy_cck(dev, 0x11, 0x88); mdelay(1);
646         write_phy_cck(dev, 0x12, 0x47); mdelay(1);
647         write_phy_cck(dev, 0x13, 0xd0); /* Ver C & D & 8187*/
648
649         write_phy_cck(dev, 0x19, 0x0);
650         write_phy_cck(dev, 0x1a, 0xa0);
651         write_phy_cck(dev, 0x1b, 0x8);
652         write_phy_cck(dev, 0x40, 0x86); /* CCK Carrier Sense Threshold */
653
654         write_phy_cck(dev, 0x41, 0x8d);mdelay(1);
655
656
657         write_phy_cck(dev, 0x42, 0x15); mdelay(1);
658         write_phy_cck(dev, 0x43, 0x18); mdelay(1);
659         write_phy_cck(dev, 0x44, 0x1f); mdelay(1);
660         write_phy_cck(dev, 0x45, 0x1e); mdelay(1);
661         write_phy_cck(dev, 0x46, 0x1a); mdelay(1);
662         write_phy_cck(dev, 0x47, 0x15); mdelay(1);
663         write_phy_cck(dev, 0x48, 0x10); mdelay(1);
664         write_phy_cck(dev, 0x49, 0xa); mdelay(1);
665         write_phy_cck(dev, 0x4a, 0x5); mdelay(1);
666         write_phy_cck(dev, 0x4b, 0x2); mdelay(1);
667         write_phy_cck(dev, 0x4c, 0x5);mdelay(1);
668
669
670         write_nic_byte(dev, 0x5b, 0x0d); mdelay(1);
671
672
673
674 // <>
675 //      // TESTR 0xb 8187
676 //      write_phy_cck(dev, 0x10, 0x93);// & 0xfb);
677 //
678 //      //if(priv->card_type != USB){
679 //              write_phy_ofdm(dev, 0x2, 0x62);
680 //              write_phy_ofdm(dev, 0x6, 0x0);
681 //              write_phy_ofdm(dev, 0x8, 0x0);
682 //      //}
683
684         rtl8225_SetTXPowerLevel(dev, channel);
685
686         write_phy_cck(dev, 0x10, 0x9b); mdelay(1); /* Rx ant A, 0xdb for B */
687         write_phy_ofdm(dev, 0x26, 0x90); mdelay(1); /* Rx ant A, 0x10 for B */
688
689         rtl8185_tx_antenna(dev, 0x3); /* TX ant A, 0x0 for B */
690
691         /* switch to high-speed 3-wire
692          * last digit. 2 for both cck and ofdm
693          */
694         if(priv->card_type == USB)
695                 write_nic_dword(dev, 0x94, 0x3dc00002);
696         else{
697                 write_nic_dword(dev, 0x94, 0x15c00002);
698                 rtl8185_rf_pins_enable(dev);
699         }
700
701 //      if(priv->card_type != USB)
702 //      rtl8225_set_gain(dev, 4); /* FIXME this '1' is random */ // <>
703 //       rtl8225_set_mode(dev, 1); /* FIXME start in B mode */ // <>
704 //
705 //      /* make sure is waken up! */
706 //      write_rtl8225(dev,0x4, 0x9ff);
707 //      rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
708 //      rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
709
710         rtl8225_rf_set_chan(dev, priv->chan);
711
712         write_nic_word(dev,BRSR,brsr);
713
714 }