1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
21 #include "odm_precomp.h"
23 void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
24 u32 Data, enum rf_radio_path RF_PATH,
27 struct adapter *adapter = pDM_Odm->Adapter;
31 } else if (Addr == 0xfd) {
33 } else if (Addr == 0xfc) {
35 } else if (Addr == 0xfb) {
37 } else if (Addr == 0xfa) {
39 } else if (Addr == 0xf9) {
42 PHY_SetRFReg(adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
43 /* Add 1us delay between BB/RF register setting. */
48 void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data)
50 u32 content = 0x1000; /* RF_Content: radioa_txt */
51 u32 maskforPhySet = (u32)(content&0xE000);
53 odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_A, Addr|maskforPhySet);
54 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data));
57 void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data)
59 u32 content = 0x1001; /* RF_Content: radiob_txt */
60 u32 maskforPhySet = (u32)(content&0xE000);
62 odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_B, Addr|maskforPhySet);
64 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data));
67 void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data)
69 struct adapter *adapt = pDM_Odm->Adapter;
71 rtw_write8(adapt, Addr, Data);
72 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data));
75 void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)
77 struct adapter *adapter = pDM_Odm->Adapter;
79 PHY_SetBBReg(adapter, Addr, Bitmask, Data);
80 /* Add 1us delay between BB/RF register setting. */
83 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
84 ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n",
88 void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
89 u32 Bitmask, u32 Data)
93 } else if (Addr == 0xfd) {
95 } else if (Addr == 0xfc) {
97 } else if (Addr == 0xfb) {
99 } else if (Addr == 0xfa) {
101 } else if (Addr == 0xf9) {
104 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
105 ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n",
106 Addr, Bitmask, Data));
107 storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);
111 void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)
113 struct adapter *adapter = pDM_Odm->Adapter;
117 } else if (Addr == 0xfd) {
119 } else if (Addr == 0xfc) {
121 } else if (Addr == 0xfb) {
123 } else if (Addr == 0xfa) {
125 } else if (Addr == 0xf9) {
129 pDM_Odm->RFCalibrateInfo.RegA24 = Data;
130 PHY_SetBBReg(adapter, Addr, Bitmask, Data);
132 /* Add 1us delay between BB/RF register setting. */
134 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
135 ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n",