1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 ******************************************************************************/
20 #include <pwrseqcmd.h>
21 #include <usb_ops_linux.h>
23 /* This routine deals with the Power Configuration CMDs parsing
24 * for RTL8723/RTL8188E Series IC.
26 u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers,
27 struct wl_pwr_cfg pwrseqcmd[])
29 struct wl_pwr_cfg pwrcfgcmd = {0};
34 u32 poll_count = 0; /* polling autoload done. */
35 u32 max_poll_count = 5000;
38 pwrcfgcmd = pwrseqcmd[aryidx];
40 RT_TRACE(_module_hal_init_c_, _drv_info_,
41 ("rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)"
43 "msk(%#x) value(%#x)\n",
44 GET_PWR_CFG_OFFSET(pwrcfgcmd),
45 GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
46 GET_PWR_CFG_BASE(pwrcfgcmd),
47 GET_PWR_CFG_CMD(pwrcfgcmd),
48 GET_PWR_CFG_MASK(pwrcfgcmd),
49 GET_PWR_CFG_VALUE(pwrcfgcmd)));
51 /* Only Handle the command whose CUT is matched */
52 if (GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) {
53 switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
55 RT_TRACE(_module_hal_init_c_, _drv_info_,
56 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_READ\n"));
59 RT_TRACE(_module_hal_init_c_, _drv_info_,
60 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_WRITE\n"));
61 offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
63 /* Read the value from system register */
64 value = usb_read8(padapter, offset);
66 value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
67 value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) &
68 GET_PWR_CFG_MASK(pwrcfgcmd));
70 /* Write the value back to system register */
71 usb_write8(padapter, offset, value);
74 RT_TRACE(_module_hal_init_c_, _drv_info_,
75 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_POLLING\n"));
78 offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
80 value = usb_read8(padapter, offset);
81 value &= GET_PWR_CFG_MASK(pwrcfgcmd);
83 if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) &
84 GET_PWR_CFG_MASK(pwrcfgcmd)))
89 if (poll_count++ > max_poll_count) {
90 DBG_88E("Fail to polling Offset[%#x]\n", offset);
96 RT_TRACE(_module_hal_init_c_, _drv_info_,
97 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_DELAY\n"));
98 if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
99 udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
101 udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000);
104 /* When this command is parsed, end the process */
105 RT_TRACE(_module_hal_init_c_, _drv_info_,
106 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_END\n"));
109 RT_TRACE(_module_hal_init_c_, _drv_err_,
110 ("rtl88eu_pwrseqcmdparsing: Unknown CMD!!\n"));
115 aryidx++;/* Add Array Index */