1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 ******************************************************************************/
20 #include <pwrseqcmd.h>
21 #include <usb_ops_linux.h>
23 /* This routine deals with the Power Configuration CMDs parsing
24 * for RTL8723/RTL8188E Series IC.
26 u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers,
27 struct wl_pwr_cfg pwrseqcmd[])
29 struct wl_pwr_cfg pwrcfgcmd = {0};
34 u32 poll_count = 0; /* polling autoload done. */
35 u32 max_poll_count = 5000;
38 pwrcfgcmd = pwrseqcmd[aryidx];
40 RT_TRACE(_module_hal_init_c_, _drv_info_,
41 ("rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)"
43 "msk(%#x) value(%#x)\n",
44 GET_PWR_CFG_OFFSET(pwrcfgcmd),
45 GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
46 GET_PWR_CFG_CMD(pwrcfgcmd),
47 GET_PWR_CFG_MASK(pwrcfgcmd),
48 GET_PWR_CFG_VALUE(pwrcfgcmd)));
50 /* Only Handle the command whose CUT is matched */
51 if (GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) {
52 switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
54 RT_TRACE(_module_hal_init_c_, _drv_info_,
55 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_READ\n"));
58 RT_TRACE(_module_hal_init_c_, _drv_info_,
59 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_WRITE\n"));
60 offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
62 /* Read the value from system register */
63 value = usb_read8(padapter, offset);
65 value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
66 value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) &
67 GET_PWR_CFG_MASK(pwrcfgcmd));
69 /* Write the value back to system register */
70 usb_write8(padapter, offset, value);
73 RT_TRACE(_module_hal_init_c_, _drv_info_,
74 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_POLLING\n"));
77 offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
79 value = usb_read8(padapter, offset);
80 value &= GET_PWR_CFG_MASK(pwrcfgcmd);
82 if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) &
83 GET_PWR_CFG_MASK(pwrcfgcmd)))
88 if (poll_count++ > max_poll_count) {
89 DBG_88E("Fail to polling Offset[%#x]\n", offset);
95 RT_TRACE(_module_hal_init_c_, _drv_info_,
96 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_DELAY\n"));
97 if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
98 udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
100 udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000);
103 /* When this command is parsed, end the process */
104 RT_TRACE(_module_hal_init_c_, _drv_info_,
105 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_END\n"));
108 RT_TRACE(_module_hal_init_c_, _drv_err_,
109 ("rtl88eu_pwrseqcmdparsing: Unknown CMD!!\n"));
114 aryidx++;/* Add Array Index */